US20210074555A1 - Substrate processing device - Google Patents
Substrate processing device Download PDFInfo
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- US20210074555A1 US20210074555A1 US16/937,013 US202016937013A US2021074555A1 US 20210074555 A1 US20210074555 A1 US 20210074555A1 US 202016937013 A US202016937013 A US 202016937013A US 2021074555 A1 US2021074555 A1 US 2021074555A1
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- Prior art keywords
- substrate
- mold
- outer peripheral
- processing device
- resist
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- 239000000758 substrate Substances 0.000 title claims abstract description 171
- 230000002093 peripheral effect Effects 0.000 claims abstract description 69
- 230000007246 mechanism Effects 0.000 claims abstract description 32
- 239000004065 semiconductor Substances 0.000 claims description 82
- 238000004519 manufacturing process Methods 0.000 claims description 12
- 238000001514 detection method Methods 0.000 claims description 11
- 238000000034 method Methods 0.000 claims description 11
- 230000008569 process Effects 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 6
- 238000001020 plasma etching Methods 0.000 claims description 5
- 238000001039 wet etching Methods 0.000 claims description 4
- 238000000465 moulding Methods 0.000 claims 1
- 229920001187 thermosetting polymer Polymers 0.000 description 15
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 239000013078 crystal Substances 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- 239000010408 film Substances 0.000 description 5
- 239000010409 thin film Substances 0.000 description 5
- 230000006870 function Effects 0.000 description 4
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 229910003481 amorphous carbon Inorganic materials 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/6715—Apparatus for applying a liquid, a resin, an ink or the like
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/14—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
- B29C45/14336—Coating a portion of the article, e.g. the edge of the article
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/17—Component parts, details or accessories; Auxiliary operations
- B29C45/76—Measuring, controlling or regulating
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- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
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- G03F7/0002—Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
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- G—PHYSICS
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- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/16—Coating processes; Apparatus therefor
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
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- H01L21/31111—Etching inorganic layers by chemical means
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
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- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67126—Apparatus for sealing, encapsulating, glassing, decapsulating or the like
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67259—Position monitoring, e.g. misposition detection or presence detection
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C2945/00—Indexing scheme relating to injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould
- B29C2945/76—Measuring, controlling or regulating
- B29C2945/76003—Measured parameter
- B29C2945/76083—Position
- B29C2945/76096—Distance
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29L—INDEXING SCHEME ASSOCIATED WITH SUBCLASS B29C, RELATING TO PARTICULAR ARTICLES
- B29L2031/00—Other particular articles
- B29L2031/34—Electrical apparatus, e.g. sparking plugs or parts thereof
- B29L2031/3406—Components, e.g. resistors
Definitions
- the substrate processing device 200 includes the mold moving mechanism 250 that moves the mold 230 .
- the mold moving mechanism 250 includes a mold holding member 251 and a pin 253 .
- the mold holding member 251 is connected to the outside of the vertical portion 230 b of the mold 230 to hold the mold 230 in the substrate processing device 200 .
- the present invention is not limited thereto, and the mold holding member 251 may be connected to the outside of the flat surface portion 230 a of the mold 230 to hold the mold 230 in the substrate processing device 200 .
- the mold holding member 251 is connected to the pin 253 .
- the pin 253 can move the mold holding member 251 up and down with respect to the stage 110 in the vertical direction by a driving mechanism (not shown).
- the drive source may be, for example, hydraulic pressure or pneumatic pressure.
- the distance between the semiconductor substrate 115 and the mold 230 can be calculated by subtracting the distance between the distance measuring device 263 and the mold 230 from the measured value of the distance measuring device 263 .
- the distance measuring device 263 may be, for example, an optical type sensor or a laser type sensor.
- FIGS. 9 to 12 The operation of the substrate processing device according to the second embodiment of the present invention will be described with reference to FIGS. 9 to 12 .
- the mold moving mechanism 250 and the height detecting mechanism 260 are omitted in order to more clearly show the relationship between the mold 230 and the semiconductor substrate 115 .
- the flow chart showing the operation of the substrate processing device according to the second embodiment is the same except that the order of S 3 and S 4 is exchanged, and therefore the description will be given with reference to FIG. 2 .
- the resist material is applied on the hard mask 123 .
- the resist is selectively irradiated with UV rays or other energies by the exposure device to form the resist pattern. Further, the memory hole or the like is processed using the formed resist pattern as the mask.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Mechanical Engineering (AREA)
- Inorganic Chemistry (AREA)
- Plasma & Fusion (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Casting Or Compression Moulding Of Plastics Or The Like (AREA)
- Drying Of Semiconductors (AREA)
- Materials For Photolithography (AREA)
Abstract
Description
- This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2019-164253, filed on Sep. 10, 2019, the entire contents of which are incorporated herein by reference.
- Embodiments described herein relate generally to a substrate processing device.
- In the process of manufacturing a semiconductor device, a plurality of layers of a thin film is formed on a semiconductor wafer, a patterned resist is formed thereon, and the thin film is etched by reactive ion etching using the resist as a mask. The thin film exposed by such reactive ion etching may be further subjected to wet etching.
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FIG. 1A is a plan view of a substrate processing device according to the first embodiment; -
FIG. 1B is a cross-sectional view of a substrate processing device according to the first embodiment; -
FIG. 2 is a flowchart showing an operation of a substrate processing device according to the first embodiment; -
FIG. 3 is a cross-sectional view showing an operation of a substrate processing device according to the first embodiment; -
FIG. 4 is a cross-sectional view showing an operation of a substrate processing device according to the first embodiment; -
FIG. 5 is an enlarged view of a region surrounded by a dotted line inFIG. 4 ; -
FIG. 6 is a cross-sectional view showing an operation of a substrate processing device according to the first embodiment; -
FIG. 7 is a cross-sectional view showing an operation of a substrate processing device according to the first embodiment; -
FIG. 8 is a cross-sectional view of a substrate processing device according to the second embodiment; -
FIG. 9 is a cross-sectional view showing an operation of a substrate processing device according to the second embodiment; -
FIG. 10 is a cross-sectional view showing an operation of a substrate processing device according to the second embodiment; -
FIG. 11 is a cross-sectional view showing an operation of a substrate processing device according to the second embodiment; and -
FIG. 12 is a cross-sectional view showing an operation of a substrate processing device according to the second embodiment. - A substrate processing device according to one embodiment of the present invention includes: a stage configured to mount a substrate, a mold having a first surface facing an upper surface of an outer peripheral edge of the substrate and a second surface facing a side surface of an outer peripheral continuous with the upper surface of the outer peripheral edge, a mold moving mechanism configured to move the mold to bring the first surface close to the upper surface of the outer peripheral edge of the substrate and the second surface close to the side surface of the outer peripheral of the substrate, and a nozzle arranged in the mold, wherein the nozzle ejects resist.
- Hereinafter, a substrate processing device according to the present embodiment will be described in detail by referring to the drawings. In the following description, constituent elements having substantially the same functions and configurations are denoted by the same reference numerals, and duplicate description will be given only when necessary. Each of the embodiments described below exemplifies a device and a method for embodying the technical idea of this embodiment, and the technical idea of the embodiment does not specify the material, shape, structure, arrangement, and the like of the component parts as follows. Various modifications can be made to the technical idea of the embodiment in the claims.
- In order to make the description clearer, the drawings may be schematically represented with respect to widths, thicknesses, shapes, and the like of the respective portions in comparison with actual embodiments, but are merely an example and do not intended to limit the interpretation of the present invention. In the specification and each drawing, elements having the same functions as those described with reference to the preceding figures are denoted by the same reference numerals, and a repetitive description thereof may be omitted.
- The configuration of a substrate processing device according to the first embodiment of the present invention will be described with reference to
FIGS. 1A and 1B . - A
substrate processing device 100 according to the first embodiment of the present invention includes a stage (substrate mounting unit) 110 for mounting asemiconductor substrate 115, amold 130, amold moving mechanism 150, andheight detection mechanism 160. - The
semiconductor substrate 115 is, for example, a three-dimensional stacked layer type semiconductor memory. Thesemiconductor substrate 115 includes a siliconsingle crystal substrate 120 as a base, a stackedportion 121 having a high height in the vertical direction, and afilling portion 122 having a high height in the vertical direction, which is filled with a TEOS (tetraethyl orthosilicate) film adjacent to the stackedportion 121 and located in the peripheral of the siliconsingle crystal substrate 120. The stackedportion 121 is, for example, a memory cell unit in which many tungsten wiring layers (which functions as a word line) and a silicon dioxide layers (which functions as an insulating layer between the word lines vertically adjacent to each other) are alternately stacked. - When selectively removing these films by etching, at first, a
hard mask 123 is formed to cover the siliconsingle crystal substrate 120, the stackedportion 121, and thefilling portion 122. Thehard mask 123 is, for example, an amorphous carbon film that can be peeled off. As will be described later, after the outer peripheral edge of the substrate is protected, a resist material is applied on thehard mask 123. Next, the resist is selectively irradiated with UV rays or other energies by an exposure device to expose a resist pattern. Further, using the resist pattern formed after development as the mask, for example, a memory hole or the like is processed. - A step is formed at the outer peripheral edge of the
hard mask 123. Aside surface 123 bc of thehard mask 123 formed along the side surface of thefilling portion 122 forms a first step. Aside surface 123 bb formed at the terminal of thehard mask 123 extended on the siliconsingle crystal substrate 120, forms a second step. The siliconsingle crystal substrate 120 also has aside surface 123 ba of the outer peripheral. These side surfaces of theside surfaces 123 ba of the outer peripheral, theside surface 123 bb and theside surface 123 bc are also aside surface 123 b of the outer peripheral of thesemiconductor substrate 115. - The
substrate processing device 100 according to the first embodiment of the present invention includes thestage 110 for mounting thesemiconductor substrate 115. Thestage 110 is provided with an electrostatic chuck or a vacuum chuck to fix thesemiconductor substrate 115. The stage incorporates a heater for curing the resist, which will be described later. - The
substrate processing device 100 according to the first embodiment of the present invention includes themold 130. Themold 130 is matched to the shape of thesemiconductor substrate 115, and if thesemiconductor substrate 115 is disk-shaped, themold 130 is ring-shaped. Themold 130 includes a ring-shapedflat surface portion 130 a and a ring-shapedvertical portion 130 b. Themold 130 is in a raised position when thesemiconductor substrate 115 is carried in and out. When thesemiconductor substrate 115 is carried in, themold 130 is lowered. When themold 130 is moved to a position enclosing thesemiconductor substrate 115, anupper surface 123 a of the outer peripheral edge of thesemiconductor substrate 115 and theflat surface portion 130 a are closely faced each other. Theside surface 123 b of the outer peripheral continuous with theupper surface 123 a of the outer peripheral edge and thevertical portion 130 b are closely faced each other. - A
nozzle 135 for ejecting resists is formed on a region of themold 130 that connects theflat surface portion 130 a and thevertical portion 130 b. Thenozzle 135 is connected to a resist supply device (not shown). The plurality ofnozzle 135 is provided at a plurality of locations on the ring-shaped mold 130, for example, are provided at 12 locations every 30° in rotational symmetry. - The
substrate processing device 100 according to the first embodiment of the present invention includes themold moving mechanism 150 that moves themold 130. Themold moving mechanism 150 includes amold holding member 151 and apin 153. In this embodiment, themold holding member 151 is connected to the outside of thevertical portion 130 b of themold 130 to hold themold 130 in thesubstrate processing device 100. However, the present invention is not limited thereto, and themold holding member 151 may be connected to the outside of theflat surface portion 130 a of themold 130 to hold themold 130 in thesubstrate processing device 100. Themold holding member 151 is connected to thepin 153. Thepin 153 can move themold holding member 151 up and down with respect to thestage 110 in the vertical direction by a driving mechanism (not shown). The drive source may be, for example, hydraulic pressure or pneumatic pressure. - The
substrate processing device 100 according to the first embodiment of the present invention includes theheight detection mechanism 160 that detects the distance between themold 130 and thesemiconductor substrate 115. Theheight detection mechanism 160 according to this embodiment includes a fixingmember 161 and adistance measuring device 163. The fixingmember 161 fixes thedistance measuring device 163 to themold holding member 151. However, the present invention is not limited thereto, and the fixingmember 161 may directly fix thedistance measuring device 163 to themold 130. With this configuration, the distance between thedistance measuring device 163 and themold 130 can be fixed. Thedistance measuring device 163 measures the distance between thedistance measuring device 163 and thesemiconductor substrate 115 mounted on thestage 110. The distance between thesemiconductor substrate 115 and themold 130 can be calculated by subtracting the distance between thedistance measuring device 163 and themold 130 from the measured value of thedistance measuring device 163. Thedistance measuring device 163 may be, for example, an optical type sensor or a laser type sensor. - The operation of the substrate processing device according to the first embodiment of the present invention will be described with reference to
FIGS. 2 to 7 . InFIGS. 3 to 7 , themold moving mechanism 150 and theheight detecting mechanism 160 are omitted in order to more clearly show the relationship between themold 130 and thesemiconductor substrate 115. - As shown in
FIG. 2 , when thesemiconductor substrate 115 is loaded into the substrate processing device 100 (FIG. 2 S1), theheight detection mechanism 160 calculates the distance between themold 130 and the semiconductor substrate 115 (FIG. 2 S2). The distance between themold 130 and thesemiconductor substrate 115 may be, for example, the distance between theflat surface portion 130 a of themold 130 and theupper surface 123 a of the outer peripheral edge of thesemiconductor substrate 115. As shown inFIG. 3 , themold moving mechanism 150 lowers themold 130 toward thesemiconductor substrate 115 to a specified height (FIG. 2 S3). - The
mold moving mechanism 150 lowers themold 130 to a position (specified height) where theupper surface 123 a of the outer peripheral edge of thesemiconductor substrate 115 and theflat surface portion 130 a are closely faced each other, and theside surface 123 b of the outer peripheral continuous with theupper surface 123 a of the outer peripheral edge and thevertical portion 130 b are closely faced each other. As shown inFIG. 4 , the thermosetting resist 140 is injected through thenozzle 135 in the position where themold 130 is lowered toward thesemiconductor substrate 115 to the specified height (FIG. 2 S4). -
FIG. 5 is an enlarged view of the dotted line portion ofFIG. 4 . When themold 130 is lowered to the specified height, only a slight gap is formed that is approximately in contact with theside surface 123 ba of the outer peripheral of the siliconsingle crystal substrate 120 and thevertical portion 130 b of themold 130. On the other hand, the highest portion of theupper surface 123 a of the outer peripheral edge of thehard mask 123 and theflat surface portion 130 a of themold 130 are spaced apart by a predetermined distance. The space formed by an outer peripheral edge of thesemiconductor substrate 115 and themold 130 is filled with the thermosetting resist 140. A slight gap between the highest portion of theupper surface 123 a of the outer peripheral edge of thehard mask 123 and theflat surface portion 130 a of themold 130 is also filled with the thermosetting resist 140. - In
FIG. 5 , dimensions such as height, thickness, length, and the like are shown as an example. The heights of the stackedportion 121 and the fillingportion 122 are, for example, 6.6 μm, and the thickness of thehard mask 123 is, for example, 1.7 μm. The length from the first step to thevertical portion 130 b is, for example, 1.1 mm. The height of theflat surface portion 130 a of themold 130 andupper surface 123 a of the outer peripheral edge of thesemiconductor substrate 115 is, for example, 1 μm. That is, the specified height may be, for example, 1 μm. The specified height can be appropriately selected depending on the amount and viscosity of the resist 140 to be injected. - Subsequently, the injected thermosetting resist 140 is cured (
FIG. 2 S5) as shown inFIG. 6 . Thestage 110 incorporates the heater which heats the thermosetting resist 140 to, for example, 130° C. to cure the thermosetting resist 140, thereby forming aprotection ring 140 b of the outer peripheral edge. The heater is incorporated in thestage 110 far from thenozzle 135 so that the liquid resist 140 in thenozzle 135 is not cured. - Subsequently, as shown in
FIG. 7 , after forming theprotection ring 140 b of the outer peripheral edge on thesemiconductor substrate 115, themold 130 is raised by the mold moving mechanism 250 (FIG. 2 S6). Thesemiconductor substrate 115 is then ejected from the substrate processing device 100 (FIG. 2 S7). - The method of manufacturing the semiconductor device according to the embodiment of the present invention is as follows. First, as described above, the
semiconductor substrate 115 having the step in the outer peripheral edge (the step formed in the hard mask 123) is prepared, this is covered with themold 130, theupper surface 123 a of the outer peripheral edge of thesemiconductor substrate 115 and theflat surface portion 130 a are closely faced, theside surface 123 b of the outer peripheral continuous with theupper surface 123 a of the outer peripheral edge and thevertical portion 130 b are closely faced each other. Next, the thermosetting resist 140 is injected from thenozzle 135, and the thermosetting resist 140 is cured by the heater incorporated in thestage 110, thereby forming theprotection ring 140 b of the outer peripheral edge on thesemiconductor substrate 115. - Subsequently, a resist material is applied on the
hard mask 123. Next, the resist material is selectively irradiated with energies such as UV rays by the exposure device to expose the resist pattern. Further, using the resist pattern formed after development as the mask, for example, the memory hole or the like is processed. - In this way, even when etching a thin film having a large step on the semiconductor substrate, thinning (thinned film) does not occur due to the presence of the
protection ring 140 b of the outer peripheral edge. Therefore, the resist is not penetrated by the reactive ion etching process, and the substrate is not damaged by the subsequent wet etching process. - The configuration of the substrate processing device according to the second embodiment of the present invention will be described with reference to
FIG. 8 . - A
substrate processing device 200 according to the second embodiment of the present invention includes thestage 110 for mounting thesemiconductor substrate 115, amold 230, and themold moving mechanism 250, andheight detection mechanism 260. - The
semiconductor substrate 115, as described in the first embodiment, for example, the three-dimensional stacked layer type semiconductor memory. Thehard mask 123 is formed to cover the siliconsingle crystal substrate 120, the stackedportion 121, and the fillingportion 122. - A step formed in the outer peripheral edge portion of the
semiconductor substrate 115 of thehard mask 123, theside surface 123 ba of the outer peripheral, theside surface 123 bb and theside surface 123 bc are also as described above in that theside surface 123 b of the outer peripheral of thesemiconductor substrate 115. - The
substrate processing device 200 according to the second embodiment of the present invention includes thestage 110 for mounting thesemiconductor substrate 115. Thestage 110 is provided with the electrostatic chuck or the vacuum chuck to fix thesemiconductor substrate 115. The stage incorporates the heater for curing the resist. - The
substrate processing device 200 according to the second embodiment of the present invention includes themold 230. Themold 230 is also matched to the shape of thesemiconductor substrate 115, and if thesemiconductor substrate 115 is disk-shaped, themold 230 is ring-shaped. Themold 230 includes a ring-shapedflat surface portion 230 a and a ring-shapedvertical portion 230 b. Themold 230 is in the raised position when thesemiconductor substrate 115 is carried in and out. When thesemiconductor substrate 115 is carried in, themold 230 is lowered. When themold 230 is moved to a position enclosing thesemiconductor substrate 115, theupper surface 123 a of the outer peripheral edge of thesemiconductor substrate 115 and theflat surface portion 230 a are closely faced each other. Theside surface 123 b of the outer peripheral continuous with theupper surface 123 a of the outer peripheral edge and thevertical portion 230 b are closely faced each other. - A
nozzle 235 for dropping the resist is formed on theflat surface portion 230 a of themold 230. Thenozzle 235 is connected to the resist supply device (not shown). The plurality ofnozzle 235 is provided at a plurality of locations on the ring-shapedmold 230, for example, are provided at 12 locations every 30° in rotational symmetry. - The
substrate processing device 200 according to the second embodiment of the present invention includes themold moving mechanism 250 that moves themold 230. Themold moving mechanism 250 includes amold holding member 251 and apin 253. In this embodiment, themold holding member 251 is connected to the outside of thevertical portion 230 b of themold 230 to hold themold 230 in thesubstrate processing device 200. However, the present invention is not limited thereto, and themold holding member 251 may be connected to the outside of theflat surface portion 230 a of themold 230 to hold themold 230 in thesubstrate processing device 200. Themold holding member 251 is connected to thepin 253. Thepin 253 can move themold holding member 251 up and down with respect to thestage 110 in the vertical direction by a driving mechanism (not shown). The drive source may be, for example, hydraulic pressure or pneumatic pressure. - The
substrate processing device 200 according to the second embodiment of the present invention includes theheight detection mechanism 260 that detects the distance between themold 230 and thesemiconductor substrate 115. Theheight detection mechanism 260 according to this embodiment includes a fixingmember 261 and adistance measuring device 263. The fixingmember 261 fixes thedistance measuring device 263 to themold holding member 251. However, the present invention is not limited thereto, and the fixingmember 261 may directly fix thedistance measuring device 263 to themold 230. With this configuration, the distance between thedistance measuring device 263 and themold 230 can be fixed. Thedistance measuring device 263 measures the distance between thedistance measuring device 263 and thesemiconductor substrate 115 mounted on thestage 110. The distance between thesemiconductor substrate 115 and themold 230 can be calculated by subtracting the distance between thedistance measuring device 263 and themold 230 from the measured value of thedistance measuring device 263. Thedistance measuring device 263 may be, for example, an optical type sensor or a laser type sensor. - The operation of the substrate processing device according to the second embodiment of the present invention will be described with reference to
FIGS. 9 to 12 . InFIGS. 9 to 12 , themold moving mechanism 250 and theheight detecting mechanism 260 are omitted in order to more clearly show the relationship between themold 230 and thesemiconductor substrate 115. The flow chart showing the operation of the substrate processing device according to the second embodiment is the same except that the order of S3 and S4 is exchanged, and therefore the description will be given with reference toFIG. 2 . - As shown in
FIG. 2 , when thesemiconductor substrate 115 is loaded into the substrate processing device 200 (FIG. 2 S1), theheight detection mechanism 260 calculates the distance between themold 230 and the semiconductor substrate 115 (FIG. 2 S2). The distance between themold 230 and thesemiconductor substrate 115 may be, for example, the distance between theflat surface portion 230 a of themold 230 and theupper surface 123 a of the outer peripheral edge of thesemiconductor substrate 115. As shown inFIG. 9 , themold moving mechanism 250 slightly lowers themold 230 toward thesemiconductor substrate 115. There is enough distance between the surface of thesemiconductor substrate 115 and theflat surface portion 230 a of themold 230. - As shown in
FIG. 10 , in this state, a thermosetting resist 240 is injected from the nozzle (FIG. 2 S4). A dropped thermosetting resist 240 a is discretely located on the surface of thesemiconductor substrate 115. - Subsequently, as shown in
FIG. 11 , themold moving mechanism 250 further lowers themold 230 to the specified height toward the semiconductor substrate 115 (FIG. 2 S3). As a result, theupper surface 123 a of the outer peripheral edge of thesemiconductor substrate 115 and theflat surface portion 230 a are closely faced each other, and theside surface 123 b of the outer peripheral continuous with theupper surface 123 a of the outer peripheral edge and thevertical portion 230 b are closely faced each other. The positional relationship in this state is omitted here since it may be the same as that shown inFIG. 5 . As a result of themold 230 moving toward thesemiconductor substrate 115 to a specified height, the thermosetting resist 240 a is mushed and spreads on the upper surface of the outer peripheral edge of thesemiconductor substrate 115. - Subsequently, the filled thermosetting resist 240 a is cured (
FIG. 2 S5). Thestage 110 incorporates the heater which heats the thermosetting resist 240 to, for example, 130° C. to cure the resist 240, thereby forming aprotection ring 240 b of the outer peripheral edge. - Subsequently, as shown in
FIG. 12 , after forming theprotection ring 240 b of the outer peripheral edge on thesemiconductor substrate 115, themold 230 is raised by the mold moving mechanism 250 (FIG. 2 S6). Thesemiconductor substrate 115 is then ejected from the substrate processing device 200 (FIG. 2 S7). - The method of manufacturing the semiconductor device using the substrate processing device according to the second embodiment is also as described above. First, prepare the
semiconductor substrate 115 with a step in the outer peripheral edge (the step formed in the hard mask 123). Then, the thermosetting resist 240 is dropped onto the outer peripheral edge of thesemiconductor substrate 115. This is covered with themold 230 so that theupper surface 123 a of the outer peripheral edge of thesemiconductor substrate 115 and theflat surface portion 230 a closely faced, and theside surface 123 b of the outer peripheral continuous to theupper surface 123 a of the outer peripheral edge and thevertical portion 230 b are closely faced each other. Then, the thermosetting resist 240 a is cured by the heater to form theprotection ring 240 b of the outer peripheral edge on thesemiconductor substrate 115. - Subsequently, the resist material is applied on the
hard mask 123. Next, the resist is selectively irradiated with UV rays or other energies by the exposure device to form the resist pattern. Further, the memory hole or the like is processed using the formed resist pattern as the mask. - In this way, even when etching a thin film having a large step on the semiconductor substrate, thinning (thinned film) does not occur due to the presence of the
protection ring 240 b of the outer peripheral edge. Therefore, the resist is not penetrated by the reactive ion etching process, and the substrate is not damaged by the subsequent wet etching process. - In the above description, the substrate processing device used in forming the three-dimensional stacked layer type semiconductor memory on the silicon
single crystal substrate 120 has been described as an example, the present invention is not limited thereto, for example, it may be applied to the substrate processing device used in the production of various devices requiring protection of the outer periphery of the substrate (a logic semiconductor device, an individual semiconductor device, etc.). The shape of the substrate is not limited to a circular shape, for example, it may be a rectangular shape as long as it is a display substrate or the like. - While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel devices and methods described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modification as would fall within the scope and spirit of the inventions.
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