US20200163227A1 - Method of manufacturing electronic board and mounting sheet - Google Patents
Method of manufacturing electronic board and mounting sheet Download PDFInfo
- Publication number
- US20200163227A1 US20200163227A1 US16/244,530 US201916244530A US2020163227A1 US 20200163227 A1 US20200163227 A1 US 20200163227A1 US 201916244530 A US201916244530 A US 201916244530A US 2020163227 A1 US2020163227 A1 US 2020163227A1
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- United States
- Prior art keywords
- substrate
- electronic component
- resin layer
- solder
- interfaces
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 31
- 239000011347 resin Substances 0.000 claims abstract description 153
- 229920005989 resin Polymers 0.000 claims abstract description 153
- 229910000679 solder Inorganic materials 0.000 claims abstract description 138
- 239000000758 substrate Substances 0.000 claims abstract description 96
- 238000002844 melting Methods 0.000 claims abstract description 31
- 230000008018 melting Effects 0.000 claims abstract description 31
- 238000010438 heat treatment Methods 0.000 claims abstract description 6
- 238000000034 method Methods 0.000 claims description 124
- 229910045601 alloy Inorganic materials 0.000 claims description 44
- 239000000956 alloy Substances 0.000 claims description 44
- 238000005476 soldering Methods 0.000 claims description 10
- 239000000463 material Substances 0.000 description 23
- 238000010586 diagram Methods 0.000 description 19
- 239000000203 mixture Substances 0.000 description 7
- 239000010408 film Substances 0.000 description 6
- 229910020830 Sn-Bi Inorganic materials 0.000 description 4
- 229910018728 Sn—Bi Inorganic materials 0.000 description 4
- 238000001816 cooling Methods 0.000 description 4
- 239000013039 cover film Substances 0.000 description 4
- 239000004925 Acrylic resin Substances 0.000 description 2
- 229920000178 Acrylic resin Polymers 0.000 description 2
- 229910002482 Cu–Ni Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000000805 composite resin Substances 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 239000000945 filler Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229920000139 polyethylene terephthalate Polymers 0.000 description 2
- 239000005020 polyethylene terephthalate Substances 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 229910017944 Ag—Cu Inorganic materials 0.000 description 1
- 229910016331 Bi—Ag Inorganic materials 0.000 description 1
- 229910017932 Cu—Sb Inorganic materials 0.000 description 1
- -1 Polyethylene Terephthalate Polymers 0.000 description 1
- 229910020836 Sn-Ag Inorganic materials 0.000 description 1
- 229910020888 Sn-Cu Inorganic materials 0.000 description 1
- 229910020988 Sn—Ag Inorganic materials 0.000 description 1
- 229910019204 Sn—Cu Inorganic materials 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000013021 overheating Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 230000003685 thermal hair damage Effects 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3494—Heating methods for reflowing of solder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/301—Assembling printed circuits with electric components, e.g. with resistor by means of a mounting structure
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3463—Solder compositions in relation to features of the printed circuit board or the mounting process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10954—Other details of electrical connections
- H05K2201/10977—Encapsulated connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/0465—Shape of solder, e.g. differing from spherical shape, different shapes due to different solder pads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/047—Soldering with different solders, e.g. two different solders on two sides of the PCB
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the present invention relates to a method of manufacturing an electronic board and a mounting sheet.
- the conventional method has a possibility that the solder joints between the electronic components and the substrate cannot be efficiently and certainly reinforced by using resin materials.
- the present invention has been achieved in view of the above problem, and an object of the invention is to provide a method that can efficiently and certainly reinforce a solder joint between an electronic component and a substrate by using a resin material.
- a method of manufacturing an electronic board includes: preparing a substrate in which substrate-side solder parts are provided on electrodes; preparing a mounting sheet having a resin layer in which a plurality of voids is formed in accordance with positions of the electrodes; attaching the resin layer to at least one of a first electronic component and the substrate so that interfaces of the first electronic component or the substrate-side solder parts are located inside the respective voids; causing the interfaces and the substrate-side solder parts to face each other at positions of the respective voids; and melting the substrate-side solder parts by heating to join the interfaces and the electrodes.
- a mounting sheet according to the second aspect of the present invention is used for mounting an electronic component on a substrate, the mounting sheet including a resin layer in which a plurality of voids is formed in accordance with positions of electrodes of the substrate to be mounted, wherein the voids penetrate through the resin layer in a thickness direction of the resin layer.
- the above-described aspects of the present invention can efficiently and certainly reinforce a solder joint between an electronic component and a substrate by using a resin material.
- FIG. 1 is a schematic diagram illustrating an electronic board obtained by a method of manufacturing the electronic board according to a first embodiment
- FIG. 2A is a plan view illustrating a mounting sheet according to the first embodiment
- FIG. 2B is a cross-sectional diagram taken along II-II arrows in FIG. 2A ;
- FIG. 3A is a diagram explaining the method of manufacturing the electronic board according to the first embodiment
- FIG. 3B is a diagram explaining a process following FIG. 3A ;
- FIG. 3C is a diagram explaining a process following FIG. 3B ;
- FIG. 3D is a diagram explaining a process following FIG. 3C ;
- FIG. 4A is a diagram explaining a method of manufacturing an electronic board according to a second embodiment
- FIG. 4B is a diagram explaining a process following FIG. 4A ;
- FIG. 4C is a diagram explaining a process following FIG. 4B ;
- FIG. 4D is a diagram explaining a process following FIG. 4C ;
- FIG. 5A is a diagram explaining a method of manufacturing an electronic board according to a third embodiment
- FIG. 5B is a diagram explaining a process following FIG. 5A ;
- FIG. 6A is a diagram explaining a method of manufacturing an electronic board according to a fourth embodiment
- FIG. 6B is a diagram explaining a process following FIG. 6A ;
- FIG. 6C is a diagram explaining a process following FIG. 6B ;
- FIG. 7A is a plan view illustrating a mounting sheet according to a fifth embodiment
- FIG. 7B is a cross-sectional diagram taken along VII-VII arrows in FIG. 7A ;
- FIG. 8A is a diagram explaining a method of manufacturing an electronic board according to a first modified example of the first embodiment
- FIG. 8B is a diagram explaining a method of manufacturing an electronic board according to a second modified example of the first embodiment.
- FIG. 8C is a diagram explaining a method of manufacturing an electronic board according to a third modified example of the first embodiment.
- the method of manufacturing the electronic board according to the present embodiment can manufacture an electronic board S as illustrated in FIG. 1 , for example.
- the electronic board S includes a substrate 2 and first and second electronic components 3 and 4 mounted on the substrate 2 .
- the substrate 2 includes a substrate body 2 a formed of insulating materials and electrodes 2 b formed of electric conductors (see FIG. 3A ).
- the first electronic component 3 and the second electronic component 4 have interfaces electrically connected to the electrodes 2 b.
- the first electronic component 3 and the second electronic component 4 can employ IC (Integrated Circuit) chip such as LSI (Large Scale Integration) and SSI (Small Scale Integration). Particularly, the first electronic component 3 may employ relatively expensive components such as CPU (Central Processing Unit), GPU (Graphic Processing Unit), memory, and SSD (Solid State Drive), and the second electronic component 4 may employ the other components. The reason will be described later.
- IC Integrated Circuit
- the first electronic component 3 and the second electronic component 4 are mounted on the substrate 2 by using reflow soldering.
- “%” on solder alloy composition is “mass %” unless otherwise specified.
- the electronic board S may not include the second electronic component 4 .
- the electronic board S may include a plurality of the first electronic components 3 or a plurality of the second electronic components 4 .
- FIGS. 2A and 2B illustrate an example of a mounting sheet 1 A used in the method of manufacturing the electronic board according to the present embodiment.
- the mounting sheet 1 A includes a resin layer 10 formed of resin, a first cover film 20 that covers a top surface of the resin layer 10 , and a second cover film 30 that covers a bottom surface of the resin layer 10 .
- the thickness direction of the resin layer 10 indicates a vertical direction Z.
- One direction perpendicular to the vertical direction Z indicates a horizontal direction X and a direction perpendicular to both directions of the vertical direction Z and the horizontal direction X indicates a front-back direction Y.
- the substrate 2 side and the first-electronic-component 3 side of the resin layer respectively mean the lower and upper sides.
- a planar view means to view a target object from the vertical direction Z.
- the resin layer 10 is a part that acts as the underfill of the first electronic component 3 in the electronic board S.
- the resin layer 10 can use resin materials (composite resin) including epoxy resin, acrylic resin, silicon resin, etc.
- resin materials composite resin
- a filler such as glass may be added to the resin materials of the resin layer 10 .
- the resin layer 10 may have an adherence property.
- the specific material, composition, and property of the resin layer 10 are not limited to the above and thus can be appropriately changed.
- the resin layer 10 is formed in a square shape in a planar view.
- the outer shape of the resin layer 10 can be appropriately changed. However, it is preferable that the outer shape has a shape tailored to a main body 3 a (see FIG. 3A ) of the first electronic component 3 . That is to say, if the main body 3 a of the first electronic component 3 has a square shape in a planar view, the resin layer 10 may have a square shape as illustrated in FIG. 2A . Alternatively, if the main body 3 a of the first electronic component 3 has a rectangular shape in a planar view, the resin layer 10 may have a rectangular shape.
- a plurality of voids 11 is formed in the resin layer 10 .
- each of the voids 11 is a cylindrical through-hole and penetrates through the resin layer 10 in the vertical direction Z. For this reason, the voids 11 are open toward both upward and downward directions.
- the shape of the voids 11 may be appropriately changed in accordance with interfaces 3 b of the first electronic component 3 or substrate-side solder parts 2 c (described later) of the substrate 2 .
- the voids 11 are arranged at intervals in the horizontal direction X and the front-back direction Y. In other words, the voids 11 are arranged in a grid pattern.
- the arrangement of the voids 11 can be appropriately changed, but it is preferable that the voids are arranged in accordance with the positions of the interfaces 3 b of the first electronic component 3 .
- FIG. 3A illustrates the case where the first electronic component 3 is BGA (Ball Grid Array) and hemispherical solder balls (bumps) as the interfaces 3 b are arranged on the bottom surface of the main body 3 a side by side in a grid pattern.
- the diameter of the solder ball can be appropriately changed, but it is preferable that the diameter is around 100 to 1000 ⁇ m, for example.
- the arrangement of the voids 11 as illustrated in FIG. 2A can be employed.
- the interfaces 3 b of the first electronic component 3 may be lead frames (electrodes) that extend from the main body 3 a in the horizontal direction X or in the front-back direction Y and then bend downward.
- the arrangement of the voids 11 in the resin layer 10 may be decided in accordance with the placement positions of the lead frames on the substrate 2 .
- the voids 11 may be intermittently arranged along the outer shape of the main body 3 a of the first electronic component 3 in a planar view.
- the first electronic component 3 may expose electrode terminals thereof on the bottom surface of the main body 3 a without having solder balls and/or lead frames.
- the exposed electrode terminals of the first electronic component 3 act as the interfaces 3 b
- the electrodes 2 b of the substrate 2 and the electrode terminals of the first electronic component 3 are electrically connected to each other only by the substrate-side solder parts 2 c.
- a plurality of the substrate-side solder parts 2 c is provided on the top surface of the substrate 2 .
- the substrate-side solder parts 2 c covers the electrodes 2 b from above.
- the substrate-side solder parts 2 c include solder alloy.
- the materials of the substrate-side solder parts 2 c can employ solder paste, for example. Particularly, when the interfaces 3 b of the first electronic component 3 are solder balls, solder alloy, whose melting point is lower than that of the solder balls, is suitable as the materials of the substrate-side solder parts 2 c .
- the substrate-side solder parts 2 c may include a soldering accelerator such as flux.
- a resin sheet etc. can be used as the cover films 20 and 30 .
- the specific materials of the cover films 20 and 30 include PET (Polyethylene Terephthalate) and the like.
- the melting point (T 1 to be described later) of the solder alloy included in the substrate-side solder parts 2 c is a low melting point not more than 150° C. for example.
- solder alloy low melting point solder
- a heating temperature in a reflow process to be described later can be suppressed to be low and thus an effect caused by a difference of a thermal expansion rate between the substrate 2 , the first electronic component 3 , and the solder alloy is reduced. Therefore, it is possible to suppress stress concentration on joint parts M during a cooling process after the reflow process.
- Solder alloy having a melting point not more than 150° C. includes Sn—Bi based solder alloy.
- Sn—Bi based solder alloy includes a Sn—Bi solder alloy, a Sn—Bi—Cu solder alloy, a Sn—Bi—Ni solder alloy, a Sn—Bi—Cu—Ni solder alloy, a Sn—Bi—Ag solder alloy, and a Sn—Bi—Sb solder alloy.
- the substrate-side solder parts 2 c may include one or two or more solder alloys as described above, or may include a solder alloy having another composition.
- a Bi-contained amount is 30 to 80%.
- a melting point thereof can be made constant at 138° C. for example.
- the Bi-contained amount is 35 to 70% and is further desirable that it is 53 to 61%.
- the materials of the solder balls can employ, for example, a Sn—Cu solder alloy, a Sn—Ag solder alloy, a Sn—Ag—Cu solder alloy, a Sn—Ag—Cu—Ni solder alloy, a Sn—Ag—Cu—Sb solder alloy, a Sn—Ag—Cu—Ni—Sb solder alloy, and the like. It is preferable that these solder alloys show a melting point not to melt during the reflow process to be described later, and these solder alloys may be high melting point solder whose melting point is not less than 200° C. for example.
- compositions of the solder alloy of the substrate-side solder parts 2 c and the interfaces 3 b as described above are an example, and thus can be appropriately changed.
- the composition explained as the solder alloy of the substrate-side solder parts 2 c may be used for the solder alloy of the interfaces 3 b .
- both of the interfaces 3 b and the substrate-side solder parts 2 c may be formed with low melting point solder or both may be formed with high melting point solder.
- the substrate-side solder parts 2 c may be formed with low melting point solder or with high melting point solder.
- the method of manufacturing the electronic board using the mounting sheet 1 A configured as described above includes a substrate preparing process, a sheet preparing process, an attaching process, a superimposing process, and the reflow process.
- a substrate preparing process includes a substrate preparing process, a sheet preparing process, an attaching process, a superimposing process, and the reflow process.
- the substrate preparing process is to prepare the substrate 2 in which the substrate-side solder parts 2 c are provided on the electrodes 2 b .
- a method of providing the substrate-side solder parts 2 c on the substrate 2 can employ screen printing for example.
- the sheet preparing process is to prepare the mounting sheet 1 A having the resin layer 10 in which the plurality of voids 11 are formed in accordance with the positions of the electrodes 2 b .
- the mounting sheet 1 A may include the cover films 20 and 30 as illustrated in FIG. 2B or may not include these cover films.
- the present process is to previously remove the cover films 20 and 30 before the attaching process and to expose the top surface and the bottom surface of the resin layer 10 .
- the attaching process is performed after the sheet preparing process.
- the attaching process is to attach the resin layer 10 to at least one of the first electronic component 3 and the substrate 2 .
- the resin layer 10 is attached to the first electronic component 3 .
- the position adjustment between the resin layer 10 and the first electronic component 3 is performed so that the interfaces 3 b of the first electronic component 3 are located inside the voids 11 and then the resin layer 10 is attached to the main body 3 a of the first electronic component 3 .
- the interfaces 3 b are electrode terminals exposed on the bottom surface of the main body 3 a of the first electronic component 3 , at least a portion of each of the electrode terminals is surrounded by an upper opening of the corresponding void 11 .
- the position adjustment may be performed by using image control etc. or may be performed by using positioning pins etc.
- the resin layer 10 has an adherence property
- the resin layer 10 and the first electronic component 3 adhere to each other by making the resin layer 10 have contact with the main body 3 a . Therefore, the mismatch of relative positions between the voids 11 and the interfaces 3 b can be suppressed in the following processes.
- the resin layer 10 may be attached to the substrate 2 .
- the position adjustment between the resin layer 10 and the substrate 2 is performed so that the substrate-side solder parts 2 c are located inside the voids 11 and then the resin layer 10 is attached to the substrate body 2 a .
- the position adjustment may be performed by using image control etc. or may be performed by using positioning pins etc.
- the resin layer 10 has an adherence property, the resin layer 10 and the substrate 2 adhere to each other by making the resin layer 10 have contact with the substrate body 2 a . Therefore, the mismatch of relative positions between the voids 11 and the substrate-side solder parts 2 c can be suppressed in the following processes.
- solder paste may be secondarily provided on the surfaces of the interfaces 3 b of the first electronic component 3 .
- the superimposing process is performed after the attaching process. As illustrated in FIG. 3C , the superimposing process is to sandwich the resin layer 10 between the first electronic component 3 and the substrate 2 . At this time, the position adjustment between the first electronic component 3 and the substrate 2 is performed so that the interfaces 3 b of the first electronic component 3 and the substrate-side solder parts 2 c face each other at the positions of the respective voids 11 .
- the state where “the interfaces 3 b and the substrate-side solder parts 2 c face each other at the positions of the respective voids 11 ” includes at least the following two cases. The first case indicates that the interfaces 3 b and the substrate-side solder parts 2 c face each other or are in contact with each other through the respective voids 11 .
- the second case indicates that one of the interfaces 3 b and the substrate-side solder parts 2 c penetrates through the respective voids 11 , and portions thereof protruding from the voids 11 and the other of the interfaces 3 b and the substrate-side solder parts 2 c face each other or are in contact with each other.
- the position adjustment between the first electronic component 3 and the substrate 2 in the superimposing process may be performed by using image control etc. or may be performed by using positioning pins etc.
- the interfaces 3 b are solder balls
- the solder balls have contact with the top surfaces of the substrate-side solder parts 2 c .
- the interfaces 3 b are lead frames
- the lead frames may have contact with the top surfaces of the substrate-side solder parts 2 c or portions of the lead frames may be inserted into the substrate-side solder parts 2 c .
- the interfaces 3 b of the first electronic component 3 and the substrate-side solder parts 2 c have contact with each other inside the respective voids 11 , but the present embodiment is not limited to this.
- the interfaces 3 b of the first electronic component 3 and the substrate-side solder parts 2 c are to be joined in the reflow process to be described later, they may face each other or may not be in contact with each other in a state where one of the interfaces 3 b and the substrate-side solder parts 2 c is located outside the voids 11 .
- the resin layer 10 has an adherence property
- the first electronic component 3 and the substrate 2 adhere to each other by using the resin layer 10 after the superimposing process. Therefore, the mismatch of relative positions between the interfaces 3 b and the substrate-side solder parts 2 c can be suppressed in the following processes.
- the reflow process is performed after the superimposing process.
- preliminary overheating of, e.g., about 50 to 100° C. may be performed to remove a solvent contained in the substrate-side solder parts 2 c .
- the substrate 2 is put in a reflow furnace to be heated in the state where the resin layer 10 is sandwiched between the first electronic component 3 and the substrate 2 .
- the joint parts M soldder joints
- the maximum temperature in the reflow process is represented with “Tr”.
- “Tr” is 150 to 180° C.
- the shapes of the interfaces 3 b are changed in FIG. 3D , but the shapes of the interfaces 3 b may not be changed when the interfaces 3 b are lead frames or electrode terminals exposed on the bottom surface of the main body 3 a.
- FIGS. 3A to 3D the mounting process of the first electronic component 3 is illustrated in FIGS. 3A to 3D , but it is sufficient that the same attaching process and superimposing process are also performed on the second electronic component 4 and the reflow process is performed on the second electronic component simultaneously with the first electronic component 3 .
- the resin layer 10 is also heated and thus has flowability to some extent. For this reason, the shape of the resin layer 10 is also changed to surround the joint parts M.
- the joint parts M and the resin layer 10 are cured to stabilize the respective shapes.
- the resin layer 10 acts as underfill, the first electronic component 3 and the substrate 2 are adhesively fixed by the resin layer 10 to obtain the electronic board S.
- the method of manufacturing the electronic board according to the present embodiment includes: the substrate preparing process of preparing the substrate 2 in which the substrate-side solder parts 2 c are provided on the electrodes 2 b ; the sheet preparing process of preparing the mounting sheet 1 A having the resin layer 10 in which the plurality of voids 11 is formed in accordance with the positions of the electrodes 2 b ; the attaching process of attaching the resin layer 10 to at least one of the first electronic component 3 and the substrate 2 so that the interfaces 3 b of the first electronic component 3 or the substrate-side solder parts 2 c are located inside the voids 11 ; the superimposing process of making the interfaces 3 b and the substrate-side solder parts 2 c face each other at the positions of the voids 11 ; and the reflow process of melting the substrate-side solder parts 2 c by heating to join the interfaces 3 b and the electrodes 2 b.
- the reflow process joins the substrate-side solder parts 2 c and the interfaces 3 b of the first electronic component 3 to form the joint parts M and bonds the main body 3 a of the first electronic component 3 to the substrate 2 by using the resin layer 10 . Therefore, it is not necessary to form the joint parts M and the underfill in separate processes, and the electronic board S having the raised joint strength between the electronic component 3 and the substrate 2 can be more efficiently manufactured.
- the joint parts M can be covered without a gap and thus the joint parts M can be surely reinforced by optimizing the thickness of the resin layer 10 of the mounting sheet 1 A and the amount of solder of the substrate-side solder parts 2 c.
- the mounting sheet 1 A includes the resin layer 10 in which the plurality of voids 11 is formed in accordance with the positions of the electrodes 2 b of the substrate 2 to be mounted, and the voids 11 penetrate through the resin layer 10 in the vertical direction Z.
- the method of manufacturing the electronic board as described above can be executed by using the mounting sheet 1 A.
- the mounting sheet 1 A may include the first cover film 20 that covers the top surface of the resin layer 10 and the second cover film 30 that covers the bottom surface of the resin layer 10 .
- the present embodiment is different from the first embodiment in terms of including a preliminary mounting process to be explained later.
- the preliminary mounting process is to previously mount the second electronic component 4 on the substrate 2 before mounting the first electronic component 3 on the substrate 2 .
- the second electronic component 4 is electrically connected to the electrodes 2 b of the substrate 2 by joint parts M (solder joints).
- joint parts M soldder joints
- the second electronic component 4 is mounted on the substrate 2 with reflow soldering.
- a method of mounting the second electronic component 4 on the substrate 2 with reflow soldering may use the method described in the above first embodiment or may use the existing method of applying and reflowing solder paste onto the electrodes 2 b of the substrate 2 .
- the processes for mounting the first electronic component 3 are performed in the state where the second electronic component 4 is previously mounted on the substrate 2 .
- the substrate preparing process, the sheet preparing process, the attaching process, the superimposing process, and the reflow process for mounting the first electronic component 3 are the same as those of the first embodiment.
- the present embodiment is preferable when the first electronic component 3 is relatively expensive or is comparatively difficult to be obtained and the second electronic component 4 is relatively inexpensive or is comparatively easy to be obtained, for example.
- the reason is that relatively-inexpensive or comparatively-easily-obtainable the second electronic component 4 is previously mounted on the substrate 2 and then the first electronic component 3 can be mounted in accordance with the demand of the electronic board S.
- the present embodiment is also preferable when it is unnecessary to provide underfill between the second electronic component 4 and the substrate 2 and/or when the reliability of this underfill may be lower than the reliability of the underfill between the first electronic component 3 and the substrate 2 .
- the melting point of solder alloy of the substrate-side solder parts 2 c is “T 1 ” and the melting point of solder alloy used for the reflow soldering of the second electronic component 4 is “T 2 ”, it is preferable that “T 2 ” is higher than “T 1 ” (T 2 >T 1 ).
- T 2 is around 180° C.
- solder alloy whose melting point is higher than “T 1 ” As a solder alloy used for the reflow soldering of the second electronic component 4 , the joint parts M (solder joints) of the second electronic component 4 can be prevented from being remelted in the reflow process.
- the maximum temperature Tr in the reflow process satisfies the relationship of “T 1 ⁇ Tr ⁇ T 2 ” and is a temperature at which the joint parts M of the second electronic component 4 are not melted during the reflow process. If “Tr” is within this temperature region, it can be suppressed that the solder joint of the second electronic component 4 becomes unstable during the reflow process.
- Tp the maximum temperature in the reflow process (hereinafter, called “preliminary reflow process”) included in the preliminary mounting process is represented by “Tp”
- Tp is not less than “T 2 ” and, for example, “Tp” is not less than 190° C.
- the method of manufacturing the electronic board according to the present embodiment includes previously mounting the second electronic component 4 on the substrate 2 by reflow soldering. It is preferable that the melting point T 2 of solder alloy that joins the second electronic component 4 and the substrate 2 is higher than the melting point T 1 of solder alloy of the substrate-side solder parts 2 c .
- the electronic board S that includes: the substrate 2 ; the first electronic component 3 mounted on the substrate 2 with reflow soldering; the second electronic component 4 mounted on the substrate 2 with reflow soldering; and the underfill filled up at least between the first electronic component 3 and the substrate 2 .
- the electronic board S in which it is suppressed that the joint parts M (solder joints) of the second electronic component 4 are re-melted in the reflow process as described above because the melting point T 2 of solder alloy that joins the second electronic component 4 and the substrate 2 is higher than the melting point T 1 of solder alloy that joins the first electronic component 3 and the substrate 2 .
- the present embodiment is different from the first embodiment in that the resin layers 10 are attached to both of the substrate 2 and the first electronic component 3 .
- the sheet preparing process is to prepare at least the two mounting sheets 1 A. Then, as illustrated in FIG. 5A , the attaching process is to attach the resin layers 10 to both of the first electronic component 3 and the substrate 2 .
- the superimposing process is to sandwich the two resin layers 10 between the first electronic component 3 and the substrate 2 .
- the position adjustment between the first electronic component 3 and the substrate 2 is performed so that the interfaces 3 b of the first electronic component 3 and the substrate-side solder parts 2 c face each other at the positions of the voids 11 (through the two voids 11 ).
- the other points are similar to the first embodiment.
- the interfaces 3 b and the substrate-side solder parts 2 c may not have contact with each other.
- the two resin layers 10 can be bonded to each other in the superimposing process.
- the electronic board S can be obtained by performing the same reflow process as that of the first embodiment after the superimposing process.
- the two resin layers 10 are also softened in the reflow process, and the two resin layers 10 become unified in the subsequent cooling process.
- the resin layer 10 attached to the first electronic component 3 corresponds to the upper portion of the underfill
- the resin layer 10 attached to the substrate 2 corresponds to the lower portion of the underfill.
- the upper and lower portions of the underfill can easily have different materials by making the two resin layers 10 have materials different from each other for example.
- the first electronic component 3 is prepared as illustrated in FIG. 6A . It is preferable that the interfaces 3 b of the first electronic component 3 protrude from the main body 3 a in the vertical direction.
- the interfaces are solder balls or lead frames.
- a component-side resin layer 3 c is provided on the bottom surface (surface on which the interfaces 3 b are provided) of the main body 3 a of the first electronic component 3 .
- the thickness of the component-side resin layer 3 c is smaller than the vertical-direction dimension of the interfaces 3 b . For this reason, a portion of each of the interfaces 3 b is exposed from the component-side resin layer 3 c.
- the component-side resin layer 3 c corresponds to the upper portion of the underfill of the first electronic component 3 .
- a method of providing the component-side resin layer 3 c includes, for example, a method of applying uncured resin materials on the bottom surface of the first electronic component 3 and then curing the resin materials (performing pre-curing). When applying uncured resin materials, it is good that the first electronic component 3 is turned upside down as illustrated in FIGS. 6A and 6B .
- the material of the component-side resin layer 3 c may be the same as or different from that of the resin layer 10 of the mounting sheet 1 A.
- the component-side resin layer 3 c can use resin materials (composite resin) that include epoxy resin, acrylic resin, silicon resin, and the like.
- resin materials composite resin
- a filler such as glass may be added to the resin materials of the component-side resin layer 3 c .
- the component-side resin layer 3 c may have an adherence property.
- the specific material, composition, and property of the component-side resin layer 3 c are not limited to the above, and thus can be appropriately changed.
- the resin layer 10 is attached to the substrate 2 in the attaching process.
- the details at this time are as described in the first embodiment.
- the component-side resin layer 3 c and the resin layer 10 of the mounting sheet 1 A are caused to face each other in the vertical direction.
- the resin layer 10 and the component-side resin layer 3 c are sandwiched between the first electronic component 3 and the substrate 2 .
- the position adjustment between the first electronic component 3 and the substrate 2 is performed so that the interfaces 3 b exposed from the component-side resin layer 3 c and the substrate-side solder parts 2 c face each other at the positions of the respective voids 11 of the resin layer 10 (through the voids 11 ).
- the other points are similar to the first embodiment.
- the interfaces 3 b and the substrate-side solder parts 2 c may not have contact with each other.
- the resin layer 10 and the component-side resin layer 3 c can be bonded to each other in the superimposing process.
- the electronic board S can be obtained by performing the same reflow process as that of the first embodiment after the superimposing process.
- the component-side resin layer 3 c and the resin layer 10 are softened in the reflow process, and the resin layer 10 and the component-side resin layer 3 c become unified in the subsequent cooling process.
- the component-side resin layer 3 c corresponds to the upper portion of the underfill
- the resin layer 10 corresponds to the lower portion of the underfill.
- the resin layer 10 is attached to the substrate 2 in the attaching process. Then, the present embodiment includes a process of providing the component-side resin layer 3 c on the first electronic component 3 so that the interfaces 3 b are exposed through the component-side resin layer 3 c . According to this configuration, the upper and lower portions of the underfill can easily have different materials by making the materials of the component-side resin layer 3 c and the resin layer 10 be different from each other for example.
- a mounting sheet 1 B includes a gap 12 and a connection part 13 that are formed in the resin layer 10 .
- the gap 12 is a concave portion recessed downward from the top surface of the resin layer 10 and is formed in a cross shape in a planar view.
- the connection part 13 is provided below the gap 12 . In other words, the connection part 13 blocks up the gap 12 from below.
- the mounting sheet 1 B according to the present embodiment can be also used similarly to the mounting sheet 1 A according to the first to fourth embodiments. Moreover, when using the mounting sheet 1 B, selectively providing underfill in the corners of the main body 3 a of the electronic component 3 (so-called performing corner bond) can be realized with a simple manufacturing method.
- the first to fourth embodiments are common in that the resin layer 10 has a shape configured to cover at least the positions on the substrate 2 corresponding to the four corners of the first electronic component 3 in a planar view.
- the fifth embodiment is different from the first and fourth embodiments in that the resin layer 10 provides the gap 12 in a portion other than the positions on the substrate 2 corresponding to the four corners of the first electronic component 3 in a planar view.
- substantially square-shaped areas are provided in the four corners of the resin layer 10 .
- the shape of the areas provided in the four corners can be appropriately changed.
- the shape may be a triangle shape etc.
- the gap 12 may not be a cross shape in a planar view.
- corner bond is performed on the first electronic component 3 by forming the gap 12 in the one mounting sheet 1 B.
- corner bond may be performed by using the four mounting sheets 1 A whose area is smaller than that of the main body 3 a of the first electronic component 3 .
- the sheet preparing process includes preparing the four mounting sheets 1 A whose area in a planar view is smaller than that of the main body 3 a .
- the attaching process includes attaching the resin layers 10 of the four mounting sheets 1 A at the positions corresponding to the four corners of the first electronic component 3 to at least one of the first electronic component 3 and the substrate 2 .
- the state as illustrated in FIG. 8A is obtained when attaching the resin layers 10 of the four mounting sheets 1 A to the substrate 2 . Then, in the superimposing process, the four corners of the first electronic component 3 are respectively placed on the resin layers 10 .
- the resin layers 10 of the four mounting sheets 1 A may be attached to the four corners of the first electronic component 3 .
- the resin layers 10 may be provided on both of the four corners of the first electronic component 3 and the positions on the substrate 2 corresponding to the corners.
- the resin layer may be placed at the position corresponding to the vicinity of the center of each of four sides in addition to the corners of the first electronic component 3 .
- the filling places of the resin layers 10 using the mounting sheets 1 A are eight places.
- the resin layers 10 are arranged at the positions corresponding to the central portions of all sides of the first electronic component 3 , but the resin layers 10 may be arranged at only the positions corresponding to the central portions of some of the four sides. Moreover, a plurality of the resin layers 10 may be arranged side by side at the positions corresponding to one side of the first electronic component 3 . That is to say, the number of the resin layers 10 is not limited to four ( FIG. 8A ) or eight ( FIG. 8B ), and may be five to seven or nine or more.
- the present embodiment may include preparing the mounting sheets 1 A to have at least the four independent resin layers 10 and attaching the resin layers 10 at the respective positions corresponding to the four corners of the first electronic component 3 to at least one of the first electronic component 3 and the substrate 2 . Even with this method, corner bond can be performed on the first electronic component 3 .
- the component-side resin layers 3 c may be provided on the four corners of the first electronic component 3 .
- the shape of the resin layers 10 may be appropriately changed.
- the resin layers 10 having a triangle shape may be arranged at the positions corresponding to the four corners of the first electronic component 3 .
- the resin layers 10 may have a quadrangle or a shape other than a triangle.
- a method of manufacturing the electronic board including the preliminary mounting process and the process of attaching the two resin layers 10 to both of the first electronic component 3 and the substrate 2 may be employed by the combination of the second and third embodiments.
- a method of manufacturing the electronic board including the preliminary mounting process and the process of providing the component-side resin layer 3 c on the first electronic component 3 may be employed by the combination of the second and fourth embodiments.
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Abstract
Description
- The present invention relates to a method of manufacturing an electronic board and a mounting sheet.
- Conventionally, as disclosed in Japanese Unexamined Patent Application Publication No. 2007-59600, a method of mounting electronic components on a substrate by using solder has been performed. Moreover, in order to reinforce solder joints between electronic components and a substrate or a printed circuit board, there has been performed a method of filling up resin materials between the electronic components and the substrate (underfill/encapsulation) or a method of partially applying resin materials to the corners etc. of the electronic components (corner bond/corner fill).
- The conventional method has a possibility that the solder joints between the electronic components and the substrate cannot be efficiently and certainly reinforced by using resin materials.
- The present invention has been achieved in view of the above problem, and an object of the invention is to provide a method that can efficiently and certainly reinforce a solder joint between an electronic component and a substrate by using a resin material.
- To solve the problem, a method of manufacturing an electronic board according to the first aspect of the present invention includes: preparing a substrate in which substrate-side solder parts are provided on electrodes; preparing a mounting sheet having a resin layer in which a plurality of voids is formed in accordance with positions of the electrodes; attaching the resin layer to at least one of a first electronic component and the substrate so that interfaces of the first electronic component or the substrate-side solder parts are located inside the respective voids; causing the interfaces and the substrate-side solder parts to face each other at positions of the respective voids; and melting the substrate-side solder parts by heating to join the interfaces and the electrodes.
- Moreover, a mounting sheet according to the second aspect of the present invention is used for mounting an electronic component on a substrate, the mounting sheet including a resin layer in which a plurality of voids is formed in accordance with positions of electrodes of the substrate to be mounted, wherein the voids penetrate through the resin layer in a thickness direction of the resin layer.
- The above-described aspects of the present invention can efficiently and certainly reinforce a solder joint between an electronic component and a substrate by using a resin material.
-
FIG. 1 is a schematic diagram illustrating an electronic board obtained by a method of manufacturing the electronic board according to a first embodiment; -
FIG. 2A is a plan view illustrating a mounting sheet according to the first embodiment; -
FIG. 2B is a cross-sectional diagram taken along II-II arrows inFIG. 2A ; -
FIG. 3A is a diagram explaining the method of manufacturing the electronic board according to the first embodiment; -
FIG. 3B is a diagram explaining a process followingFIG. 3A ; -
FIG. 3C is a diagram explaining a process followingFIG. 3B ; -
FIG. 3D is a diagram explaining a process followingFIG. 3C ; -
FIG. 4A is a diagram explaining a method of manufacturing an electronic board according to a second embodiment; -
FIG. 4B is a diagram explaining a process followingFIG. 4A ; -
FIG. 4C is a diagram explaining a process followingFIG. 4B ; -
FIG. 4D is a diagram explaining a process followingFIG. 4C ; -
FIG. 5A is a diagram explaining a method of manufacturing an electronic board according to a third embodiment; -
FIG. 5B is a diagram explaining a process followingFIG. 5A ; -
FIG. 6A is a diagram explaining a method of manufacturing an electronic board according to a fourth embodiment; -
FIG. 6B is a diagram explaining a process followingFIG. 6A ; -
FIG. 6C is a diagram explaining a process followingFIG. 6B ; -
FIG. 7A is a plan view illustrating a mounting sheet according to a fifth embodiment; -
FIG. 7B is a cross-sectional diagram taken along VII-VII arrows inFIG. 7A ; -
FIG. 8A is a diagram explaining a method of manufacturing an electronic board according to a first modified example of the first embodiment; -
FIG. 8B is a diagram explaining a method of manufacturing an electronic board according to a second modified example of the first embodiment; and -
FIG. 8C is a diagram explaining a method of manufacturing an electronic board according to a third modified example of the first embodiment. - Hereinafter, a method of manufacturing an electronic board (mounting board) and a mounting sheet used in the manufacturing method according to the first embodiment will be explained with reference to the drawings.
- The method of manufacturing the electronic board according to the present embodiment can manufacture an electronic board S as illustrated in
FIG. 1 , for example. The electronic board S includes asubstrate 2 and first and secondelectronic components substrate 2. Thesubstrate 2 includes asubstrate body 2 a formed of insulating materials andelectrodes 2 b formed of electric conductors (seeFIG. 3A ). The firstelectronic component 3 and the secondelectronic component 4 have interfaces electrically connected to theelectrodes 2 b. - The first
electronic component 3 and the secondelectronic component 4 can employ IC (Integrated Circuit) chip such as LSI (Large Scale Integration) and SSI (Small Scale Integration). Particularly, the firstelectronic component 3 may employ relatively expensive components such as CPU (Central Processing Unit), GPU (Graphic Processing Unit), memory, and SSD (Solid State Drive), and the secondelectronic component 4 may employ the other components. The reason will be described later. - The first
electronic component 3 and the secondelectronic component 4 are mounted on thesubstrate 2 by using reflow soldering. In the present specification, “%” on solder alloy composition is “mass %” unless otherwise specified. - In addition, the electronic board S may not include the second
electronic component 4. Alternatively, the electronic board S may include a plurality of the firstelectronic components 3 or a plurality of the secondelectronic components 4. -
FIGS. 2A and 2B illustrate an example of a mountingsheet 1A used in the method of manufacturing the electronic board according to the present embodiment. The mountingsheet 1A includes aresin layer 10 formed of resin, afirst cover film 20 that covers a top surface of theresin layer 10, and asecond cover film 30 that covers a bottom surface of theresin layer 10. - Definition of Direction
- In the present embodiment, the thickness direction of the
resin layer 10 indicates a vertical direction Z. One direction perpendicular to the vertical direction Z indicates a horizontal direction X and a direction perpendicular to both directions of the vertical direction Z and the horizontal direction X indicates a front-back direction Y. Along the vertical direction Z, thesubstrate 2 side and the first-electronic-component 3 side of the resin layer respectively mean the lower and upper sides. Moreover, a planar view means to view a target object from the vertical direction Z. - The
resin layer 10 is a part that acts as the underfill of the firstelectronic component 3 in the electronic board S. Theresin layer 10 can use resin materials (composite resin) including epoxy resin, acrylic resin, silicon resin, etc. In order to improve various resistances such as durability and heat resistance, a filler such as glass may be added to the resin materials of theresin layer 10. Theresin layer 10 may have an adherence property. In this regard, however, the specific material, composition, and property of theresin layer 10 are not limited to the above and thus can be appropriately changed. - As illustrated in
FIG. 2A , theresin layer 10 is formed in a square shape in a planar view. The outer shape of theresin layer 10 can be appropriately changed. However, it is preferable that the outer shape has a shape tailored to amain body 3 a (seeFIG. 3A ) of the firstelectronic component 3. That is to say, if themain body 3 a of the firstelectronic component 3 has a square shape in a planar view, theresin layer 10 may have a square shape as illustrated inFIG. 2A . Alternatively, if themain body 3 a of the firstelectronic component 3 has a rectangular shape in a planar view, theresin layer 10 may have a rectangular shape. - A plurality of
voids 11 is formed in theresin layer 10. In the example ofFIGS. 2A and 2B , each of thevoids 11 is a cylindrical through-hole and penetrates through theresin layer 10 in the vertical direction Z. For this reason, thevoids 11 are open toward both upward and downward directions. In this regard, however, the shape of thevoids 11 may be appropriately changed in accordance withinterfaces 3 b of the firstelectronic component 3 or substrate-side solder parts 2 c (described later) of thesubstrate 2. - In the example of
FIGS. 2A and 2B , thevoids 11 are arranged at intervals in the horizontal direction X and the front-back direction Y. In other words, thevoids 11 are arranged in a grid pattern. - The arrangement of the
voids 11 can be appropriately changed, but it is preferable that the voids are arranged in accordance with the positions of theinterfaces 3 b of the firstelectronic component 3. For example,FIG. 3A illustrates the case where the firstelectronic component 3 is BGA (Ball Grid Array) and hemispherical solder balls (bumps) as theinterfaces 3 b are arranged on the bottom surface of themain body 3 a side by side in a grid pattern. The diameter of the solder ball can be appropriately changed, but it is preferable that the diameter is around 100 to 1000 μm, for example. When the firstelectronic component 3 is BGA as illustrated inFIG. 3A , the arrangement of thevoids 11 as illustrated inFIG. 2A can be employed. - Although it is not illustrated, the
interfaces 3 b of the firstelectronic component 3 may be lead frames (electrodes) that extend from themain body 3 a in the horizontal direction X or in the front-back direction Y and then bend downward. In this case, the arrangement of thevoids 11 in theresin layer 10 may be decided in accordance with the placement positions of the lead frames on thesubstrate 2. For example, thevoids 11 may be intermittently arranged along the outer shape of themain body 3 a of the firstelectronic component 3 in a planar view. - In addition, the first
electronic component 3 may expose electrode terminals thereof on the bottom surface of themain body 3 a without having solder balls and/or lead frames. In that case, the exposed electrode terminals of the firstelectronic component 3 act as theinterfaces 3 b, and theelectrodes 2 b of thesubstrate 2 and the electrode terminals of the firstelectronic component 3 are electrically connected to each other only by the substrate-side solder parts 2 c. - As illustrated in
FIG. 3A , in the state before the firstelectronic component 3 is mounted, a plurality of the substrate-side solder parts 2 c is provided on the top surface of thesubstrate 2. The substrate-side solder parts 2 c covers theelectrodes 2 b from above. - The substrate-
side solder parts 2 c include solder alloy. The materials of the substrate-side solder parts 2 c can employ solder paste, for example. Particularly, when theinterfaces 3 b of the firstelectronic component 3 are solder balls, solder alloy, whose melting point is lower than that of the solder balls, is suitable as the materials of the substrate-side solder parts 2 c. The substrate-side solder parts 2 c may include a soldering accelerator such as flux. - A resin sheet etc. can be used as the
cover films cover films - It is preferable that the melting point (T1 to be described later) of the solder alloy included in the substrate-
side solder parts 2 c is a low melting point not more than 150° C. for example. When employing solder alloy (low melting point solder) having a low melting point, a heating temperature in a reflow process to be described later can be suppressed to be low and thus an effect caused by a difference of a thermal expansion rate between thesubstrate 2, the firstelectronic component 3, and the solder alloy is reduced. Therefore, it is possible to suppress stress concentration on joint parts M during a cooling process after the reflow process. Solder alloy having a melting point not more than 150° C. includes Sn—Bi based solder alloy. The specific example of Sn—Bi based solder alloy includes a Sn—Bi solder alloy, a Sn—Bi—Cu solder alloy, a Sn—Bi—Ni solder alloy, a Sn—Bi—Cu—Ni solder alloy, a Sn—Bi—Ag solder alloy, and a Sn—Bi—Sb solder alloy. The substrate-side solder parts 2 c may include one or two or more solder alloys as described above, or may include a solder alloy having another composition. - When adding Cu and Ni to the Sn—Bi solder alloy, it is desirable that it is “Cu: 0.1 to 1.0%” and it is “Ni: 0.01 to 0.1%”. Moreover, in the alloy composition as described above, it is preferable that a Bi-contained amount is 30 to 80%. When the Bi-contained amount is within the above range, a melting point thereof can be made constant at 138° C. for example. By using an alloy having such the Bi-contained amount for the substrate-
side solder parts 2 c, in the reflow process to be described later, the joint parts M (also called solder joints, seeFIG. 3D ) can be formed while theinterfaces 3 b press the substrate-side solder parts 2 c by its own weight of the firstelectronic component 3. Moreover, by further lowering the melting point of the solder alloy of the substrate-side solder parts 2 c, it is possible to lower a heating temperature in the reflow process to further reduce thermal damage to the firstelectronic component 3 and thesubstrate 2. From the viewpoint of sufficiently lowering the melting point of the solder alloy of the substrate-side solder parts 2 c, it is desirable that the Bi-contained amount is 35 to 70% and is further desirable that it is 53 to 61%. - In addition, when the
interfaces 3 b of the firstelectronic component 3 are solder balls, the materials of the solder balls can employ, for example, a Sn—Cu solder alloy, a Sn—Ag solder alloy, a Sn—Ag—Cu solder alloy, a Sn—Ag—Cu—Ni solder alloy, a Sn—Ag—Cu—Sb solder alloy, a Sn—Ag—Cu—Ni—Sb solder alloy, and the like. It is preferable that these solder alloys show a melting point not to melt during the reflow process to be described later, and these solder alloys may be high melting point solder whose melting point is not less than 200° C. for example. - The compositions of the solder alloy of the substrate-
side solder parts 2 c and theinterfaces 3 b as described above are an example, and thus can be appropriately changed. Moreover, the composition explained as the solder alloy of the substrate-side solder parts 2 c may be used for the solder alloy of theinterfaces 3 b. Furthermore, both of theinterfaces 3 b and the substrate-side solder parts 2 c may be formed with low melting point solder or both may be formed with high melting point solder. In addition, without providing solder on the firstelectronic component 3, the substrate-side solder parts 2 c may be formed with low melting point solder or with high melting point solder. - Next, there will be explained the method of manufacturing the electronic board using the mounting
sheet 1A configured as described above. The method of manufacturing the electronic board according to the present embodiment includes a substrate preparing process, a sheet preparing process, an attaching process, a superimposing process, and the reflow process. Hereinafter, each process will be specifically explained. - Substrate Preparing Process
- The substrate preparing process is to prepare the
substrate 2 in which the substrate-side solder parts 2 c are provided on theelectrodes 2 b. A method of providing the substrate-side solder parts 2 c on thesubstrate 2 can employ screen printing for example. - Sheet Preparing Process
- The sheet preparing process is to prepare the mounting
sheet 1A having theresin layer 10 in which the plurality ofvoids 11 are formed in accordance with the positions of theelectrodes 2 b. The mountingsheet 1A may include thecover films FIG. 2B or may not include these cover films. - When the mounting
sheet 1A includes thecover films cover films resin layer 10. - Attaching Process
- The attaching process is performed after the sheet preparing process. The attaching process is to attach the
resin layer 10 to at least one of the firstelectronic component 3 and thesubstrate 2. In the example ofFIG. 3A , theresin layer 10 is attached to the firstelectronic component 3. In this case, the position adjustment between theresin layer 10 and the firstelectronic component 3 is performed so that theinterfaces 3 b of the firstelectronic component 3 are located inside thevoids 11 and then theresin layer 10 is attached to themain body 3 a of the firstelectronic component 3. When theinterfaces 3 b are electrode terminals exposed on the bottom surface of themain body 3 a of the firstelectronic component 3, at least a portion of each of the electrode terminals is surrounded by an upper opening of thecorresponding void 11. The position adjustment may be performed by using image control etc. or may be performed by using positioning pins etc. When theresin layer 10 has an adherence property, theresin layer 10 and the firstelectronic component 3 adhere to each other by making theresin layer 10 have contact with themain body 3 a. Therefore, the mismatch of relative positions between thevoids 11 and theinterfaces 3 b can be suppressed in the following processes. - Moreover, in the attaching process, the
resin layer 10 may be attached to thesubstrate 2. In this case, the position adjustment between theresin layer 10 and thesubstrate 2 is performed so that the substrate-side solder parts 2 c are located inside thevoids 11 and then theresin layer 10 is attached to thesubstrate body 2 a. The position adjustment may be performed by using image control etc. or may be performed by using positioning pins etc. When theresin layer 10 has an adherence property, theresin layer 10 and thesubstrate 2 adhere to each other by making theresin layer 10 have contact with thesubstrate body 2 a. Therefore, the mismatch of relative positions between thevoids 11 and the substrate-side solder parts 2 c can be suppressed in the following processes. - In addition, before attaching the
resin layer 10 to the firstelectronic component 3 in the attaching process or before making theresin layer 10 attached to thesubstrate 2 have contact with the firstelectronic component 3 in the superimposing process, solder paste may be secondarily provided on the surfaces of theinterfaces 3 b of the firstelectronic component 3. - Superimposing Process
- The superimposing process is performed after the attaching process. As illustrated in
FIG. 3C , the superimposing process is to sandwich theresin layer 10 between the firstelectronic component 3 and thesubstrate 2. At this time, the position adjustment between the firstelectronic component 3 and thesubstrate 2 is performed so that theinterfaces 3 b of the firstelectronic component 3 and the substrate-side solder parts 2 c face each other at the positions of the respective voids 11. Herein, the state where “theinterfaces 3 b and the substrate-side solder parts 2 c face each other at the positions of therespective voids 11” includes at least the following two cases. The first case indicates that theinterfaces 3 b and the substrate-side solder parts 2 c face each other or are in contact with each other through the respective voids 11. The second case indicates that one of theinterfaces 3 b and the substrate-side solder parts 2 c penetrates through therespective voids 11, and portions thereof protruding from thevoids 11 and the other of theinterfaces 3 b and the substrate-side solder parts 2 c face each other or are in contact with each other. - The position adjustment between the first
electronic component 3 and thesubstrate 2 in the superimposing process may be performed by using image control etc. or may be performed by using positioning pins etc. When theinterfaces 3 b are solder balls, the solder balls have contact with the top surfaces of the substrate-side solder parts 2 c. When theinterfaces 3 b are lead frames, the lead frames may have contact with the top surfaces of the substrate-side solder parts 2 c or portions of the lead frames may be inserted into the substrate-side solder parts 2 c. In addition, inFIG. 3C , theinterfaces 3 b of the firstelectronic component 3 and the substrate-side solder parts 2 c have contact with each other inside therespective voids 11, but the present embodiment is not limited to this. If theinterfaces 3 b of the firstelectronic component 3 and the substrate-side solder parts 2 c are to be joined in the reflow process to be described later, they may face each other or may not be in contact with each other in a state where one of theinterfaces 3 b and the substrate-side solder parts 2 c is located outside thevoids 11. - When the
resin layer 10 has an adherence property, the firstelectronic component 3 and thesubstrate 2 adhere to each other by using theresin layer 10 after the superimposing process. Therefore, the mismatch of relative positions between theinterfaces 3 b and the substrate-side solder parts 2 c can be suppressed in the following processes. - Reflow Process
- The reflow process is performed after the superimposing process. In addition, before performing the reflow process, preliminary overheating of, e.g., about 50 to 100° C. may be performed to remove a solvent contained in the substrate-
side solder parts 2 c. In the reflow process, thesubstrate 2 is put in a reflow furnace to be heated in the state where theresin layer 10 is sandwiched between the firstelectronic component 3 and thesubstrate 2. As a result, as illustrated inFIG. 3D , the joint parts M (solder joints) between theinterfaces 3 b and the substrate-side solder parts 2 c are formed by melting the substrate-side solder parts 2 c. In the present specification, the maximum temperature in the reflow process is represented with “Tr”. For example, “Tr” is 150 to 180° C. Moreover, the shapes of theinterfaces 3 b are changed inFIG. 3D , but the shapes of theinterfaces 3 b may not be changed when theinterfaces 3 b are lead frames or electrode terminals exposed on the bottom surface of themain body 3 a. - In addition, the mounting process of the first
electronic component 3 is illustrated inFIGS. 3A to 3D , but it is sufficient that the same attaching process and superimposing process are also performed on the secondelectronic component 4 and the reflow process is performed on the second electronic component simultaneously with the firstelectronic component 3. - Moreover, in the reflow process, the
resin layer 10 is also heated and thus has flowability to some extent. For this reason, the shape of theresin layer 10 is also changed to surround the joint parts M. - By performing the cooling process after the reflow process, the joint parts M and the
resin layer 10 are cured to stabilize the respective shapes. At this time, because theresin layer 10 acts as underfill, the firstelectronic component 3 and thesubstrate 2 are adhesively fixed by theresin layer 10 to obtain the electronic board S. - As described above, the method of manufacturing the electronic board according to the present embodiment includes: the substrate preparing process of preparing the
substrate 2 in which the substrate-side solder parts 2 c are provided on theelectrodes 2 b; the sheet preparing process of preparing the mountingsheet 1A having theresin layer 10 in which the plurality ofvoids 11 is formed in accordance with the positions of theelectrodes 2 b; the attaching process of attaching theresin layer 10 to at least one of the firstelectronic component 3 and thesubstrate 2 so that theinterfaces 3 b of the firstelectronic component 3 or the substrate-side solder parts 2 c are located inside thevoids 11; the superimposing process of making theinterfaces 3 b and the substrate-side solder parts 2 c face each other at the positions of thevoids 11; and the reflow process of melting the substrate-side solder parts 2 c by heating to join theinterfaces 3 b and theelectrodes 2 b. - Then, the reflow process joins the substrate-
side solder parts 2 c and theinterfaces 3 b of the firstelectronic component 3 to form the joint parts M and bonds themain body 3 a of the firstelectronic component 3 to thesubstrate 2 by using theresin layer 10. Therefore, it is not necessary to form the joint parts M and the underfill in separate processes, and the electronic board S having the raised joint strength between theelectronic component 3 and thesubstrate 2 can be more efficiently manufactured. - Moreover, if the present embodiment is employed, the joint parts M can be covered without a gap and thus the joint parts M can be surely reinforced by optimizing the thickness of the
resin layer 10 of the mountingsheet 1A and the amount of solder of the substrate-side solder parts 2 c. - Moreover, the mounting
sheet 1A according to the present embodiment includes theresin layer 10 in which the plurality ofvoids 11 is formed in accordance with the positions of theelectrodes 2 b of thesubstrate 2 to be mounted, and thevoids 11 penetrate through theresin layer 10 in the vertical direction Z. The method of manufacturing the electronic board as described above can be executed by using the mountingsheet 1A. - Furthermore, the mounting
sheet 1A may include thefirst cover film 20 that covers the top surface of theresin layer 10 and thesecond cover film 30 that covers the bottom surface of theresin layer 10. By this configuration, even if theresin layer 10 has an adherence property, the mountingsheet 1A can be easily distributed and stored. - Next, the second embodiment according to the present invention will be explained, but the basic configuration of the second embodiment is similar to that of the first embodiment. For this reason, the same components have the same reference numbers and their explanations are omitted, and an explanation is provided about only different points.
- The present embodiment is different from the first embodiment in terms of including a preliminary mounting process to be explained later.
- Preliminary Mounting Process
- The preliminary mounting process is to previously mount the second
electronic component 4 on thesubstrate 2 before mounting the firstelectronic component 3 on thesubstrate 2. As illustrated inFIG. 4A , the secondelectronic component 4 is electrically connected to theelectrodes 2 b of thesubstrate 2 by joint parts M (solder joints). In the preliminary mounting process, it is preferable that the secondelectronic component 4 is mounted on thesubstrate 2 with reflow soldering. Moreover, a method of mounting the secondelectronic component 4 on thesubstrate 2 with reflow soldering may use the method described in the above first embodiment or may use the existing method of applying and reflowing solder paste onto theelectrodes 2 b of thesubstrate 2. - In the present embodiment, as illustrated in
FIGS. 4A to 4D , the processes for mounting the firstelectronic component 3 are performed in the state where the secondelectronic component 4 is previously mounted on thesubstrate 2. - The substrate preparing process, the sheet preparing process, the attaching process, the superimposing process, and the reflow process for mounting the first
electronic component 3 are the same as those of the first embodiment. - The present embodiment is preferable when the first
electronic component 3 is relatively expensive or is comparatively difficult to be obtained and the secondelectronic component 4 is relatively inexpensive or is comparatively easy to be obtained, for example. The reason is that relatively-inexpensive or comparatively-easily-obtainable the secondelectronic component 4 is previously mounted on thesubstrate 2 and then the firstelectronic component 3 can be mounted in accordance with the demand of the electronic board S. Moreover, the present embodiment is also preferable when it is unnecessary to provide underfill between the secondelectronic component 4 and thesubstrate 2 and/or when the reliability of this underfill may be lower than the reliability of the underfill between the firstelectronic component 3 and thesubstrate 2. - In the present embodiment, assuming that the melting point of solder alloy of the substrate-
side solder parts 2 c is “T1” and the melting point of solder alloy used for the reflow soldering of the secondelectronic component 4 is “T2”, it is preferable that “T2” is higher than “T1” (T2>T1). For example, when the low melting point solder alloy whose “T1” as explained in the first embodiment is not more than 150° C. is used for the substrate-side solder parts 2 c, it is preferable that “T2” is around 180° C. By selecting a solder alloy whose melting point is higher than “T1” as a solder alloy used for the reflow soldering of the secondelectronic component 4, the joint parts M (solder joints) of the secondelectronic component 4 can be prevented from being remelted in the reflow process. - Furthermore, in that case, it is desirable that the maximum temperature Tr in the reflow process satisfies the relationship of “T1<Tr<T2” and is a temperature at which the joint parts M of the second
electronic component 4 are not melted during the reflow process. If “Tr” is within this temperature region, it can be suppressed that the solder joint of the secondelectronic component 4 becomes unstable during the reflow process. - In addition, when the maximum temperature in the reflow process (hereinafter, called “preliminary reflow process”) included in the preliminary mounting process is represented by “Tp”, “Tp” is not less than “T2” and, for example, “Tp” is not less than 190° C. In summary, it is preferable that it is “T1<Tr<T2<Tp”.
- As described above, the method of manufacturing the electronic board according to the present embodiment includes previously mounting the second
electronic component 4 on thesubstrate 2 by reflow soldering. It is preferable that the melting point T2 of solder alloy that joins the secondelectronic component 4 and thesubstrate 2 is higher than the melting point T1 of solder alloy of the substrate-side solder parts 2 c. By this configuration, as described above, even if the firstelectronic component 3 and the secondelectronic component 4 are mounted on the substrate in separate processes, it is possible to secure the reliability of the electronic board S. - Moreover, according to the present embodiment, there is obtained the electronic board S that includes: the
substrate 2; the firstelectronic component 3 mounted on thesubstrate 2 with reflow soldering; the secondelectronic component 4 mounted on thesubstrate 2 with reflow soldering; and the underfill filled up at least between the firstelectronic component 3 and thesubstrate 2. Moreover, there is obtained the electronic board S in which it is suppressed that the joint parts M (solder joints) of the secondelectronic component 4 are re-melted in the reflow process as described above because the melting point T2 of solder alloy that joins the secondelectronic component 4 and thesubstrate 2 is higher than the melting point T1 of solder alloy that joins the firstelectronic component 3 and thesubstrate 2. - Next, the third embodiment according to the present invention will be explained, but the basic configuration of the third embodiment is similar to that of the first embodiment. For this reason, the same components have the same reference numbers and their explanations are omitted, and an explanation is provided about only different points.
- The present embodiment is different from the first embodiment in that the resin layers 10 are attached to both of the
substrate 2 and the firstelectronic component 3. - In the present embodiment, the sheet preparing process is to prepare at least the two mounting
sheets 1A. Then, as illustrated inFIG. 5A , the attaching process is to attach the resin layers 10 to both of the firstelectronic component 3 and thesubstrate 2. - As illustrated in
FIG. 5B , the superimposing process is to sandwich the tworesin layers 10 between the firstelectronic component 3 and thesubstrate 2. At this time, the position adjustment between the firstelectronic component 3 and thesubstrate 2 is performed so that theinterfaces 3 b of the firstelectronic component 3 and the substrate-side solder parts 2 c face each other at the positions of the voids 11 (through the two voids 11). The other points are similar to the first embodiment. For example, at the time of the superimposing process, theinterfaces 3 b and the substrate-side solder parts 2 c may not have contact with each other. - In the present embodiment, by making at least one of the two
resin layers 10 have an adherence property, the tworesin layers 10 can be bonded to each other in the superimposing process. - The electronic board S can be obtained by performing the same reflow process as that of the first embodiment after the superimposing process. In addition, the two
resin layers 10 are also softened in the reflow process, and the tworesin layers 10 become unified in the subsequent cooling process. In the present embodiment, theresin layer 10 attached to the firstelectronic component 3 corresponds to the upper portion of the underfill, and theresin layer 10 attached to thesubstrate 2 corresponds to the lower portion of the underfill. - According to the configuration of the present embodiment, the upper and lower portions of the underfill can easily have different materials by making the two
resin layers 10 have materials different from each other for example. - Next, the fourth embodiment according to the present invention will be explained, but the basic configuration of the fourth embodiment is similar to that of the first embodiment. For this reason, the same components have the same reference numbers and their explanations are omitted, and an explanation is provided about only different points.
- In the present embodiment, the first
electronic component 3 is prepared as illustrated inFIG. 6A . It is preferable that theinterfaces 3 b of the firstelectronic component 3 protrude from themain body 3 a in the vertical direction. For example, it is preferable that the interfaces are solder balls or lead frames. - Next, as illustrated in
FIG. 6B , a component-side resin layer 3 c is provided on the bottom surface (surface on which theinterfaces 3 b are provided) of themain body 3 a of the firstelectronic component 3. The thickness of the component-side resin layer 3 c is smaller than the vertical-direction dimension of theinterfaces 3 b. For this reason, a portion of each of theinterfaces 3 b is exposed from the component-side resin layer 3 c. - In the electronic board S, the component-
side resin layer 3 c corresponds to the upper portion of the underfill of the firstelectronic component 3. A method of providing the component-side resin layer 3 c includes, for example, a method of applying uncured resin materials on the bottom surface of the firstelectronic component 3 and then curing the resin materials (performing pre-curing). When applying uncured resin materials, it is good that the firstelectronic component 3 is turned upside down as illustrated inFIGS. 6A and 6B . - The material of the component-
side resin layer 3 c may be the same as or different from that of theresin layer 10 of the mountingsheet 1A. Specifically, the component-side resin layer 3 c can use resin materials (composite resin) that include epoxy resin, acrylic resin, silicon resin, and the like. In order to improve various resistances such as durability and heat resistance, a filler such as glass may be added to the resin materials of the component-side resin layer 3 c. The component-side resin layer 3 c may have an adherence property. In this regard, however, the specific material, composition, and property of the component-side resin layer 3 c are not limited to the above, and thus can be appropriately changed. - In the present embodiment, the
resin layer 10 is attached to thesubstrate 2 in the attaching process. The details at this time are as described in the first embodiment. Moreover, in the present embodiment, as illustrated inFIG. 6C , the component-side resin layer 3 c and theresin layer 10 of the mountingsheet 1A are caused to face each other in the vertical direction. In the superimposing process, theresin layer 10 and the component-side resin layer 3 c are sandwiched between the firstelectronic component 3 and thesubstrate 2. At this time, the position adjustment between the firstelectronic component 3 and thesubstrate 2 is performed so that theinterfaces 3 b exposed from the component-side resin layer 3 c and the substrate-side solder parts 2 c face each other at the positions of therespective voids 11 of the resin layer 10 (through the voids 11). The other points are similar to the first embodiment. For example, at the time of the superimposing process, theinterfaces 3 b and the substrate-side solder parts 2 c may not have contact with each other. - In the present embodiment, because at least one of the
resin layer 10 and the component-side resin layer 3 c has an adherence property, theresin layer 10 and the component-side resin layer 3 c can be bonded to each other in the superimposing process. - The electronic board S can be obtained by performing the same reflow process as that of the first embodiment after the superimposing process. In addition, the component-
side resin layer 3 c and theresin layer 10 are softened in the reflow process, and theresin layer 10 and the component-side resin layer 3 c become unified in the subsequent cooling process. In the present embodiment, the component-side resin layer 3 c corresponds to the upper portion of the underfill, and theresin layer 10 corresponds to the lower portion of the underfill. - As described above, in the present embodiment, the
resin layer 10 is attached to thesubstrate 2 in the attaching process. Then, the present embodiment includes a process of providing the component-side resin layer 3 c on the firstelectronic component 3 so that theinterfaces 3 b are exposed through the component-side resin layer 3 c. According to this configuration, the upper and lower portions of the underfill can easily have different materials by making the materials of the component-side resin layer 3 c and theresin layer 10 be different from each other for example. - Next, the fifth embodiment according to the present invention will be explained, but the basic configuration of the fifth embodiment is similar to that of the first embodiment. For this reason, the same components have the same reference numbers and their explanations are omitted, and an explanation is provided about only different points.
- As illustrated in
FIGS. 7A and 7B , a mountingsheet 1B according to the present embodiment includes agap 12 and aconnection part 13 that are formed in theresin layer 10. Thegap 12 is a concave portion recessed downward from the top surface of theresin layer 10 and is formed in a cross shape in a planar view. Theconnection part 13 is provided below thegap 12. In other words, theconnection part 13 blocks up thegap 12 from below. - The mounting
sheet 1B according to the present embodiment can be also used similarly to the mountingsheet 1A according to the first to fourth embodiments. Moreover, when using the mountingsheet 1B, selectively providing underfill in the corners of themain body 3 a of the electronic component 3 (so-called performing corner bond) can be realized with a simple manufacturing method. - The first to fourth embodiments are common in that the
resin layer 10 has a shape configured to cover at least the positions on thesubstrate 2 corresponding to the four corners of the firstelectronic component 3 in a planar view. - In this regard, however, the fifth embodiment is different from the first and fourth embodiments in that the
resin layer 10 provides thegap 12 in a portion other than the positions on thesubstrate 2 corresponding to the four corners of the firstelectronic component 3 in a planar view. - In
FIG. 7A , substantially square-shaped areas (portions excluding the gap 12) are provided in the four corners of theresin layer 10. However, the shape of the areas provided in the four corners can be appropriately changed. For example, the shape may be a triangle shape etc. In this case, thegap 12 may not be a cross shape in a planar view. - In addition, the technical scope of the present invention is not limited to the embodiments and various modifications may be made without departing from the spirit or scope of the general inventive concept.
- For example, in the fifth embodiment, corner bond is performed on the first
electronic component 3 by forming thegap 12 in the one mountingsheet 1B. However, corner bond may be performed by using the four mountingsheets 1A whose area is smaller than that of themain body 3 a of the firstelectronic component 3. In this case, the sheet preparing process includes preparing the four mountingsheets 1A whose area in a planar view is smaller than that of themain body 3 a. Then, the attaching process includes attaching the resin layers 10 of the four mountingsheets 1A at the positions corresponding to the four corners of the firstelectronic component 3 to at least one of the firstelectronic component 3 and thesubstrate 2. - In the attaching process, the state as illustrated in
FIG. 8A is obtained when attaching the resin layers 10 of the four mountingsheets 1A to thesubstrate 2. Then, in the superimposing process, the four corners of the firstelectronic component 3 are respectively placed on the resin layers 10. - On the other hand, in the attaching process, the resin layers 10 of the four mounting
sheets 1A may be attached to the four corners of the firstelectronic component 3. Moreover, by applying the third embodiment, the resin layers 10 may be provided on both of the four corners of the firstelectronic component 3 and the positions on thesubstrate 2 corresponding to the corners. - Moreover, as illustrated in
FIG. 8B , the resin layer may be placed at the position corresponding to the vicinity of the center of each of four sides in addition to the corners of the firstelectronic component 3. In this case, the filling places of the resin layers 10 using the mountingsheets 1A are eight places. - In addition, in
FIG. 8B , the resin layers 10 are arranged at the positions corresponding to the central portions of all sides of the firstelectronic component 3, but the resin layers 10 may be arranged at only the positions corresponding to the central portions of some of the four sides. Moreover, a plurality of the resin layers 10 may be arranged side by side at the positions corresponding to one side of the firstelectronic component 3. That is to say, the number of the resin layers 10 is not limited to four (FIG. 8A ) or eight (FIG. 8B ), and may be five to seven or nine or more. - That is to say, the present embodiment may include preparing the mounting
sheets 1A to have at least the four independent resin layers 10 and attaching the resin layers 10 at the respective positions corresponding to the four corners of the firstelectronic component 3 to at least one of the firstelectronic component 3 and thesubstrate 2. Even with this method, corner bond can be performed on the firstelectronic component 3. - Moreover, by applying the fourth embodiment, the component-
side resin layers 3 c may be provided on the four corners of the firstelectronic component 3. - Moreover, the shape of the resin layers 10 may be appropriately changed. For example, as illustrated in
FIG. 8C , the resin layers 10 having a triangle shape may be arranged at the positions corresponding to the four corners of the firstelectronic component 3. Furthermore, the resin layers 10 may have a quadrangle or a shape other than a triangle. - In addition, without departing from the spirit or scope of the general inventive concept, the components in the above-described embodiments can be appropriately replaced by well-known components and the above-described embodiments and modified examples may be appropriately combined.
- For example, a method of manufacturing the electronic board including the preliminary mounting process and the process of attaching the two
resin layers 10 to both of the firstelectronic component 3 and thesubstrate 2 may be employed by the combination of the second and third embodiments. - Moreover, a method of manufacturing the electronic board including the preliminary mounting process and the process of providing the component-
side resin layer 3 c on the firstelectronic component 3 may be employed by the combination of the second and fourth embodiments. - In addition to the above, the first to fifth embodiments and the configurations of
FIGS. 8A to 8C can be appropriately combined.
Claims (10)
Priority Applications (4)
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US16/244,530 US10660216B1 (en) | 2018-11-18 | 2019-01-10 | Method of manufacturing electronic board and mounting sheet |
CN201910875098.8A CN111200913B (en) | 2018-11-18 | 2019-09-17 | Method for manufacturing electronic substrate and mounting sheet |
DE102019125262.8A DE102019125262A1 (en) | 2018-11-18 | 2019-09-19 | METHOD FOR PRODUCING AN ELECTRONIC BOARD AND ASSEMBLY FILM |
GB1913517.7A GB2579269A (en) | 2018-11-18 | 2019-09-19 | Method of manufacturing electronic board and mounting sheet |
Applications Claiming Priority (2)
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US201862768973P | 2018-11-18 | 2018-11-18 | |
US16/244,530 US10660216B1 (en) | 2018-11-18 | 2019-01-10 | Method of manufacturing electronic board and mounting sheet |
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US20200163227A1 true US20200163227A1 (en) | 2020-05-21 |
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CN (1) | CN111200913B (en) |
DE (1) | DE102019125262A1 (en) |
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US11094658B2 (en) * | 2019-05-22 | 2021-08-17 | Lenovo (Singapore) Pte. Ltd. | Substrate, electronic substrate, and method for producing electronic substrate |
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JPH08236654A (en) * | 1995-02-23 | 1996-09-13 | Matsushita Electric Ind Co Ltd | Chip carrier and manufacture thereof |
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JP3447620B2 (en) | 1999-07-05 | 2003-09-16 | Necエレクトロニクス株式会社 | Method for manufacturing flip-chip mounted semiconductor device |
JP2004247393A (en) | 2003-02-12 | 2004-09-02 | Ngk Spark Plug Co Ltd | Method for manufacturing semiconductor device |
WO2005081602A1 (en) * | 2004-02-24 | 2005-09-01 | Matsushita Electric Industrial Co., Ltd. | Electronic component mounting method, and circuit board and circuit board unit used therein |
CN100587930C (en) * | 2005-05-17 | 2010-02-03 | 松下电器产业株式会社 | Flip-chip mounting body and flip-chip mounting method |
JP4305430B2 (en) | 2005-08-24 | 2009-07-29 | ソニー株式会社 | Component mounting method and component mounting body |
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KR20090118438A (en) * | 2008-05-14 | 2009-11-18 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor package and method for manufacturing the same |
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JP2012160668A (en) * | 2011-02-02 | 2012-08-23 | Sumitomo Bakelite Co Ltd | Method for manufacturing electric component |
CN105684138B (en) | 2014-07-29 | 2019-09-06 | 松下知识产权经营株式会社 | The manufacturing method of semiconductor component and semiconductor mounted article |
JP2016184612A (en) | 2015-03-25 | 2016-10-20 | 富士通株式会社 | Method for mounting semiconductor device |
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2019
- 2019-01-10 US US16/244,530 patent/US10660216B1/en active Active
- 2019-09-17 CN CN201910875098.8A patent/CN111200913B/en active Active
- 2019-09-19 GB GB1913517.7A patent/GB2579269A/en not_active Withdrawn
- 2019-09-19 DE DE102019125262.8A patent/DE102019125262A1/en active Pending
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US20110266030A1 (en) * | 2010-04-28 | 2011-11-03 | Rajasekaran Swaminathan | Magnetic intermetallic compound interconnect |
US20110315429A1 (en) * | 2010-06-24 | 2011-12-29 | Sihai Chen | Metal coating for indium bump bonding |
US20130236724A1 (en) * | 2012-03-07 | 2013-09-12 | Nitto Denko Corporation | Double-sided adhesive tape |
US20130335880A1 (en) * | 2012-06-14 | 2013-12-19 | Taiyo Yuden Co., Ltd. | Capacitor, structure and method of forming capacitor |
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Also Published As
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GB2579269A (en) | 2020-06-17 |
US10660216B1 (en) | 2020-05-19 |
CN111200913A (en) | 2020-05-26 |
CN111200913B (en) | 2023-12-15 |
GB201913517D0 (en) | 2019-11-06 |
DE102019125262A1 (en) | 2020-05-20 |
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