US20190175004A1

US20190175004A1 - Imaging module for endoscope, and endoscope

Info

Publication number: US20190175004A1
Application number: US16/280,335
Authority: US
Inventors: Takuro Suyama; Takatoshi IGARASHI; Kensuke SUGA
Original assignee: Olympus Corp
Current assignee: Olympus Corp
Priority date: 2016-11-21
Filing date: 2019-02-20
Publication date: 2019-06-13
Also published as: JPWO2018092347A1; CN109952650A; JPWO2018092318A1; WO2018092347A1; CN109952650B; US20190274529A1; US10660511B2; WO2018092318A1

Abstract

The disclosed technology is directed to an imaging module of an endoscope comprises a plurality of semiconductor devices includes first and second semiconductor devices being electrically stacked to one another with a sealing layer interposed therebetween to transmit signals via a signal cable connected to a rear wall of the plurality of semiconductor devices. The first semiconductor device includes respective opposed first and second major surfaces having a first central region. The first major surface includes a semiconductor circuit portion disposed in the central region thereof. A through-silicon via is disposed in an intermediate region surrounding the first central region and is connected to the semiconductor circuit portion. The second major surface includes a first electrode located in the first central region thereof. The first electrode is connected to the through-silicon via. The second semiconductor device includes respective opposed third and fourth major surfaces having a second central region.

Description

CROSS-REFERENCE TO RELATED APPLICATION

This application is a continuation application of PCT Application No. PCT/JP2016/084497 filed on Nov. 21, 2016, which is hereby incorporated by reference in its entirety.

TECHNICAL FIELD

This disclosure relates to an imaging module for an endoscope, in which an imaging device and a semiconductor device are bonded together, and also to an endoscope having the imaging module with the imaging device and the semiconductor device bonded together.

DESCRIPTION OF THE RELATED ART

An endoscope acquires, for example, an image inside the body of a patient by inserting, into the body, an insertion portion with an imaging module accommodated in its rigid tip portion. JP 2005-334509A discloses an imaging module with a wiring board bonded to a back side of an imaging device. Electronic component chips such as capacitors, resistors and integrated circuits (ICs), which make up a drive circuit, are mounted on the wiring board.
The imaging module with the wiring board, on which the electronic component chips are mounted, has a large length in the direction of its optical axis. It is, therefore, not easy to shorten the rigid tip portion of the endoscope.
In recent years, semiconductor devices have been developed with a planar device, thin-film component having the same functions as electronic component chips such as capacitors and formed thereon. An imaging module can be reduced in diameter and length by bonding a semiconductor device, on which such a planar device is formed, to a back side of the imaging module by flip-chip technology.
To a signal cable bonded to a rear wall of an imaging module, tensile stress is applied by assembly work of the imaging module in a casing or by bending operation of an endoscope. If the bonding strength of a bonding portion between an imaging device and a semiconductor device is not sufficient, the application of stress to the bonding portion via the signal cable may hence cause a connection failure, thereby leading to a possible reduction in reliability.

BRIEF SUMMARY OF EMBODIMENTS

This disclosure has as objects thereof the provision of a high-reliability imaging module for an endoscope and a high-reliability endoscope.
The disclosed technology is directed to an imaging module of an endoscope comprises a plurality of semiconductor devices includes respective first and second semiconductor devices being electrically stacked to one another with a sealing layer interposed therebetween to transmit signals via a signal cable connected to a rear wall of a rearmost one of the plurality of semiconductor devices. The first semiconductor device includes respective opposed first and second major surfaces having a first central region. The first major surface includes a semiconductor circuit portion disposed in the central region thereof. A through-silicon via is disposed in an intermediate region surrounding the first central region. The through-silicon via is connected to the semiconductor circuit portion. The second major surface includes a first electrode located in the first central region thereof. The first electrode is connected to the through-silicon via. The second semiconductor device includes respective opposed third and fourth major surfaces having a second central region. The third major surface includes a second electrode disposed in the second central region thereof. The rearmost semiconductor device includes an external connection terminal disposed on the rear wall thereof and to which the signal cable is connected. At least one bonding portion is disposed between the first electrode and the second electrode in the respective first and second central regions.
According to the present disclosure, a high-reliability imaging module for an endoscope and a high-reliability endoscope can be provided.

BRIEF DESCRIPTION OF THE DRAWINGS

The technology disclosed herein, in accordance with one or more various embodiments, is described in detail with reference to the following figures. The drawings are provided for purposes of illustration only and merely depict typical or example embodiments of the disclosed technology. These drawings are provided to facilitate the reader's understanding of the disclosed technology and shall not be considered limiting of the breadth, scope, or applicability thereof. It should be noted that for clarity and ease of illustration these drawings are not necessarily made to scale.

FIG. 1 is a perspective view of an imaging module of a first embodiment.

FIG. 2 is a cross-sectional view of the imaging module of the first embodiment as taken along line II-II of FIG. 1.

FIG. 3 is a rear view of an imaging device in the imaging module of the first embodiment.

FIG. 4 is a rear view of an imaging device in an imaging module of Modification 1 of the first embodiment.

FIG. 5 is a rear view of an imaging device in an imaging module of Modification 2 of the first embodiment.

FIG. 6 is a rear view of an imaging device in an imaging module of Modification 3 of the first embodiment.

FIG. 7 is a rear view of an imaging device in an imaging module of Modification 4 of the first embodiment.

FIG. 8 is a cross-sectional view of an imaging module of a second embodiment.

FIG. 9 is a cross-sectional view of the imaging module of the second embodiment as taken along line IX-IX of FIG. 8.

FIG. 10 is a cross-sectional view of an imaging module of a modification of the second embodiment.

FIG. 11 is a cross-sectional view of an imaging module of a third embodiment.

FIG. 12 is a cross-sectional view of an imaging module of a modification of the third embodiment.

FIG. 13 is a perspective view of an endoscope of a fourth embodiment.

DETAILED DESCRIPTION OF THE EMBODIMENTS

In the following description, various embodiments of the technology will be described. For purposes of explanation, specific configurations and details are set forth in order to provide a thorough understanding of the embodiments. However, it will also be apparent to one skilled in the art that the technology disclosed herein may be practiced without the specific details. Furthermore, well-known features may be omitted or simplified in order not to obscure the embodiment being described.

First Embodiment

An imaging module 1 of this embodiment for an endoscope (hereinafter referred to as “the imaging module 1”) is accommodated in a tip portion 9A of an endoscope 9 (see FIG. 12).
As depicted in FIGS. 1 and 2, the imaging module 1 of this embodiment includes an imaging device 10, as a first semiconductor, and a second semiconductor 20 stacked together with a sealing layer interposed between them. In other words, in the imaging module 1, the semiconductor devices 10 and 20, including the imaging device 10, are stacked together.
It should be kept in mind that in the following description, the drawings of the individual embodiments and modifications are schematic, and the relationship between the thickness and width of each part and the thickness proportions, relative angles and the like of individual parts are different from the actual ones, and between two drawings, parts of different dimensional relationships or proportions may be included. Further, the direction toward the imaging device 10 along an optical axis O, Z-axis will be referred to as “front,” while the direction toward the second semiconductor device 20 along the optical axis O, Z-axis will be referred to as “rear.”
In addition, diagrammatic representation of some elements, for example, a wiring board 40 and a signal cable 41 may be omitted. Described specifically, although not depicted in FIG. 1 and so on but as depicted in FIG. 11, the wiring board 40 is connected to external connection terminals 29 on a rear wall 20SB of the second semiconductor device 20 of the imaging module 1, and further, the signal cable 41 is connected to the wiring board 40.
Described specifically, the imaging module 1 includes the semiconductor devices 10 and 20 including the imaging device 10 and stacked together with the sealing layer 30 interposed therebetween, and transmits signals via the signal cable 41 connected to the rear wall 20SB. The imaging module 1 also includes the external connection terminals 29, which are disposed on the rear wall 20SB of the rearmost semiconductor device 20 of the semiconductor devices 10 and 20 and to which the signal cable 41 is connected.
The imaging device 10, which is rectangular as viewed in plan, in other words, has a rectangular cross-sectional shape taken in a direction orthogonal to the optical axis O, is a substantially rectangular parallelepipedal flat plate having a first major surface 10SA and a second major surface 10SB opposing the first major surface 10SA.
A light-receiving portion 11 is formed as a first semiconductor circuit portion in a central region S1 of the first major surface 10SA. The light-receiving portion 11 is a charge-coupled device (CCD) or complementary metal oxide semiconductor (CMOS) light-receiving circuit or the like, receives light, and subjects it to photoelectric conversion to generate an electrical signal. Via a plurality of through-silicon vias 12 disposed in an intermediate region S2 that surrounds the central region S1, the light-receiving portion 11 is connected to a plurality of first electrodes 13 disposed in the central region S1 of the second major surface 10SB.
In other words, the central region S1 is a region in which the first electrodes 13 are disposed, and the intermediate region is a region around the central region S1, and the through-silicon vias 12 are disposed in the intermediate region S2.
As depicted in FIG. 3, on the second major surface 10SB of the imaging device 10, conductive traces 14 are disposed connecting the through-silicon vias 12 in the intermediate region S2 and the first electrodes 13 in the central region S1 together.
On the other hand, the second semiconductor device 20, which is rectangular as viewed in plan, has a third major surface 20SA and a fourth major surface 20SB opposing the third major surface 20SA. The second semiconductor device 20 has, on the third major surface 20SA, a plurality of second electrodes 23 connected to the first electrodes 13 of the imaging device 10, respectively. Specifically, the second electrodes 23 are disposed in the central region S1 of the third major surface 20SA of the second semiconductor device 20.
The first electrodes 13 and the second electrodes 23 are bonded together via bumps 15 of 1 μm to 50 μm high. However, the first electrodes 13 and the second electrodes 23 may be bonded together without interposing such bumps.
The second semiconductor device 20 processes electrical signals outputted from the imaging device 10, and outputs them as imaging signals. Formed on the fourth major surface 20SB of the second semiconductor device 20 is a planar device 21, which is a second semiconductor circuit portion that makes up a circuit having functions of electronic components such as capacitors, resistors and buffers, or a signal processing circuit such as a noise elimination circuit or an analog-to-digital conversion circuit.
The imaging module 1 is a wafer-level module fabricated by cutting a bonded wafer of an imaging wafer, which contains a plurality of imaging devices 10, and a second semiconductor wafer, which contains a plurality of second semiconductor devices 20, bonded together. Therefore, a projection image of the imaging device 10 and a projection image of the second semiconductor device 20, as projected on a projection plane extending in directions orthogonal to the optical axis, are overlapping completely. Accordingly, the imaging module 1 is small in diameter. Further, the imaging module 1, in which the second semiconductor device 20 with the planar device 21 formed thereon is bonded to the imaging device 10, is short.
As wafer-level modules, a plurality of imaging modules 1 can be efficiently fabricated. The imaging module 1 may be a block-level module, which can be fabricated by cutting respective wafers into rectangular or square blocks, each including plural devices, and subsequent to bonding of plural blocks, dividing the bonded blocks into individual pieces. Block-level module technology has a higher degree of freedom in the layout of devices on wafers than wafer-level module technology.
The second electrodes 23 of the second semiconductor device 20 are connected to the planar device 21 on the fourth major surface 20SB via through-silicon vias 22 in the intermediate region S2. Specifically, although not depicted in any figure, conductive traces which connect the second electrodes 23 in the central region S1 and the through-silicon vias 22 in the intermediate region S2 together are disposed on the third major surface 20SA of the second semiconductor device 20.
The sealing layer 30 is disposed between the imaging device 10 and the second semiconductor device 20. The sealing layer 30 is formed from insulating resin such as epoxy resin, acrylic resin, polyimide resin, silicone resin or polyvinyl resin.
The imaging device 10 and second semiconductor device 20 each have a thickness of 5 to 100 μm or so, although they may have different thicknesses as will be described hereinafter. The planer device 21 may be formed on only one side of the semiconductor device 20, or two planar devices may be formed on both sides of the semiconductor device 20, respectively.
In the imaging module 1, the bonding portions between the first electrodes 13 of the imaging device 10 and the second electrodes 23 of the second semiconductor device 20 are formed from metal. Metal has a small elastically-deformable range, and therefore has a potential problem in that, if a large stress is applied, cracks may occur in the joining portions and/or joining surfaces may separate.
In the imaging module 1, all the bonding portions are disposed in the central region S1, and the sealing layer 30 is disposed between the imaging device 10 and the second semiconductor device 20. The sealing layer 30 made from the resin has a large elastically-deformable range, and therefore absorbs stress through elastic deformation.
Described specifically, in the imaging module 1, the central region S1 has a so-called “rigid” structure while the outer peripheral region S3 which surrounds the intermediate region S2 has a so-called “softer” structure than the central region S1.
As already described hereinbefore, stress to be applied to the imaging module 1 is applied via the signal cable (not depicted) connected to the second semiconductor device 20 that forms the rear wall of the imaging module 1.
Now assume that by bending operation of the endoscope, force is applied to the imaging module 1 via the signal cable. To the imaging module 1 formed of the semiconductor devices stacked together in the Z-direction, force is then applied specifically in such a direction as to push and bend the optical axis O. As a consequence, it is in an outer side of the imaging module 1, specifically the outer peripheral region S3 that highest stress concentration occurs.
The imaging module 1 is highly reliable because all the bonding portions are disposed in only the central region S1 remote from the outer peripheral region S3. Moreover, the imaging module 1 absorbs stress through elastic deformation of the sealing layer 30 disposed in the outer peripheral region S3 so that stress to be applied to the joining portions and the through- silicon vias 12 and 22 is reduced.

Modifications of First Embodiment

Imaging modules of modifications of the first embodiment for endoscopes are similar to the imaging module 1 and have like advantageous effects as in the imaging module 1, and elements in the modifications, which have like functions to those of the corresponding elements in the imaging module 1, will be designated by the same numeral references and their description is omitted herein.

Modification 1 of First Embodiment

In the imaging module 1, the first electrodes 13 and second electrodes 23 disposed in the first region S1 are arranged in a circular pattern. In other words, the pumps 15 as the joining portions between the first electrodes 13 and the second electrodes 23 are arranged on the circumference of a single circle.
As depicted in FIG. 4, in an imaging module 1A, on the other hand, the bumps 15 as joining portions between the first electrodes 13 and the second electrodes 23 are arranged in a rectangular pattern. In other words, the bumps 15 are not arranged in a circular pattern. The arrangement of the bumps is not limited to a circular pattern insofar as the bumps are arranged in the central region S1 only.
If stress applied to the imaging module 1 via the signal cable 41 is isotropic in a plane orthogonal to the optical axis O, however, the imaging module 1 with the bumps 15 arranged in the circular pattern has high reliability than the imaging module 1A.

Modification 2 of First Embodiment

As depicted in FIG. 5, in an imaging module 1B, the first electrodes 13 and the second electrodes 23 are both arranged in a concentric circular pattern. In other words, the bumps 15 as bonding portions between the first electrodes 13 and the second electrodes 23 are arranged on the circumferences of two circles having the same central point.
For example, the first electrodes 13 include first electrodes 13A arranged on the circumference of an inner circle and first electrodes 13B arranged on the circumference of an outer circle.
The imaging module 1B facilitates the arrangement of many bonding portions. Such bonding portions may be arranged on the circumferences of three or more circles, or may also be arranged in a central region of a circle.
The imaging device 10A in the imaging module 1B is of the back-illuminated type, and through-silicon vias 12A that connect the light-receiving portion and the second major surface 10SB are arranged in a circular pattern. In the imaging device 10A of the back-illuminated type, some of the through-silicon vias 12A may be formed in a central region opposing the light-receiving portion.
As already explained, the imaging module 1B with the through-silicon vias 12A arranged in the circular pattern has higher reliability than the imaging module 1 if stress applied to the imaging module 1B via the signal cable 41 is isotropic in a plane orthogonal to the optical axis O.

Modification 3 of First Embodiment

As depicted in FIG. 6, in an imaging module 1C, the first electrodes 13 and the second electrodes 23, in other words, the bumps 15 as bonding portions are arranged in a concentric pattern.
Among the joining portions, the joining portions arranged on the side of an inner circumference each have a smaller size, specifically a smaller area as viewed in directions orthogonal to the optical axis, specifically in the directions of an XY plane than the joining portions arranged on the side of an outer circumference. The number of bonding portions per unit area is greater on the side of the inner circumference than on the side of the outer circumference.
For example, the first electrodes 13 consist of first electrodes 13C arranged on the circumference of an inner circle and first electrodes 13D arranged on the circumference of an outer circle. The first electrodes 13C have a smaller size than the first electrodes 13D.
The imaging module 1C facilitates to arrange more joining portions in a region close to the center, in other words, on the side of the inner circumference, and therefore has higher reliability than the imaging module 1B.

Modification 4 of First Embodiment

As depicted in FIG. 7, in an imaging module 1D, there are dummy bonding portions, which do not electrically connect the imaging device 10 as the first semiconductor device and the second semiconductor device 20, in the central region S1 and on the side of an outer circumference than the joining portions.
For example, first dummy electrodes 13E which are not connected to the through-silicon vias 12 are disposed on the second major surface 10SB of the imaging device 10. Although not depicted in the figure, the first dummy electrodes 13E are bonded to second dummy electrodes of the second semiconductor device 20 via the bumps 15 as bonding portions.
For example, the first dummy electrodes 13E are arranged so that they surround the first electrodes 13. In other words, the first electrodes 13 are arranged only inside a polygonal shape formed by connecting centers of the first dummy electrodes 13E.
The imaging module 1D has still higher reliability as the bonding portions are protected by the dummy bonding portions.

Second Embodiment

An imaging module 1E of a second embodiment for an endoscope is similar to the imaging module 1 and the like and has like advantageous effects as in the imaging module 1 and the like, and elements in the imaging module 1E, which have like functions to those of the corresponding elements in the imaging module 1 and the like, will be designated by the same numeral references and their description is omitted herein.
In the imaging module 1E of this embodiment as depicted in FIGS. 8 and 9, the sealing layer 30E includes a first sealing layer 31 disposed in the central region S1 and intermediate region S2, and a second sealing layer 32 disposed in the outer peripheral region S3 and having a smaller Young's modulus than the first sealing layer 31.
The sealing layer 30E can be disposed, for example, by arranging the first sealing layer 31, which has been subjected to patterning beforehand, on the bonding surface of the second semiconductor layer 20 before bonding the imaging device 10 as the first semiconductor device and the second semiconductor device 20 together, bonding the imaging device 10 to the second semiconductor device 20 with the first sealing layer 31 interposed therebetween, and then injecting a liquid resin into a gap between the bonding surface of the imaging device 10 and the bonding surface of the second semiconductor device 20 to form the second sealing layer 32.
The central region S1 and intermediate region S2, where the bonding portions and through-silicon vias are disposed, are protected by the first sealing layer 31 having the high Young's modulus. In the outer peripheral region S3, the second sealing layer 32 that undergoes elastic deformation to absorb stress is disposed.
In particular, the first sealing layer 31 may preferably have a Young's modulus of 1 GPa or greater, the second sealing layer 32 may preferably have a Young's modulus of not less than 1 MPa to not more than 500 MPa.
For example, the first sealing layer 31 may be made from an epoxy resin having a Young's modulus of 8 GPa, and the second sealing layer 32 may be made from a silicone resin having a Young's modulus of 50 MPa.
The imaging module 1E has higher reliability than the imaging module 1 which has the single sealing layer 30.

Modification of Second Embodiment

In the imaging module 1E, the intermediate region S2 with the through-silicon vias disposed therein is also protected by the first sealing layer 31.
In an imaging module 1F of this modification as depicted in FIG. 10, on the other hand, the second sealing layer 32 is disposed in the intermediate region S2. The second sealing layer 32 of such a large area has strong stress absorbing effect, and therefore can more reliably protect the bonding portions disposed in the central region S1.
The first sealing layer 31 is circular, and therefore can be disposed by dropping a liquid resin without conducting patterning.
The imaging modules 1E and 1F also include bonding portions of the same configuration as in the imaging modules 1A to 1D, and therefore obviously have the same advantageous effects as the imaging modules 1A to 1D.

Third Embodiment

An imaging module 1G of a third embodiment for an endoscope is similar to the imaging module 1 and the like and has like advantageous effects as in the imaging module 1 and the like, and therefore elements in the imaging module 1G, which have like functions to those of the corresponding elements in the imaging module 1 and the like, will be designated by the same numeral references and their description is omitted herein.
As depicted in FIG. 11, in the imaging module 1G, semiconductor devices 20A to 20C are stacked together in addition to the imaging device 10. To a rear wall 20CSB of the imaging module 1G, the signal cable 41 is connected via the wiring board 40 that uses a flexible substrate. To the wiring board 40, signal connection pads 49 are connected via the external connection terminals 29.
The imaging device 10 and semiconductor devices 20A to 20C have substantially the same configurations as the imaging device 10 as the first semiconductor device and the second semiconductor device 20, both of which have already been explained hereinbefore, respectively, and are stacked together with sealing layers 30E of substantially the same configuration as the sealing layer 30E in FIGS. 8 and 9 being interposed therebetween, respectively.
For example, the third semiconductor device 20B has a fifth major surface 20BSA and a sixth major surface 20BSB opposing the fifth major surface 20BSA. A semiconductor circuit portion 21B is disposed in the central region S1 of the sixth major surface 20BSB, and through-silicon vias 22B are disposed in the intermediate region S2 surrounding the central region S1 and are connected to the semiconductor circuit portion 21B. First electrodes 13B are disposed in the central region S1 of the fifth major surface 20BSA and are connected to the through-silicon vias 22B. Second electrodes 23B are disposed in the central region S1 of the sixth major surface 20BSB. Therefore, in the third semiconductor device 20B, bonding portions with the second semiconductor device 20A and bonding portions with the fourth semiconductor device 20C are disposed in the central region S1 only.
Some of the first electrodes 13B, second electrodes 23B and through-silicon vias 22B may be formed in an inner peripheral portion of the semiconductor circuit portion 21B and a region opposing the semiconductor circuit portion 21B. Conversely, the semiconductor circuit portion 21B may be formed in the intermediate region S2 and outer peripheral region S3.
The imaging module 1G of this embodiment may include three or more semiconductor devices insofar as the imaging device 10 is included. The advantageous effects of the present disclosure are remarkable especially when four or more semiconductor devices are stacked together.
In an imaging module with three or more semiconductor devices stacked together, at least two adjacent semiconductor devices are needed to have the same configuration as the semiconductor devices in the imaging module 1 and the like. In an imaging module with four or more semiconductor devices stacked together, however, strongest stress is applied between front most two semiconductor devices and between rearmost two semiconductor devices so that these semiconductor devices may preferably have the same configuration as the semiconductor devices in the imaging module 1 and the like.

Modification of Third Embodiment

An imaging module 1H of a modification of the third embodiment is similar to the imaging module 1G and has like advantageous effects as in the imaging module 1H, and elements in the imaging module 1H, which have like functions to those of the corresponding elements in the imaging module 1G, will be designated by the same numeral references and their description is omitted herein.
In the imaging module 1G, the wiring board 40 uses, as its substrate, the flexible substrate having flexibility so that cable 41 can be easily connected. On the other hand, a wiring board 45 in the imaging module 1H depicted in FIG. 12 uses a rigid substrate as its substrate. The signal connection pads 49 for the wiring board 45 are bonded to the external connection terminals 29 of the semiconductor device 20C. Further, two signal cables 41 are connected to side walls of the wiring board 45, respectively.
The wiring board 45 may be flexible or non-flexible. The signal cables 41 may be connected commonly to the same wall of the wiring board 45. As a still further alternative, the signal cables 41 may be directly connected to the external connection terminals 29 without using the wiring board 45.

Fourth Embodiment

An endoscope of a fourth embodiment includes one of the imaging modules 1 and 1A to 1G which have already been explained hereinbefore.
As depicted in FIG. 13, the endoscope 9 includes, for example, an insertion portion 9B with the imaging module 1 accommodated in the tip portion 9A thereof, a control portion 9C disposed on the side of a proximal end of the insertion portion 9B, and a universal cord 9D extending from the control portion 9C. The universal cord 9D is connected to the signal cable 41 of the imaging module 1 while the signal cable 41 is connected to the external connection terminals 29.
The endoscope 9 has high reliability, because it has one of the imaging modules 1 and 1A to 1G in the tip portion 9A of the insertion portion 9B. The endoscope 9 is a soft endoscope, but may be a rigid endoscope. The endoscope 9 may be a medical endoscope or an industrial endoscope.
The imaging module 1 and the like for endoscopes have been described hereinbefore, but the imaging module of the present disclosure should not be limited to the use in endoscopes. Described specifically, insofar as such an imaging device that stress is applied to an imaging module by movement of a signal cable connected to the imaging module is concerned, the same advantageous effects can be obtained by fabricating the imaging module in the same configuration as the imaging module of the present disclosure. The present disclosure can also be applied to imaging modules for devices other than endoscopes, such as, for example, an imaging module mounted in a tip portion of a moving microminiature robot arm and an imaging module capable of conducting focal adjustment or the like by movement in the direction of an optical axis without relying upon a lens unit.
The present disclosure should not be limited to the embodiments and modification described hereinbefore, and various changes, modifications and the like are feasible within a scope not altering the spirit of the present disclosure.
In sum, the disclosed technology is directed to an imaging module of an endoscope comprises a plurality of semiconductor devices includes respective first and second semiconductor devices being electrically stacked to one another with a sealing layer interposed therebetween to transmit signals via a signal cable connected to a rear wall of a rearmost one of the plurality of semiconductor devices. The first semiconductor device includes respective opposed first and second major surfaces having a first central region. The first major surface includes a semiconductor circuit portion disposed in the central region thereof. A through-silicon via is disposed in an intermediate region surrounding the first central region. The through-silicon via is connected to the semiconductor circuit portion. The second major surface includes a first electrode located in the first central region thereof. The first electrode is connected to the through-silicon via. The second semiconductor device includes respective opposed third and fourth major surfaces having a second central region. The third major surface includes a second electrode disposed in the second central region thereof. The rearmost semiconductor device includes an external connection terminal disposed on the rear wall thereof and to which the signal cable is connected. At least one bonding portion is disposed between the first electrode and the second electrode in the respective first and second central regions.
The at least one bonding portion is defined by a plurality of bonding portions arranged in a circular pattern. The plurality of bonding portions is arranged in a concentric circular pattern. The imaging module wherein among the plurality of bonding portions, those which are arranged on a side of an inner circumference are smaller in size than those which are arranged on a side of an outer circumference. The imaging module further comprises a dummy bonding portion disposed in the respective first and second central regions on a side of a circumference outer than a region in which each bonding portion is disposed without electrically connecting the first semiconductor device and the second semiconductor device to one another. The sealing layer includes a first sealing layer disposed in the respective first and second central regions and a second sealing layer disposed in an outer peripheral region, which surrounds the intermediate region and having a smaller Young's modulus than the first sealing layer. The first sealing layer is disposed in the intermediate region. The first semiconductor device is the imaging device that includes a light-receiving portion as the semiconductor circuit portion. The plurality of semiconductor devices has a third semiconductor device similar to the first semiconductor device or the second semiconductor device wherein the first, second and third semiconductor device are stacked to one another with a sealing layer having the same configuration as the sealing layer and interposed between each two adjacent semiconductor devices. The imaging module is used in the endoscope further includes the signal cable connected to the external connection terminal. An insertion portion with the imaging module accommodated in a tip portion thereof. A control portion is disposed on a side of a proximal end of the insertion portion. a universal cord extends from the control portion. The universal cord is electrically connected to the signal cable while the signal cable is connected to the external connection terminal.
Another aspect of the disclosed technology is directed to an imaging module comprises a first semiconductor and a second semiconductor configured to be electrically attached to the first semiconductor through a sealing layer. The first semiconductor having opposed first and second surfaces. The first surface having a first central region and a first intermediate region surrounding the first central region. The second surface having a second central region. The first semiconductor includes a semiconductor circuit in the first central region. A through-silicon via in the first intermediate region, the through-silicon via being is connected to the semiconductor circuit. A first electrode in the second central region, the first electrode is connected to the through-silicon via. The second semiconductor having opposed third and fourth surfaces, the third surface having a third central region. The second semiconductor includes a second electrode in the third central region. A bump is disposed between the first electrode in the second central region and the second electrode in the third central region.
The first semiconductor includes an imaging device. The imaging module includes a plurality of semiconductors. The plurality of semiconductors includes the first semiconductor and the second semiconductor. A rearmost semiconductor of the plurality of semiconductor includes a rear wall. The imaging module transmits signals via a signal cable connected to the real wall. The rearmost semiconductor has an external connection terminal disposed on the rear wall, the signal cable is connected to the external connection. The bump includes a first plurality of bumps and a second plurality of bumps arranged in a concentric circular pattern. The first plurality of bumps forming an inner circle and the second plurality of bumps forming an outer circle. The first plurality of bumps are smaller in size than the second plurality of bumps. The imaging module further comprises a dummy electrode disposed in an outer region of the second central region. The outer region is outer than a region that the first electrode is disposed and the dummy bump not being electrically connecting between the first semiconductor and the second semiconductor. The sealing layer includes a first sealing layer and a second sealing layer surrounding the first sealing layer. The second sealing layer has a smaller Young's modulus than the first sealing layer. The first sealing layer is facing the second central region and the third central region. The first sealing layer is facing a second intermediate region surrounding the second central region and a third intermediate region surrounding the third central region.
While various embodiments of the disclosed technology have been described above, it should be understood that they have been presented by way of example only, and not of limitation. Likewise, the various diagrams may depict an example schematic or other configuration for the disclosed technology, which is done to aid in understanding the features and functionality that can be included in the disclosed technology. The disclosed technology is not restricted to the illustrated example schematic or configurations, but the desired features can be implemented using a variety of alternative illustrations and configurations. Indeed, it will be apparent to one of skill in the art how alternative functional, logical or physical locations and configurations can be implemented to implement the desired features of the technology disclosed herein.
Although the disclosed technology is described above in terms of various exemplary embodiments and implementations, it should be understood that the various features, aspects and functionality described in one or more of the individual embodiments are not limited in their applicability to the particular embodiment with which they are described, but instead can be applied, alone or in various combinations, to one or more of the other embodiments of the disclosed technology, whether or not such embodiments are described and whether or not such features are presented as being a part of a described embodiment. Thus, the breadth and scope of the technology disclosed herein should not be limited by any of the above-described exemplary embodiments.
Terms and phrases used in this document, and variations thereof, unless otherwise expressly stated, should be construed as open ended as opposed to limiting. As examples of the foregoing: the term “including” should be read as meaning “including, without limitation” or the like; the term “example” is used to provide exemplary instances of the item in discussion, not an exhaustive or limiting list thereof; the terms “a” or “an” should be read as meaning “at least one,” “one or more” or the like; and adjectives such as “conventional”, “traditional”, “normal”, “standard”, “known” and terms of similar meaning should not be construed as limiting the item described to a given time period or to an item available as of a given time, but instead should be read to encompass conventional, traditional, normal, or standard technologies that may be available or known now or at any time in the future. Likewise, where this document refers to technologies that would be apparent or known to one of ordinary skill in the art, such technologies encompass those apparent or known to the skilled artisan now or at any time in the future.
The presence of broadening words and phrases such as “one or more”, “at least”, “but not limited to” or other like phrases in some instances shall not be read to mean that the narrower case is intended or required in instances where such broadening phrases may be absent. Additionally, the various embodiments set forth herein are described in terms of exemplary schematics, block diagrams, and other illustrations. As will become apparent to one of ordinary skill in the art after reading this document, the illustrated embodiments and their various alternatives can be implemented without confinement to the illustrated examples. For example, block diagrams and their accompanying description should not be construed as mandating a particular configuration.

NUMERAL REFERENCES LIST

- 1, 1A to 1H . . . Imaging module for endoscope
- 9 . . . Endoscope
- 10 . . . Imaging device as first semiconductor device
- 11 . . . Light-receiving device as semiconductor circuit portion
- 12 . . . Through-silicon via
- 13 . . . First electrode
- 14 . . . Conductive trace
- 15 . . . Bump
- 20 . . . Second semiconductor device
- 21 . . . Planar device
- 22 . . . Through-silicon via
- 23 . . . Second electrode
- 30 . . . Sealing layer
- 40 . . . Wiring board
- 41 . . . Signal cable
- S1 . . . Central region
- S2 . . . Intermediate region
- S3 . . . Outer peripheral region

Claims

What is claimed is:

1. An imaging module of an endoscope comprising:

a plurality of semiconductor devices includes respective first and second semiconductor devices being electrically stacked to one another with a sealing layer interposed therebetween to transmit signals via a signal cable connected to a rear wall of a rearmost one of the plurality of semiconductor devices;

the first semiconductor device includes respective opposed first and second major surfaces having a first central region, the first major surface includes a semiconductor circuit portion disposed in the central region thereof, a through-silicon via disposed in an intermediate region surrounding the first central region wherein the through-silicon via being connected to the semiconductor circuit portion, the second major surface includes a first electrode located in the first central region thereof wherein the first electrode being connected to the through-silicon via;

the second semiconductor device includes respective opposed third and fourth major surfaces having a second central region, the third major surface includes a second electrode disposed in the second central region thereof;

the rearmost semiconductor device includes an external connection terminal disposed on the rear wall thereof and to which the signal cable is connected; and

at least one bonding portion being disposed between the first electrode and the second electrode in the respective first and second central regions.

2. The imaging module of claim 1, wherein the at least one bonding portion is defined by a plurality of bonding portions arranged in a circular pattern.

3. The imaging module of claim 2, wherein the plurality of bonding portions is arranged in a concentric circular pattern.

4. The imaging module of claim 2, wherein among the plurality of bonding portions, those which are arranged on a side of an inner circumference are smaller in size than those which are arranged on a side of an outer circumference.

5. The imaging module of claim 1 further comprising:

a dummy bonding portion disposed in the respective first and second central regions on a side of a circumference outer than a region in which each bonding portion is disposed without electrically connecting the first semiconductor device and the second semiconductor device to one another.

6. The imaging module of claim 1, wherein the sealing layer includes a first sealing layer disposed in the respective first and second central regions, and a second sealing layer disposed in an outer peripheral region, which surrounds the intermediate region, and having a smaller Young's modulus than the first sealing layer.

7. The imaging module of claim 6, wherein the first sealing layer is disposed in the intermediate region.

8. The imaging module of claim 1, wherein the first semiconductor device is the imaging device that includes a light-receiving portion as the semiconductor circuit portion.

9. The imaging module of claim 1, wherein the plurality of semiconductor devices has a third semiconductor device similar to the first semiconductor device or the second semiconductor device wherein the first, second and third semiconductor device are stacked to one another with a sealing layer having the same configuration as the sealing layer and interposed between each two adjacent semiconductor devices.

10. The imaging module of claim 1 used in the endoscope further includes:

the signal cable connected to the external connection terminal;

an insertion portion with the imaging module accommodated in a tip portion thereof;

a control portion disposed on a side of a proximal end of the insertion portion; and

a universal cord extending from the control portion, wherein

the universal cord is electrically connected to the signal cable while the signal cable is connected to the external connection terminal.

11. An imaging module comprising:

a first semiconductor; and

a second semiconductor configured to be electrically attached to the first semiconductor through a sealing layer, wherein

the first semiconductor having opposed first and second surfaces, the first surface having a first central region and a first intermediate region surrounding the first central region, the second surface having a second central region, the first semiconductor including:

a semiconductor circuit in the first central region;

a through-silicon via in the first intermediate region, the through-silicon via being connected to the semiconductor circuit; and

a first electrode in the second central region, the first electrode being connected to the through-silicon via;

the second semiconductor having opposed third and fourth surfaces, the third surface having a third central region, the second semiconductor including a second electrode in the third central region,

and

a bump disposed between the first electrode in the second central region and the second electrode in the third central region.

12. The imaging module of claim 11, wherein the first semiconductor includes an imaging device.

13. The imaging module of claim 11, wherein the imaging module includes a plurality of semiconductors, the plurality of semiconductors includes the first semiconductor and the second semiconductor, a rearmost semiconductor of the plurality of semiconductor includes a rear wall.

14. The imaging module of claim 13, wherein the imaging module transmits signals via a signal cable connected to the real wall.

15. The imaging module of claim 13, wherein the rearmost semiconductor has an external connection terminal disposed on the rear wall, the signal cable being connected to the external connection.

16. The imaging module of claim 11, wherein

the bump includes a first plurality of bumps and a second plurality of bumps arranged in a concentric circular pattern, the first plurality of bumps forming an inner circle and the second plurality of bumps forming an outer circle, the first plurality of bumps are smaller in size than the second plurality of bumps.

17. The imaging module of claim 11, further comprising:

a dummy electrode disposed in an outer region of the second central region, the outer region is outer than a region that the first electrode is disposed, the dummy bump not being electrically connecting between the first semiconductor and the second semiconductor.

18. The imaging module of claim 11, wherein the sealing layer includes a first sealing layer and a second sealing layer surrounding the first sealing layer, the second sealing layer having a smaller Young's modulus than the first sealing layer.

19. The imaging module of claim 18, wherein the first sealing layer facing the second central region and the third central region.

20. The imaging module of claim 19, wherein the first sealing layer facing a second intermediate region surrounding the second central region and a third intermediate region surrounding the third central region.