US20180182921A1 - Semiconductor light emitting device - Google Patents

Semiconductor light emitting device Download PDF

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Publication number
US20180182921A1
US20180182921A1 US15/851,468 US201715851468A US2018182921A1 US 20180182921 A1 US20180182921 A1 US 20180182921A1 US 201715851468 A US201715851468 A US 201715851468A US 2018182921 A1 US2018182921 A1 US 2018182921A1
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electrode
layer
semiconductor layer
disposed
contact
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Seong Kyu JANG
Ju Yong Park
Kyu Ho Lee
Joon Hee Lee
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Seoul Viosys Co Ltd
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Seoul Viosys Co Ltd
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Assigned to SEOUL VIOSYS CO., LTD. reassignment SEOUL VIOSYS CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: JANG, SEONG KYU, LEE, JOON HEE, LEE, KYU HO, PARK, JU YONG
Publication of US20180182921A1 publication Critical patent/US20180182921A1/en
Priority to US16/830,191 priority Critical patent/US11515450B2/en
Priority to US17/880,614 priority patent/US20220376142A1/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H01L33/405—Reflective materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0016—Processes relating to electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H01L33/42—Transparent materials

Definitions

  • Exemplary implementations of the invention relate generally to an electronic device and, more particularly, to a semiconductor light emitting device including a light emitting structure, such as a light emitting diode, capable of emitting deep ultraviolet light.
  • a semiconductor light emitting device including a light emitting structure, such as a light emitting diode, capable of emitting deep ultraviolet light.
  • LEDs Semiconductor light emitting diodes
  • LEDs are devices in which light is emitted by a material contained in a device using electric energy, and have inorganic semiconductors emitting light generated by recombination of electrons and holes.
  • Semiconductor light emitting diodes (LEDs) have a number of advantages over filament-based light sources, such as long lifetime, low power, and good initial drive characteristics, and thus their demand is continuously increasing.
  • LEDs are used in displays, backlight units for liquid crystal displays (LCDs), lightings, and the like, and their use is expanding into various fields.
  • DUV semiconductor light emitting devices that emit deep ultraviolet (DUV) light of 365 nm or less have been developed.
  • DUV semiconductor light emitting devices can be applied to optical sensors such as air and water sterilization, surface contaminant removal, bio-agent detectors, UV curing of polymer, and medical and analytical equipment, and the like.
  • UV semiconductor light emitting devices have a structure in which a multiple quantum well structure including a gallium nitride-based well layer containing aluminum (Al) is interposed between an n-type AlGaN layer and a p-type AlGaN layer in order to emit light having a short wavelength.
  • AlGaN layer generally does not make an Ohmic contact with metal
  • a four-component AlInGaN p-type contact layer having a low GaN or Al content has been used. Since this p-type contact layer is not transparent to UV, UV light is emitted through a transparent substrate using a flip chip bonding technique.
  • light efficiency of conventional UV semiconductor light emitting devices has been very low.
  • Exemplary implementations of semiconductor light emitting devices constructed according to the principles of the invention are particularly adapted to emit DUV light and improve forward voltage characteristics and light efficiency.
  • one or more of the internal layers, such as the contact electrode may be partially alloyed such that the amount of aluminum varies according to the depth of the layer.
  • a semiconductor light emitting device includes a first semiconductor layer, an active layer disposed on the first semiconductor layer to emit ultraviolet light, a second semiconductor layer disposed on the active layer, and a first electrode disposed on the first semiconductor layer and being in Ohmic contact with a portion of the first semiconductor layer, the first electrode including a contact electrode including aluminum (Al) and at least one other material and having a first region adjacent to the first semiconductor layer and a second region, with each region having an Al composition ratio defined by the amount of Al relative to the amount of the at least one other material, wherein the Al composition ratio of the first region is greater than the Al composition ratio of the second region, and a metal layer disposed on the contact electrode.
  • Al aluminum
  • the first region may include a bottom surface and the second region may include a top surface of the contact electrode
  • At least one of the first region and the second region may have a thickness of about one half of the total thickness of the contact electrode.
  • the contact electrode may include at least one material selected from the group consisting of Cr, Ti, Al, Au, and combinations thereof, or an alloy of the material.
  • At least one of the first semiconductor layer and the active layer may include Al
  • the metal layer may include a reflective layer to reflect light, and a barrier layer disposed on the reflective layer to prevent diffusion of metal atoms or metal ions from the reflective layer.
  • the reflective layer may include at least one of Al, Al alloy, Ag, and Ag alloy
  • the barrier layer may include at least one of W, TiW, Mo, Ti, Cr, Pt, Rh, Pd, and Ni.
  • a contact resistance between the first semiconductor layer and the contact electrode may be different from a contact resistance between the first semiconductor layer and the metal layer.
  • the semiconductor light emitting device may further include a second electrode being in Ohmic contact with the second semiconductor layer.
  • the semiconductor light emitting device may further include a first pad electrically connected to the first electrode and disposed on the first electrode, and a second pad electrically connected to the second electrode and disposed on the second electrode.
  • the semiconductor light emitting device may further include a first bump electrically connected to the first electrode and disposed on the first electrode, and a second bump electrically connected to the second electrode and disposed on the second electrode.
  • the semiconductor light emitting device may further include an insulating layer disposed on the first pad and the second pad such that at least a part of the first pad and the second pad are exposed.
  • the semiconductor light emitting device may further include a first bump electrically connected to the first electrode and disposed on the first electrode, and a second bump electrically connected to the second electrode and disposed on the second electrode.
  • a semiconductor light emitting device includes a first semiconductor layer, an active layer disposed on the first semiconductor layer to emit ultraviolet light, a second semiconductor layer disposed on the active layer, and a first electrode disposed on the first semiconductor layer and including a plurality of metal layers, with one of the plurality of metal layers having a relatively planar lower surface and an irregular top surface, the lower surface being in Ohmic contact with the first semiconductor layer.
  • the one metal layer may include a contact electrode in Ohmic contact with a portion of the first semiconductor layer, other of the plurality of the metal layers may be electrically connected to the contact electrode, and at least a part of the other metal layer may be disposed on and in contact with the first semiconductor layer.
  • the contact electrode may have a width shorter than a width over which the other metal layer and the first semiconductor layer are in contact with each other.
  • the other metal layer may surround the contact electrode.
  • the other metal layer may include a reflective layer to reflect light, and a barrier layer disposed on the reflective layer to prevent diffusion of metal atoms or metal ions from the reflective layer.
  • the semiconductor light emitting device may further include a second electrode being in Ohmic contact with the second semiconductor layer.
  • the semiconductor light emitting device may further include a first bump electrically connected to the first electrode and disposed on the first electrode, and a second bump electrically connected to the second electrode and disposed on the second electrode.
  • FIG. 1 is a schematic plan view of an exemplary embodiment of a semiconductor light emitting device constructed according to the principles of the invention.
  • FIG. 2 is a cross-sectional view taken along sectional line I-I′ of the semiconductor light emitting device of FIG. 1 .
  • FIG. 3 is an enlarged cross-sectional view of part A of the semiconductor light emitting device of FIG. 2 .
  • FIG. 4 is a schematic plan view of another exemplary embodiment of a semiconductor light emitting device constructed according to the principles of the invention.
  • FIG. 5 is a cross-sectional view taken along sectional line II-IF of the semiconductor light emitting device of FIG. 4 .
  • FIG. 6 is a schematic plan view of another exemplary embodiment of a semiconductor light emitting device constructed according to the principles of the invention.
  • FIG. 7 is a cross-sectional view taken along sectional line of the semiconductor light emitting device of FIG. 6 .
  • FIGS. 8, 9, 10, 11, 12, 13, 14, and 15 are schematic cross-sectional views illustrating an exemplary method of manufacturing the semiconductor light emitting device of FIGS. 1 and 2 .
  • FIG. 16 is a schematic plan view of yet another exemplary embodiment of a semiconductor light emitting device constructed according to the principles of the invention.
  • FIG. 17 is a cross-sectional view taken along sectional line IV-IV′ of the semiconductor light emitting device of FIG. 16 .
  • the illustrated exemplary embodiments are to be understood as providing exemplary features of varying detail of some ways in which the inventive concepts may be implemented in practice. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions, and/or aspects, etc. (hereinafter individually or collectively referred to as “elements”), of the various embodiments may be otherwise combined, separated, interchanged, and/or rearranged without departing from the inventive concepts.
  • an element such as a layer
  • it may be directly on, connected to, or coupled to the other element or layer or intervening elements or layers may be present.
  • an element or layer is referred to as being “directly on,” “directly connected to,” or “directly coupled to” another element or layer, there are no intervening elements or layers present.
  • the term “connected” may refer to physical, electrical, and/or fluid connection, with or without intervening elements.
  • the D1-axis, the D2-axis, and the D3-axis are not limited to three axes of a rectangular coordinate system, such as the x, y, and z-axes, and may be interpreted in a broader sense.
  • the D1-axis, the D2-axis, and the D3-axis may be perpendicular to one another, or may represent different directions that are not perpendicular to one another.
  • “at least one of X, Y, and Z” and “at least one selected from the group consisting of X, Y, and Z” may be construed as X only, Y only, Z only, or any combination of two or more of X, Y, and Z, such as, for instance, XYZ, XYY, YZ, and ZZ.
  • the term “and/or” includes any and all combinations of one or more of the associated listed items.
  • Spatially relative terms such as “beneath,” “below,” “under,” “lower,” “above,” “upper,” “over,” “higher,” “side” (e.g., as in “sidewall”), and the like, may be used herein for descriptive purposes, and, thereby, to describe one elements relationship to another element(s) as illustrated in the drawings.
  • Spatially relative terms are intended to encompass different orientations of an apparatus in use, operation, and/or manufacture in addition to the orientation depicted in the drawings. For example, if the apparatus in the drawings is turned over, elements described as “below” or “beneath” other elements or features would then be oriented “above” the other elements or features.
  • the exemplary term “below” can encompass both an orientation of above and below.
  • the apparatus may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and, as such, the spatially relative descriptors used herein interpreted accordingly.
  • exemplary embodiments are described herein with reference to sectional and/or exploded illustrations that are schematic illustrations of idealized exemplary embodiments and/or intermediate structures. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, exemplary embodiments disclosed herein should not necessarily be construed as limited to the particular illustrated shapes of regions, but are to include deviations in shapes that result from, for instance, manufacturing. In this manner, regions illustrated in the drawings may be schematic in nature and the shapes of these regions may not reflect actual shapes of regions of a device and, as such, are not necessarily intended to be limiting.
  • FIG. 1 is a schematic plan view of an exemplary embodiment of a semiconductor light emitting device constructed according to the principles of the invention.
  • FIG. 2 is a cross-sectional view taken along sectional line I-I′ of the semiconductor light emitting device of FIG. 1 .
  • semiconductor light emitting device 10 includes substrate 100 , first conductive semiconductor layer 200 , active layer 300 , second conductive semiconductor layer 400 , contact electrode 500 , second electrode 550 , metal layer 600 , first electrode pad 700 , second electrode pad 750 , insulating layer 800 , first bump 900 , and second bump 950 .
  • Substrate 100 may be made of a material suitable for growing a nitride semiconductor single crystal.
  • substrate 100 may be formed using a material such as sapphire, zinc oxide (ZnO), gallium nitride (GaN), silicon carbide (SiC), aluminum nitride (AlN) or the like.
  • a buffer layer may be formed on an upper surface of substrate 100 to reduce the difference in lattice constant between substrate 100 and first conductive semiconductor layer 200 .
  • the buffer layer may be made of a material such as GaN, AlN, AlGaN, InGaN, AlGaInN or the like, and may be omitted depending on the desired characteristics of a semiconductor light emitting device and manufacturing process conditions.
  • First conductive semiconductor layer 200 is disposed on an upper surface of substrate 100 (or the buffer layer).
  • First conductive semiconductor layer 200 is a nitride semiconductor containing an n-type impurity and may have a compositional formula of AlxInyGa1 ⁇ x ⁇ yN (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x+y ⁇ 1).
  • first conductive semiconductor layer 120 may include GaN, AlGaN, InGaN, AlInGaN, and the like.
  • first conductive semiconductor layer 200 may be formed of AlGaN.
  • Active layer 300 is made of AlGaN to generate UV wavelength light, and AlGaN having energy larger than UV wavelength energy may be used as first conductive semiconductor layer 200 to prevent the UV wavelength light generated in active layer 300 from being absorbed by first conductivity type semiconductor layer 200 .
  • Active layer 300 is disposed on first conductive semiconductor layer 200 .
  • active layer 300 may have a multi quantum well (MQW) structure in which a quantum well layer and a quantum barrier layer are alternately stacked.
  • MQW multi quantum well
  • each of the quantum well layer and the quantum barrier layer includes materials having different compositions, and may have a composition formula of InxAlyGa1 ⁇ x ⁇ yN (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x+y ⁇ 1).
  • the quantum well layer may include a highly volatile material such as indium (In).
  • the quantum well layer may include InxGa1 ⁇ xN (0 ⁇ x ⁇ 1) and the quantum barrier layer may include GaN or AlGaN.
  • active layer 300 may be made of AlGaN to generate the UV wavelength light.
  • Second conductive semiconductor layer 400 is disposed on active layer 300 .
  • Second conductive semiconductor layer 400 is a p-type nitride semiconductor and may have a composition formula of AlxInyGa1 ⁇ x ⁇ yN (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x+y ⁇ 1).
  • second conductive semiconductor layer 400 may include AlGaN, GaN, or the like.
  • the p-type impurity may be Mg.
  • second conductive semiconductor layer 400 may be composed of GaN for improving Ohmic contact characteristics with Ni/Au or a transparent electrode (ITO) generally used as a second electrode 550 .
  • ITO transparent electrode
  • the first electrode is disposed on first conductive semiconductor layer 200 .
  • the first electrode may include contact electrode 500 and metal layer 600 .
  • Contact electrode 500 may be in an Ohmic contact with a portion of first conductive semiconductor layer 200 .
  • contact electrode 500 may comprise at least one of Cr, Ti, Al, Au and combinations thereof, or may be a multi-layer structure of Cr/Ti/Al/Ti/Au.
  • Cr may have a thickness of about 50 angstroms
  • Ti may have a thickness of about 200 angstroms
  • Al may have a thickness of about 600 angstroms
  • Ti may have a thickness of about 200 angstroms
  • Au may have a thickness of about 1000 angstroms.
  • they are not limited to the above-described thicknesses.
  • Metal layer 600 is disposed on contact electrode 500 .
  • Metal layer 600 may be electrically connected to contact electrode 500 , and at least a part of metal layer 600 may be disposed on and in contact with first conductive semiconductor layer 200 .
  • metal layer 600 may be in the form of surrounding contact electrode 500 .
  • the light efficiency of semiconductor light emitting device 10 can be improved by increasing the area of metal layer 600 that reflects the UV light and by reducing the area of contact electrode 500 that absorbs the UV light reflected from substrate 100 .
  • the contact area between contact electrode 500 and first conductive semiconductor layer 200 may be smaller than the contact area between metal layer 600 and first conductive semiconductor layer 200 .
  • the width W 1 over which contact electrode 500 contacts first conductive semiconductor layer 200 may be shorter than the width W 2 over which metal layer 600 contacts first conductive semiconductor layer 200 .
  • Second electrode 550 is disposed on second conductive semiconductor layer 400 .
  • Second electrode 550 may include Ni/Au or a transparent electrode (ITO).
  • second electrode 550 is processed using a heat treatment at a high temperature of about 590 degrees Celsius to improve Ohmic contact characteristics with second conductive semiconductor layer 400 .
  • Second electrode 550 may be partially alloyed and may form an Ohmic contact with second conductive semiconductor layer 400 .
  • First electrode pad 700 is electrically connected to the first electrode and is disposed on metal layer 600 .
  • Second electrode pad 750 is electrically connected to second electrode 550 and disposed on second electrode 550 .
  • First electrode pad 700 and second electrode pad 750 may function to effectively connect the first electrode and second electrode 550 to the circuit board.
  • first electrode pad 700 and second electrode pad 750 may be formed together using substantially the same process, for example, using photo and etch techniques or lift-off techniques.
  • first electrode pad 700 and second electrode pad 750 may include at least one of Ti and Au, or may have a multilayer structure of Ti/Au/Ti.
  • the first Ti layer may have a thickness of about 300 angstroms
  • the Au layer may have a thickness of about 3000 angstroms
  • the second Ti layer may have a thickness of about 50 angstroms.
  • the thickness of first electrode pad 700 and second electrode pad 750 may be varied depending on the thickness of metal layer 600 and second electrode 550 .
  • Insulating layer 800 is disposed on first electrode pad 700 and second electrode pad 750 such that at least a portion of first electrode pad 700 and second electrode pad 750 are exposed.
  • Insulating layer 800 may partially cover a light emitting structure composed of the first electrode, second electrode 550 and first conductive semiconductor layer 200 , active layer 300 , and second conductive semiconductor layer 400 . Insulating layer 160 electrically isolates the first electrode and second electrode 550 from each other and protects the first electrode and second electrode 550 from external impact and contaminants.
  • insulating layer 800 may comprise a silicon oxide layer and/or a silicon nitride layer.
  • First bump 900 is electrically connected to the first electrode and is disposed on first electrode pad 700 .
  • Second bump 950 is electrically connected to second electrode 550 and is disposed on second electrode pad 750 .
  • first bump 900 is electrically connected to the first electrode and is disposed on insulating layer 800
  • second bump 950 is electrically connected to second electrode 550 and is disposed on insulating layer 800 .
  • First bump 900 and second bump 950 may function to effectively connect first electrode and second electrode 550 to the circuit board.
  • first bump 900 and second bump 950 may be formed together using substantially the same process.
  • first bump 900 and second bump 950 may include at least one of Ti, Au, and Cr, or may be a multilayer structure of Ti/Au/Cr/Au.
  • the Ti layer may have a thickness of about 300 angstroms
  • the first Au layer may have a thickness of about 20000 angstroms
  • the Cr layer may have a thickness of about 200 angstroms
  • the second Au layer may have a thickness of about 250,000 angstroms.
  • they are not limited to the above-described thicknesses.
  • plan views of semiconductor light emitting element 10 in X direction and Y direction can be variously modified within the scope of employing exemplary embodiments of the principles of the invention.
  • the position, size, and shape of contact electrode 500 and metal layer 600 may be varied.
  • the positions, sizes, and shapes of first and second electrode pads 700 , 750 , first and second bumps 900 , 950 may be varied.
  • FIG. 3 is an enlarged cross-sectional view of part A of the semiconductor light emitting device of FIG. 2 .
  • the first electrode is disposed on first conductive semiconductor layer 200 , and includes contact electrode 500 and metal layer 600 .
  • Metal layer 600 is disposed on contact electrode 500 and includes reflective metal layer 610 and conductive barrier layer 620 .
  • First electrode pad 700 is disposed on metal layer 600 .
  • Contact electrode 500 may be in an Ohmic contact with a part of first conductive semiconductor layer 200 .
  • contact electrode 500 is subjected to a heat treatment at a high temperature of about 935 degrees Celsius to improve Ohmic contact characteristics with first conductive semiconductor layer 200 .
  • Contact electrode 500 may be partially alloyed and may form an Ohmic contact with first conductive semiconductor layer 200 .
  • contact electrode 500 may have a non-uniform top surface characterized by varying undulations when compared to its lower surface, which is relatively flat and planar, due to the partial alloying of contact electrode 500 .
  • the Ohmic contact between first conductive semiconductor layer 200 and contact electrode 500 should be improved to improve forward voltage (vf) characteristic of contact electrode 500 of semiconductor light emitting element 10 , particularly to emit DUV light.
  • Ohmic contact characteristics may be improved by increasing the aluminum composition of contact electrode 500 closer to the surface that contacts first conductive semiconductor layer 200 . That is, the aluminum composition ratio of a first surface 51 adjacent to first conductive semiconductor layer 200 of contact electrode 500 may be larger than the aluminum composition ratio of a second surface S 2 adjacent to metal layer 600 of contact electrode 500 so that the forward voltage characteristic of semiconductor light emitting element 10 may be improved.
  • the first and second surfaces of contact electrode 500 may constitute regions each extending in the X direction up to about one half of the total thickness of contact electrode 500 .
  • Metal layer 600 may be electrically connected to contact electrode 500 , and at least a part of metal layer 600 may be disposed on and in contact with first conductive semiconductor layer 200 .
  • Conductive barrier layer 620 is disposed on reflective metal layer 610 .
  • Reflective metal layer 610 reflects the UV light generated in active layer 300 or the UV light reflected from substrate 100 .
  • reflective metal layer 610 may include at least one of Al, Al alloy, Ag and Ag alloy.
  • Conductive barrier layer 620 prevents diffusion of metal atoms or ions from reflective metal layer 610 to prevent movement of reflective metal layer 610 .
  • Conductive barrier layer 620 may include at least one of W, TiW, Mo, Ti, Cr, Pt, Rh, Pd and Ni, or may have a multilayer structure of Cr/Al/Ni/Ti/Ni/Ti/Au/Ti.
  • the Cr layer may have a thickness of about 25 angstroms
  • the Al layer may have a thickness of about 1200 angstroms
  • each Ni layer may have a thickness of about 1000 angstroms
  • each Ti layer may have a thickness of about 1000 angstroms
  • the Au layer may have a thickness of about 2800 angstroms.
  • they are not limited to the above-described thicknesses.
  • FIG. 4 is a schematic plan view of another exemplary embodiment of a semiconductor light emitting device constructed according to the principles of the invention.
  • FIG. 5 is a cross-sectional view taken along sectional line II-IF of the semiconductor light emitting device of FIG. 4 .
  • semiconductor light emitting device 10 includes substrate 100 , first conductive semiconductor layer 200 , active layer 300 , second conductive semiconductor layer 400 , contact electrode 500 , first electrode pad 700 , second electrode pad 750 , insulating layer 800 , first bump 900 , and second bump 950 .
  • Substrate 100 , first conductive semiconductor layer 200 , active layer 300 , second conductive semiconductor layer 400 , contact electrode 500 , second electrode 550 , metal layer 600 , first electrode pad 700 , second electrode pad 750 , insulating layer 800 , first bump 900 , and second bump 950 are substantially the same as substrate 100 , first conductive semiconductor layer 200 , active layer 300 , second conductive semiconductor layer 400 , contact electrode 500 , second electrode 550 , metal layer 600 , first electrode pad 700 , second electrode pad 750 , insulating layer 800 , first bump 900 , and second bump 950 described with reference to FIGS. 1 and 2 .
  • a duplicate description will be omitted to avoid redundancy.
  • Metal layer 600 may be electrically connected to contact electrode 500 , and at least a part of metal layer 600 may be disposed on and in contact with first conductive semiconductor layer 200 .
  • a part of first conductive semiconductor layer 200 disposed at both ends of first conductive semiconductor layer 200 and being distal from a part of first conductive semiconductor layer 200 disposed under second electrode 550 is further mesa-etched.
  • Metal layer 600 is extended to and disposed on a top surface of the further mesa-etched first conductive semiconductor layer 200 .
  • Metal layer 600 may have a concave shape with contact electrode 500 and second electrode 550 as the center, and may reflect more UV light generated from active layer 300 or UV light reflected from substrate 100 to improve the light efficiency of semiconductor light emitting device 10 more effectively
  • FIG. 6 is a schematic plan view of another exemplary embodiment of a semiconductor light emitting device constructed according to the principles of the invention.
  • FIG. 7 is a cross-sectional view taken along sectional line of the semiconductor light emitting device of FIG. 6 .
  • semiconductor light emitting device 10 includes substrate 100 , first conductive semiconductor layer 200 , active layer 300 , second conductive semiconductor layer 400 , contact electrode 500 , second electrode 550 , metal layer 600 , insulating layer 800 , first bump 900 , and second bump 950 .
  • Substrate 100 , first conductive semiconductor layer 200 , active layer 300 , second conductive semiconductor layer 400 , contact electrode 500 , second electrode 550 , metal layer 600 , first bump 900 and second bump 950 are described substantially the same as substrate 100 , first conductive semiconductor layer 200 , active layer 300 , second conductive semiconductor layer 400 , contact electrode 500 , second electrode 550 , metal layer 600 , insulating layer 800 , first bump 900 , and second bump 950 described with reference to FIGS. 1 and 2 .
  • a duplicate description will be omitted to avoid redundancy.
  • Metal layer 600 may be electrically connected to contact electrode 500 , and at least a part of metal layer 600 may be disposed on and in contact with first conductive semiconductor layer 200 .
  • First conductive semiconductor layer 200 disposed under second bump 950 is not mesa-etched and substantially the same height as first conductive semiconductor layer 200 disposed under the second electrode 550 .
  • a part of first conductive semiconductor layer 200 disposed at both ends of first conductive semiconductor layer 200 and being distal from a part of first conductive semiconductor layer 200 disposed under second electrode 550 is further mesa-etched.
  • Metal layer 600 is extended to and disposed on a top surface of the further mesa-etched first conductive semiconductor layer 200 .
  • Metal layer 600 is disposed on second electrode 550 , and first bump 900 and second bump 950 are disposed on metal layer 600 .
  • Metal layer 600 may have a concave shape with contact electrode 500 and second electrode 550 as the center, and may reflect more UV light generated from active layer 300 or UV light reflected from substrate 100 to improve the light efficiency of semiconductor light emitting device 10 more effectively.
  • FIGS. 8, 9, 10, 11, 12, 13, 14, and 15 are schematic cross-sectional views illustrating an exemplary method of manufacturing the semiconductor light emitting device of FIGS. 1 and 2 .
  • first conductive semiconductor layer 200 , active layer 300 , and second conductive semiconductor layer 400 are formed on substrate 100 .
  • Substrate 100 may be provided as a substrate for semiconductor growth, and may include at least one selected material selected from GaN, sapphire, SiC, Si, MgAl2O4, MgO, LiAlO2, LiGaO2, and the like.
  • First conductive semiconductor layer 200 and second conductive semiconductor layer 400 may be an n-type semiconductor layer and a p-type semiconductor layer, respectively.
  • first conductive semiconductor layer 200 may include Al.
  • Active layer 300 may have a multi quantum well (MQW) structure in which a quantum well layer and a quantum barrier layer are alternately stacked.
  • active layer 300 may include Al to generate UV wavelength light.
  • contact electrode 500 is formed on first conductive semiconductor layer 200 .
  • Contact electrode 500 is formed on in an Ohmic contact with only a part of first conductive semiconductor layer 200 , but is not limited thereto.
  • an Ohmic contact area between contact electrode 500 and first conductive semiconductor layer 200 may vary.
  • second electrode 550 is formed on second conductive semiconductor layer 400 .
  • Second electrode 550 may be in an Ohmic contact with second conductive semiconductor layer 400 .
  • second electrode 550 may be formed of Ni/Au or a transparent electrode (ITO) to improve Ohmic characteristics with GaN used as second conductive semiconductor layer 400 .
  • metal layer 600 is formed on contact electrode 500 .
  • Metal layer 600 may be electrically connected to contact electrode 500 , and at least a part of metal layer 600 may be disposed on and in contact with first conductive semiconductor layer 200 .
  • Contact resistance between first conductive semiconductor layer 200 and contact electrode 500 may be different from contact resistance between first conductive semiconductor layer 200 and metal layer 600 .
  • first electrode pad 700 is formed on metal layer 600
  • second electrode pad 750 is formed on second electrode 550 .
  • First electrode pad 700 and second electrode pad 750 may function to effectively connect contact electrode 500 and second electrode 550 to the circuit board.
  • insulating layer 800 is formed to partially cover a first electrode including contact electrode 500 and metal layer 600 , second electrode 550 , and a light emitting structure including first conductive semiconductor layer 200 , active layer 300 , second conductive semiconductor layer 400 .
  • Insulating layer 800 may function to electrically isolate the first electrode and second electrode 550 from each other and to protect the first electrode and second electrode 550 from external impact and contaminants.
  • first bump 900 is formed on first electrode pad 700
  • second bump 950 is formed on second electrode pad 750 .
  • First bump 900 and second bump 950 may function to effectively connect the first electrode and second electrode 550 to the circuit board.
  • first bump 900 and second bump 950 may be formed together using substantially the same process.
  • semiconductor light emitting device 10 is connected to circuit board 1000 .
  • First bump 900 is electrically connected to n-electrode 1500 and second bump 950 is electrically connected to p-electrode 1550 to operate semiconductor light emitting device 10 .
  • FIG. 16 is a schematic plan view of yet another exemplary embodiment of a semiconductor light emitting device constructed according to the principles of the invention.
  • FIG. 17 is a cross-sectional view taken along sectional line IV-IV′ of the semiconductor light emitting device of FIG. 16 .
  • semiconductor light emitting device 10 includes substrate 100 , first conductive semiconductor layer 200 , active layer 300 , second conductive semiconductor layer 400 , contact electrode 500 , second electrode 550 , metal layer 600 , insulating layer 800 , first bump 900 , and second bump 950 .
  • Substrate 100 , first conductive semiconductor layer 200 , active layer 300 , second conductive semiconductor layer 400 , contact electrode 500 , second electrode 550 , metal layer 600 , insulating layer 800 , first bump 900 and second bump 950 are described substantially the same as substrate 100 , first conductive semiconductor layer 200 , active layer 300 , second conductive semiconductor layer 400 , contact electrode 500 , second electrode 550 , metal layer 600 , insulating layer 800 , first bump 900 and second bump 950 described with reference to FIGS. 1 and 2 .
  • a duplicate description will be omitted to avoid redundancy.
  • Metal layer 600 may be electrically connected to contact electrode 500 , and at least a part of metal layer 600 may be disposed on and in contact with first conductive semiconductor layer 200 . According to an exemplary embodiment of the principles of the invention, metal layer 600 is disposed on second electrode 550 , and first bump 900 and second bump 950 are disposed on metal layer 600 .
  • First bump 900 and second bump 950 may be standardized to be directly connected to the predetermined n-electrode and p-electrode of the circuit board, and may function to effectively connect the first electrode and second electrode 550 to the circuit board.
  • the Ohmic contact characteristics between internal components, such as a contact electrode and a n-type semiconductor layer, of a semiconductor light emitting device may be improved due to a heat treatment at a high temperature, thereby improving forward voltage characteristic of the contact electrode with the n-type semiconductor layer.
  • the aluminum composition ratio of the contact electrode adjacent to the n-type semiconductor layer may be relatively greater than the aluminum composition ratio of the contact electrode distal from the n-type semiconductor layer, the forward voltage characteristics of the contact electrode with the n-type semiconductor layer may be improved. Therefore, light efficiency of semiconductor light emitting device may be improved, and the semiconductor light emitting device may emit DUV light more effectively by reflecting more DUV light generated in an active layer or DUV light reflected from a substrate.

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US11515450B2 (en) 2022-11-29
KR20180074198A (ko) 2018-07-03

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