US20170179065A1 - Electrical interconnections for semiconductor devices and methods for forming the same - Google Patents
Electrical interconnections for semiconductor devices and methods for forming the same Download PDFInfo
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- US20170179065A1 US20170179065A1 US15/378,029 US201615378029A US2017179065A1 US 20170179065 A1 US20170179065 A1 US 20170179065A1 US 201615378029 A US201615378029 A US 201615378029A US 2017179065 A1 US2017179065 A1 US 2017179065A1
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Definitions
- Embodiments of the inventive concepts relate to a semiconductor and, more particularly, to improved electrical interconnections for semiconductor devices and methods for forming the same.
- a wire bonding technique is widely used as one of these techniques.
- the strength of the connection or the adhesive force of the bonding wire to the bonding pad may greatly affect electrical and mechanical durability of semiconductor products.
- Embodiments of the inventive concepts may provide improved electrical interconnections for semiconductor devices and methods for forming the same.
- Embodiments of the inventive concepts may also provide electrical interconnections for semiconductor devices, of which an adhesive force is improved or strengthened, along with methods of forming the same.
- an electrical interconnection for a semiconductor device may include a wire loop having a first end bonded to a first bonding site using a first bonding portion and a second end bonded to a second bonding site using a second bonding portion.
- the second bonding portion may include a folded portion having a wire that extends from the second end of the wire loop and is folded onto the second bonding site.
- the folded portion may include a first folded portion connected to the second end of the wire loop which extends toward the first bonding site, a second folded portion extending from the first folded portion and provided on the first folded portion, and a tail end protruding from an end portion of the second folded portion.
- a bottom surface of the second folded portion may be in contact with the first folded portion to form an interface between the first and second folded portions.
- a top surface of the second folded portion may be recessed toward the first folded portion.
- a method of forming an electrical interconnection for a semiconductor device may include performing a first bonding process by using a bonding apparatus in which a wire is provided to connect the wire to a first bonding site, providing the wire from the bonding apparatus to a second bonding site to form a wire loop between the first bonding site and the second bonding site, and using the bonding apparatus to perform a second bonding process on the second bonding site to bond the wire loop to the second bonding site.
- Performing the second bonding process may include moving the bonding apparatus along an overlapping trajectory on the second bonding site to form a folded portion on one end of the wire loop bonded to the second bonding site.
- the overlapping trajectory may include a first trajectory along a first upward direction moving vertically away from the one end of the wire loop, a second trajectory moving along a first downward diagonal direction beginning over the one end of the wire loop, moving horizontally toward the first bonding site, and becoming vertically closer to the second bonding site, a third trajectory moving along a second upward direction vertically away from the one end of the wire loop, and a fourth trajectory moving along a second downward diagonal direction beginning from nearer the first bonding site and moving horizontally toward and vertically closer to the second bonding site over the one end of the wire loop.
- an overlapping stitch bond for a semiconductor device having a wire loop comprising an end bonded to a bonding site using the overlapping stitch bond
- the overlapping stitch bond comprising: a folded portion having a segment that extends from the end of the wire loop and is folded over the end of the wire loop on the bonding site.
- FIGS. 1A to 1E are cross-sectional views of a semiconductor device and bonding apparatus illustrating a method of forming an electrical interconnection for a semiconductor device, according to some embodiments of the inventive concepts.
- FIGS. 2A to 2F are cross-sectional views of a semiconductor device and bonding apparatus illustrating a method of forming a stitch bonding portion of a bonding wire in an electrical interconnection according to some embodiments of the inventive concepts.
- FIG. 3A is an enlarged cross-sectional view of a portion of the semiconductor device and bonding apparatus of FIG. 2F further illustrating a movement pattern of the bonding apparatus according to some embodiments of the inventive concepts.
- FIG. 3B is an enlarged cross-sectional view of a portion of the semiconductor device and bonding apparatus of FIG. 2F further illustrating a movement pattern of the bonding apparatus according to some alternative embodiments of the inventive concepts.
- FIG. 4 is a cross-sectional view of a semiconductor device and bonding apparatus illustrating a method of forming an electrical interconnection for a semiconductor device, according to some other embodiments.
- inventive concepts will now be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the inventive concepts are shown.
- inventive concepts and methods of achieving them will be apparent from the following exemplary embodiments that will be described in more detail with reference to the accompanying drawings.
- the embodiments of the inventive concepts may, however, be embodied in different forms and should not be constructed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the inventive concept to those skilled in the art.
- FIGS. 1A to 1E are cross-sectional views illustrating a method of forming an electrical interconnection for a semiconductor device, according to some embodiments of the inventive concepts.
- a first device 110 and a second device 120 may be provided.
- the first device 110 may have a first bonding pad 115
- the second device 120 may have a second bonding pad 125 .
- the first device 110 may be provided on the second device 120 in such a way that the second bonding pad 125 is exposed.
- the first device 110 and the second device 120 may be vertically spaced apart from each other.
- the first device 110 and the second device 120 may be laterally spaced apart from each other and arranged at substantially the same level or different levels.
- at least one of the first device 110 and the second device 120 may have a lead or a lead frame instead of the bonding pad.
- One of the first and second devices 110 and 120 may be a semiconductor chip, and the other of the first and second devices 110 and 120 may be a printed circuit board or an interposer.
- the second device 120 may be the printed circuit board or the interposer, and the first device 110 may be the semiconductor chip.
- the first device 110 and the second device 120 may be semiconductor chips that may be the same as or different from each other.
- the first device 110 may be a memory chip, and the second device 120 may be a logic chip.
- a bonding apparatus having a capillary 90 may be provided over a first bonding site, e.g., the first bonding pad 115 .
- the capillary 90 may be disposed at a level corresponding to a predetermined height (e.g., an electric frame-off (EFO) height) from the first bonding pad 115 .
- a wire 95 may protrude from a central hole of the capillary 90 .
- the wire 95 may be formed of a conductive material such as gold or copper.
- An electric spark 80 may be provided to the wire 95 protruding from a bottom end of the capillary 90 to melt the protruding portion (i.e., a bottom end portion) of the wire 95 .
- a free air ball 97 may be formed at the bottom end of the capillary 90 .
- ultrasonic energy or heat instead of the electric spark 80 may be provided to the bottom end portion of the wire 95 . Movement of the wire 95 within the capillary 90 may be restricted by a closing operation of a clamp 92 . As described above, the free air ball 97 may be formed at the EFO height by applying the electric spark 80 .
- the capillary 90 may be moved toward the first bonding pad 115 in a state in which the clamp 92 is closed, and thus the free air ball 97 may come in contact with the first bonding pad 115 .
- the free air ball 97 may be pressed between the capillary 90 and the first bonding pad 115 .
- Heat and/or ultrasonic energy may be provided to the first device 110 to bond the free air ball 97 to the first bonding pad 115 .
- a ball bonding portion (or a first bonding portion) including the free air ball 97 bonded to the first bonding pad 115 may be formed.
- the capillary 90 may be moved in a direction away from the first bonding pad 115 .
- the clamp 92 may be in an opened state.
- the wire 95 may have a shape which extends from the free air ball 97 bonded to the first bonding pad 115 in, for example, a vertical direction.
- the capillary 90 raised from the first bonding pad 115 may move toward a second bonding site, for example, the second bonding pad 125 .
- the clamp 92 may be in an opened state. Since the capillary 90 moves with the clamp 92 open, the wire 95 provided from the bottom end of the capillary 90 may extend along the direction of movement of the capillary 90 . Thus, a wire loop 130 may be formed between the first bonding pad 115 and the second bonding pad 125 .
- the capillary 90 may be moved along an overlapping (or ribbon-shaped) trajectory Z at an end of the wire loop 130 without cutting the wire 95 .
- the clamp 92 may be in an opened state. Since the capillary 90 is moved along the overlapping trajectory Z with the clamp 92 open, a folded portion 140 of the wire 95 may be formed at an end portion of the wire loop 130 . The folded portion 140 may be bonded to the second bonding pad 125 . The capillary 90 may then be moved in a vertical direction away from the second bonding pad 125 with the clamp 92 closed, and thus the wire 95 may be cut from the folded portion 140 . In some embodiments, heat and/or ultrasonic energy may be applied to the wire 95 when the wire 95 is cut from the folded portion 140 .
- a stitch bonding portion (or a second bonding portion) of the wire loop 130 which is bonded to the second bonding pad 125 , may be formed.
- the stitch bonding portion may include the folded portion 140 .
- the capillary 90 may be raised to a level corresponding to an EFO height. Thereafter, a new wire bonding process may be performed using the capillary 90 , or the capillary 90 may be in a standby state. For example, the processes of FIGS. 1A to 1E may be repeated using the capillary 90 .
- a first end of the wire loop 130 may be bonded to the first bonding pad 115 by means of the ball bonding portion (or the first bonding portion) including the free air ball 97
- a second end of the wire loop 130 may be bonded to the second bonding pad 125 by means of the stitch bonding portion (or the second bonding portion) including the folded portion 140 .
- the second end of the wire loop 130 may be in contact with the second bonding pad 125 .
- FIGS. 2A to 2F are cross-sectional views illustrating a method of forming a stitch bonding portion of a bonding wire in an electrical interconnection according to some embodiments of the inventive concepts.
- the capillary 90 may move vertically in a first direction D 1 away from the second bonding pad 125 with the clamp 92 open (e.g., a first rising operation).
- the wire 95 may extend from the wire loop 130 .
- the wire 95 from the capillary 90 may substantially vertically extend from the second bonding pad 125 , and at least a portion of wire 95 may be curved between the second bonding pad 125 and the capillary 90 .
- a process of forming a free air ball may be omitted during or before the first rising operation of the capillary 90 .
- the capillary 90 that has been moved along the first direction D 1 may then be moved along a second direction D 2 (e.g., a first diagonal direction) downwardly toward the second bonding pad 125 and horizontally toward first bonding pad 115 with the clamp 92 open (e.g., a first downward diagonal operation or a left downward diagonal operation).
- the wire 95 may be folded at an end portion of the wire loop 130 , which is bonded to the second bonding pad 125 .
- the capillary 90 that has been moved along the second direction D 2 may then be moved along a third direction D 3 vertically away from the second bonding pad 125 with the clamp 92 still open (e.g., a second rising operation).
- the wire 95 may vertically extend from the second bonding pad 125 on the end portion of the wire loop 130 .
- the capillary 90 that has been moved along the third direction D 3 may then move along a fourth direction D 4 (e.g., a second diagonal direction) vertically toward the second bonding pad 125 and horizontally away from first bonding pad 115 with the clamp 92 open (e.g., a second downward diagonal operation or a right downward diagonal operation).
- the wire 95 may be refolded on the end portion of the wire loop 130 .
- the capillary 90 that has been moved along the fourth direction D 4 may descend vertically toward the second bonding pad 125 in a fifth direction D 5 .
- the clamp 92 may remain in an opened state.
- the folded portion 140 may be formed on the second bonding pad 125 by the descending capillary 90 .
- the capillary 90 may then be raised in a direction vertically away from the folded portion 140 with the clamp 92 open. Subsequently, the clamp 92 may be closed and the capillary 90 may be raised further such that the wire 92 is cut from the folded portion 140 . Thus, the stitch bonding portion (or the second bonding portion) may be formed on the second bonding pad 125 .
- a vertical movement distance of the capillary 90 along the first direction D 1 , the third direction D 3 , or each of the first and third directions D 1 and D 3 may be smaller than the EFO height.
- the EFO height from the second or first bonding pad 125 or 115 ranges from about 6,000 ⁇ m to about 7,000 ⁇ m (e.g., 6,500 ⁇ m)
- the vertical movement distance of the capillary 90 may range from about 50 ⁇ m to about 200 ⁇ m.
- a horizontal-movement distance of the capillary 90 along the second direction D 2 , the fourth direction D 4 , or each of the second and fourth directions D 2 and D 4 may be equal to or different from the vertical movement distance.
- the horizontal movement distance of the capillary 90 may range from about 30 ⁇ m to about 80 ⁇ m.
- At least one of an angle between the first and second directions D 1 and D 2 and an angle between the third and fourth directions D 3 and D 4 may range from about 60 degrees to about 80 degrees.
- FIG. 3A is an enlarged cross-sectional view of a portion of the semiconductor device and bonding apparatus of FIG. 2F , illustrating a movement pattern of the bonding apparatus according to some embodiments of the inventive concepts.
- FIG. 3B is another enlarged cross-sectional view of a portion of the semiconductor device and bonding apparatus of FIG. 2F illustrating a movement pattern of the bonding apparatus according to an alternative embodiment of the inventive concepts.
- the folded portion 140 may be formed by movement of the capillary 90 along the first to fourth directions D 1 to D 4 , i.e., an overlapping trajectory (i.e., ribbon motion) Z of the capillary 90 . Since the wire 95 is provided from the capillary 90 moving along the overlapping (i.e., ribbon-shaped) trajectory Z, the stitch bonding portion including the folded portion 140 may be formed at one end portion of the wire loop 130 .
- the folded portion 140 may include a first folded portion 141 provided on the second bonding pad 125 and a second folded portion 142 overlapping the first folded portion 141 .
- An interface 143 may exist between the first folded portion 141 and the second folded portion 142 .
- the first folded portion 141 may be folded at one end of the wire loop 130 .
- the first folded portion 141 may include a first end 141 a connected to the one end of the wire loop 130 and a second end 141 b opposite to the first end 141 a .
- the second end 141 b may be adjacent to a portion of the wire loop 130 spaced apart from the one end thereof.
- the one end of the wire loop 130 may be in contact with the second bonding pad 125 .
- the first folded portion 141 may extend from the first end 141 a to the second end 141 b along a surface 125 s of the second bonding pad 125 . At least a portion of the first folded portion 141 may be in contact with the second bonding pad 125 .
- the first end 141 a of the first folded portion 141 may be in contact with the surface 125 s of the second bonding pad 125 , but the second end 141 b of the first folded portion 141 may not be in contact with the surface 125 s of the second bonding pad 125 . In some embodiments, the first folded portion 141 may not be in contact with the surface 125 s of the second bonding pad 125 .
- the second folded portion 142 may be folded at the second end 141 b of the first folded portion 141 .
- the second folded portion 142 may include a first end 142 a extending from the second end 141 b of the first folded portion 141 and a second end 142 b opposite to the first end 142 a .
- the second end 142 b of the second folded portion 142 may be in contact with the first folded portion 141 .
- the first end 142 a of the second folded portion 142 and the second end 141 b of the first folded portion 141 may be connected to each other in a curved shape.
- the second end 142 b of the second folded portion 142 may be provided on the first end 141 a of the first folded portion 141 and may not be in contact with the second bonding pad 125 .
- a tail end 144 may remain on the second end 142 b of the second folded portion 142 .
- the tail end 144 may have a substantially spire-like shape protruding in a direction away from the second bonding pad 125 .
- a top surface of the second folded portion 142 may have an inclined surface 140 s recessed toward the second bonding pad 125 by the movement of the capillary 90 in the fourth direction D 4 illustrated in FIG. 2D and the descending operation of the capillary 90 in the fifth direction D 5 illustrated in FIG. 2E .
- a bottom surface of the second folded portion 142 may be in contact with a top surface of the first folded portion 141 to form the interface 143 between the first and second folded portions 141 and 142 .
- the interface 143 may have a shape bent toward the second bonding pad 125 .
- the interface 143 may have a flat shape. In some embodiments, the interface 143 may not extend to the second bonding pad 125 .
- the second folded portion 142 may further extend outside the first end 141 a of the first folded portion 141 .
- the second end 142 b of the second folded portion 142 may surround the first end 141 a of the first folded portion 141 and may be in contact with the second bonding pad 125 .
- the interface 143 may extend to the second bonding pad 125 .
- the formation of the folded portion 140 of the stitch bonding portion may be applied to the formation of the ball bonding portion.
- a folded portion may be further formed on the first bonding pad 115 by moving the capillary 90 along an overlapping (i.e., ribbon-shaped) trajectory such as that described above with reference to FIGS. 2A to 2E .
- the ball bonding portion may be provided on the second bonding pad 125
- the double-folded stitch bonding portion 140 may be provided on the first bonding pad 115 .
- a ball bonding portion or ball 97 may be formed on the second bonding pad 125
- the wire loop 130 may extend from the ball bonding portion 97 on the second bonding pad 125 toward the first bonding pad 115 .
- An overlapping ribbon-shaped trajectory, mirroring (or similar to) the trajectory Z described previously, may then be performed to provide a double-folded stitch bonding portion 140 on the first bonding pad 115 as shown in FIG. 4 .
- the stitch bonding portion may include the folded portion formed by moving the capillary along the ribbon-shaped trajectory.
- the folded portion may improve the strength of the stitch bonding portion, and thus it is possible to prevent damage or breakage of the bonding wire which may be caused by necking.
- the folded portion may also improve the adhesive force of the stitch bonding portion, and thus adhesive reliability of the bonding wire may be improved when the bonding wire is used in a semiconductor or electronic device or when a bond full test is performed. As a result, it is possible to improve electrical and mechanical durability of the semiconductor device.
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Manufacturing & Machinery (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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US16/040,507 US10643966B2 (en) | 2015-12-17 | 2018-07-19 | Electrical interconnections for semiconductor devices and methods for forming the same |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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KR10-2015-0181143 | 2015-12-17 | ||
KR1020150181143A KR102443487B1 (ko) | 2015-12-17 | 2015-12-17 | 반도체 장치의 강화된 강성을 갖는 전기적 연결부 및 그 형성방법 |
Related Child Applications (1)
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US16/040,507 Division US10643966B2 (en) | 2015-12-17 | 2018-07-19 | Electrical interconnections for semiconductor devices and methods for forming the same |
Publications (1)
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US20170179065A1 true US20170179065A1 (en) | 2017-06-22 |
Family
ID=59064668
Family Applications (2)
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US15/378,029 Abandoned US20170179065A1 (en) | 2015-12-17 | 2016-12-13 | Electrical interconnections for semiconductor devices and methods for forming the same |
US16/040,507 Active US10643966B2 (en) | 2015-12-17 | 2018-07-19 | Electrical interconnections for semiconductor devices and methods for forming the same |
Family Applications After (1)
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US16/040,507 Active US10643966B2 (en) | 2015-12-17 | 2018-07-19 | Electrical interconnections for semiconductor devices and methods for forming the same |
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US (2) | US20170179065A1 (ko) |
KR (1) | KR102443487B1 (ko) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10600756B1 (en) * | 2017-02-15 | 2020-03-24 | United States Of America, As Represented By The Secretary Of The Navy | Wire bonding technique for integrated circuit board connections |
US20210351153A1 (en) * | 2018-09-28 | 2021-11-11 | Samsung Electronics Co., Ltd. | Bonding wire, semiconductor package including the same, and wire bonding method |
US20220199571A1 (en) * | 2020-12-23 | 2022-06-23 | Skyworks Solutions, Inc. | Apparatus and methods for tool mark free stitch bonding |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100186991A1 (en) * | 2006-10-18 | 2010-07-29 | Kulicke And Soffa Industries, Inc. | conductive bumps, wire loops including the improved conductive bumps, and methods of forming the same |
US8123108B2 (en) * | 2010-01-27 | 2012-02-28 | Shinkawa Ltd. | Method of manufacturing semiconductor device and wire bonding apparatus |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4821945A (en) | 1987-07-01 | 1989-04-18 | International Business Machines | Single lead automatic clamping and bonding system |
JP3344235B2 (ja) | 1996-10-07 | 2002-11-11 | 株式会社デンソー | ワイヤボンディング方法 |
US20020014515A1 (en) | 2000-08-02 | 2002-02-07 | Koduri Sreenivasan K. | Method of self-correcting bond placement errors of integrated circuit bonders |
US7229906B2 (en) | 2002-09-19 | 2007-06-12 | Kulicke And Soffa Industries, Inc. | Method and apparatus for forming bumps for semiconductor interconnections using a wire bonding machine |
US6815836B2 (en) | 2003-03-24 | 2004-11-09 | Texas Instruments Incorporated | Wire bonding for thin semiconductor package |
JP2005159267A (ja) | 2003-10-30 | 2005-06-16 | Shinkawa Ltd | 半導体装置及びワイヤボンディング方法 |
US7314157B2 (en) | 2004-08-13 | 2008-01-01 | Asm Technology Singapore Pte Ltd | Wire bond with improved shear strength |
US7371676B2 (en) | 2005-04-08 | 2008-05-13 | Micron Technology, Inc. | Method for fabricating semiconductor components with through wire interconnects |
KR100725308B1 (ko) * | 2005-05-10 | 2007-06-07 | 가부시끼가이샤가이죠 | 와이어 루프, 그것을 갖는 반도체 장치 및 와이어 본딩방법 |
US20060290744A1 (en) | 2005-06-25 | 2006-12-28 | Lee Jao-Cheol | Wire bonding structure to electrically connect a printhead chip to a flexible printed circuit of an ink cartridge and method thereof |
CN101192588A (zh) | 2006-11-17 | 2008-06-04 | 飞思卡尔半导体公司 | 引线接合及其形成方法 |
KR100932680B1 (ko) * | 2007-02-21 | 2009-12-21 | 가부시키가이샤 신가와 | 반도체 장치 및 와이어 본딩 방법 |
JP5893266B2 (ja) | 2011-05-13 | 2016-03-23 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
US20150187729A1 (en) | 2014-01-02 | 2015-07-02 | Texas Instruments Incorporated | Wire Stitch Bond Having Strengthened Heel |
-
2015
- 2015-12-17 KR KR1020150181143A patent/KR102443487B1/ko active IP Right Grant
-
2016
- 2016-12-13 US US15/378,029 patent/US20170179065A1/en not_active Abandoned
-
2018
- 2018-07-19 US US16/040,507 patent/US10643966B2/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100186991A1 (en) * | 2006-10-18 | 2010-07-29 | Kulicke And Soffa Industries, Inc. | conductive bumps, wire loops including the improved conductive bumps, and methods of forming the same |
US8123108B2 (en) * | 2010-01-27 | 2012-02-28 | Shinkawa Ltd. | Method of manufacturing semiconductor device and wire bonding apparatus |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10600756B1 (en) * | 2017-02-15 | 2020-03-24 | United States Of America, As Represented By The Secretary Of The Navy | Wire bonding technique for integrated circuit board connections |
US20210351153A1 (en) * | 2018-09-28 | 2021-11-11 | Samsung Electronics Co., Ltd. | Bonding wire, semiconductor package including the same, and wire bonding method |
US20220199571A1 (en) * | 2020-12-23 | 2022-06-23 | Skyworks Solutions, Inc. | Apparatus and methods for tool mark free stitch bonding |
Also Published As
Publication number | Publication date |
---|---|
KR20170073003A (ko) | 2017-06-28 |
KR102443487B1 (ko) | 2022-09-16 |
US10643966B2 (en) | 2020-05-05 |
US20180331064A1 (en) | 2018-11-15 |
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