US20150102381A1 - Semiconductor light emitting device, wafer, and method for manufacturing nitride semiconductor crystal layer - Google Patents

Semiconductor light emitting device, wafer, and method for manufacturing nitride semiconductor crystal layer Download PDF

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US20150102381A1
US20150102381A1 US14/577,523 US201414577523A US2015102381A1 US 20150102381 A1 US20150102381 A1 US 20150102381A1 US 201414577523 A US201414577523 A US 201414577523A US 2015102381 A1 US2015102381 A1 US 2015102381A1
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refractive index
layer
low refractive
major surface
index layer
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Naoharu Sugiyama
Taisuke Sato
Hiroshi Ono
Satoshi MITSUGI
Tomonari SHIODA
Jongil Hwang
Hung Hung
Shinya Nunoue
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Toshiba Corp
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Toshiba Corp
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Definitions

  • Embodiments described herein relate generally to a semiconductor light emitting device, a wafer, and a method for manufacturing nitride semiconductor crystal layer.
  • the compound semiconductor is used in various fields such as a high-speed electronic device represented by a high frequency device and an optical device represented by a light emitting/light receiving device, and high-performance devices have been developed for practical use.
  • FIG. 1 is a schematic cross-sectional view showing a semiconductor light emitting device according to an embodiment
  • FIG. 2 is a schematic cross-sectional view showing a semiconductor light emitting device according to another embodiment
  • FIG. 3 is a schematic cross-sectional view showing a semiconductor light emitting device according to still another embodiment
  • FIG. 4 is a schematic cross-sectional view showing a semiconductor light emitting device according to yet still another embodiment
  • FIG. 5 is a schematic cross-sectional view showing a state of providing a transparent conductive film on the semiconductor light emitting device shown in FIG. 2 ;
  • FIG. 6 is a schematic cross-sectional view showing a state of providing a transparent conductive film on the semiconductor light emitting device shown in FIG. 4 ;
  • FIGS. 7A to 7C are schematic cross-sectional views illustrating a manufacturing method of a wafer and a nitride semiconductor crystal layer according to an embodiment
  • FIGS. 8A to 8F are schematic cross-sectional views illustrating another manufacturing method of a wafer and a nitride semiconductor crystal layer according to an embodiment
  • FIGS. 9A and 9B are schematic cross-sectional views explaining a semiconductor light emitting device according to still another embodiment.
  • FIGS. 10A and 10B are schematic cross-sectional views explaining a semiconductor light emitting device according to yet still another embodiment.
  • a semiconductor light emitting device includes a first semiconductor layer, a light emitting layer, a second semiconductor layer, and a low refractive index layer.
  • the first semiconductor layer has a first major surface and a second major surface being opposite to the first major surface.
  • the light emitting layer has an active layer provided on the second major surface.
  • the second semiconductor layer is provided on the light emitting layer.
  • the low refractive index layer covers partially the first major surface and has a refractive index lower than the refractive index of the first semiconductor layer.
  • FIG. 1 is a schematic cross-sectional view showing a semiconductor light emitting device according to an embodiment.
  • the semiconductor light emitting device 110 is provided with an n-type layer (first semiconductor layer) 10 , a p-type layer (second semiconductor layer) 20 , an MQW (Multiple Quantum Well) active layer (light emitting layer) 30 , a support substrate 40 , a protrusion part (low refractive index layer) 60 , and a reflection metal 80 .
  • the support substrate 40 of a Si substrate is bonded to an LED (Light Emitting Diode) stacked structure of the p-type layer 20 , the MQW active layer 30 , and the n-type layer 10 on the p-type layer 20 side thereof via the reflection metal 80 .
  • the reflection metal 80 works also as an electrode film.
  • the first semiconductor layer 10 has a first conductivity type.
  • the second semiconductor layer 20 has a second conductivity type. That is, the second semiconductor layer 20 has a conductivity type different from the conductivity type of the first semiconductor layer 10 .
  • the first conductivity type is an n-type and the second conductivity type is a p-type.
  • the n-type layer 10 side forms a light extraction face (a first major surface) 10 b.
  • the first semiconductor layer 10 has a first major surface (the light extraction face 10 b ) and a second major surface 10 g , which is opposite to the first major surface 10 b .
  • the light emitting layer 30 is provided on the second major surface 10 g .
  • the second semiconductor layer 20 is provided on the light emitting layer 30 .
  • the low refractive index layer 60 covers partially the first major surface 10 b.
  • An n-type GaN layer for example, is used as the n-type layer 10 .
  • a p-type GaN layer for example, is used as the p-type layer 20 .
  • the protrusion part 60 having a protruding shape is formed on a flat surface of the n-type layer 10 (light extraction face 10 b ).
  • the protrusion part 60 includes AlN, for example. In this case, while the refractive index of the GaN is approximately 2.5, the refractive index of the AlN is approximately 2.1.
  • AlGaN which is one of the mixed crystal series of Al and Ga, has a medium refractive index therebetween, and the AlGaN has a refractive index smaller than the GaN and is effective as a material of the protrusion part.
  • an intermediate layer preferably does not exist at a boundary surface therebetween.
  • both of the materials are crystalline and have a continuous lattice at the boundary.
  • the protrusion part 60 has a shape of an equilateral hexagonal pillar having a side length of 300 nm and a height of 500 nm when viewed in the direction perpendicular to the light extraction face 10 b . Furthermore, as shown in FIG. 1 , the plural protrusion parts 60 are formed on the light extraction face 10 b and arranged having a spacing of 1 ⁇ m from each other.
  • the shape of the protrusion part 60 may not be always an equilateral hexagonal pillar but may be a pyramid shape having a bottom plane of a triangle, a quadrangle, a polygon, a circle, or the like.
  • FIG. 2 is a schematic cross-sectional view showing a semiconductor light emitting device according to another embodiment.
  • FIG. 3 is a schematic cross-sectional view showing a semiconductor light emitting device according to still another embodiment.
  • FIG. 4 is a schematic cross-sectional view showing a semiconductor light emitting device according to yet still another embodiment.
  • FIG. 5 is a schematic cross-sectional view showing a state of providing a transparent conductive film on the semiconductor light emitting device shown in FIG. 2 .
  • FIG. 6 is a schematic cross-sectional view showing a state of providing a transparent conductive film on the semiconductor light emitting device shown in FIG. 4 .
  • the support substrate 40 shown in FIG. 1 is omitted from the semiconductor devices shown in FIGS. 2 to 6 .
  • a part of the protrusion part 60 may be embedded in the n-type layer 10 as in the semiconductor light emitting device 120 shown in FIG. 2 .
  • the surface of the n-type layer 10 (light extraction face 10 b ) is rough and the protrusion part 60 may be formed on a convex part 10 c as in the semiconductor light emitting device 130 shown in FIG. 3 .
  • the protrusion part 60 may be embedded perfectly in the n-type layer 10 and the surface (light extraction face 10 b ) may be flattened as shown in FIG. 4 .
  • the shape in which the protrusion part 60 is protruding as in FIGS. 1 and 3 has an advantage.
  • each of the semiconductor light emitting device 120 shown in FIG. 2 and the semiconductor light emitting device 140 shown in FIG. 4 has an advantage. This is because typically the thickness of the stacked ITO layer (transparent conductive film) is approximately 200 nm and a problem such as disconnection of the transparent conductive film 75 at a step does not happen when the surface roughness is equivalent or smaller than the ITO thickness.
  • ITO indium tin oxide
  • the protrusion part 60 is formed by material having a refractive index smaller than the refractive index of the n-type layer 10 .
  • AlN is used in the protrusion part 60 , for example.
  • an n-type GaN layer is used as the n-type layer 10 , for example.
  • a gallium nitride crystal layer having a surface of a (0001) plane is formed on a sapphire substrate having a surface of the same (0001) plane and furthermore an active layer of an InGaN thin film crystal layer is combined therewith to form a preferable light emitting diode or the like having a high light emitting efficiency.
  • the light emitting diode stacking the nitride semiconductor crystal layer on the sapphire substrate uses a structure in which an n-type layer, a quantum well type light emitting layer, a p-type GaN layer are stacked on the sapphire substrate. Because the sapphire substrate is almost transparent for a wavelength band of a blue region which is a target wavelength band of this purpose, the light emitting diode frequently employs a structure in which a reflection film is formed on the rear side of the sapphire substrate and light is extracted from the upper part of the p-type GaN layer on the surface side (face-up structure).
  • the light emitting diode is designed so as to suppress light leakage to the substrate rear side and to extract more light from the crystal layer surface (p-electrode side) by bonding the reflection metal film on the sapphire substrate on the rear side.
  • the light emitting diode is designed so as to guide the light from the GaN layer efficiently to the reflection film and to return the light to the GaN layer by providing the sapphire substrate surface with surface roughening of approximately 1 ⁇ m and stacking a GaN crystal layer thereon.
  • a structure in which, after an LED structure made of nitride semiconductor is epitaxially grown on a sapphire substrate, the surface side thereof composed of a p-type GaN layer is bonded onto a support substrate having a high thermal conductivity and the sapphire substrate is removed therefrom.
  • an end surface of an n-type GaN layer from which the sapphire substrate is removed is exposed to be sometimes used as a light extraction face and also a contact surface.
  • the method to prepare the surface of the GaN layer, which is the light extraction face, with surface roughening by etching using KOH or the like is employed.
  • the thin-film type device structure realizes improvement of the light extraction efficiency with surface roughening by a method such as the etching of the light extraction face, sufficient reproducibility is not obtained in the wet etching represented by the KOH etching and the sometimes device characteristics are not uniform thereamong.
  • the protrusion part 60 is formed by material having a refractive index smaller than the refractive index of the n-type layer 10 and covers the light extraction face 10 b partially. Therefore, the rough surface of the protrusion part 60 enables the light extraction efficiency to be improved. Furthermore, a step height in the rough surface can be made small compared with the reference example by employing the low reflection index material for the protrusion part 60 . Furthermore, resistance in the vertical direction (film thickness direction) can be reduced compared with a case in which the protrusion parts 60 cover the whole light extraction face 10 b.
  • FIGS. 7A to 7C are schematic cross-sectional views illustrating a manufacturing method of a wafer and a nitride semiconductor crystal layer according to an embodiment.
  • FIGS. 8A to 8F are schematic cross-sectional views illustrating another manufacturing method of a wafer and a nitride semiconductor crystal layer according to an embodiment.
  • a silicon substrate (crystal substrate) 50 having a surface of a (111) orientation is prepared as a substrate for crystal growth of a thin film nitride semiconductor.
  • the substrate for crystal growth of a thin film nitride semiconductor is not limited to the silicon substrate and may be a sapphire substrate. While, the thickness of the silicon substrate 50 is approximately 525 ⁇ m, for example, in the embodiment, there is not a problem when the thickness is selected optionally in a range approximately between 250 ⁇ m and 800 ⁇ m, for example.
  • the surface of the Si (silicon) substrate preserved in the air is covered by a native oxide film. Accordingly, for removing this native oxide film and providing hydrogen termination processing for a substrate surface, the thin film growth substrate (silicon substrate 50 ) is subjected to processing of dilute hydrofluoric acid having a concentration of approximately 1% for approximately 1 minute after cleaning by acid treatment. By this processing, the surface of the silicon crystal layer (silicon substrate 50 ) comes to have a surface structure terminated by hydrogen and a water repellent surface.
  • the silicon substrate 50 having a hydrogen-terminated surface is introduced into a film deposition apparatus and an AlN layer 60 a having a thickness of 500 nm is stacked thereon.
  • An ECR plasma sputter apparatus is used for the AlN film deposition and an aluminum target is sputtered by plasma discharge performed under a mixed atmosphere of Ar gas and nitrogen gas, and thus the 500 nm AlN film can be stacked approximately in 30 minutes.
  • the film deposition temperature is set to 500° C. in the embodiment, the film deposition temperature can be selected optionally in a range from 100° C. to 800° C., for example.
  • the film deposition method can be optionally selected and an MOCVD (gas phase growth method using organic metal) apparatus, a molecular beam epitaxy method (MBE) apparatus, or the like may be used.
  • MOCVD gas phase growth method using organic metal
  • MBE molecular beam epitaxy method
  • the hydrogen atom terminating the surface of the Si substrate displaces Al atom or nitrogen atom and does desorption when the AlN layer is formed at 500° C. by an ECR plasma sputter film deposition method, and thus does not remain at boundary surface of AlN/Si. Furthermore, when the AlN layer is formed at a higher temperature, the AlN crystal layer is stacked after a hydrogen atom does thermal desorption and dangling-bond appears on surface of Si.
  • a native oxide film is formed during handling in the air.
  • This native oxide film stably-kept up to a high temperature and is impeditive in the epitaxial film deposition of the AlN crystal layer. Therefore, an annealing treatment is necessary at the temperature approximately from 900° C. to 1000° C. in vacuum or under an inert atmosphere before a film deposition process.
  • the substrate in which the 500 nm AlN layer 60 a has been stacked on the silicon substrate 50 is taken out of the film deposition apparatus and subjected to surface processing by a photolithography process.
  • the AlN layer 60 a is left in a hexagonal pillar shape having a side length of 300 nm and the area therearound is etched off.
  • the hexagonal pillar shapes of the AlN (first crystal layer) are arranged having a spacing of 1 ⁇ m therebetween.
  • the surface of the silicon substrate 50 is exposed in the part except the part where hexagonal-pillar-shaped AlN remains. That is, the hexagonal-pillar-shaped AlN corresponds to the protrusion part 60 described above in FIG. 1 .
  • the substrate subjected to the etching processing of the AlN layer 60 a after having been cleaned again by acid treatment, is introduced into an MOCVD (gas phase growth method using organic metal) apparatus, and the substrate temperature is increased to 1,100° C. and a gallium nitride layer (second crystal layer) 10 a having a thickness of 2 ⁇ m is formed by the use of TMG (Tri-Methyl-Gallium) and NH 3 (ammonia) as source materials. That is, the gallium nitride (GaN) layer 10 a corresponds to the n-type layer 10 described above in FIG. 1 , for example.
  • MOCVD gas phase growth method using organic metal
  • the first crystal layer (AlN in the embodiment) made of nitride containing Al is formed so as to partially cover the major surface of the silicon substrate 50 and the second crystal layer (GaN in the embodiment) made of nitride containing Al in a content rate lower than that in the first crystal layer is grown on the first crystal layer, and thus a wafer 210 according to the embodiment is formed.
  • the n-type GaN layer may not be formed directly on the substrate having the rough surface of AlN (protrusion part 60 ), but the n-type GaN layer may be stacked after a GaN layer without including impurities is grown approximately in a thickness of approximately 1 to 3 ⁇ m. In a structure in which the GaN layer without including impurities is grown first, it is difficult to obtain contact from the light extraction face 10 b and processing for forming a contact electrode is performed as described below.
  • the GaN layer 10 a is epitaxially grown at high temperature on the substrate in which a part of the silicon substrate 50 is covered by the AlN (protrusion part 60 ) as in the embodiment.
  • the probability of adsorption and decomposition of the source material is different between on the AlN and on the Si crystal surface.
  • growth of the GaN thin film crystal is accelerated more on the AlN layer than on the Si crystal surface.
  • the GaN layer 10 a growing on the AlN part having the protruding shape grows not only in a ⁇ 111> axis direction (direction perpendicular to the substrate surface) but also in a lateral direction.
  • the GaN layer 10 a on the AlN part is soon combined with the GaN layer 10 a having started to grow from the neighboring AlN protrusion and covers the substrate surface together as a film. Furthermore, it is possible to further increase the selectivity of the crystal growth on the AlN when a silicon nitride (SiN) layer is formed on the Si crystal surface by a process such as one in which ammonia to be used as a source material is introduced in advance to the TMG before the crystal growth of the GaN layer.
  • SiN silicon nitride
  • GaN layer 10 a As described above, by temperature adjustment of the gas atmosphere in the film deposition, GaN layer 10 a is not formed on the silicon substrate 50 but the GaN layer 10 a is formed starting from the AlN protrusion part 60 . Accordingly, after the GaN layer 10 a has been formed finally as an integrated film, a region between the protrusion parts 60 remains as a vacant space. At this time, it can be adjusted by a growth condition whether the GaN crystal layer becomes flat against the top surface of the protrusion part 60 or the GaN film sinks to a level lower than the top surface of the protrusion part 60 .
  • the vacant space exists between the AlN protrusion parts 60 , the dislocation density of the GaN layer 10 a on the vacant space can be reduced. Therefore, the crystal quality of the GaN layer 10 a is improved in this part. Furthermore, since the vacant space exists between the AlN protrusion parts 60 , it is possible to absorb or reduce shrinkage caused by thermal expansion coefficient difference in a temperature cooling process after the formation of the GaN layer 10 a . Therefore, it is possible to suppress bowing caused in the two-layer structure of the silicon substrate 50 and the GaN layer 10 a and to prevent a crack accompanying the bowing from occurring.
  • the light emitting layer 30 (refer to FIG. 1 ) composed of a multilayer film of InGaN and GaN is stacked on this n-type gallium nitride crystal layer (n-type layer 10 ). Furthermore, for current injection to emit light in the light emitting layer 30 , the upper side of the crystal structure is subjected to p-type (Mg) doping.
  • the gas phase growth method using organic metal is proposed as a thin film crystal growth method of the n-type GaN crystal layer (n-type layer 10 ), the light emitting layer 30 , and the p-type layer 20 , it is optional to use any of a molecular beam epitaxy (MBE) method, an HVP (Hydride Vapor Phase Epitaxy) method, and the like, which are used in the crystal growth of a nitride semiconductor.
  • MBE molecular beam epitaxy
  • HVP Hydride Vapor Phase Epitaxy
  • a metal film including Ag (reflection metal 80 , refer to FIG. 1 ), for example, a silver nickel layer is stacked on the surface of the p-type layer 20 as a reflection film and a contact layer.
  • the surface of the p-type layer 20 is bonded to the support substrate 40 (refer to FIG. 1 ) made of material such as silicon, cupper, or the like.
  • the silicon substrate 50 of the thin film crystal growth substrate is removed.
  • the growth substrate (silicon substrate) 50 can be removed by polishing of the growth silicon substrate 50 .
  • the slightly remaining Si is finally removed by dry etching using SF6 gas as an etchant, and thus the AlN protrusion part 60 and the GaN layer 10 a , which have been formed first on the silicon substrate 50 , can be exposed on the surface.
  • a fine wire electrode 70 (refer to FIG. 1 ) is formed on the n-type GaN layer (n-type layer 10 ) which is exposed between the AlN protrusion parts 60 and further a p-type electrode is formed on the reflection metal 80 , and then the LED is completed.
  • the n-type contact cannot be obtained on the surface where the silicon substrate 50 for the nitride thin film growth has been removed, when the GaN crystal layer without including impurities is grown first in the growth of the GaN thin film crystal layer on the Si substrate having the AlN protrusion structure. Accordingly, the n-type contact is formed after the GaN layer without including impurities has been etched off and the n-type GaN layer has been exposed on the surface.
  • FIGS. 8A to 8F show a process example of another manufacturing method.
  • the AlN layer 60 a is formed on the silicon substrate 50 .
  • the thickness of the AlN layer 60 a is set to 800 nm.
  • the thickness of the AlN layer 60 a may be any one in a range approximately between 300 nm and 2 ⁇ m.
  • the AlN layer 60 a is subjected to the surface roughening according to a sequence of the photography.
  • the shape of a convex part of the AlN layer 60 b subjected to the surface roughening includes a pillar shape or a pyramid shape having a bottom plane of a triangle, a quadrangle, a polygon, a circle, or the like, as described above.
  • the GaN layer 10 a is grown on the AlN layer 60 b having the rough surface ( FIG. 8C ).
  • the AlN layer 60 a grows so as to cover concaves of the AlN layer 60 b , a lot of facet surfaces are exposed at an early stage in growth covering such concaves.
  • the behavior of dislocation is modulated in these facet surfaces and the dislocation disappears by the interaction between the dislocations. Therefore, it is known that growth on concave-convex surface has an effect on reducing the dislocation density.
  • the light emitting layer 30 , the p-type layer 20 , and the reflection metal 80 are formed (not shown in the drawing), and the silicon substrate 50 is removed after the support substrate 40 has been bonded (not shown in the drawing).
  • the etching of the Si substrate 50 is terminated when the AlN layer 60 b is exposed on the whole surface and before the surface of the GaN layer 10 a is exposed partially, and thus the AlN layer 60 b covers the whole surface ( FIG. 8D ).
  • the AlN layer 60 is etched slightly after the removal of the silicon substrate 50 and then the GaN part (or protrusion part 60 ) can be exposed in a part of the surface ( FIG. 8E ).
  • the rough surface can be formed on the surface by the etching selectivity of the AlN and the GaN ( FIG. 8F ).
  • AlN may be formed in a thin film after the AlN layer 60 a has been etched until the surface of the silicon substrate 50 is exposed partially and the rough surface may be formed in the AlN layer 60 a .
  • AlN layer having a thickness of approximately 20 to 200 nm is grown first by the MOCVD apparatus and the whole silicon surface is covered by the AlN layer. The process after that is the same as the process described above. In this case as well, since a GaN layer grows on concave-convex surface of a AlN layer, an effect on reducing the dislocation density is the same as the explanation described above.
  • FIGS. 9A and 9B are schematic cross-sectional views explaining a semiconductor light emitting device according to still another embodiment.
  • the semiconductor light emitting device 150 uses an LED structure of a p-type layer (second semiconductor layer) 20 , an MQW active layer (light emitting layer) 30 , and an n-type layer (first semiconductor layer) 10 .
  • the n-type layer 10 is made of an n-type gallium nitride crystal having a thickness of 3 ⁇ m, and the surface of this n-type GaN (light extraction face 10 b ) is subjected to surface roughening of 1 ⁇ m.
  • a part 10 e on a convex part of this concave-convex part 10 d is formed by AlN. While this structure is similar to the structure shown in FIG.
  • a concave part 10 f is formed deeply on the GaN layer side and the AlN protrusion part 65 after etching has a shape closer to a pyramid than to a pillar. In this manner, the deeper trench has an advantage from the standpoint of light extraction efficiency.
  • the above described surface roughening can be performed by removing Si from GaN crystal layer (GaN layer 10 a ) from the silicon crystal (silicon substrate 50 ) of a growth substrate, exposing the AlN protrusion part 60 before etching and the GaN layer 10 a which have been formed first on the silicon substrate 50 , and then further providing dry etching using Cl series gas.
  • the etching has selectivity for GaN and AlN when the surface having the AlN protrusion part 60 structure formed on the GaN surface (n-type layer 10 ) is subjected to dry etching using the Cl series gas. Accordingly, while the AlN protrusion part 60 is etched at the edge part of the top surface thereof, the whole protrusion is not removed. In contrast, the etching proceeds deeply in the GaN layer exposed as the under layer, and thus a rough surface enlarged with deeper trench can be obtained as shown in FIG. 9B .
  • FIGS. 10A and 10B are schematic cross-sectional views explaining a semiconductor light emitting device according to yet still another embodiment.
  • the AlN protrusion parts 60 before etching are arranged at random in the size (lateral width) thereof and the spacing therebetween. Therefore, it is possible to provide further randomness through the rough surface after dry etching.
  • the AlN protrusion part 60 having a small width is caused to shrink also in the height direction because the etching proceeds from the edge part of the top surface in the AlN protrusion part 60 .
  • the etching proceeds slowly in the height direction and thus difference is enlarged in the height among the AlN protrusion parts 65 after the etching.
  • the etching proceeds deeply in the GaN layer (n-type layer 10 ) in a part having a large spacing between the AlN protrusion parts 60
  • the etching does not proceed deeply in the GaN layer in a part having a small spacing.
  • the depth variation (height difference) of the roughness is within a range of approximately 600 nm to 1.5 ⁇ m. The light extraction efficiency is improved in such a shape having a high randomness in the roughness.
  • nitride semiconductor includes all compositions of semiconductors of the chemical formula B x In y Al z Ga 1-x-y-z N (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ z ⁇ 1, and x+y+z ⁇ 1) for which each of the compositional proportions x, y, and z are changed within the ranges.
  • Nonride semiconductor further includes group V elements other than N (nitrogen) in the chemical formula recited above, various elements added to control various properties such as the conductivity type, etc., and various elements incorporated unintentionally.
  • perpendicular and parallel refer to not only strictly perpendicular and strictly parallel but also include, for example, the fluctuation due to manufacturing processes, etc. It is sufficient to be substantially perpendicular and substantially parallel.
  • any manufacturing method of the semiconductor light emitting device, the wafer, and the nitride semiconductor crystal layer which one skilled in the art can practice by appropriate design modification based on the manufacturing method of the semiconductor light emitting device, wafer, and the nitride semiconductor crystal layer which is described above as the embodiment of the invention is also included in the scope of the invention to the extent that the purport of the invention is included.

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Abstract

According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a light emitting layer, a second semiconductor layer, and a low refractive index layer. The first semiconductor layer has a first major surface and a second major surface being opposite to the first major surface. The light emitting layer has an active layer provided on the second major surface. The second semiconductor layer is provided on the light emitting layer. The low refractive index layer covers partially the first major surface and has a refractive index lower than the refractive index of the first semiconductor layer.

Description

    CROSS-REFERENCE TO RELATED APPLICATIONS
  • This application is a divisional of U.S. patent application Ser. No. 13/220,059, filed Aug. 29, 2011, the disclosure of which is incorporated herein by reference in its entirety. This application claims priority to Japanese Application No. 2011-109784, filed May 16, 2011, the disclosure of which is incorporated herein by reference in its entirety.
    • FIELD
  • Embodiments described herein relate generally to a semiconductor light emitting device, a wafer, and a method for manufacturing nitride semiconductor crystal layer.
    • BACKGROUND
  • The compound semiconductor is used in various fields such as a high-speed electronic device represented by a high frequency device and an optical device represented by a light emitting/light receiving device, and high-performance devices have been developed for practical use.
  • However, when a difference between the refractive index of a crystal layer forming a light extraction face and the refractive index of the air is large, it is not possible to extract light efficiently. Furthermore, even when the surface of the light extraction plane is subjected to surface roughening, poor reproducibility of the roughness causes device characteristics to be non-uniform among devices. Improvement of the light extraction efficiency is desired in the semiconductor light emitting device.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a schematic cross-sectional view showing a semiconductor light emitting device according to an embodiment;
  • FIG. 2 is a schematic cross-sectional view showing a semiconductor light emitting device according to another embodiment;
  • FIG. 3 is a schematic cross-sectional view showing a semiconductor light emitting device according to still another embodiment;
  • FIG. 4 is a schematic cross-sectional view showing a semiconductor light emitting device according to yet still another embodiment;
  • FIG. 5 is a schematic cross-sectional view showing a state of providing a transparent conductive film on the semiconductor light emitting device shown in FIG. 2;
  • FIG. 6 is a schematic cross-sectional view showing a state of providing a transparent conductive film on the semiconductor light emitting device shown in FIG. 4;
  • FIGS. 7A to 7C are schematic cross-sectional views illustrating a manufacturing method of a wafer and a nitride semiconductor crystal layer according to an embodiment;
  • FIGS. 8A to 8F are schematic cross-sectional views illustrating another manufacturing method of a wafer and a nitride semiconductor crystal layer according to an embodiment;
  • FIGS. 9A and 9B are schematic cross-sectional views explaining a semiconductor light emitting device according to still another embodiment; and
  • FIGS. 10A and 10B are schematic cross-sectional views explaining a semiconductor light emitting device according to yet still another embodiment.
    •  DETAILED DESCRIPTION
  • In general, according to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a light emitting layer, a second semiconductor layer, and a low refractive index layer. The first semiconductor layer has a first major surface and a second major surface being opposite to the first major surface. The light emitting layer has an active layer provided on the second major surface. The second semiconductor layer is provided on the light emitting layer. The low refractive index layer covers partially the first major surface and has a refractive index lower than the refractive index of the first semiconductor layer.
  • Hereinafter, embodiments will be explained with reference to the drawings. A similar component is denoted by the same reference numeral and detailed explanation will be optionally omitted in each of the drawings.
  • FIG. 1 is a schematic cross-sectional view showing a semiconductor light emitting device according to an embodiment.
  • The semiconductor light emitting device 110 according to the embodiment is provided with an n-type layer (first semiconductor layer) 10, a p-type layer (second semiconductor layer) 20, an MQW (Multiple Quantum Well) active layer (light emitting layer) 30, a support substrate 40, a protrusion part (low refractive index layer) 60, and a reflection metal 80. Then, in the semiconductor light emitting device 110 according to the embodiment, the support substrate 40 of a Si substrate is bonded to an LED (Light Emitting Diode) stacked structure of the p-type layer 20, the MQW active layer 30, and the n-type layer 10 on the p-type layer 20 side thereof via the reflection metal 80. The reflection metal 80 works also as an electrode film.
  • The first semiconductor layer 10 has a first conductivity type. The second semiconductor layer 20 has a second conductivity type. That is, the second semiconductor layer 20 has a conductivity type different from the conductivity type of the first semiconductor layer 10. In the embodiment, the first conductivity type is an n-type and the second conductivity type is a p-type.
  • The n-type layer 10 side forms a light extraction face (a first major surface) 10 b.
  • That is, the first semiconductor layer 10 has a first major surface (the light extraction face 10 b) and a second major surface 10 g, which is opposite to the first major surface 10 b. The light emitting layer 30 is provided on the second major surface 10 g. The second semiconductor layer 20 is provided on the light emitting layer 30. The low refractive index layer 60 covers partially the first major surface 10 b.
  • An n-type GaN layer, for example, is used as the n-type layer 10. A p-type GaN layer, for example, is used as the p-type layer 20. The protrusion part 60 having a protruding shape is formed on a flat surface of the n-type layer 10 (light extraction face 10 b). The protrusion part 60 includes AlN, for example. In this case, while the refractive index of the GaN is approximately 2.5, the refractive index of the AlN is approximately 2.1. Furthermore, AlGaN, which is one of the mixed crystal series of Al and Ga, has a medium refractive index therebetween, and the AlGaN has a refractive index smaller than the GaN and is effective as a material of the protrusion part. Furthermore, for preventing unintended light reflection or scattering between the first semiconductor layer 10 having a high refractive index and the low refractive index material, an intermediate layer preferably does not exist at a boundary surface therebetween. Moreover, if possible, preferably both of the materials are crystalline and have a continuous lattice at the boundary. In the embodiment, the protrusion part 60 has a shape of an equilateral hexagonal pillar having a side length of 300 nm and a height of 500 nm when viewed in the direction perpendicular to the light extraction face 10 b. Furthermore, as shown in FIG. 1, the plural protrusion parts 60 are formed on the light extraction face 10 b and arranged having a spacing of 1 μm from each other. The shape of the protrusion part 60 may not be always an equilateral hexagonal pillar but may be a pyramid shape having a bottom plane of a triangle, a quadrangle, a polygon, a circle, or the like.
  • FIG. 2 is a schematic cross-sectional view showing a semiconductor light emitting device according to another embodiment.
  • FIG. 3 is a schematic cross-sectional view showing a semiconductor light emitting device according to still another embodiment.
  • FIG. 4 is a schematic cross-sectional view showing a semiconductor light emitting device according to yet still another embodiment.
  • FIG. 5 is a schematic cross-sectional view showing a state of providing a transparent conductive film on the semiconductor light emitting device shown in FIG. 2.
  • FIG. 6 is a schematic cross-sectional view showing a state of providing a transparent conductive film on the semiconductor light emitting device shown in FIG. 4.
  • The support substrate 40 shown in FIG. 1 is omitted from the semiconductor devices shown in FIGS. 2 to 6.
  • While, in the semiconductor light emitting device 110 shown in FIG. 1, an example is shown for the case where the protrusion part 60 is formed on the flat surface of the n-type layer 10 in a protruding shape, a part of the protrusion part 60 may be embedded in the n-type layer 10 as in the semiconductor light emitting device 120 shown in FIG. 2. Alternatively, the surface of the n-type layer 10 (light extraction face 10 b) is rough and the protrusion part 60 may be formed on a convex part 10 c as in the semiconductor light emitting device 130 shown in FIG. 3. Alternatively, the protrusion part 60 may be embedded perfectly in the n-type layer 10 and the surface (light extraction face 10 b) may be flattened as shown in FIG. 4.
  • From the standpoint of light extraction efficiency, the shape in which the protrusion part 60 is protruding as in FIGS. 1 and 3 has an advantage.
  • In contrast, when a transparent conductive film 75 represented by indium tin oxide (ITO) is stacked for an n-side electrode on the rough surface (light extraction face 10 b including the protrusion part 60) as shown in FIG. 5 and FIG. 6, each of the semiconductor light emitting device 120 shown in FIG. 2 and the semiconductor light emitting device 140 shown in FIG. 4 has an advantage. This is because typically the thickness of the stacked ITO layer (transparent conductive film) is approximately 200 nm and a problem such as disconnection of the transparent conductive film 75 at a step does not happen when the surface roughness is equivalent or smaller than the ITO thickness.
  • In each of the semiconductor light emitting devices shown in FIGS. 1 to 6, the protrusion part 60 is formed by material having a refractive index smaller than the refractive index of the n-type layer 10. As described above, AlN is used in the protrusion part 60, for example. Furthermore, an n-type GaN layer is used as the n-type layer 10, for example.
  • Here, a reference example will be explained. For example, in a light emitting device made of nitride semiconductor, a gallium nitride crystal layer having a surface of a (0001) plane is formed on a sapphire substrate having a surface of the same (0001) plane and furthermore an active layer of an InGaN thin film crystal layer is combined therewith to form a preferable light emitting diode or the like having a high light emitting efficiency.
  • The light emitting diode stacking the nitride semiconductor crystal layer on the sapphire substrate uses a structure in which an n-type layer, a quantum well type light emitting layer, a p-type GaN layer are stacked on the sapphire substrate. Because the sapphire substrate is almost transparent for a wavelength band of a blue region which is a target wavelength band of this purpose, the light emitting diode frequently employs a structure in which a reflection film is formed on the rear side of the sapphire substrate and light is extracted from the upper part of the p-type GaN layer on the surface side (face-up structure). In this case, the light emitting diode is designed so as to suppress light leakage to the substrate rear side and to extract more light from the crystal layer surface (p-electrode side) by bonding the reflection metal film on the sapphire substrate on the rear side. In this case, sometimes light does not reach the reflection layer by scattering in a small angle and is absorbed in the substrate because of a refractive index difference between the GaN crystal layer and the sapphire substrate. For preventing this problem, the light emitting diode is designed so as to guide the light from the GaN layer efficiently to the reflection film and to return the light to the GaN layer by providing the sapphire substrate surface with surface roughening of approximately 1 μm and stacking a GaN crystal layer thereon.
  • Meanwhile, in another reference example, it is important how to deal with heat generation under an operation condition of higher current injection aiming for a higher light output. For this purpose, there is an example employing a structure (thin film structure) in which, after an LED structure made of nitride semiconductor is epitaxially grown on a sapphire substrate, the surface side thereof composed of a p-type GaN layer is bonded onto a support substrate having a high thermal conductivity and the sapphire substrate is removed therefrom. In this case, an end surface of an n-type GaN layer from which the sapphire substrate is removed is exposed to be sometimes used as a light extraction face and also a contact surface. At this time, when the surface of the GaN crystal layer, which is the light extraction face, is flat, light is totally reflected because of the refractive index difference from the air and the light cannot be extracted efficiently. Accordingly, the method to prepare the surface of the GaN layer, which is the light extraction face, with surface roughening by etching using KOH or the like is employed.
  • While the thin-film type device structure realizes improvement of the light extraction efficiency with surface roughening by a method such as the etching of the light extraction face, sufficient reproducibility is not obtained in the wet etching represented by the KOH etching and the sometimes device characteristics are not uniform thereamong.
  • In contrast, in the semiconductor light emitting device according to the embodiment, the protrusion part 60 is formed by material having a refractive index smaller than the refractive index of the n-type layer 10 and covers the light extraction face 10 b partially. Therefore, the rough surface of the protrusion part 60 enables the light extraction efficiency to be improved. Furthermore, a step height in the rough surface can be made small compared with the reference example by employing the low reflection index material for the protrusion part 60. Furthermore, resistance in the vertical direction (film thickness direction) can be reduced compared with a case in which the protrusion parts 60 cover the whole light extraction face 10 b.
  • Next, an example of a process for manufacturing such a semiconductor light emitting device structure will be explained.
  • FIGS. 7A to 7C are schematic cross-sectional views illustrating a manufacturing method of a wafer and a nitride semiconductor crystal layer according to an embodiment.
  • FIGS. 8A to 8F are schematic cross-sectional views illustrating another manufacturing method of a wafer and a nitride semiconductor crystal layer according to an embodiment.
  • A silicon substrate (crystal substrate) 50 having a surface of a (111) orientation is prepared as a substrate for crystal growth of a thin film nitride semiconductor. The substrate for crystal growth of a thin film nitride semiconductor is not limited to the silicon substrate and may be a sapphire substrate. While, the thickness of the silicon substrate 50 is approximately 525 μm, for example, in the embodiment, there is not a problem when the thickness is selected optionally in a range approximately between 250 μm and 800 μm, for example.
  • Generally, the surface of the Si (silicon) substrate preserved in the air is covered by a native oxide film. Accordingly, for removing this native oxide film and providing hydrogen termination processing for a substrate surface, the thin film growth substrate (silicon substrate 50) is subjected to processing of dilute hydrofluoric acid having a concentration of approximately 1% for approximately 1 minute after cleaning by acid treatment. By this processing, the surface of the silicon crystal layer (silicon substrate 50) comes to have a surface structure terminated by hydrogen and a water repellent surface.
  • Subsequently, as shown in FIG. 7A, the silicon substrate 50 having a hydrogen-terminated surface is introduced into a film deposition apparatus and an AlN layer 60 a having a thickness of 500 nm is stacked thereon. An ECR plasma sputter apparatus is used for the AlN film deposition and an aluminum target is sputtered by plasma discharge performed under a mixed atmosphere of Ar gas and nitrogen gas, and thus the 500 nm AlN film can be stacked approximately in 30 minutes. While the film deposition temperature is set to 500° C. in the embodiment, the film deposition temperature can be selected optionally in a range from 100° C. to 800° C., for example. While the ECR plasma sputter apparatus is used for the film deposition of the AlN layer 60 a in the embodiment, the film deposition method can be optionally selected and an MOCVD (gas phase growth method using organic metal) apparatus, a molecular beam epitaxy method (MBE) apparatus, or the like may be used.
  • While a hydrogen atom terminating the surface of the Si substrate is kept at a state combined with Si atom up to the temperature from 500° C. to 600° C., the hydrogen atom terminating the surface of the Si substrate displaces Al atom or nitrogen atom and does desorption when the AlN layer is formed at 500° C. by an ECR plasma sputter film deposition method, and thus does not remain at boundary surface of AlN/Si. Furthermore, when the AlN layer is formed at a higher temperature, the AlN crystal layer is stacked after a hydrogen atom does thermal desorption and dangling-bond appears on surface of Si.
  • Furthermore, when the surface of the Si substrate is used without providing hydrogen termination processing, a native oxide film is formed during handling in the air. This native oxide film stably-kept up to a high temperature and is impeditive in the epitaxial film deposition of the AlN crystal layer. Therefore, an annealing treatment is necessary at the temperature approximately from 900° C. to 1000° C. in vacuum or under an inert atmosphere before a film deposition process.
  • Subsequently, as shown in FIG. 7B, the substrate in which the 500 nm AlN layer 60 a has been stacked on the silicon substrate 50 is taken out of the film deposition apparatus and subjected to surface processing by a photolithography process.
  • Specifically, the AlN layer 60 a is left in a hexagonal pillar shape having a side length of 300 nm and the area therearound is etched off. The hexagonal pillar shapes of the AlN (first crystal layer) are arranged having a spacing of 1 μm therebetween. The surface of the silicon substrate 50 is exposed in the part except the part where hexagonal-pillar-shaped AlN remains. That is, the hexagonal-pillar-shaped AlN corresponds to the protrusion part 60 described above in FIG. 1.
  • Subsequently, as shown in FIG. 7C, the substrate subjected to the etching processing of the AlN layer 60 a, after having been cleaned again by acid treatment, is introduced into an MOCVD (gas phase growth method using organic metal) apparatus, and the substrate temperature is increased to 1,100° C. and a gallium nitride layer (second crystal layer) 10 a having a thickness of 2 μm is formed by the use of TMG (Tri-Methyl-Gallium) and NH3 (ammonia) as source materials. That is, the gallium nitride (GaN) layer 10 a corresponds to the n-type layer 10 described above in FIG. 1, for example. In this manner, the first crystal layer (AlN in the embodiment) made of nitride containing Al is formed so as to partially cover the major surface of the silicon substrate 50 and the second crystal layer (GaN in the embodiment) made of nitride containing Al in a content rate lower than that in the first crystal layer is grown on the first crystal layer, and thus a wafer 210 according to the embodiment is formed.
  • At this time, silicon (Si) is added in the GaN layer 10 a in a concentration of 1×1019 (atoms·cm−3) as an impurity. Here, the n-type GaN layer may not be formed directly on the substrate having the rough surface of AlN (protrusion part 60), but the n-type GaN layer may be stacked after a GaN layer without including impurities is grown approximately in a thickness of approximately 1 to 3 μm. In a structure in which the GaN layer without including impurities is grown first, it is difficult to obtain contact from the light extraction face 10 b and processing for forming a contact electrode is performed as described below.
  • Here, as a result of a study by the inventors, the following has been made clear for the case where the GaN layer 10 a is epitaxially grown at high temperature on the substrate in which a part of the silicon substrate 50 is covered by the AlN (protrusion part 60) as in the embodiment. The probability of adsorption and decomposition of the source material is different between on the AlN and on the Si crystal surface. At high temperature, growth of the GaN thin film crystal is accelerated more on the AlN layer than on the Si crystal surface. Furthermore, the GaN layer 10 a growing on the AlN part having the protruding shape grows not only in a <111> axis direction (direction perpendicular to the substrate surface) but also in a lateral direction. Accordingly, the GaN layer 10 a on the AlN part is soon combined with the GaN layer 10 a having started to grow from the neighboring AlN protrusion and covers the substrate surface together as a film. Furthermore, it is possible to further increase the selectivity of the crystal growth on the AlN when a silicon nitride (SiN) layer is formed on the Si crystal surface by a process such as one in which ammonia to be used as a source material is introduced in advance to the TMG before the crystal growth of the GaN layer.
  • As described above, by temperature adjustment of the gas atmosphere in the film deposition, GaN layer 10 a is not formed on the silicon substrate 50 but the GaN layer 10 a is formed starting from the AlN protrusion part 60. Accordingly, after the GaN layer 10 a has been formed finally as an integrated film, a region between the protrusion parts 60 remains as a vacant space. At this time, it can be adjusted by a growth condition whether the GaN crystal layer becomes flat against the top surface of the protrusion part 60 or the GaN film sinks to a level lower than the top surface of the protrusion part 60.
  • In this manner, when the vacant space exist between the AlN protrusion parts 60, the dislocation density of the GaN layer 10 a on the vacant space can be reduced. Therefore, the crystal quality of the GaN layer 10 a is improved in this part. Furthermore, since the vacant space exists between the AlN protrusion parts 60, it is possible to absorb or reduce shrinkage caused by thermal expansion coefficient difference in a temperature cooling process after the formation of the GaN layer 10 a. Therefore, it is possible to suppress bowing caused in the two-layer structure of the silicon substrate 50 and the GaN layer 10 a and to prevent a crack accompanying the bowing from occurring.
  • Subsequently, after the growth of the n-type GaN layer, the light emitting layer 30 (refer to FIG. 1) composed of a multilayer film of InGaN and GaN is stacked on this n-type gallium nitride crystal layer (n-type layer 10). Furthermore, for current injection to emit light in the light emitting layer 30, the upper side of the crystal structure is subjected to p-type (Mg) doping. While, in the embodiment, the gas phase growth method using organic metal (MOCVD method) is proposed as a thin film crystal growth method of the n-type GaN crystal layer (n-type layer 10), the light emitting layer 30, and the p-type layer 20, it is optional to use any of a molecular beam epitaxy (MBE) method, an HVP (Hydride Vapor Phase Epitaxy) method, and the like, which are used in the crystal growth of a nitride semiconductor.
  • Furthermore, after the thin film crystal of the LED structure has been epitaxially grown in this manner, a metal film including Ag (reflection metal 80, refer to FIG. 1), for example, a silver nickel layer is stacked on the surface of the p-type layer 20 as a reflection film and a contact layer. After that, the surface of the p-type layer 20 is bonded to the support substrate 40 (refer to FIG. 1) made of material such as silicon, cupper, or the like. Next, the silicon substrate 50 of the thin film crystal growth substrate is removed. After the support substrate 40 has been bonded to the p-type layer 20, the growth substrate (silicon substrate) 50 can be removed by polishing of the growth silicon substrate 50. At this time, after the silicon substrate 50 has been almost removed by the polishing, the slightly remaining Si is finally removed by dry etching using SF6 gas as an etchant, and thus the AlN protrusion part 60 and the GaN layer 10 a, which have been formed first on the silicon substrate 50, can be exposed on the surface.
  • Finally, a fine wire electrode 70 (refer to FIG. 1) is formed on the n-type GaN layer (n-type layer 10) which is exposed between the AlN protrusion parts 60 and further a p-type electrode is formed on the reflection metal 80, and then the LED is completed. At this time, as described above, the n-type contact cannot be obtained on the surface where the silicon substrate 50 for the nitride thin film growth has been removed, when the GaN crystal layer without including impurities is grown first in the growth of the GaN thin film crystal layer on the Si substrate having the AlN protrusion structure. Accordingly, the n-type contact is formed after the GaN layer without including impurities has been etched off and the n-type GaN layer has been exposed on the surface.
  • In the manufacturing method of the nitride semiconductor crystal layer which has been explained with reference to FIGS. 7A to 7C, while the AlN layer 60 a is etched until the surface of the silicon substrate 50 is partially exposed in the process shown in FIG. 7B, the manufacturing method is not limited to this example. As another manufacturing method according to the embodiment, the etching of the AlN layer 60 a may be terminated before the surface of the silicon substrate 50 is partially exposed. FIGS. 8A to 8F show a process example of another manufacturing method. First, as shown in FIG. 8A, the AlN layer 60 a is formed on the silicon substrate 50. At this time, the thickness of the AlN layer 60 a is set to 800 nm. The thickness of the AlN layer 60 a may be any one in a range approximately between 300 nm and 2 μm. Subsequently, as shown in FIG. 8B, the AlN layer 60 a is subjected to the surface roughening according to a sequence of the photography. At this time, the shape of a convex part of the AlN layer 60 b subjected to the surface roughening includes a pillar shape or a pyramid shape having a bottom plane of a triangle, a quadrangle, a polygon, a circle, or the like, as described above.
  • Then, as described above, the GaN layer 10 a is grown on the AlN layer 60 b having the rough surface (FIG. 8C). In this case, while the AlN layer 60 a grows so as to cover concaves of the AlN layer 60 b, a lot of facet surfaces are exposed at an early stage in growth covering such concaves. The behavior of dislocation is modulated in these facet surfaces and the dislocation disappears by the interaction between the dislocations. Therefore, it is known that growth on concave-convex surface has an effect on reducing the dislocation density. Furthermore, the light emitting layer 30, the p-type layer 20, and the reflection metal 80 are formed (not shown in the drawing), and the silicon substrate 50 is removed after the support substrate 40 has been bonded (not shown in the drawing). At this time, the etching of the Si substrate 50 is terminated when the AlN layer 60 b is exposed on the whole surface and before the surface of the GaN layer 10 a is exposed partially, and thus the AlN layer 60 b covers the whole surface (FIG. 8D). After that, the AlN layer 60 is etched slightly after the removal of the silicon substrate 50 and then the GaN part (or protrusion part 60) can be exposed in a part of the surface (FIG. 8E). When the etching is continued further, the rough surface can be formed on the surface by the etching selectivity of the AlN and the GaN (FIG. 8F).
  • By another manufacturing method according to the embodiment, it is possible to control the behavior of dislocation in the GaN layer 10 a comparatively easily. In another manufacturing method according to the embodiment, AlN may be formed in a thin film after the AlN layer 60 a has been etched until the surface of the silicon substrate 50 is exposed partially and the rough surface may be formed in the AlN layer 60 a. For example, after the AlN protrusions have been formed on the silicon substrate partially covering the surface, AlN layer having a thickness of approximately 20 to 200 nm is grown first by the MOCVD apparatus and the whole silicon surface is covered by the AlN layer. The process after that is the same as the process described above. In this case as well, since a GaN layer grows on concave-convex surface of a AlN layer, an effect on reducing the dislocation density is the same as the explanation described above.
  • Next, another embodiment will be explained.
  • FIGS. 9A and 9B are schematic cross-sectional views explaining a semiconductor light emitting device according to still another embodiment.
  • As shown in FIG. 9B, the semiconductor light emitting device 150 according to the embodiment uses an LED structure of a p-type layer (second semiconductor layer) 20, an MQW active layer (light emitting layer) 30, and an n-type layer (first semiconductor layer) 10. The n-type layer 10 is made of an n-type gallium nitride crystal having a thickness of 3 μm, and the surface of this n-type GaN (light extraction face 10 b) is subjected to surface roughening of 1 μm. A part 10 e on a convex part of this concave-convex part 10 d is formed by AlN. While this structure is similar to the structure shown in FIG. 2, a concave part 10 f is formed deeply on the GaN layer side and the AlN protrusion part 65 after etching has a shape closer to a pyramid than to a pillar. In this manner, the deeper trench has an advantage from the standpoint of light extraction efficiency.
  • The above described surface roughening can be performed by removing Si from GaN crystal layer (GaN layer 10 a) from the silicon crystal (silicon substrate 50) of a growth substrate, exposing the AlN protrusion part 60 before etching and the GaN layer 10 a which have been formed first on the silicon substrate 50, and then further providing dry etching using Cl series gas.
  • Specifically, as shown in FIG. 9A, the etching has selectivity for GaN and AlN when the surface having the AlN protrusion part 60 structure formed on the GaN surface (n-type layer 10) is subjected to dry etching using the Cl series gas. Accordingly, while the AlN protrusion part 60 is etched at the edge part of the top surface thereof, the whole protrusion is not removed. In contrast, the etching proceeds deeply in the GaN layer exposed as the under layer, and thus a rough surface enlarged with deeper trench can be obtained as shown in FIG. 9B.
  • FIGS. 10A and 10B are schematic cross-sectional views explaining a semiconductor light emitting device according to yet still another embodiment.
  • As shown in FIG. 10B, in the semiconductor light emitting device 160 according to the embodiment, the AlN protrusion parts 60 before etching are arranged at random in the size (lateral width) thereof and the spacing therebetween. Therefore, it is possible to provide further randomness through the rough surface after dry etching.
  • That is, as shown in FIGS. 10A and 10B, the AlN protrusion part 60 having a small width is caused to shrink also in the height direction because the etching proceeds from the edge part of the top surface in the AlN protrusion part 60. In contrast, in the protrusion part 60 having a large width, the etching proceeds slowly in the height direction and thus difference is enlarged in the height among the AlN protrusion parts 65 after the etching. In addition, while the etching proceeds deeply in the GaN layer (n-type layer 10) in a part having a large spacing between the AlN protrusion parts 60, the etching does not proceed deeply in the GaN layer in a part having a small spacing. By such a mechanism, as shown in FIG. 10B, it is possible to manufacture a shape having the AlN protrusion part 65 on the top of the rough surface and also having a rough surface in which randomness is more strongly enhanced. In the embodiment, the depth variation (height difference) of the roughness is within a range of approximately 600 nm to 1.5 μm. The light extraction efficiency is improved in such a shape having a high randomness in the roughness.
  • In the specification, “nitride semiconductor” includes all compositions of semiconductors of the chemical formula BxInyAlzGa1-x-y-zN (0≦x≦1, 0≦y≦1, 0≦z≦1, and x+y+z≦1) for which each of the compositional proportions x, y, and z are changed within the ranges. “Nitride semiconductor” further includes group V elements other than N (nitrogen) in the chemical formula recited above, various elements added to control various properties such as the conductivity type, etc., and various elements incorporated unintentionally.
  • In the specification of the application, “perpendicular” and “parallel” refer to not only strictly perpendicular and strictly parallel but also include, for example, the fluctuation due to manufacturing processes, etc. It is sufficient to be substantially perpendicular and substantially parallel.
  • Hereinabove, the embodiments of the invention have been explained with reference to the specific examples. However, the invention is not limited to these specific examples. For example, one skilled in the art may similarly practice the invention by appropriately selecting a specific configuration of each component such as the substrate, the low refractive index layer, the active layer, and the semiconductor layers included in the semiconductor light emitting device and the wafer from known art. Such practice is included in the scope of the invention to the extent that similar effects thereto are obtained.
  • Further, any two or more components of the specific examples may be combined within the extent of technical feasibility and are included in the scope of the embodiments to the extent that the spirit of the embodiments is included.
  • Moreover, any manufacturing method of the semiconductor light emitting device, the wafer, and the nitride semiconductor crystal layer which one skilled in the art can practice by appropriate design modification based on the manufacturing method of the semiconductor light emitting device, wafer, and the nitride semiconductor crystal layer which is described above as the embodiment of the invention is also included in the scope of the invention to the extent that the purport of the invention is included.
  • Furthermore, various modifications and alterations within the spirit of the invention will be readily apparent to those skilled in the art.
  • While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel embodiments described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.

Claims (21)

1-15. (canceled)
16. A semiconductor light emitting device, comprising:
a first semiconductor layer having a first major surface and a second major surface opposite to the first major surface, the first major surface forming a light extraction face, the first major surface including a first region and a second region, the first region having a rough surface including a convex part and a concave part, and the first semiconductor layer made of a nitride semiconductor crystal;
a light emitting layer having an active layer and provided on the second major surface;
a second semiconductor layer provided on the light emitting layer;
a low refractive index layer in contact with the convex part, the low refractive index layer not covering the concave part, the low refractive index layer made of a nitride semiconductor crystal, and the low refractive index layer having a refractive index lower than the refractive index of the first semiconductor layer; and
an electrode provided on the first semiconductor layer in the second region.
17. The device according to claim 16, wherein a lattice of the low refractive index layer is continuous with a lattice of the first semiconductor layer.
18. The device according to claim 16, wherein the convex part is epitaxially grown on the low refractive index layer starting from the low refractive index layer so that the first semiconductor layer is formed as an integrated film.
19. The device according to claim 16, wherein:
the nitride semiconductor crystal of the low refractive index layer comprises Al with a first composition ratio of Al to Group III elements, and the nitride semiconductor crystal of the first semiconductor layer comprises Al with a second composition ratio of Al to Group III elements lower than the first composition ratio; or
the nitride semiconductor crystal of the low refractive index layer comprises Al, and the nitride semiconductor crystal of the first semiconductor layer does not comprise Al.
20. A wafer, comprising:
a substrate;
a semiconductor layer having a first major surface and a second major surface opposite to the first major surface, the first major surface including a first region and a second region, the first region having a rough surface including a convex part and a concave part, and the semiconductor layer made of a nitride semiconductor crystal;
a low refractive index layer in contact with the convex part, the low refractive index layer not covering the concave part, the low refractive index layer made of a nitride semiconductor crystal, and the low refractive index layer having a refractive index lower than the refractive index of the semiconductor layer; and
an electrode provided on the semiconductor layer in the second region.
21. The wafer according to claim 20, wherein a lattice of the low refractive index layer is continuous with a lattice of the semiconductor layer.
22. The wafer according to claim 20, wherein the convex part is epitaxially grown on the low refractive index layer starting from the low refractive index layer so that the semiconductor layer is formed as an integrated film.
23. The wafer according to claim 20, wherein:
the nitride semiconductor crystal of the low refractive index layer comprises Al with a first composition ratio of Al to Group III elements, and the nitride semiconductor crystal of the semiconductor layer comprises Al with a second composition ratio of Al to Group III elements lower than the first composition ratio; or
the nitride semiconductor crystal of the low refractive index layer comprises Al, and the nitride semiconductor crystal of the semiconductor layer does not comprise Al.
24. A semiconductor light emitting device, comprising:
a first semiconductor layer having a first major surface and a second major surface opposite to the first major surface, the first major surface forming a light extraction face, the first major surface having a flat surface, the first major surface including a first region and a second region, and the first semiconductor layer made of a nitride semiconductor crystal;
a light emitting layer having an active layer and provided on the second major surface;
a second semiconductor layer provided on the light emitting layer; and
a low refractive index layer in contact with the first region, the low refractive index layer not covering the second region, the low refractive index layer made of a nitride semiconductor crystal, and the low refractive index layer having a refractive index lower than the refractive index of the first semiconductor layer.
25. The device according to claim 24, wherein a lattice of the low refractive index layer is continuous with a lattice of the first semiconductor layer.
26. The device according to claim 24, wherein the first region is epitaxially grown on the low refractive index layer starting from the low refractive index layer so that the first semiconductor layer is formed as an integrated film.
27. The device according to claim 24, wherein:
the nitride semiconductor crystal of the low refractive index layer comprises Al with a first composition ratio of Al to Group III elements, and the nitride semiconductor crystal of the first semiconductor layer comprises Al with a second composition ratio of Al to Group III elements lower than the first composition ratio; or
the nitride semiconductor crystal of the low refractive index layer comprises Al, and the nitride semiconductor crystal of the first semiconductor layer does not comprise Al.
28. The device according to claim 24, wherein the low refractive index layer has a pillar shape when viewed in a direction perpendicular to the first major surface.
29. The device according to claim 24, wherein the low refractive index layer has a pyramid shape when viewed in a direction perpendicular to the first major surface.
30. The device according to claim 24, wherein
a plurality of the low refractive index layers are provided, and
respective width of the plurality of the low refractive index layers are random among the low refractive index layers when viewed in a direction perpendicular to the first major surface.
31. The device according to claim 24, wherein
a plurality of the low refractive index layers are provided, and
spacing between the plurality of the low refractive index layers are random among the low refractive index layers when viewed in a direction perpendicular to the first major surface.
32. A wafer, comprising:
a substrate;
a semiconductor layer having a first major surface and a second major surface opposite to the first major surface, the first major surface having a flat surface, the first major surface including a first region and a second region, and the semiconductor layer made of a nitride semiconductor crystal; and
a low refractive index layer in contact with the first region, the low refractive index layer not covering the second region, the low refractive index layer made of a nitride semiconductor crystal, and the low refractive index layer having a refractive index lower than the refractive index of the semiconductor layer.
33. The wafer according to claim 32, wherein a lattice of the low refractive index layer is continuous with a lattice of the semiconductor layer.
34. The wafer according to claim 32, wherein the first region is epitaxially grown on the low refractive index layer starting from the low refractive index layer so that the semiconductor layer is formed as an integrated film.
35. The wafer according to claim 32, wherein:
the nitride semiconductor crystal of the low refractive index layer comprises Al with a first composition ratio of Al to Group III elements, and the nitride semiconductor crystal of the semiconductor layer comprises Al with a second composition ratio of Al to Group III elements lower than the first composition ratio; or
the nitride semiconductor crystal of the low refractive index layer comprises Al, and the nitride semiconductor crystal of the semiconductor layer does not comprise Al.
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Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6276532B1 (en) 2000-03-15 2001-08-21 Sealed Air Corporation (Us) Inflatable packaging cushion with a resistance wire
US6569283B1 (en) 2000-03-15 2003-05-27 Sealed Air Corporation (Us) Inflator/sealer device for inflatable packaging cushion
KR101847941B1 (en) * 2012-02-08 2018-04-11 삼성전자주식회사 Semiconductor light emitting device and manufacturing method of the same
CN104247052B (en) * 2012-03-06 2017-05-03 天空公司 Light emitting diodes with low refractive index material layers to reduce light guiding effects
US10145026B2 (en) 2012-06-04 2018-12-04 Slt Technologies, Inc. Process for large-scale ammonothermal manufacturing of semipolar gallium nitride boules
US9761763B2 (en) 2012-12-21 2017-09-12 Soraa, Inc. Dense-luminescent-materials-coated violet LEDs
KR102066613B1 (en) * 2013-01-10 2020-01-16 엘지이노텍 주식회사 Light emitting device
KR102066620B1 (en) * 2013-07-18 2020-01-16 엘지이노텍 주식회사 A light emitting device
JP2015050256A (en) * 2013-08-30 2015-03-16 株式会社東芝 Nitride semiconductor light-emitting device
CN106663720A (en) * 2014-01-29 2017-05-10 光电子株式会社 Aluminum-gallium-indium-phosphorus-based light emitting diode having gallium nitride layer of uneven type and method for manufacuturing same
KR102185689B1 (en) * 2014-06-12 2020-12-02 엘지이노텍 주식회사 Light emitting device and light emitting device package including the same
JP2016058693A (en) * 2014-09-12 2016-04-21 株式会社東芝 Semiconductor device, semiconductor wafer, and method of manufacturing semiconductor device
CN104377288B (en) * 2014-10-17 2017-03-29 厦门乾照光电股份有限公司 A kind of LED production method for going out light with electrode
KR20160066651A (en) 2014-12-02 2016-06-13 삼성디스플레이 주식회사 Fabrication method of display device and display device
EP4052899A4 (en) * 2019-10-31 2023-01-18 Tosoh Corporation Multilayer film structure and method for producing same
CN114023856B (en) * 2021-09-30 2024-07-19 厦门士兰明镓化合物半导体有限公司 Light emitting diode and method of manufacturing the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080283865A1 (en) * 2004-03-25 2008-11-20 Epivalley Co., Ltd. III-Nitride Compound Semiconductor Light Emitting Device
US20100148199A1 (en) * 2008-11-04 2010-06-17 Samsung Led Co., Ltd. Light emitting device with fine pattern

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3457511B2 (en) * 1997-07-30 2003-10-20 株式会社東芝 Semiconductor device and manufacturing method thereof
JP3587081B2 (en) * 1999-05-10 2004-11-10 豊田合成株式会社 Method of manufacturing group III nitride semiconductor and group III nitride semiconductor light emitting device
JP2004262755A (en) * 2000-08-24 2004-09-24 Nichia Chem Ind Ltd Method for growing nitride semiconductor and nitride semiconductor substrate
JP2003163370A (en) * 2001-09-11 2003-06-06 Toyoda Gosei Co Ltd Method of manufacturing semiconductor crystal
US6878969B2 (en) * 2002-07-29 2005-04-12 Matsushita Electric Works, Ltd. Light emitting device
US6847057B1 (en) * 2003-08-01 2005-01-25 Lumileds Lighting U.S., Llc Semiconductor light emitting devices
US20050205883A1 (en) * 2004-03-19 2005-09-22 Wierer Jonathan J Jr Photonic crystal light emitting device
US20060043400A1 (en) * 2004-08-31 2006-03-02 Erchak Alexei A Polarized light emitting device
KR100624449B1 (en) * 2004-12-08 2006-09-18 삼성전기주식회사 Semiconductor emitting device with approved and manufacturing method for the same
JP4626306B2 (en) 2005-01-11 2011-02-09 三菱化学株式会社 Nitride semiconductor light emitting device and manufacturing method thereof
KR100896576B1 (en) 2006-02-24 2009-05-07 삼성전기주식회사 Nitride-based semiconductor light emitting device and method of manufacturing the same
US8013320B2 (en) * 2006-03-03 2011-09-06 Panasonic Corporation Nitride semiconductor device and method for fabricating the same
JP5037980B2 (en) 2007-03-22 2012-10-03 京セラ株式会社 Method for manufacturing gallium nitride compound semiconductor light emitting device
JP4829190B2 (en) 2007-08-22 2011-12-07 株式会社東芝 Light emitting element
JP2009070991A (en) * 2007-09-12 2009-04-02 Hitachi Cable Ltd Light emitting device
US7985979B2 (en) * 2007-12-19 2011-07-26 Koninklijke Philips Electronics, N.V. Semiconductor light emitting device with light extraction structures
WO2009084325A1 (en) * 2007-12-28 2009-07-09 Mitsubishi Chemical Corporation Led element and method for manufacturing led element
JP2010114337A (en) * 2008-11-10 2010-05-20 Hitachi Cable Ltd Light-emitting device
JP2010278237A (en) 2009-05-28 2010-12-09 Kyocera Corp Light emitting element
WO2011024943A1 (en) * 2009-08-31 2011-03-03 京セラ株式会社 Light-emitting element
JP2011060917A (en) * 2009-09-08 2011-03-24 Rohm Co Ltd Semiconductor light emitting device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080283865A1 (en) * 2004-03-25 2008-11-20 Epivalley Co., Ltd. III-Nitride Compound Semiconductor Light Emitting Device
US20100148199A1 (en) * 2008-11-04 2010-06-17 Samsung Led Co., Ltd. Light emitting device with fine pattern

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