US20150017812A1 - Sequential precursor dosing in an ald multi-station/batch reactor - Google Patents
Sequential precursor dosing in an ald multi-station/batch reactor Download PDFInfo
- Publication number
- US20150017812A1 US20150017812A1 US14/133,246 US201314133246A US2015017812A1 US 20150017812 A1 US20150017812 A1 US 20150017812A1 US 201314133246 A US201314133246 A US 201314133246A US 2015017812 A1 US2015017812 A1 US 2015017812A1
- Authority
- US
- United States
- Prior art keywords
- precursor
- dosing
- substrate
- processing stations
- processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
- C23C16/45525—Atomic layer deposition [ALD]
- C23C16/45527—Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
- C23C16/45525—Atomic layer deposition [ALD]
- C23C16/45527—Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
- C23C16/45536—Use of plasma, radiation or electromagnetic fields
- C23C16/45542—Plasma being used non-continuously during the ALD reactions
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
- C23C16/45525—Atomic layer deposition [ALD]
- C23C16/45544—Atomic layer deposition [ALD] characterized by the apparatus
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45561—Gas plumbing upstream of the reaction chamber
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
- C23C16/505—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/52—Controlling or regulating the coating process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
Definitions
- ICs integrated circuits
- PVD physical vapor deposition
- CVD chemical vapor deposition
- PECVD plasma-enhanced chemical vapor deposition
- ALD Atomic layer deposition
- ALD achieves its characteristic conformality by depositing material in thin adsorption-limited layers. Since each deposited layer is formed through an adsorption-limited process, each layer is of approximately the same thickness, and thicker films of the deposited material consisting of multiple layers may be thus formed through consecutive ALD cycles, thereby producing a film which conforms to the shape of the underlying substrate surface.
- the methods may include dosing the substrates at the processing stations with a film precursor by introducing the precursor into the one or more reaction chambers and allowing the precursor to adsorb onto the surface of the substrates in an adsorption-limited manner, and then removing unadsorbed precursor from the volumes surrounding the processing stations inside the one or more reaction chambers.
- the dosing of the substrates at the processing stations with film precursor may include dosing a first substrate at a first processing station and a second substrate at a second processing station with precursor flowing from a common source.
- the timing of said dosing may be staggered such that the first substrate is dosed during a first dosing phase during which the second substrate is not substantially dosed, and the second substrate is dosed during a second dosing phase during which the first substrate is not substantially dosed, wherein the precursor flows continuously from the common source during the first and second dosing phases.
- the methods may further include reacting adsorbed precursor with a plasma, after removing unadsorbed precursor, to form a layer of material on the substrates, and removing desorbed precursor and/or reaction by-product from the volumes surrounding the processing stations inside the one or more reaction chambers when present after reacting adsorbed precursor. Thereafter, the methods may further include repeating the foregoing operations multiple times to form multiple layers of material on the multiple substrates at the multiple processing stations.
- the apparatuses may include a plurality of processing stations each having a substrate holder contained within one or more reaction chambers, a valve assembly for directing flow of film precursor to each of the processing stations and to a precursor-divert flow path, a valve-operated vacuum source for removing precursor from the volumes surrounding the processing stations inside the one or more reaction chambers, and a controller comprising machine-readable instructions for operating the valve assembly and vacuum source.
- the controller may including instructions for dosing substrates at the processing stations with film precursor by introducing the precursor into the one or more reaction chambers and allowing the precursor to adsorb onto the surface of the substrates in an adsorption-limited manner, instructions for removing unadsorbed precursor from the volumes surrounding the processing stations inside the one or more reaction chambers, instructions for reacting adsorbed precursor with a plasma, after removing unadsorbed precursor, to form a layer of material on the substrates, instructions for removing desorbed precursor and/or reaction by-product from the volumes surrounding the processing stations inside the one or more reaction chambers when present after reacting adsorbed precursor, and instructions for repeating (i) through (iv) multiple times to form multiple layers of material on the multiple substrates at the multiple processing stations.
- the dosing of the substrates at the processing stations with film precursor may include dosing a first substrate at a first processing station of the plurality of processing stations and dosing a second substrate at a second processing station of the plurality of processing stations with precursor flowing from a common source.
- the timing of said dosing may be staggered such that the first substrate is dosed during a first dosing phase during which the second substrate is not substantially dosed, and the second substrate is dosed during a second dosing phase during which the first substrate is not substantially dosed, and wherein the precursor flows continuously from the common source during the first and second dosing phases.
- FIG. 1 schematically illustrates a gas delivery system for delivering reactants to a single processing station of a multi-station substrate processing apparatus which may be used to perform one or more ALD cycles.
- FIG. 2 schematically illustrates a baseline timing diagram corresponding to the typical parallel execution of a sequence of 4 ALD cycles involving the simultaneous dosing of 4 wafer substrates with silicon-containing precursor, each substrate at one of 4 different processing stations.
- FIG. 3 schematically illustrates a timing diagram corresponding to a parallel execution of a sequence of 4 ALD cycles where the flow of silicon-containing precursor initially doses substrates at processing stations 1 and 2, and afterwards is redirected to dose substrates at stations 3 and 4.
- FIG. 4 schematically illustrates a timing diagram similar to that displayed in FIG. 3 , but wherein some portion of the divert phase is replaced by an accumulate phase.
- FIG. 5A schematically illustrates a timing diagram providing a sequence of dose timings which fully staggers the dosing of the substrates at stations 1 through 4 such that no two substrates are substantially dosed at the same time.
- FIG. 5B schematically illustrates a timing diagram staggering substrate dosing into two phases such that the post-RF purge step at stations 1 and 2 coincides with the post-dose purge steps at stations 3 and 4, and likewise, on the next cycle, the post-dose purge at stations 1 and 2 coincides with the post-RF purge at stations 3 and 4.
- FIG. 6 schematically illustrates an embodiment of a substrate processing station depicted as a single processing station located within a single reaction chamber.
- FIG. 7 schematically illustrates an embodiment of a dual-plenum showerhead.
- FIG. 8 schematically illustrates an embodiment of a multi-station substrate processing apparatus which includes a plurality of processing stations in a common low-pressure reaction chamber.
- FIG. 9 schematically illustrates an embodiment of a multi-station substrate processing apparatus which includes a plurality of processing stations in a common low-pressure reaction chamber similar to that schematically illustrated in FIG. 8 , but additionally employing various mixing vessels for various reactants as well as additional feed line valving.
- ALD provides an effective avenue for depositing conformal films of dielectric material, however, due to the adsorption-limited nature of the process, each ALD cycle only deposits a thin film of material.
- sequence of steps in a typical ALD cycle which result in the formation of a single adsorption-limited monolayer of material are generally repeated multiple times to form a conformal film of desired thickness.
- an ALD cycle for depositing a dielectric material may comprise: (i) dosing a substrate at a processing station within a reaction chamber with a dielectric film precursor and allowing the precursor to adsorb onto the surface of the substrate in an adsorption-limited manner, (ii) removing (e.g.
- an auxiliary reactant or co-reactant in addition to what is referred to as the dielectric film “precursor”—may also be employed.
- the auxiliary reactant or co-reactant may be flowed continuously during a subset of steps (i) through (iv) or throughout each of steps (i) through (iv).
- various film-forming chemistries may be used to deposit various film types via the ALD processes described herein.
- any appropriate silicon-containing reactant/film-precursor and oxidant may be used for the deposition of silicon oxides.
- silicon nitrides any appropriate silicon-containing reactant/film-precursor and nitrogen-containing co-reactant may be used.
- metal oxides or metal nitrides any appropriate metal-containing reactants/film-precursor and co-reactants may be used.
- auxiliary/co-reactants include oxygen, ozone, hydrogen, carbon monoxide, nitrous oxide, ammonia, alkyl amines, and the like.
- an oxide film may be deposited by an ALD process using bis(tert-butylamino)silane (BTBAS) as a silicon-containing film precursor.
- BBAS bis(tert-butylamino)silane
- oxygen or nitrous oxide may be used as an oxidant, e.g. in ALD step (iii), which may or may not, depending on the embodiment, flow continuously during delivery of the BTBAS (ALD step (i)).
- the disclosed multi-substrate deposition methodologies and related apparatuses employing various process timing sequences are applicable to a wide variety of deposited film types and deposition chemistries.
- the disclosed ALD processes may be employed to form films of dielectric material, but films of conductive and semiconductor material may be formed as well, depending on the embodiment.
- Nitrides and oxides are featured dielectric materials, but carbides, oxynitrides, carbon-doped oxides, borides, etc. may also be formed.
- Oxides include a wide range of materials including undoped silicate glass (USG) and doped silicate glass. Examples of doped silicate glasses included boron doped silicate glass (BSG), phosphorus doped silicate glass (PSG), and boron phosphorus doped silicate glass (BPSG).
- a “silicon-containing film precursor” is a compound and/or reagent containing silicon which may be used to form a film incorporating silicon from said precursor.
- the silicon-containing film precursor may be, for example, a silane, a halosilane or an aminosilane.
- a silane contains hydrogen and/or carbon groups, but does not contain a halogen.
- silanes examples include silane (SiH 4 ), disilane (Si 2 H 6 ), and organo silanes such as methylsilane, ethylsilane, isopropylsilane, t-butylsilane, dimethylsilane, diethylsilane, di-t-butylsilane, allylsilane, sec-butylsilane, thexylsilane, isoamylsilane, t-butyldisilane, di-t-butyldisilane, and the like.
- a halosilane contains at least one halogen group and may or may not contain hydrogens and/or carbon groups.
- halosilanes are iodosilanes, bromosilanes, chlorosilanes and fluorosilanes. Although halosilanes, particularly fluorosilanes, may form reactive halide species that can etch silicon materials, in certain embodiments, the silicon-containing film precursor is not present when a plasma is struck.
- chlorosilanes are tetrachlorosilane (SiCl 4 ), trichlorosilane (HSiCl 3 ), dichlorosilane (H 2 SiCl 2 ), monochlorosilane (CISiH 3 ), chloroallylsilane, chloromethylsilane, dichloromethylsilane, chlorodimethylsilane, chloroethylsilane, t-butylchlorosilane, di-t-butylchlorosilane, chloroisopropylsilane, chloro-sec-butylsilane, t-butyldimethylchlorosilane, thexyldimethylchlorosilane, and the like.
- aminosilane includes at least one nitrogen atom bonded to a silicon atom, but may also contain hydrogens, oxygens, halogens and carbons.
- Examples of aminosilanes are mono-, di-, tri- and tetra-aminosilane (H 3 Si(NH 2 ) 4 , H 2 Si(NH 2 ) 2 , HSi(NH 2 ) 3 and Si(NH 2 ) 4 , respectively), as well as substituted mono-, di-, tri- and tetra-aminosilanes, for example, t-butylaminosilane, methylaminosilane, tert-butylsilanamine, bis(tertiarybutylamino)silane (SiH 2 (NHC(CH 3 ) 3 ) 2 (BTBAS), tert-butyl silylcarbamate, SiH(CH 3 )—(N(CH 3 ) 2 ) 2 , SiHCl—(N(CH 3 ) 2 )
- the deposited film contains metal.
- metal-containing films that may be formed include oxides and nitrides of aluminum, titanium, hafnium, tantalum, tungsten, manganese, magnesium, strontium, etc., as well as elemental metal films.
- metal-containing film precursors may include metal alkylamines, metal alkoxides, metal alkylamides, metal halides, metal ⁇ -diketonates, metal carbonyls, organometallics, etc. Appropriate metal-containing film precursors will include the metal that is desired to be incorporated into the film.
- a tantalum-containing layer may be deposited by reacting pentakis(dimethylamido)tantalum with ammonia or another reducing agent.
- metal-containing precursors include trimethylaluminum, tetraethoxytitanium, tetrakis-dimethyl-amido titanium, hafnium tetrakis(ethylmethylamide), bis(cyclopentadienyl)manganese, bis(n-propylcyclopentadienyl)magnesium, etc.
- the deposited film contains nitrogen, and a nitrogen-containing co-reactant may be used.
- a “nitrogen-containing co-reactant” contains at least one nitrogen, for example, ammonia, hydrazine, amines (e.g., amines bearing carbon) such as methylamine, dimethylamine, ethylamine, isopropylamine, t-butylamine, di-t-butylamine, cyclopropylamine, sec-butylamine, cyclobutylamine, isoamylamine, 2-methylbutan-2-amine, trimethylamine, diisopropylamine, diethylisopropylamine, di-t-butylhydrazine, as well as aromatic containing amines such as anilines, pyridines, and benzylamines.
- amines e.g., amines bearing carbon
- Amines may be primary, secondary, tertiary or quaternary (for example, tetraalkylammonium compounds).
- a nitrogen-containing co-reactant may contain heteroatoms other than nitrogen, for example, hydroxylamine, t-butyloxycarbonyl amine and N-t-butyl hydroxylamine are nitrogen-containing reactants.
- an oxygen-containing oxidizing reactant is used.
- oxygen-containing oxidizing reactants include oxygen, ozone, nitrous oxide, carbon monoxide, mixtures thereof, etc.
- each layer may have substantially the same composition whereas in other embodiments, sequentially ALD deposited layers may have differing compositions, or in certain such embodiments, the composition may alternate from layer to layer or there may be a repeating sequence of layers having different compositions. Again, certain such embodiments are described in greater detail in U.S. patent application Ser. No. 13/242,084 (incorporated by reference above). It should also be noted that although the ALD-related techniques, operations, methodologies, apparatuses, devices.
- FIG. 1 Schematically illustrated in FIG. 1 is a gas delivery system 100 for delivering reactants to a single station of a multi-station reaction chamber (not shown) which may be used to perform one or more ALD cycles.
- the figure illustrates a configuration of gas flow lines, manifolds, valves, regulators, filters, showerhead, etc. for providing for ALD reactant delivery.
- Gas lines are schematically indicated as thin solid lines with arrows indicating the direction of gas flow; valves are indicted in the figure with crossed lines within a circle; regulators by an arrow within a circle; manifolds by solid boxes labeled “Manifold”; filters with curved lines either side of a gas line, etc.
- Most of the gas flow lines route gas to the “showerhead” 110 , which as shown in this schematic, is the device which delivers the ALD reactants to a reaction chamber which is not shown.
- the delivery of film precursor e.g., silicon-containing film precursor
- the delivery of film precursor may involve introducing precursor from a liquid delivery system (labeled “LPDS”) 120 to a heated injection manifold 125 (labeled “HIM”) where it is mixed with a preheated (see “preheater” 124 ) inert carrier gas originating from gas source 130 (“Manifold A”).
- LPDS liquid delivery system
- HIM heated injection manifold 125
- preheater 124
- the carrier gas then carries the precursor to an array of four valves 169 , 164 , 165 , 166 which as an assembly 160 is often referred to as a point-of-use valve manifold (PVM) due to its close proximity (in terms of gas flow distance) to the reaction chamber.
- PVM point-of-use valve manifold
- the precursor and carrier gas are flowed directly to the showerhead 110 and then into the reaction chamber.
- suitable PVMs which may include the aforementioned four valves 164 , 165 , 166 , 169 are described in U.S. patent application Ser. No. 13/626,717, filed Sep. 25, 2012, and titled “POINT OF USE VALVE MANIFOLD FOR SEMICONDUCTOR FABRICATION EQUIPMENT,” hereby incorporated by reference in its entirety and for all purposes.).
- delivery system 100 of FIG. 1 also illustrates delivery of oxidant to a reaction chamber for use in ALD—relevant to the generation of an oxidative plasma and its reaction with adsorbed silicon-containing precursor (see step (iii) above).
- gas source 140 (“Manifold C”) is shown as a source of O 2 and/or N 2 O gas which is flowed to the showerhead 110 through valve 169 of the PVM 160 shown in the figure.
- Manifold C 140 and also “Manifold D” 170 should also be noted in the context of this configuration as they may be used to deliver inert gases for post-dose purge (step (ii) above) and post-RF purge (step (iv) above).
- the gas delivery system 100 is configured such that purge gas sourced from Manifold D passes through “Preheater” 171 and then is flowed on two paths towards the showerhead. Purge gas flowing on both paths pass through a regulator ( 172 or 173 ) and then on through a filter ( 173 B or 175 B) flanked upstream and downstream by valves ( 173 A and 173 C or 175 A and 175 C). One path then proceeds directly to showerhead 110 , while the other connects to POS 160 first, in order to effectively additionally purge any remaining reactant gases lingering in the POS device after the dosing step.
- precursor may be removed from the volume surrounding a processing station within a reaction chamber by applying vacuum to the reaction chamber (e.g., through the operation of a valve-operated vacuum source) without employing the use of an inert purge gas.
- FIG. 1 exhibits a remote plasma source 195 , employing a NF 3 -based plasma (as indicated in the figure), whose fluidic coupling to the reaction chamber and process station is regulated by valve 116 .
- Manifold B 150 (as regulated by valve 144 ) may serve as a source of a co-reactant gas—for example, a nitrogen-containing co-reactant such as ammonia—which is flowed to showerhead 110 through valve 165 of POS 160 .
- Co-reactant gases are discussed above and also below with respect to FIGS. 8 and 9 .
- a conformal film is typically deposited via ALD by performing multiple ALD cycles in sequence. Due to the fact that each layer deposited by ALD is very thin, typical being formed from a single monolayer of silicon-containing precursor, depositing a film of any substantial thickness typically involves many ALD cycles, and therefore may be relatively time consuming. Thus, it is typically desired that each individual ALD cycle be performed as quickly as reasonably possible—given the chemical kinetics of the reaction sequence, and the limitations of a given reactor setup. Accordingly, a chemical delivery system, such as that schematically illustrated in FIG. 1 , is typically required to repeatedly start, stop, and restart delivery of the required precursors, oxidants, etc.
- ALD cycle times are comparable to valve and flow control device operating times, meaning that the time taken for such flow control devices to provide a steady state flow of silicon-containing precursor and/or other reactants becomes the limiting factor preventing desired further reductions in cycle time.
- These steady flow conditions are important for the consistency of the ALD process, as transient or unstable flow conditions can lead to undesirable variations in the layers deposited via ALD.
- One way to circumvent the limitations posed by valve and flow control device operating times is to establish a steady-state flow of reactants by leaving flow control devices in their open positions, and to “divert” the flow of reactants to and from the reaction chamber as required by the timing requirements of an ALD cycle. While the use of a “divert”—where reactants are left flowing from their sources but switched back and forth between “dump” and “wafer cavity” modes—achieves the desired reduction in cycle time, it does so at the expense of wasting valuable silicon-containing precursor and other reactants. In addition, apart from the cost of precursor and/or other reactants, such dumping also places an additional load on a wafer processing system's exhaust/scrubber sub-system.
- methods of performing ALD disclosed herein simultaneously execute ALD cycles on multiple wafers, and operate to conserve silicon-containing precursor and other reactants, by timing and staggering the execution of the various ALD steps (i) through (iv) (see above), so that flow of precursor from a common source can be redirected to and from the different processing stations—at least to the extent allowed by the timing and staggering of steps (i) through (iv)—instead of simply diverting and dumping unneeded flow of precursor and/or other reactants.
- FIG. 2 schematically illustrates a baseline timing diagram 200 corresponding to the typical parallel execution of a sequence of 4 ALD cycles involving the simultaneous dosing of 4 wafer substrates with silicon-containing precursor, each substrate at one of 4 different processing stations Time moves from left to right in the figure with the vertical broken lines on the far left and far right indicating that the figure represents a single cycle of ALD (for each station) and so that the displayed sequence of steps may be joined end-to-end to represent multiple ALD cycles (at each station).
- the steps within an ALD cycle referred to as (i), (ii), (iii), and (iv) above correspond to traces labeled in FIG.
- FIG. 1 Displayed from top to bottom in the timing diagram is a schematic illustration of silicon-containing precursor delivery to each of 4 processing stations (labeled “Station 1” through “Station 4”) which is indicated by 4 traces 211 , 212 , 213 , 214 showing precursor flow directed/redirected to each of the 4 processing stations.
- Schematically illustrated by a 5th trace 215 is precursor flow diverted to a divert flow path (i.e., not to the processing stations).
- FIG. 2 traces ( 211 , 212 , 213 , 214 , and 215 ) represent a breakdown of the total precursor flow schematically illustrated by the top-most trace 210 in FIG. 2 .
- the figure also schematically illustrates the timing of post-dose and post-RF purge gas flow—shown with trace 220 / 221 labeled “purge gases”—as well as the timing of oxidative plasma generation and reaction with adsorbed precursor—shown with trace 230 labeled “Oxidizer/RF.”
- FIG. 2 breakdown of total silicon-containing precursor flow indicates that, in some embodiments, a single gas delivery system like that shown in FIG.
- each processing station 1 may be used to flow precursor to each processing station in, for example, a 4 processing station configuration (possibly all contained within the same reaction chamber).
- a 4 processing station configuration possibly all contained within the same reaction chamber.
- a more complicated gas delivery system could be used—such as a configuration which provides a dedicated gas delivery system for each processing station.
- step (i) far left
- substrates positioned at the 4 stations are simultaneously dosed with silicon-containing precursor which is allowed to adsorb onto the surface of each of the 4 wafers.
- the collective quantity of gas reactants supplied in the dose step need be sufficient to simultaneously dose all 4 wafers, and so the delivery quantity is typically 4 times that required for the execution of an ALD cycle on a single wafer.
- FIG. 2 (top left to right)—is said in FIG. 2 to equal 100 units of flow (the units of course being arbitrary for purposes of illustration).
- the total 100 units of flow (again, shown schematically by the silicon-containing precursor trace 210 ) are then divided into the 4 doses of 25 flow units each, the doses provided to the 4 wafers at the 4 processing stations concurrently, as illustrated by the 4 dose traces ( 211 , 212 , 213 , and 214 ) shown in the figure and corresponding to step (i) above.
- this could correspond to the opening of valve 164 in FIG. 1 , while the other valves of the POS remain shut.
- FIG. 2 also illustrates the extent to which silicon-containing precursor is wasted employing the operational sequence of FIG. 2 .
- FIG. 2 shows that after dosing step (i) concludes, the totality of precursor flow is diverted as illustrated by the “Divert” trace 215 in the figure, and thus, as stated in the figure, this corresponds to 100 flow units of precursor wastage during the remaining steps (ii), (iii), and (iv) of each ALD cycle.
- the post-dose purge step (ii) shown by the “Purge gases” trace 220 in FIG.
- FIG. 2 illustrates a baseline operational sequence for comparison with the alternative methodologies described in the context of the figures that follow. To help make these comparisons, the concurrent dosing methodology of FIG. 2 is said to add zero cycle time, but result in 100 units of precursor flow wastage, as stated in the figure.
- the transition between the “dose” traces and the “divert” trace could correspond to the closing of valve 164 and the opening of valve 166 of the POS as shown by the “Divert to Vacuum” label of FIG. 1 .
- the purging steps (ii) and (iv) indicated by the “Purge gases” trace 220 in FIG. 1 may be accomplished by the opening of valve 165 , 169 remaining closed of course (and, in some embodiments, also accompanied by the opening of valves 162 A and 162 B for additional purge in the vicinity of the showerhead).
- the reaction via oxidative plasma step (iii) shown by the “Oxidizer/RF” trace 230 in FIG. 2 could correspond to the opening of valve 169 of the POS while the valve 165 (held open for the purge steps) is closed and 164 and 166 remain in their divert positions.
- the foregoing description of valve operation in reference to FIG. 1 also applies to the other timing diagrams disclosed herein with the described opening and closing of valves corresponding to the same “Si precursor,” “Dose,” “Divert,” “Purge gases,” and “Oxidizer/RF” traces, albeit with their timing altered according to the additional operational sequences and methodologies disclosed in these subsequent figures.
- a multi-station substrate processing apparatus provides a benefit in that substrates at all stations do not necessarily need to be dosed with reactants at the same time.
- disclosed herein are methods of performing ALD simultaneously at multiple processing stations on multiple substrates which operate to conserve silicon-containing precursor and/or other reactants, by timing and staggering the execution of the various ALD steps (i) through (iv), so that a common source of reactant flow may be redirected to and from the different processing stations rather than being diverted as wastage to the extent illustrated by the baseline operational sequence of FIG. 2 .
- FIG. 3 schematically illustrated in FIG. 3 is a timing diagram 300 corresponding to a parallel execution of a sequence of 4 ALD cycles where the flow of silicon-containing precursor form a common source initially doses wafers at processing stations 1 and 2, and afterwards is redirected to dose wafers at stations 3 and 4.
- substrate dosing steps (i) of the exhibited ALD cycles involve timing the dosing of the first, second, third, and fourth substrates at processing stations 1, 2, 3, and 4, respectively, in a staggered fashion such that the first and second substrates are dosed during a first dosing phase 351 during which the third and fourth substrates are not substantially dosed, and the third and fourth substrates are dosed during a second dosing phase 352 during which the first and second substrates are not substantially dosed, and wherein the precursor flows continuously from the common source during the first and second dosing phases. Due to the fact that only two wafers are dosed simultaneously, the flow rate of silicon-containing precursor is approximately half of that used in the methodology of FIG. 2 which involved the concurrent dosing of 4 wafers.
- FIG. 4 presents a timing diagram 400 which is a variation on the methodology of FIG. 3 wherein the flow pattern of silicon-containing precursor in the two dosing phases of the dosing step (i) is substantially the same as in FIG. 3 , but wherein some portion of the divert phase 355 (in FIG. 3 ), 455 (in FIG. 4 ) is replaced by an accumulate phase 456 .
- the “Divert” trace 415 and “Accumulate” trace 416 in FIG. 4 after the dose phases, flow of silicon-containing precursor is initially diverted to a precursor-divert flow path (and wasted), but at some point the precursor-divert flow path is blocked (such as by closing valve 166 in FIG. 1 ) causing precursor to accumulate in a pre-cursor accumulation volume in fluidic-connection with the precursor flow path upstream of the reaction chamber (and, in the embodiment of FIG. 1 , upstream of the PVM 160 ).
- the extent to which precursor may be accumulated in some volumetric region of its flow path upstream of the reaction chamber depends on several factors such as, for example: the precursor's decomposition temperature; condensation, temperature, and/or pressure restrictions of the components along the precursor's flow path; the feasible flow rates of carrier gas(es) used for vaporization of the precursor; etc.
- the Pre-Heater 124 shown in FIG. 1 immediately downstream of Manifold A 130 which is the source of the carrier gas may be used to increase the temperature of the carrier gas, so that when the carrier gas mixes with the precursor it will have an elevated temperature which may raise the concentration at which the precursor begins to condense. In this manner, a greater quantity of precursor may be accumulated rather than diverted in the accumulation phase shown in FIG. 4 .
- the maximum temperature is limited by this decomposition temperature.
- the maximum pressure allowed to build up is typically limited to below the pressure point at which condensation begins at a temperature below the aforementioned decomposition temperature.
- Switching back to “divert” from “accumulate” is illustrated by divert trace 415 and accumulate trace 416 at the far right of the timing diagram in FIG. 4 .
- the net result of employing an accumulation phase as shown in FIG. 4 is to reduce precursor wastage to below 50 flow units as stated in the figure.
- the increase in cycle time is still the time it takes for 1 additional does, as was the case in FIG. 3 .
- FIG. 5A provides an alternative dosing flow pattern relative to that shown in FIGS. 3 and 4 .
- FIG. 5A provides a sequence of dose timings which fully staggers the dosing of the wafers at stations 1 through 4 such that no two wafers are substantially dosed at the same time, by directing flow of precursor from a common source to the wafer at station 1, redirecting the flow to station 2, then redirecting it to station 3, and finally, redirecting it to station 4.
- substrate dosing steps (i) of the displayed ALD cycles involve timing the dosing of the first, second, third, and fourth substrates at processing stations 1, 2, 3, and 4, respectively, in a staggered fashion such that:
- steps (ii), (iii), and (iv) are advanced in time at each processing station—e.g., relative to their timings in FIGS. 3 and 4 —such that the sequence of steps (ii), (iii), and (iv) at each processing station are initiated immediately following conclusion of dose step (i) at that processing station—rather than waiting for the dose steps (i) to conclude at the other processing stations as well.
- the purge 561 may be underway at station 1, and therefore while the second substrate is dosed in dose step (i) at the second processing station, unadsorbed precursor (and/or reaction by-product) is removed from the volume surrounding the first processing station in ALD step (ii) at the first processing station.
- purge 561 at station 1 due to purge 561 at station 1 starting ahead of purge 562 at station 2, purge 561 at station 1 will finish first and Oxidation/RF 571 at station 1 may be started while purge 562 is still ongoing at station 2.
- precursor adsorbed on the first substrate may be reacted in ALD step (iii) at the first processing station (e.g., Oxidation/RF 571 ) while unadsorbed precursor (and/or reaction by-product) is removed in ALD step (ii) from the volume surrounding the second processing station (e.g., post-dose purge 562 ).
- desorbed precursor may be removed in ALD step (iv) from the volume surrounding the first processing station (e.g., in post-RF purge 581 ) while precursor adsorbed on the second substrate is reacted in ALD step (iii) at the second processing station (e.g., in Oxidizer/RF 572 ).
- FIG. 5B presents a flow pattern where the dosing is staggered into two phases—resulting in a 50% reduction in flow rate versus the baseline of FIG. 2 —but instead of initiating dosing of the second pair of processing stations (e.g., stations 3 and 4) immediately after dosing the first pair (e.g., stations 1 and 2) concludes, flow is diverted and/or accumulated for a certain period of time.
- the second pair of processing stations e.g., stations 3 and 4
- the first pair e.g., stations 1 and 2
- the timing of the dosing of the second pair of stations may be chosen so as to synchronize the post-dose and post-RF purge steps (ALD steps (ii) and (iv)).
- ALD steps (ii) and (iv) the post-dose and post-RF purge steps
- the post-RF purge at stations 1 and 2 may be made to coincide with the post-dose purge at stations 3 and 4 ( 563 and 564 , respectively)
- the post-dose purge at stations 1 and 2 571 and 572 , respectively
- the post-dose purge at stations 1 and 2 may be made to coincide with the post-RF purge at stations 3 and 4 ( 583 and 584 , respectively).
- desorbed precursor is removed in an ALD step (iv) from the volume(s) surrounding certain processing station(s) while unadsorbed precursor (and/or reaction by-product) is removed in an ALD step (ii) from the volume(s) surrounding other processing station(s), and conversely, desorbed precursor is removed in an ALD step (iv) from the volume(s) surrounding these latter processing station(s) while unadsorbed precursor (and/or reaction by-product) is removed in ALD step (ii) from the volume(s) surrounding the former processing station(s).
- This may provide operational advantages in terms of the purge functionality, duration, and effectiveness.
- FIG. 5B illustrates this staggered flow pattern in the context of 4 processing stations, it may also be implemented in the context of just 2 processing stations, by matching up the desorbed precursor removal in an ALD step (iv) at a first processing station with the unadsorbed precursor (and/or reaction by-product) removal in an ALD step (ii) at a second processing station.
- Such a staggering scheme may also be implemented in the context of more than 4 processing stations.
- the ALD methodologies and timing sequences described above may be advantageous due to the lower flow rates during the dose phases, as described above. In some embodiments, this may provide:
- a suitable apparatus may include hardware for accomplishing the process operations and a system controller having machine-readable instructions for controlling process operations in accordance with the present disclosure.
- an apparatus suitable for depositing layers of dielectric material on multiple semiconductor substrates may include a plurality of processing stations each having a substrate holder contained within one or more reaction chambers, a gas delivery system (such as that exhibited in FIG. 1 ) including a valve assembly for directing flow of dielectric film precursor to each of the processing stations and to a precursor-divert flow path (such as operated by valve 166 in FIG. 1 ), and in some embodiments also a valve-operated vacuum source for removing precursor from the volumes surrounding the processing stations inside the one or more reaction chambers.
- a controller associated with such an apparatus may therefore include machine-readable instructions for operating the valve assembly and vacuum source.
- said instructions may include instructions for operations embodying ALD operations (i) though (iv) as described above, and instructions for repeating ALD operations (i) through (iv) multiple times to form multiple layers of dielectric material on the multiple substrates at the multiple processing stations of the substrate processing apparatus.
- the system controller will typically include one or more memory devices and one or more processors configured to execute instructions for controlling process operations so that the apparatus will perform a method in accordance with the present disclosure.
- the system controller may operate various gas delivery lines, valves, valve assemblies, manifolds, temperature controllers, plasma controllers, RF power sources/generators, pressure controllers, valve-operated vacuum sources, etc. to adjust process conditions within the substrate processing apparatus.
- machine-readable media having stored thereon the machine-readable instructions for controlling process operations in accordance with the present disclosure may be coupled to the system controller or may comprise the system controller.
- FIG. 6 schematically illustrates an embodiment of a processing station 3600 .
- processing station 3600 is depicted as a standalone processing station having a reaction chamber 3672 for maintaining a low-pressure environment.
- a plurality of processing stations 3600 may be included in a common low-pressure process tool environment—e.g., within a common reaction chamber.
- Processing station 3600 includes a process gas delivery line 3674 for providing process gases, such as inert purge gases, precursors such as silicon-containing dielectric film precursors, other reactants, and treatment reactants, for delivery to processing station 3600 .
- a showerhead 3678 is included to distribute process gases within processing station 3600 .
- Substrate/wafer 3686 is located beneath showerhead 3678 , and is shown resting on a substrate holder 3680 supported by a pedestal 3682 .
- pedestal 3682 may be configured to rotate about a vertical axis. Additionally or alternatively, pedestal 3682 may be configured to translate horizontally and/or vertically.
- showerhead 3678 may be a single-plenum, dual-plenum, or multi-plenum showerhead.
- FIG. 7 schematically shows an embodiment of a dual-plenum showerhead 3700 .
- a first set of holes 3702 receives gas from a first process gas delivery line 3712 and a second set of holes 3704 receives gas from a second process gas delivery line 3714 .
- Such physical isolation of process gases may provide an approach to reducing small particle generation from reaction between incompatible process gases in process gas delivery plumbing upstream of showerhead 3700 .
- Any suitable segregation scheme may be employed.
- holes 3702 may be dedicated to a silicon dioxide film deposition process while holes 3704 may be dedicated to a silicon nitride film deposition process.
- holes 3704 may be dedicated to oxidizing reactants while holes 3704 may be dedicated to reducing reactants. While the example shown in FIG. 6 is a dual-plenum showerhead, it will be appreciated that, in some embodiments, a showerhead may be a multi-plenum showerhead having three or more sets of holes.
- FIG. 6 depicts a capacitively-coupled plasma
- plasma 3692 may be generated by any suitable plasma source.
- plasma 3692 may include a parallel plate plasma source.
- RF power source 3688 and matching network 3690 may be used to generate a plasma within the reaction chamber which contains the one or more substrate processing stations, in other embodiments, said oxidative plasma may be generated remotely from, and thereafter introduced into, said reaction chamber.
- FIG. 1 schematically illustrates a remote plasma source 195 regulated by valve 116 .
- RF power source and generator 3688 may provide RF power of any suitable frequency.
- RF power source and generator 3688 may be configured to independently generate and control high- and low-frequency RF power. Examples of low-frequency RF power produced by an RF power source and generator may include, but are not limited to, frequencies between 200 kHz and 2000 kHz. Example high-frequency RF power may include, but are not limited to, frequencies between 13.56 MHz and 80 MHz.
- RF power source and generator 3688 and matching network 3690 may be operated at any suitable power to form plasma 3692 .
- Suitable powers include, but are not limited to, powers between 250 W and 5000 W for a high-frequency plasma and powers between 0 W and 2500 W for a low-frequency plasma for a four-processing station multi-substrate processing tool including four 15-inch showerheads.
- RF power source and generator 3688 may be operated at any suitable duty cycle. Examples of suitable duty cycles include, but are not limited to, duty cycles of between 5% and 90%.
- holder 3680 may be temperature controlled via heater 3684 .
- pressure control for processing station 3600 may be provided by a valve-operated vacuum source such as butterfly valve 3696 which, as shown in FIG. 6 , throttles a vacuum provided by a vacuum pump (not shown) fluidly coupled to processing station exhaust line 3698 .
- pressure control of processing station 3600 may also be adjusted by varying a flow rate of one or more gases introduced to processing station 3600 .
- control of one or more process parameters may be provided locally (e.g., RF power may be controlled by a plasma controller communicating with RF power supply 3688 , processing station pressure may be controlled by a valve controller communicating with butterfly valve 3696 or with gas metering valves or flow controllers coupled with process gas delivery line 3674 , etc.) or under partial or total control provided by a system controller (described above and below) communicating with processing station 3600 without departing from the scope of the present disclosure.
- RF power may be controlled by a plasma controller communicating with RF power supply 3688
- processing station pressure may be controlled by a valve controller communicating with butterfly valve 3696 or with gas metering valves or flow controllers coupled with process gas delivery line 3674 , etc.
- a system controller described above and below
- control and/or supply of various process inputs may be distributed from shared sources to the plurality of processing stations within the multi-station apparatus.
- process inputs e.g., process gases, plasma power, gases for plasma generation, reactants, film precursors, heater power, etc.
- process inputs e.g., process gases, plasma power, gases for plasma generation, reactants, film precursors, heater power, etc.
- shared sources e.g., process gases, plasma power, gases for plasma generation, reactants, film precursors, heater power, etc.
- shared sources e.g., a shared source of RF power may supply RF power for plasma generation within two or more processing stations.
- a shared gas distribution manifold may supply process gases to two or more processing stations.
- FIG. 8 schematically shows an example substrate processing apparatus 3840 , which includes a plurality of processing stations 3842 in a common low-pressure reaction chamber. By maintaining each station in a low-pressure environment, defects caused by vacuum breaks between film deposition processes may be avoided.
- each processing station 3842 is configured to deposit a film stack comprising multiple layers of TEOS (tetraethyl orthosilicate, Si(OC 2 H 5 ) 4 )-based silicon dioxide film and silane (SiH 4 )-based silicon nitride film.
- TEOS tetraethyl orthosilicate, Si(OC 2 H 5 ) 4
- silane (SiH 4 )-based silicon nitride film may comprise alternating layers of silicon dioxide film and silicon nitride film, one deposited atop the other.
- process gases for each processing station 3842 are supplied by a common mixing vessel 3844 for blending and/or conditioning process gases prior to delivery.
- mixing vessel 3844 may be temperature controlled.
- Process gases including film precursors (such as silicon-containing film precursor) and possibly other reactants in a carrier gas, as well as gases for plasma support, may be supplied from a plurality of process gas delivery lines, valves, and manifolds. For example, FIG.
- a manifold A including silane and nitrogen (as the carrier gas) fluidly communicating with a silane delivery line 3845 ; a manifold B including ammonia and nitrogen (again, serving as a carrier gas) fluidly communicating with an ammonia delivery line 3847 ; and a manifold C including oxygen gas (O 2 ) and/or nitrous oxide (N 2 O), helium, and/or argon (the latter two as carrier gases) fluidly communicating with a TEOS delivery line 3848 .
- O 2 oxygen gas
- N 2 O nitrous oxide
- helium, and/or argon the latter two as carrier gases
- TEOS is introduced into TEOS delivery line 3848 fluidly communicating with manifold C at mixing point 3846 .
- liquid TEOS may be vaporized by optional vaporizer 3849 upstream of mixing point 3846 .
- suitable arrangements and chemistries as described above are included within the scope of the present disclosure, and that various ALD-based film deposition chemistries and multi-substrate apparatuses and arrangements may benefit from the process timing sequences disclosed herein.
- each film type may occur by a process that may include one or more of the above-described phases suitably modified for in-situ deposition of TEOS-based silicon dioxide films and silane-based silicon nitride films.
- each processing station 3842 is configured to provide each film type, additional purge and/or evacuation steps may be included within one or both processes to separate incompatible process gases.
- residual oxygen adsorbed to plumbing surfaces may react with subsequently introduced silane to form fine silicon dioxide particulates.
- residual TEOS may react with subsequently introduced ammonia to form silicon oxynitride particulates. These particulates may be entrained during a gas flow event and may be distributed on the substrate surface as particle defects.
- one approach to addressing generation of such particles is by using one or more purge and/or evacuation cycles to displace incompatible process gases from surfaces and/or spaces shared by the process gases during transitions between deposition phases.
- a prior reactant/precursor elimination step may be accelerated by pumping the processing chamber to a base pressure-such as specifically described in detail above with respect to the reference pump-to-base (PTB) process.
- a continuous plasma on (CPO) process such as that described in detail above, may be employed as an alternative to a PTB-type process.
- FIG. 9 schematically shows an example substrate processing apparatus 3990 , which includes a plurality of processing stations 3992 in a common low-pressure reaction chamber similar to that schematically illustrated in FIG. 8 .
- processing stations 3992 are configured to deposit a film stack comprising multiple layers of TEOS-based silicon dioxide films and silane-based silicon nitride films.
- a film stack may comprise alternating layers of silicon dioxide film and silicon nitride film, one deposited atop the other.
- Process gases may be supplied to the processing stations 3992 from a plurality of process gas manifolds, each of which may include any suitable process gas. For example, FIG.
- FIG. 9 depicts a manifold A including silane and nitrogen (as a carrier gas) fluidly communicating with processing stations 3992 ; a manifold B including ammonia and nitrogen (as a carrier gas) fluidly communicating with processing stations 3992 ; and a manifold C including oxygen gas (O 2 ) and/or nitrous oxide (N 2 O), helium, and argon fluidly communicating with processing stations 3992 .
- a manifold A including silane and nitrogen (as a carrier gas) fluidly communicating with processing stations 3992 ;
- a manifold B including ammonia and nitrogen (as a carrier gas) fluidly communicating with processing stations 3992 ; and a manifold C including oxygen gas (O 2 ) and/or nitrous oxide (N 2 O), helium, and argon fluidly communicating with processing stations 3992 .
- oxygen gas O 2
- N 2 O nitrous oxide
- helium and/or argon are provided to each of manifolds A,
- TEOS TEOS and oxygen
- liquid TEOS may be vaporized by optional vaporizer 3999 and mixed with oxygen gas (O 2 ) and/or nitrous oxide (N 2 O) supplied from manifold C at mixing point 3991 .
- Nitride film reactants shown in FIG. 9 as silane and ammonia, are supplied via manifolds A and B, respectively, to each processing station 3992 via nitride system mixers 3995 .
- nitride system mixers 3995 may include dynamic or static mixing elements.
- nitride system mixers 3995 may be static gas mixers including static, helically-shaped baffles. Additionally or alternatively, in some embodiments, nitride system mixers 3995 may include one or more heated mixing vessels. While FIG. 9 shows that process tool 3990 comprises two nitride system mixers 3995 for mixing nitride film reactants, it will be appreciated that any suitable number of nitride system mixers 3995 may be employed within the scope of the present disclosure. In some examples, three or more nitride system mixers may be used; in some other examples, a single nitride system mixer 3995 may be used, or the nitride system mixer 3995 may be omitted.
- one or more nitride system mixers 3995 may include a mixing vessel.
- one or more mixing vessels having no baffles may be substituted for one or more nitride system mixers 3995 .
- inert gases such as argon, helium, and nitrogen, may be supplied to one or more processing stations, providing purging, process gas dilution, and pressure control capability, as well as serving as a medium for plasma generation within the processing chamber.
- argon is supplied through inert mixer 3996 to the processing chamber for use in generating an argon-based plasma.
- the argon-based plasma may be used to accelerate elimination of contaminating species from the processing chamber, such as film precursors leftover from a previous film deposition step.
- argon is provided to each processing station 3992 via two inert mixers 3996 .
- any suitable number of inert mixers 3996 may be employed, or in the alternative, that inert mixers 3996 may be omitted.
- a plurality of valves 3998 for each processing station 3992 isolate upstream portions of the oxide film gas delivery plumbing from the nitride film gas delivery plumbing from one another and from a processing station feed 3997 .
- valves 3998 may comparatively reduce a volume of processing station feed 3997 , further reducing potential reactions between incompatible reactants. While FIG. 9 depicts three valves 3998 and a single processing station feed 3997 serving each processing station 3992 , it will be appreciated that any suitable number of valves 3998 and processing station feeds 3997 may be employed. For example, in some embodiments, each process gas may have a separate processing station feed 3997 serving each processing station 3992 .
- FIGS. 7 and 8 depict multi-station substrate processing apparatuses having 4 processing stations within a single reaction chamber
- other configurations may have a greater or lesser number of processing stations within a single reaction chamber.
- a multi-station substrate processing apparatus may have 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, or 16, or more processing stations per reaction chamber; or a number of processing stations per reaction chamber within a range defined by any pair of the foregoing numbers of processing stations per reaction chamber: e.g., 2 to 6 processing stations per reaction chamber, 4 to 8 processing stations per reaction chamber, 8 to 16 processing stations per reaction chamber, etc.
- a multi-station substrate processing apparatus may have just a single processing station per reaction chamber—e.g., as in FIG. 6 above—and the staggering of precursor dosing may be accomplished by redirecting precursor between multiple processing stations each of which is located within a different reaction chamber.
- processing stations the location where an individual substrate is dosed with precursor—in order to encompass the possibilities that multiple processing stations may be located within the same or different reaction chambers.
- the disclosed methods may be performed with respect to a single reaction chamber having 2, or 4, or 6, etc. processing stations, they may also be performed with respect to 2, or 4, or 6, etc. reaction chambers each having a single processing station.
- a first processing station may be located within a first reaction chamber, and a second processing station may be located within a second reaction chamber.
- precursor redirect operations may be performed with respect to 4 processing stations where 2 processing stations are contained within each of 2 reaction chambers.
- the apparatus/process described herein above may be used in conjunction with lithographic patterning tools or processes, for example, for the fabrication or manufacture of semiconductor devices, displays, LEDs, photovoltaic panels and the like. Typically, though not necessarily, such tools/processes will be used or conducted together in a common fabrication facility.
- Lithographic patterning of a film typically includes some or all of the following operations, each operation enabled with a number of possible tools: (1) application of photoresist on a workpiece, i.e., substrate, using a spin-on or spray-on tool; (2) curing of photoresist using a hot plate or furnace or UV curing tool; (3) exposing the photoresist to visible or UV or x-ray light with a tool such as a wafer stepper; (4) developing the resist so as to selectively remove resist and thereby pattern it using a tool such as a wet bench; (5) transferring the resist pattern into an underlying film or workpiece by using a dry or plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.
- a tool such as an RF or microwave plasma resist stripper.
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Mechanical Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Plasma & Fusion (AREA)
- Electromagnetism (AREA)
- Chemical Vapour Deposition (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
- This application claims priority to U.S. Provisional Patent Application No. 61/845,911, filed Jul. 12, 2013, and titled “SEQUENTIAL PRECURSOR DOSING IN AN ALD MULTI STATION/BATCH REACTOR,” which is hereby incorporated by reference in its entirety and for all purposes.
- In the fabrication of integrated circuits (ICs), it is oftentimes desirable to deposit a thin film of material which substantially conforms to the shape of features already present on the surface of a partially manufactured semiconductor wafer. While there are various ways of depositing films of material on a semiconductor such as physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), etc., these methodologies often result in the formation of layers not sufficiently conformal with the underlying material. Atomic layer deposition (ALD), on the other hand, does typically provide for the deposition of thin films with the desired degree of conformality.
- ALD achieves its characteristic conformality by depositing material in thin adsorption-limited layers. Since each deposited layer is formed through an adsorption-limited process, each layer is of approximately the same thickness, and thicker films of the deposited material consisting of multiple layers may be thus formed through consecutive ALD cycles, thereby producing a film which conforms to the shape of the underlying substrate surface.
- Disclosed herein are methods of depositing layers of material on multiple semiconductor substrates at multiple processing stations within one or more reaction chambers. The methods may include dosing the substrates at the processing stations with a film precursor by introducing the precursor into the one or more reaction chambers and allowing the precursor to adsorb onto the surface of the substrates in an adsorption-limited manner, and then removing unadsorbed precursor from the volumes surrounding the processing stations inside the one or more reaction chambers. The dosing of the substrates at the processing stations with film precursor may include dosing a first substrate at a first processing station and a second substrate at a second processing station with precursor flowing from a common source. The timing of said dosing may be staggered such that the first substrate is dosed during a first dosing phase during which the second substrate is not substantially dosed, and the second substrate is dosed during a second dosing phase during which the first substrate is not substantially dosed, wherein the precursor flows continuously from the common source during the first and second dosing phases. The methods may further include reacting adsorbed precursor with a plasma, after removing unadsorbed precursor, to form a layer of material on the substrates, and removing desorbed precursor and/or reaction by-product from the volumes surrounding the processing stations inside the one or more reaction chambers when present after reacting adsorbed precursor. Thereafter, the methods may further include repeating the foregoing operations multiple times to form multiple layers of material on the multiple substrates at the multiple processing stations.
- Also disclosed herein are multi-station substrate processing apparatuses for depositing layers of material on multiple semiconductor substrates at multiple processing stations. The apparatuses may include a plurality of processing stations each having a substrate holder contained within one or more reaction chambers, a valve assembly for directing flow of film precursor to each of the processing stations and to a precursor-divert flow path, a valve-operated vacuum source for removing precursor from the volumes surrounding the processing stations inside the one or more reaction chambers, and a controller comprising machine-readable instructions for operating the valve assembly and vacuum source. The controller may including instructions for dosing substrates at the processing stations with film precursor by introducing the precursor into the one or more reaction chambers and allowing the precursor to adsorb onto the surface of the substrates in an adsorption-limited manner, instructions for removing unadsorbed precursor from the volumes surrounding the processing stations inside the one or more reaction chambers, instructions for reacting adsorbed precursor with a plasma, after removing unadsorbed precursor, to form a layer of material on the substrates, instructions for removing desorbed precursor and/or reaction by-product from the volumes surrounding the processing stations inside the one or more reaction chambers when present after reacting adsorbed precursor, and instructions for repeating (i) through (iv) multiple times to form multiple layers of material on the multiple substrates at the multiple processing stations. The dosing of the substrates at the processing stations with film precursor may include dosing a first substrate at a first processing station of the plurality of processing stations and dosing a second substrate at a second processing station of the plurality of processing stations with precursor flowing from a common source. The timing of said dosing may be staggered such that the first substrate is dosed during a first dosing phase during which the second substrate is not substantially dosed, and the second substrate is dosed during a second dosing phase during which the first substrate is not substantially dosed, and wherein the precursor flows continuously from the common source during the first and second dosing phases.
-
FIG. 1 schematically illustrates a gas delivery system for delivering reactants to a single processing station of a multi-station substrate processing apparatus which may be used to perform one or more ALD cycles. -
FIG. 2 schematically illustrates a baseline timing diagram corresponding to the typical parallel execution of a sequence of 4 ALD cycles involving the simultaneous dosing of 4 wafer substrates with silicon-containing precursor, each substrate at one of 4 different processing stations. -
FIG. 3 schematically illustrates a timing diagram corresponding to a parallel execution of a sequence of 4 ALD cycles where the flow of silicon-containing precursor initially doses substrates atprocessing stations 1 and 2, and afterwards is redirected to dose substrates atstations -
FIG. 4 schematically illustrates a timing diagram similar to that displayed inFIG. 3 , but wherein some portion of the divert phase is replaced by an accumulate phase. -
FIG. 5A schematically illustrates a timing diagram providing a sequence of dose timings which fully staggers the dosing of the substrates at stations 1 through 4 such that no two substrates are substantially dosed at the same time. -
FIG. 5B schematically illustrates a timing diagram staggering substrate dosing into two phases such that the post-RF purge step atstations 1 and 2 coincides with the post-dose purge steps atstations stations 1 and 2 coincides with the post-RF purge atstations -
FIG. 6 schematically illustrates an embodiment of a substrate processing station depicted as a single processing station located within a single reaction chamber. -
FIG. 7 schematically illustrates an embodiment of a dual-plenum showerhead. -
FIG. 8 schematically illustrates an embodiment of a multi-station substrate processing apparatus which includes a plurality of processing stations in a common low-pressure reaction chamber. -
FIG. 9 schematically illustrates an embodiment of a multi-station substrate processing apparatus which includes a plurality of processing stations in a common low-pressure reaction chamber similar to that schematically illustrated inFIG. 8 , but additionally employing various mixing vessels for various reactants as well as additional feed line valving. - In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. The present invention may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail so as to not unnecessarily obscure the present invention. While the invention will be described in conjunction with specific detailed embodiments, it is to be understood that these specific detailed embodiments are not intended to limit the scope of the inventive concepts disclosed herein.
- As described above, ALD provides an effective avenue for depositing conformal films of dielectric material, however, due to the adsorption-limited nature of the process, each ALD cycle only deposits a thin film of material. Thus, the sequence of steps in a typical ALD cycle which result in the formation of a single adsorption-limited monolayer of material are generally repeated multiple times to form a conformal film of desired thickness. For example, as described in more detail in U.S. patent application Ser. No. 13/084,399, filed Apr. 11, 2011, titled “PLASMA ACTIVATED CONFORMAL FILM DEPOSITION,” U.S. patent application Ser. No. 13/242,084, filed Sep. 23, 2011, titled “PLASMA ACTIVATED CONFORMAL DIELECTRIC FILM DEPOSITION,” and U.S. patent application Ser. No. 13/224,240, filed Sep. 1, 2011, and titled “PLASMA ACTIVATED CONFORMAL DIELECTRIC FILM DEPOSITION,” (each of which is hereby incorporated by reference in its entirety for all purposes), an ALD cycle for depositing a dielectric material (such as a silicon-containing dielectric material) may comprise: (i) dosing a substrate at a processing station within a reaction chamber with a dielectric film precursor and allowing the precursor to adsorb onto the surface of the substrate in an adsorption-limited manner, (ii) removing (e.g. via purging) unadsorbed precursor and/or reaction by-product from the reaction chamber, or more specifically, from the volume surrounding the processing station, (iii) reacting the adsorbed-precursor with an oxidative plasma typically generated in the reaction chamber with application of suitable RF power (although in some embodiments, it may be generated remotely), and finally, (iv) removing (again, often by purging) any desorbed dielectric film precursor (or other reactants or materials) from the reaction chamber, or more specifically, from the volume surrounding the processing station (where the substrate is located). Operations (i) through (iv) may then be repeated multiple times to form multiple layers of dielectric material to form a film of dielectric material of the desired thickness. In some dielectric film forming chemistries, an auxiliary reactant or co-reactant—in addition to what is referred to as the dielectric film “precursor”—may also be employed. In certain such embodiments, the auxiliary reactant or co-reactant may be flowed continuously during a subset of steps (i) through (iv) or throughout each of steps (i) through (iv).
- As described in the patent applications listed and incorporated by reference above (U.S. patent application Ser. Nos. 13/084,399, 13/242,084, and 13/224,240), various film-forming chemistries may be used to deposit various film types via the ALD processes described herein. For instance, any appropriate silicon-containing reactant/film-precursor and oxidant may be used for the deposition of silicon oxides. Similarly, for the deposition of silicon nitrides, any appropriate silicon-containing reactant/film-precursor and nitrogen-containing co-reactant may be used. Further, for the deposition of metal oxides or metal nitrides, any appropriate metal-containing reactants/film-precursor and co-reactants may be used. Examples of auxiliary/co-reactants include oxygen, ozone, hydrogen, carbon monoxide, nitrous oxide, ammonia, alkyl amines, and the like. For example, an oxide film may be deposited by an ALD process using bis(tert-butylamino)silane (BTBAS) as a silicon-containing film precursor. In this example, oxygen or nitrous oxide may be used as an oxidant, e.g. in ALD step (iii), which may or may not, depending on the embodiment, flow continuously during delivery of the BTBAS (ALD step (i)).
- Generally, the disclosed multi-substrate deposition methodologies and related apparatuses employing various process timing sequences are applicable to a wide variety of deposited film types and deposition chemistries. The disclosed ALD processes may be employed to form films of dielectric material, but films of conductive and semiconductor material may be formed as well, depending on the embodiment. Nitrides and oxides are featured dielectric materials, but carbides, oxynitrides, carbon-doped oxides, borides, etc. may also be formed. Oxides include a wide range of materials including undoped silicate glass (USG) and doped silicate glass. Examples of doped silicate glasses included boron doped silicate glass (BSG), phosphorus doped silicate glass (PSG), and boron phosphorus doped silicate glass (BPSG).
- A “silicon-containing film precursor” is a compound and/or reagent containing silicon which may be used to form a film incorporating silicon from said precursor. The silicon-containing film precursor may be, for example, a silane, a halosilane or an aminosilane. A silane contains hydrogen and/or carbon groups, but does not contain a halogen. Examples of silanes are silane (SiH4), disilane (Si2H6), and organo silanes such as methylsilane, ethylsilane, isopropylsilane, t-butylsilane, dimethylsilane, diethylsilane, di-t-butylsilane, allylsilane, sec-butylsilane, thexylsilane, isoamylsilane, t-butyldisilane, di-t-butyldisilane, and the like. A halosilane contains at least one halogen group and may or may not contain hydrogens and/or carbon groups. Examples of halosilanes are iodosilanes, bromosilanes, chlorosilanes and fluorosilanes. Although halosilanes, particularly fluorosilanes, may form reactive halide species that can etch silicon materials, in certain embodiments, the silicon-containing film precursor is not present when a plasma is struck. Specific chlorosilanes are tetrachlorosilane (SiCl4), trichlorosilane (HSiCl3), dichlorosilane (H2SiCl2), monochlorosilane (CISiH3), chloroallylsilane, chloromethylsilane, dichloromethylsilane, chlorodimethylsilane, chloroethylsilane, t-butylchlorosilane, di-t-butylchlorosilane, chloroisopropylsilane, chloro-sec-butylsilane, t-butyldimethylchlorosilane, thexyldimethylchlorosilane, and the like. An aminosilane includes at least one nitrogen atom bonded to a silicon atom, but may also contain hydrogens, oxygens, halogens and carbons. Examples of aminosilanes are mono-, di-, tri- and tetra-aminosilane (H3Si(NH2)4, H2Si(NH2)2, HSi(NH2)3 and Si(NH2)4, respectively), as well as substituted mono-, di-, tri- and tetra-aminosilanes, for example, t-butylaminosilane, methylaminosilane, tert-butylsilanamine, bis(tertiarybutylamino)silane (SiH2(NHC(CH3)3)2 (BTBAS), tert-butyl silylcarbamate, SiH(CH3)—(N(CH3)2)2, SiHCl—(N(CH3)2)2, (Si(CH3)2NH)3 and the like. A further example of an aminosilane is trisilylamine (N(SiH3)3).
- In some embodiments, the deposited film contains metal. Examples of metal-containing films that may be formed include oxides and nitrides of aluminum, titanium, hafnium, tantalum, tungsten, manganese, magnesium, strontium, etc., as well as elemental metal films. Example of metal-containing film precursors may include metal alkylamines, metal alkoxides, metal alkylamides, metal halides, metal β-diketonates, metal carbonyls, organometallics, etc. Appropriate metal-containing film precursors will include the metal that is desired to be incorporated into the film. For example, a tantalum-containing layer may be deposited by reacting pentakis(dimethylamido)tantalum with ammonia or another reducing agent. Further examples of metal-containing precursors that may be employed include trimethylaluminum, tetraethoxytitanium, tetrakis-dimethyl-amido titanium, hafnium tetrakis(ethylmethylamide), bis(cyclopentadienyl)manganese, bis(n-propylcyclopentadienyl)magnesium, etc.
- In some embodiments, the deposited film contains nitrogen, and a nitrogen-containing co-reactant may be used. A “nitrogen-containing co-reactant” contains at least one nitrogen, for example, ammonia, hydrazine, amines (e.g., amines bearing carbon) such as methylamine, dimethylamine, ethylamine, isopropylamine, t-butylamine, di-t-butylamine, cyclopropylamine, sec-butylamine, cyclobutylamine, isoamylamine, 2-methylbutan-2-amine, trimethylamine, diisopropylamine, diethylisopropylamine, di-t-butylhydrazine, as well as aromatic containing amines such as anilines, pyridines, and benzylamines. Amines may be primary, secondary, tertiary or quaternary (for example, tetraalkylammonium compounds). A nitrogen-containing co-reactant may contain heteroatoms other than nitrogen, for example, hydroxylamine, t-butyloxycarbonyl amine and N-t-butyl hydroxylamine are nitrogen-containing reactants.
- In certain embodiment, an oxygen-containing oxidizing reactant is used. Examples of oxygen-containing oxidizing reactants include oxygen, ozone, nitrous oxide, carbon monoxide, mixtures thereof, etc.
- Again, multiple ALD cycles may be repeated to build up stacks of conformal layers. In some embodiments, each layer may have substantially the same composition whereas in other embodiments, sequentially ALD deposited layers may have differing compositions, or in certain such embodiments, the composition may alternate from layer to layer or there may be a repeating sequence of layers having different compositions. Again, certain such embodiments are described in greater detail in U.S. patent application Ser. No. 13/242,084 (incorporated by reference above). It should also be noted that although the ALD-related techniques, operations, methodologies, apparatuses, devices. and systems disclosed herein are described in the context of depositing layers of silicon-containing film, and in particular silicon-containing dielectric films, and yet more particularly silicon oxide and/or silicon nitride-containing dielectric films, it should be understood that the disclosed techniques, methodologies, apparatuses, and systems disclosed herein may also be used to deposit other types of dielectric films, or generally, other films having different chemistries formed from different types of chemical precursors and reactants.
- Schematically illustrated in
FIG. 1 is agas delivery system 100 for delivering reactants to a single station of a multi-station reaction chamber (not shown) which may be used to perform one or more ALD cycles. The figure illustrates a configuration of gas flow lines, manifolds, valves, regulators, filters, showerhead, etc. for providing for ALD reactant delivery. Gas lines are schematically indicated as thin solid lines with arrows indicating the direction of gas flow; valves are indicted in the figure with crossed lines within a circle; regulators by an arrow within a circle; manifolds by solid boxes labeled “Manifold”; filters with curved lines either side of a gas line, etc. Most of the gas flow lines route gas to the “showerhead” 110, which as shown in this schematic, is the device which delivers the ALD reactants to a reaction chamber which is not shown. - Thus, in reference to the particular embodiment of a
gas delivery system 100 shown inFIG. 1 , the delivery of film precursor (e.g., silicon-containing film precursor) to the reaction chamber—relevant to the ALD dosing and adsorption step (see step (i) above)—may involve introducing precursor from a liquid delivery system (labeled “LPDS”) 120 to a heated injection manifold 125 (labeled “HIM”) where it is mixed with a preheated (see “preheater” 124) inert carrier gas originating from gas source 130 (“Manifold A”). The carrier gas then carries the precursor to an array of fourvalves assembly 160 is often referred to as a point-of-use valve manifold (PVM) due to its close proximity (in terms of gas flow distance) to the reaction chamber. In particular, from thePVM 160, withvalve 165 open andvalve 166 closed, the precursor and carrier gas are flowed directly to theshowerhead 110 and then into the reaction chamber. Examples of suitable PVMs which may include the aforementioned fourvalves - Likewise,
delivery system 100 ofFIG. 1 also illustrates delivery of oxidant to a reaction chamber for use in ALD—relevant to the generation of an oxidative plasma and its reaction with adsorbed silicon-containing precursor (see step (iii) above). Specifically, gas source 140 (“Manifold C”) is shown as a source of O2 and/or N2O gas which is flowed to theshowerhead 110 throughvalve 169 of thePVM 160 shown in the figure. The presence ofManifold C 140 and also “Manifold D” 170 should also be noted in the context of this configuration as they may be used to deliver inert gases for post-dose purge (step (ii) above) and post-RF purge (step (iv) above). With regards toManifold D 170, thegas delivery system 100 is configured such that purge gas sourced from Manifold D passes through “Preheater” 171 and then is flowed on two paths towards the showerhead. Purge gas flowing on both paths pass through a regulator (172 or 173) and then on through a filter (173B or 175B) flanked upstream and downstream by valves (173A and 173C or 175A and 175C). One path then proceeds directly toshowerhead 110, while the other connects toPOS 160 first, in order to effectively additionally purge any remaining reactant gases lingering in the POS device after the dosing step. Also, note that, in some embodiments, precursor may be removed from the volume surrounding a processing station within a reaction chamber by applying vacuum to the reaction chamber (e.g., through the operation of a valve-operated vacuum source) without employing the use of an inert purge gas. - In addition, also note that
FIG. 1 exhibits aremote plasma source 195, employing a NF3-based plasma (as indicated in the figure), whose fluidic coupling to the reaction chamber and process station is regulated byvalve 116. Finally, note that in some embodiments, Manifold B 150 (as regulated by valve 144) may serve as a source of a co-reactant gas—for example, a nitrogen-containing co-reactant such as ammonia—which is flowed toshowerhead 110 throughvalve 165 ofPOS 160. Co-reactant gases are discussed above and also below with respect toFIGS. 8 and 9 . - As described above, a conformal film is typically deposited via ALD by performing multiple ALD cycles in sequence. Due to the fact that each layer deposited by ALD is very thin, typical being formed from a single monolayer of silicon-containing precursor, depositing a film of any substantial thickness typically involves many ALD cycles, and therefore may be relatively time consuming. Thus, it is typically desired that each individual ALD cycle be performed as quickly as reasonably possible—given the chemical kinetics of the reaction sequence, and the limitations of a given reactor setup. Accordingly, a chemical delivery system, such as that schematically illustrated in
FIG. 1 , is typically required to repeatedly start, stop, and restart delivery of the required precursors, oxidants, etc. in quick succession over the course of multiple ALD cycles, and moreover, to provide stable and consistent flow of the precursors, oxidants, and any other optional reactants when such species are called for. However, in many cases, ALD cycle times are comparable to valve and flow control device operating times, meaning that the time taken for such flow control devices to provide a steady state flow of silicon-containing precursor and/or other reactants becomes the limiting factor preventing desired further reductions in cycle time. These steady flow conditions are important for the consistency of the ALD process, as transient or unstable flow conditions can lead to undesirable variations in the layers deposited via ALD. - One way to circumvent the limitations posed by valve and flow control device operating times is to establish a steady-state flow of reactants by leaving flow control devices in their open positions, and to “divert” the flow of reactants to and from the reaction chamber as required by the timing requirements of an ALD cycle. While the use of a “divert”—where reactants are left flowing from their sources but switched back and forth between “dump” and “wafer cavity” modes—achieves the desired reduction in cycle time, it does so at the expense of wasting valuable silicon-containing precursor and other reactants. In addition, apart from the cost of precursor and/or other reactants, such dumping also places an additional load on a wafer processing system's exhaust/scrubber sub-system.
- Accordingly, disclosed herein are several other methods of circumventing the timing limitations of typical valves and flow control devices, methods which reduce the amount of wasted precursor and other reactants relative to the simple flow diversion procedure just described. These methods take advantage of the fact that it is oftentimes desirable to perform ALD in parallel on multiple wafers, and accordingly, multiple processing stations capable of performing ALD are often operated contemporaneously to perform ALD on multiple wafers at the same time. In some embodiments, these multiple processing stations may be present in the same processing chamber—see, e.g., the wafer processing apparatuses described below in reference to
FIGS. 6-9 having four processing stations within a single reaction chamber each capable of performing ALD—however, in some embodiments, these multiple processing stations may also be present in separate reaction chambers. In either configuration, methods of performing ALD disclosed herein simultaneously execute ALD cycles on multiple wafers, and operate to conserve silicon-containing precursor and other reactants, by timing and staggering the execution of the various ALD steps (i) through (iv) (see above), so that flow of precursor from a common source can be redirected to and from the different processing stations—at least to the extent allowed by the timing and staggering of steps (i) through (iv)—instead of simply diverting and dumping unneeded flow of precursor and/or other reactants. - For example,
FIG. 2 schematically illustrates a baseline timing diagram 200 corresponding to the typical parallel execution of a sequence of 4 ALD cycles involving the simultaneous dosing of 4 wafer substrates with silicon-containing precursor, each substrate at one of 4 different processing stations Time moves from left to right in the figure with the vertical broken lines on the far left and far right indicating that the figure represents a single cycle of ALD (for each station) and so that the displayed sequence of steps may be joined end-to-end to represent multiple ALD cycles (at each station). The steps within an ALD cycle referred to as (i), (ii), (iii), and (iv) above correspond to traces labeled inFIG. 2 as ‘Dose’ 211, 212, 213, 214, ‘Post-Dose Purge’ 220, ‘Oxidizer/RF’ 230 (reacting adsorbed precursor with oxidative plasma step), and ‘Post-RF Purge’ 221 (or ‘PosRF’ for short inFIG. 5A ). - Displayed from top to bottom in the timing diagram is a schematic illustration of silicon-containing precursor delivery to each of 4 processing stations (labeled “Station 1” through “
Station 4”) which is indicated by 4traces 5th trace 215 is precursor flow diverted to a divert flow path (i.e., not to the processing stations). - These 5 traces (211, 212, 213, 214, and 215) represent a breakdown of the total precursor flow schematically illustrated by the
top-most trace 210 inFIG. 2 . The figure also schematically illustrates the timing of post-dose and post-RF purge gas flow—shown withtrace 220/221 labeled “purge gases”—as well as the timing of oxidative plasma generation and reaction with adsorbed precursor—shown withtrace 230 labeled “Oxidizer/RF.” Among other things, FIG. 2's breakdown of total silicon-containing precursor flow indicates that, in some embodiments, a single gas delivery system like that shown inFIG. 1 may be used to flow precursor to each processing station in, for example, a 4 processing station configuration (possibly all contained within the same reaction chamber). Although it should, of course, also be understood that a more complicated gas delivery system could be used—such as a configuration which provides a dedicated gas delivery system for each processing station. - In the baseline operational sequence schematically illustrated via the timing diagram of
FIG. 2 , the precursor dosing steps of the 4 ALD cycles are timed to coincide with one another. Thus, in step (i) (far left), substrates positioned at the 4 stations are simultaneously dosed with silicon-containing precursor which is allowed to adsorb onto the surface of each of the 4 wafers. It should be noted that whether a single or multiple gas delivery systems (e.g., one per station) are employed, the collective quantity of gas reactants supplied in the dose step need be sufficient to simultaneously dose all 4 wafers, and so the delivery quantity is typically 4 times that required for the execution of an ALD cycle on a single wafer. Thus, for purposes of illustrating this operational sequence, the total flow of silicon-containing precursor—represented bytrace 210 inFIG. 2 (top left to right)—is said inFIG. 2 to equal 100 units of flow (the units of course being arbitrary for purposes of illustration). The total 100 units of flow (again, shown schematically by the silicon-containing precursor trace 210) are then divided into the 4 doses of 25 flow units each, the doses provided to the 4 wafers at the 4 processing stations concurrently, as illustrated by the 4 dose traces (211, 212, 213, and 214) shown in the figure and corresponding to step (i) above. For context, note that this could correspond to the opening ofvalve 164 inFIG. 1 , while the other valves of the POS remain shut. - However,
FIG. 2 also illustrates the extent to which silicon-containing precursor is wasted employing the operational sequence ofFIG. 2 . In particular,FIG. 2 shows that after dosing step (i) concludes, the totality of precursor flow is diverted as illustrated by the “Divert”trace 215 in the figure, and thus, as stated in the figure, this corresponds to 100 flow units of precursor wastage during the remaining steps (ii), (iii), and (iv) of each ALD cycle. In other words, during the post-dose purge step (ii) (shown by the “Purge gases”trace 220 inFIG. 2 ), during the reaction of adsorbed precursor via activation with RF-generated oxidative plasma in step (iii) (shown by the “Oxidizer/RF”trace 230 inFIG. 2 ), and during the post-RF purge (also shown by the “Purge gases”trace 220 inFIG. 2 ), there is total diversion and wastage of silicon-containing precursor. Thus,FIG. 2 illustrates a baseline operational sequence for comparison with the alternative methodologies described in the context of the figures that follow. To help make these comparisons, the concurrent dosing methodology ofFIG. 2 is said to add zero cycle time, but result in 100 units of precursor flow wastage, as stated in the figure. - For context, it should be noted that the transition between the “dose” traces and the “divert” trace could correspond to the closing of
valve 164 and the opening ofvalve 166 of the POS as shown by the “Divert to Vacuum” label ofFIG. 1 . Likewise, withvalves trace 220 inFIG. 1 may be accomplished by the opening ofvalve trace 230 inFIG. 2 could correspond to the opening ofvalve 169 of the POS while the valve 165 (held open for the purge steps) is closed and 164 and 166 remain in their divert positions. It should also be understood that the foregoing description of valve operation in reference toFIG. 1 also applies to the other timing diagrams disclosed herein with the described opening and closing of valves corresponding to the same “Si precursor,” “Dose,” “Divert,” “Purge gases,” and “Oxidizer/RF” traces, albeit with their timing altered according to the additional operational sequences and methodologies disclosed in these subsequent figures. - As explained above, a multi-station substrate processing apparatus provides a benefit in that substrates at all stations do not necessarily need to be dosed with reactants at the same time. Thus, disclosed herein are methods of performing ALD simultaneously at multiple processing stations on multiple substrates which operate to conserve silicon-containing precursor and/or other reactants, by timing and staggering the execution of the various ALD steps (i) through (iv), so that a common source of reactant flow may be redirected to and from the different processing stations rather than being diverted as wastage to the extent illustrated by the baseline operational sequence of
FIG. 2 . These various methodologies are now presented with reference toFIGS. 3 through 5B . - For instance, schematically illustrated in
FIG. 3 is a timing diagram 300 corresponding to a parallel execution of a sequence of 4 ALD cycles where the flow of silicon-containing precursor form a common source initially doses wafers atprocessing stations 1 and 2, and afterwards is redirected to dose wafers atstations processing stations first dosing phase 351 during which the third and fourth substrates are not substantially dosed, and the third and fourth substrates are dosed during asecond dosing phase 352 during which the first and second substrates are not substantially dosed, and wherein the precursor flows continuously from the common source during the first and second dosing phases. Due to the fact that only two wafers are dosed simultaneously, the flow rate of silicon-containing precursor is approximately half of that used in the methodology ofFIG. 2 which involved the concurrent dosing of 4 wafers. - Thus, as illustrated and stated in
FIG. 3 , although the time spent under “divert” is roughly the same as inFIG. 2 (compare the “Divert” traces 315 and 215), the amount of diverted and wasted precursor flow amounts to 50 flow units instead of 100. However, as also stated and shown inFIG. 2 , there is an increase in ALD cycle time by the amount of time it takes for the second set of dose steps. Nevertheless, the result is that a stable and continuous flow of precursor is provided to the various stations in a time-controlled manner while reducing the amount of wasted precursor by approximately 50%. Of course, though the examples described here are in the context of a silicon-containing precursor, the same techniques and methodologies for diversion and control of reactant flow in order to minimize waste can also be applied to other reactant species in an analogous manner, as will be appreciated by one on skill in the art. Moreover, one having skill in the art will also appreciate that such staggering could also be done for a two processing station embodiment, wherein dosing first and second substrates are staggered into first and second dosing phases. -
FIG. 4 presents a timing diagram 400 which is a variation on the methodology ofFIG. 3 wherein the flow pattern of silicon-containing precursor in the two dosing phases of the dosing step (i) is substantially the same as inFIG. 3 , but wherein some portion of the divert phase 355 (inFIG. 3 ), 455 (inFIG. 4 ) is replaced by an accumulatephase 456. As illustrated by the “Divert”trace 415 and “Accumulate”trace 416 inFIG. 4 , after the dose phases, flow of silicon-containing precursor is initially diverted to a precursor-divert flow path (and wasted), but at some point the precursor-divert flow path is blocked (such as by closingvalve 166 inFIG. 1 ) causing precursor to accumulate in a pre-cursor accumulation volume in fluidic-connection with the precursor flow path upstream of the reaction chamber (and, in the embodiment ofFIG. 1 , upstream of the PVM 160). - The extent to which precursor may be accumulated in some volumetric region of its flow path upstream of the reaction chamber (such as in its flow line or in any other components/devices in line with its flow path upstream of the PVM, for example) depends on several factors such as, for example: the precursor's decomposition temperature; condensation, temperature, and/or pressure restrictions of the components along the precursor's flow path; the feasible flow rates of carrier gas(es) used for vaporization of the precursor; etc.
- One of skill in the art will appreciate that increasing the temperature of the precursor and/or of any accompanying carrier gas will increase the concentration of precursor which may remain in the gas phase without condensing. Accordingly, in some embodiments, there may be a heating element in the flow path of the precursor or in the flow path of the carrier gas or both. For example, the Pre-Heater 124 shown in
FIG. 1 immediately downstream ofManifold A 130 which is the source of the carrier gas, may be used to increase the temperature of the carrier gas, so that when the carrier gas mixes with the precursor it will have an elevated temperature which may raise the concentration at which the precursor begins to condense. In this manner, a greater quantity of precursor may be accumulated rather than diverted in the accumulation phase shown inFIG. 4 . - However, while heating may aid accumulation, there is a point at which an additional increase in temperature will cause degradation of the silicon-containing precursor. Thus, in some embodiments, the maximum temperature is limited by this decomposition temperature. Likewise, the maximum pressure allowed to build up is typically limited to below the pressure point at which condensation begins at a temperature below the aforementioned decomposition temperature. These limitations thus constrain the maximum time for which the precursor and its carrier gas can flow into the “captured” volume without causing condensation related issues. However, it should be understood that these sorts of constraints may be lessened or may not even exist depending on the chemistry of the ALD film being formed. For instance, precursors used for deposition of nitride via ALD may not be subject to such constraints, or at least to a lesser extent.
- Minimizing the amount of time precursor is diverted—by interrupting a divert phase with an accumulation phase—reduces the amount of wasted precursor, however, in some embodiments, it is noted that it may be desirable to reinstate the diversion of precursor in another divert phase prior to initiating the next ALD cycle, so that non-steady state flow conditions—potentially caused by pressure build-up during accumulation—do not disrupt the initial “dose” phases of the next ALD cycle. Switching back to “divert” from “accumulate” is illustrated by divert
trace 415 and accumulatetrace 416 at the far right of the timing diagram inFIG. 4 . Relative toFIG. 3 , the net result of employing an accumulation phase as shown inFIG. 4 is to reduce precursor wastage to below 50 flow units as stated in the figure. Relative to the method ofFIG. 2 , the increase in cycle time is still the time it takes for 1 additional does, as was the case inFIG. 3 . - Another methodology for reducing precursor waste is schematically illustrated by the timing diagram 501 in
FIG. 5A which provides an alternative dosing flow pattern relative to that shown inFIGS. 3 and 4 . In particular,FIG. 5A provides a sequence of dose timings which fully staggers the dosing of the wafers at stations 1 through 4 such that no two wafers are substantially dosed at the same time, by directing flow of precursor from a common source to the wafer at station 1, redirecting the flow tostation 2, then redirecting it tostation 3, and finally, redirecting it tostation 4. - Thus, as shown in the figure, substrate dosing steps (i) of the displayed ALD cycles involve timing the dosing of the first, second, third, and fourth substrates at
processing stations -
- the first substrate is dosed during a
first dosing phase 551 during which the second, third, and fourth substrates are not substantially dosed; - the second substrate is dosed during a
second dosing phase 552 during which the first, third, and fourth substrates are not substantially dosed; - the third substrate is dosed during a
third dosing phase 553 during which the first, second, and fourth substrates are not substantially dosed; and - the fourth substrate is dosed during a
fourth dosing phase 554 during which the first, second, third, and fourth substrates are not substantially dosed.
Precursor may flow continuously from the common source during the first, second, third, and fourth dosing phases, and transitions between the dosing phases may be accomplished by redirecting the continuous flow of precursor to the appropriate processing station based on the dosing phase. Due to the fact that only 1 wafer out of 4 is dosed at a time, precursor flow requirements are reduced to ¼ of the baseline operational sequence presented inFIG. 2 (which involved the concurrent dosing of 4 wafers), or to ½ what was presented inFIGS. 3 and 4 (which involved the concurrent dosing of 2 wafers). As indicted inFIG. 5A , this then reduces the amount of precursor wasted during the divertphase 555 to 25 flow units. In addition, if a portion of the divertphase 555 is replaced with an accumulate phase, the quantity of precursor wasted may be reduced below 25 flow units, as illustrated and stated inFIG. 5A .
- the first substrate is dosed during a
- Staggering the dosing at all 4 stations could result in an increase in cycle time of 3 dose periods per cycle—e.g., if the remaining steps (ii), (iii), and (iv) of the ALD cycle were timed analogously to the manner these steps are executed in
FIGS. 1-4 . This still may be a desirable trade-off if cost of precursor is more critical than absolute wafer throughput. However, as shown inFIG. 5A , if the remaining steps of the ALD cycle (ii), (iii), and (iv) are 4-way staggered as well, then over the course of many sequential ALD cycles, on average there will be very little additional cycle time (essentially only an accrual of additional cycle time during the first and final ALD cycles performed). Specifically, as shown inFIG. 5A , to stagger the ALD cycles and to achieve the aforementioned benefit in cycle time, steps (ii), (iii), and (iv) are advanced in time at each processing station—e.g., relative to their timings in FIGS. 3 and 4—such that the sequence of steps (ii), (iii), and (iv) at each processing station are initiated immediately following conclusion of dose step (i) at that processing station—rather than waiting for the dose steps (i) to conclude at the other processing stations as well. - Thus, for example, as shown in
FIG. 5A , and focusing on the staggering of steps (i) through (iv) exhibited at stations 1 and 2: during thesecond dosing phase 552 atstation 2, thepurge 561 may be underway at station 1, and therefore while the second substrate is dosed in dose step (i) at the second processing station, unadsorbed precursor (and/or reaction by-product) is removed from the volume surrounding the first processing station in ALD step (ii) at the first processing station. Likewise, due to purge 561 at station 1 starting ahead ofpurge 562 atstation 2, purge 561 at station 1 will finish first and Oxidation/RF 571 at station 1 may be started whilepurge 562 is still ongoing atstation 2. Therefore, as shown in the figure, precursor adsorbed on the first substrate may be reacted in ALD step (iii) at the first processing station (e.g., Oxidation/RF 571) while unadsorbed precursor (and/or reaction by-product) is removed in ALD step (ii) from the volume surrounding the second processing station (e.g., post-dose purge 562). To continue the sequence, as shown in the figure, desorbed precursor may be removed in ALD step (iv) from the volume surrounding the first processing station (e.g., in post-RF purge 581) while precursor adsorbed on the second substrate is reacted in ALD step (iii) at the second processing station (e.g., in Oxidizer/RF 572). - Of course, one of ordinary skill in the art will appreciate based on the foregoing disclosure that the aforementioned staggering of ALD steps (i) through (iv) may be implemented in the context of multi-station ALD methodologies and apparatus having 2, or 3, or 4, or 5, or 6, or 7, or 8, etc. processing stations (or having a number of processing stations within a range such as, for example, 2 to 4 processing stations, or 2 to 6 processing stations, or 2 to 8 processing stations, or 4 to 6 processing stations, or 4 to 8 processing stations, or 6 to 8 processing stations).
- However, it should also be noted with respect to this embodiment (as well as with respect to the embodiment illustrated in
FIG. 5B below), that it may be important to avoid mixing of the oxidizer and precursor in gaseous form because, depending on the specific chemistries involved, such mixing may induce a gas-phase CVD-like reaction between oxidant and precursor causing contamination of the reaction chamber and potentially the feed lines and showerhead leading to the chamber. Within a multi-station reaction chamber (such as the 4 station chamber described below), curtains of (inert) gas may be used to separate the processing occurring at each station and thus prevent such undesired mixing within the reaction chamber. Judicious use of the feed lines and valving which supply oxidant and precursor to the reaction chamber may also be used to prevent such mixing upstream of the reaction chamber. However, it should also be understood that for certain chemistries, such mixing may not pose a problem. - Yet another methodology is illustrated by the timing diagram 502 in
FIG. 5B , which is somewhat of a hybrid between the flow pattern ofFIGS. 3-4 and that ofFIG. 5A .FIG. 5B presents a flow pattern where the dosing is staggered into two phases—resulting in a 50% reduction in flow rate versus the baseline of FIG. 2—but instead of initiating dosing of the second pair of processing stations (e.g.,stations 3 and 4) immediately after dosing the first pair (e.g., stations 1 and 2) concludes, flow is diverted and/or accumulated for a certain period of time. This is done so that the timing of the dosing of the second pair of stations (e.g.,stations 3 and 4) may be chosen so as to synchronize the post-dose and post-RF purge steps (ALD steps (ii) and (iv)). As shown in theFIG. 5B , if the timing is chosen properly, the post-RF purge at stations 1 and 2 (581 and 582, respectively) may be made to coincide with the post-dose purge atstations 3 and 4 (563 and 564, respectively), and likewise, on the next cycle, the post-dose purge at stations 1 and 2 (571 and 572, respectively) may be made to coincide with the post-RF purge atstations 3 and 4 (583 and 584, respectively). - As a result of the staggered flow pattern exhibited in
FIG. 5B , it is evident that in some embodiments, desorbed precursor is removed in an ALD step (iv) from the volume(s) surrounding certain processing station(s) while unadsorbed precursor (and/or reaction by-product) is removed in an ALD step (ii) from the volume(s) surrounding other processing station(s), and conversely, desorbed precursor is removed in an ALD step (iv) from the volume(s) surrounding these latter processing station(s) while unadsorbed precursor (and/or reaction by-product) is removed in ALD step (ii) from the volume(s) surrounding the former processing station(s). This may provide operational advantages in terms of the purge functionality, duration, and effectiveness. For example, since in some embodiments (such as that described and illustrated below with respect toFIGS. 6-9 ) 4 processing stations may be present in the same reaction chamber, a concurrent purge may allow for the entire chamber to be swept free of reactants and byproducts, promoting the efficiency of the purge in comparison to only purging selected stations within a processing chamber at any one time. Of course, it should be appreciated that althoughFIG. 5B illustrates this staggered flow pattern in the context of 4 processing stations, it may also be implemented in the context of just 2 processing stations, by matching up the desorbed precursor removal in an ALD step (iv) at a first processing station with the unadsorbed precursor (and/or reaction by-product) removal in an ALD step (ii) at a second processing station. Such a staggering scheme may also be implemented in the context of more than 4 processing stations. - The ALD methodologies and timing sequences described above may be advantageous due to the lower flow rates during the dose phases, as described above. In some embodiments, this may provide:
-
- 1. Better performance of liquid/vapor precursor delivery systems due to lower quantity needed
- 2. Use of otherwise challenging liquid delivery methods and chemistries on a multi-station/batch reactor/processing chamber: e.g., a solid precursor with very low flow rate; e.g., a liquid that can be delivered as a vapor instead of as a direct liquid injection
- Based on the foregoing, it should be appreciated that lower precursor wastage may also be achieved through starting and stopping precursor flow, however for the reasons explained above, modern flow control devices for vapor and liquid precursors do not typically behave well in this operational mode, and the resulting precursor flows usual exhibit significant undesirable transient flow characteristics. In contrast, redirecting a continuous precursor flow to various processing stations (as described herein) may greatly reduce undesirable transient flow characteristics, because while precursor flow to the various processing stations may be sharply controlled, precursor flow in the frame of reference of the flow control devices is steady and constant.
- Apparatuses
- The methods described herein may be performed with respect to any suitable multi-station substrate/wafer processing apparatus. A suitable apparatus may include hardware for accomplishing the process operations and a system controller having machine-readable instructions for controlling process operations in accordance with the present disclosure.
- Thus, in some embodiments, an apparatus suitable for depositing layers of dielectric material on multiple semiconductor substrates may include a plurality of processing stations each having a substrate holder contained within one or more reaction chambers, a gas delivery system (such as that exhibited in
FIG. 1 ) including a valve assembly for directing flow of dielectric film precursor to each of the processing stations and to a precursor-divert flow path (such as operated byvalve 166 inFIG. 1 ), and in some embodiments also a valve-operated vacuum source for removing precursor from the volumes surrounding the processing stations inside the one or more reaction chambers. A controller associated with such an apparatus may therefore include machine-readable instructions for operating the valve assembly and vacuum source. In some embodiments, said instructions may include instructions for operations embodying ALD operations (i) though (iv) as described above, and instructions for repeating ALD operations (i) through (iv) multiple times to form multiple layers of dielectric material on the multiple substrates at the multiple processing stations of the substrate processing apparatus. - The system controller will typically include one or more memory devices and one or more processors configured to execute instructions for controlling process operations so that the apparatus will perform a method in accordance with the present disclosure. For example, in some embodiments, the system controller may operate various gas delivery lines, valves, valve assemblies, manifolds, temperature controllers, plasma controllers, RF power sources/generators, pressure controllers, valve-operated vacuum sources, etc. to adjust process conditions within the substrate processing apparatus. In some embodiments, machine-readable media having stored thereon the machine-readable instructions for controlling process operations in accordance with the present disclosure may be coupled to the system controller or may comprise the system controller.
- For example,
FIG. 6 schematically illustrates an embodiment of a processing station 3600. For simplicity, processing station 3600 is depicted as a standalone processing station having areaction chamber 3672 for maintaining a low-pressure environment. However, it will be appreciated that a plurality of processing stations 3600 may be included in a common low-pressure process tool environment—e.g., within a common reaction chamber. Processing station 3600 includes a processgas delivery line 3674 for providing process gases, such as inert purge gases, precursors such as silicon-containing dielectric film precursors, other reactants, and treatment reactants, for delivery to processing station 3600. In the example shown inFIG. 6 , ashowerhead 3678 is included to distribute process gases within processing station 3600. Substrate/wafer 3686 is located beneathshowerhead 3678, and is shown resting on asubstrate holder 3680 supported by a pedestal 3682. In some embodiments, pedestal 3682 may be configured to rotate about a vertical axis. Additionally or alternatively, pedestal 3682 may be configured to translate horizontally and/or vertically. - In some embodiments,
showerhead 3678 may be a single-plenum, dual-plenum, or multi-plenum showerhead. For example,FIG. 7 schematically shows an embodiment of a dual-plenum showerhead 3700. A first set ofholes 3702 receives gas from a first processgas delivery line 3712 and a second set ofholes 3704 receives gas from a second processgas delivery line 3714. Such physical isolation of process gases may provide an approach to reducing small particle generation from reaction between incompatible process gases in process gas delivery plumbing upstream ofshowerhead 3700. Any suitable segregation scheme may be employed. For example, in one scenario, holes 3702 may be dedicated to a silicon dioxide film deposition process whileholes 3704 may be dedicated to a silicon nitride film deposition process. In another scenario, holes 3704 may be dedicated to oxidizing reactants whileholes 3704 may be dedicated to reducing reactants. While the example shown inFIG. 6 is a dual-plenum showerhead, it will be appreciated that, in some embodiments, a showerhead may be a multi-plenum showerhead having three or more sets of holes. -
Showerhead 3678 andholder 3680 electrically communicate withRF power source 3688 andmatching network 3690 for powering a plasma 3692 (such as an oxidative plasma) withinreaction chamber 3672.Plasma 3692 may be contained by aplasma sheath 3694 located adjacent to showerhead 3678 andholder 3680. WhileFIG. 6 depicts a capacitively-coupled plasma,plasma 3692 may be generated by any suitable plasma source. In one non-limiting example,plasma 3692 may include a parallel plate plasma source. Furthermore, whileRF power source 3688 andmatching network 3690 may be used to generate a plasma within the reaction chamber which contains the one or more substrate processing stations, in other embodiments, said oxidative plasma may be generated remotely from, and thereafter introduced into, said reaction chamber. For instance,FIG. 1 schematically illustrates aremote plasma source 195 regulated byvalve 116. - In the embodiment shown in
FIG. 6 , RF power source andgenerator 3688 may provide RF power of any suitable frequency. In some embodiments, RF power source andgenerator 3688 may be configured to independently generate and control high- and low-frequency RF power. Examples of low-frequency RF power produced by an RF power source and generator may include, but are not limited to, frequencies between 200 kHz and 2000 kHz. Example high-frequency RF power may include, but are not limited to, frequencies between 13.56 MHz and 80 MHz. Likewise, RF power source andgenerator 3688 andmatching network 3690 may be operated at any suitable power to formplasma 3692. Examples of suitable powers include, but are not limited to, powers between 250 W and 5000 W for a high-frequency plasma and powers between 0 W and 2500 W for a low-frequency plasma for a four-processing station multi-substrate processing tool including four 15-inch showerheads. RF power source andgenerator 3688 may be operated at any suitable duty cycle. Examples of suitable duty cycles include, but are not limited to, duty cycles of between 5% and 90%. - Returning to
FIG. 6 , in some embodiments,holder 3680 may be temperature controlled viaheater 3684. Further, in some embodiments, pressure control for processing station 3600 may be provided by a valve-operated vacuum source such asbutterfly valve 3696 which, as shown inFIG. 6 , throttles a vacuum provided by a vacuum pump (not shown) fluidly coupled to processingstation exhaust line 3698. However, in some embodiments, pressure control of processing station 3600 may also be adjusted by varying a flow rate of one or more gases introduced to processing station 3600. It will be appreciated that control of one or more process parameters may be provided locally (e.g., RF power may be controlled by a plasma controller communicating withRF power supply 3688, processing station pressure may be controlled by a valve controller communicating withbutterfly valve 3696 or with gas metering valves or flow controllers coupled with processgas delivery line 3674, etc.) or under partial or total control provided by a system controller (described above and below) communicating with processing station 3600 without departing from the scope of the present disclosure. - In some embodiments of a multi-station substrate processing apparatus, control and/or supply of various process inputs (e.g., process gases, plasma power, gases for plasma generation, reactants, film precursors, heater power, etc.) may be distributed from shared sources to the plurality of processing stations within the multi-station apparatus. For example, in some embodiments, a shared source of RF power may supply RF power for plasma generation within two or more processing stations. In another example, a shared gas distribution manifold may supply process gases to two or more processing stations. Some non-limiting example embodiments of multi-station processing tools are described below.
-
FIG. 8 schematically shows an examplesubstrate processing apparatus 3840, which includes a plurality ofprocessing stations 3842 in a common low-pressure reaction chamber. By maintaining each station in a low-pressure environment, defects caused by vacuum breaks between film deposition processes may be avoided. In the example shown inFIG. 8 , eachprocessing station 3842 is configured to deposit a film stack comprising multiple layers of TEOS (tetraethyl orthosilicate, Si(OC2H5)4)-based silicon dioxide film and silane (SiH4)-based silicon nitride film. In certain such embodiments, such a film stack may comprise alternating layers of silicon dioxide film and silicon nitride film, one deposited atop the other. In the embodiment depicted inFIG. 8 , process gases for eachprocessing station 3842 are supplied by acommon mixing vessel 3844 for blending and/or conditioning process gases prior to delivery. In some embodiments, mixingvessel 3844 may be temperature controlled. Process gases, including film precursors (such as silicon-containing film precursor) and possibly other reactants in a carrier gas, as well as gases for plasma support, may be supplied from a plurality of process gas delivery lines, valves, and manifolds. For example,FIG. 8 depicts a manifold A including silane and nitrogen (as the carrier gas) fluidly communicating with asilane delivery line 3845; a manifold B including ammonia and nitrogen (again, serving as a carrier gas) fluidly communicating with anammonia delivery line 3847; and a manifold C including oxygen gas (O2) and/or nitrous oxide (N2O), helium, and/or argon (the latter two as carrier gases) fluidly communicating with aTEOS delivery line 3848. Note that other carrier gas configurations are feasible as well, such as, in one non-limiting example, helium and/or argon are provided to each of manifolds A, B, and C. In the example shown inFIG. 8 , TEOS is introduced intoTEOS delivery line 3848 fluidly communicating with manifold C at mixingpoint 3846. In some embodiments, liquid TEOS may be vaporized byoptional vaporizer 3849 upstream ofmixing point 3846. It should be appreciated that other suitable arrangements and chemistries (as described above) are included within the scope of the present disclosure, and that various ALD-based film deposition chemistries and multi-substrate apparatuses and arrangements may benefit from the process timing sequences disclosed herein. - Deposition of each film type may occur by a process that may include one or more of the above-described phases suitably modified for in-situ deposition of TEOS-based silicon dioxide films and silane-based silicon nitride films. Because each
processing station 3842 is configured to provide each film type, additional purge and/or evacuation steps may be included within one or both processes to separate incompatible process gases. For example, in one scenario, residual oxygen adsorbed to plumbing surfaces may react with subsequently introduced silane to form fine silicon dioxide particulates. In another scenario, residual TEOS may react with subsequently introduced ammonia to form silicon oxynitride particulates. These particulates may be entrained during a gas flow event and may be distributed on the substrate surface as particle defects. As described above, one approach to addressing generation of such particles is by using one or more purge and/or evacuation cycles to displace incompatible process gases from surfaces and/or spaces shared by the process gases during transitions between deposition phases. In some embodiments, such a prior reactant/precursor elimination step may be accelerated by pumping the processing chamber to a base pressure-such as specifically described in detail above with respect to the reference pump-to-base (PTB) process. However, in other embodiments, a continuous plasma on (CPO) process, such as that described in detail above, may be employed as an alternative to a PTB-type process. - In some embodiments, separate mixing vessels may be employed, separating incompatible reactants and precursors and potentially reducing PTB, purge, and CPO times. For example,
FIG. 9 schematically shows an examplesubstrate processing apparatus 3990, which includes a plurality ofprocessing stations 3992 in a common low-pressure reaction chamber similar to that schematically illustrated inFIG. 8 . - In this example,
processing stations 3992 are configured to deposit a film stack comprising multiple layers of TEOS-based silicon dioxide films and silane-based silicon nitride films. In certain such embodiments, such a film stack may comprise alternating layers of silicon dioxide film and silicon nitride film, one deposited atop the other. Process gases may be supplied to theprocessing stations 3992 from a plurality of process gas manifolds, each of which may include any suitable process gas. For example,FIG. 9 depicts a manifold A including silane and nitrogen (as a carrier gas) fluidly communicating withprocessing stations 3992; a manifold B including ammonia and nitrogen (as a carrier gas) fluidly communicating withprocessing stations 3992; and a manifold C including oxygen gas (O2) and/or nitrous oxide (N2O), helium, and argon fluidly communicating withprocessing stations 3992. However, it will be appreciated that other suitable arrangements are included within the scope of the present disclosure. In one non-limiting example, helium and/or argon are provided to each of manifolds A, B, and C. Oxide film reactants, shown inFIG. 9 as TEOS and oxygen, are delivered to eachprocessing station 3992 via an oxidesystem mixing vessel 3994. In the example shown inFIG. 9 , liquid TEOS may be vaporized byoptional vaporizer 3999 and mixed with oxygen gas (O2) and/or nitrous oxide (N2O) supplied from manifold C at mixingpoint 3991. Nitride film reactants, shown inFIG. 9 as silane and ammonia, are supplied via manifolds A and B, respectively, to eachprocessing station 3992 vianitride system mixers 3995. In some embodiments,nitride system mixers 3995 may include dynamic or static mixing elements. In one non-limiting example,nitride system mixers 3995 may be static gas mixers including static, helically-shaped baffles. Additionally or alternatively, in some embodiments,nitride system mixers 3995 may include one or more heated mixing vessels. WhileFIG. 9 shows thatprocess tool 3990 comprises twonitride system mixers 3995 for mixing nitride film reactants, it will be appreciated that any suitable number ofnitride system mixers 3995 may be employed within the scope of the present disclosure. In some examples, three or more nitride system mixers may be used; in some other examples, a singlenitride system mixer 3995 may be used, or thenitride system mixer 3995 may be omitted. In some embodiments, one or morenitride system mixers 3995 may include a mixing vessel. For example, in one scenario, one or more mixing vessels having no baffles may be substituted for one or morenitride system mixers 3995. In some embodiments, inert gases, such as argon, helium, and nitrogen, may be supplied to one or more processing stations, providing purging, process gas dilution, and pressure control capability, as well as serving as a medium for plasma generation within the processing chamber. In some embodiments, argon is supplied throughinert mixer 3996 to the processing chamber for use in generating an argon-based plasma. In certain such embodiments, the argon-based plasma may be used to accelerate elimination of contaminating species from the processing chamber, such as film precursors leftover from a previous film deposition step. In the example shown inFIG. 9 , argon is provided to eachprocessing station 3992 via twoinert mixers 3996. However, it will be appreciated that, in some embodiments, any suitable number ofinert mixers 3996 may be employed, or in the alternative, thatinert mixers 3996 may be omitted. In some embodiments, as illustrated inFIG. 9 , a plurality ofvalves 3998 for eachprocessing station 3992 isolate upstream portions of the oxide film gas delivery plumbing from the nitride film gas delivery plumbing from one another and from aprocessing station feed 3997. This may prevent reactions between incompatible reactants. In some embodiments, the arrangement ofvalves 3998 may comparatively reduce a volume ofprocessing station feed 3997, further reducing potential reactions between incompatible reactants. WhileFIG. 9 depicts threevalves 3998 and a singleprocessing station feed 3997 serving eachprocessing station 3992, it will be appreciated that any suitable number ofvalves 3998 and processing station feeds 3997 may be employed. For example, in some embodiments, each process gas may have a separateprocessing station feed 3997 serving eachprocessing station 3992. - Finally, it should be noted that while
FIGS. 7 and 8 depict multi-station substrate processing apparatuses having 4 processing stations within a single reaction chamber, other configurations may have a greater or lesser number of processing stations within a single reaction chamber. Thus, for example, in some embodiments, a multi-station substrate processing apparatus may have 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, or 16, or more processing stations per reaction chamber; or a number of processing stations per reaction chamber within a range defined by any pair of the foregoing numbers of processing stations per reaction chamber: e.g., 2 to 6 processing stations per reaction chamber, 4 to 8 processing stations per reaction chamber, 8 to 16 processing stations per reaction chamber, etc. - However, in other embodiments, a multi-station substrate processing apparatus may have just a single processing station per reaction chamber—e.g., as in
FIG. 6 above—and the staggering of precursor dosing may be accomplished by redirecting precursor between multiple processing stations each of which is located within a different reaction chamber. It should therefore be noted that the embodiments above (methods and apparatuses) have been described in terms of “processing stations”—the location where an individual substrate is dosed with precursor—in order to encompass the possibilities that multiple processing stations may be located within the same or different reaction chambers. Thus, for example, while the disclosed methods may be performed with respect to a single reaction chamber having 2, or 4, or 6, etc. processing stations, they may also be performed with respect to 2, or 4, or 6, etc. reaction chambers each having a single processing station. (For instance, in some embodiments, a first processing station may be located within a first reaction chamber, and a second processing station may be located within a second reaction chamber.) Of course, a combination of these two cases is also possible—e.g., precursor redirect operations may be performed with respect to 4 processing stations where 2 processing stations are contained within each of 2 reaction chambers. - Photolithography
- The apparatus/process described herein above may be used in conjunction with lithographic patterning tools or processes, for example, for the fabrication or manufacture of semiconductor devices, displays, LEDs, photovoltaic panels and the like. Typically, though not necessarily, such tools/processes will be used or conducted together in a common fabrication facility. Lithographic patterning of a film typically includes some or all of the following operations, each operation enabled with a number of possible tools: (1) application of photoresist on a workpiece, i.e., substrate, using a spin-on or spray-on tool; (2) curing of photoresist using a hot plate or furnace or UV curing tool; (3) exposing the photoresist to visible or UV or x-ray light with a tool such as a wafer stepper; (4) developing the resist so as to selectively remove resist and thereby pattern it using a tool such as a wet bench; (5) transferring the resist pattern into an underlying film or workpiece by using a dry or plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.
- Although the foregoing disclosed processes, methods, systems, apparatuses, and compositions have been described in detail within the context of specific embodiments for the purpose of promoting clarity and understanding, it will be apparent to one of ordinary skill in the art that there are many alternative ways of implementing these processes, methods, systems, apparatuses, and compositions which are within the spirit of this disclosure. Accordingly, the embodiments described herein are to be viewed as illustrative of the disclosed inventive concepts rather than restrictively, and are not to be used as an impermissible basis for unduly limiting the scope of any claims eventually directed to the subject matter of this disclosure.
Claims (26)
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/133,246 US8940646B1 (en) | 2013-07-12 | 2013-12-18 | Sequential precursor dosing in an ALD multi-station/batch reactor |
TW103124005A TWI614363B (en) | 2013-07-12 | 2014-07-11 | Sequential precursor dosing in an ald multi-station/batch reactor |
KR1020140088693A KR102296320B1 (en) | 2013-07-12 | 2014-07-14 | Sequential precursor dosing in an ald multi-station/batch reactor |
US14/571,191 US9236244B2 (en) | 2013-07-12 | 2014-12-15 | Sequential precursor dosing in an ALD multi-station/batch reactor |
KR1020210112559A KR102409456B1 (en) | 2013-07-12 | 2021-08-25 | Sequential precursor dosing in an ald multi-station/batch reactor |
KR1020220070920A KR102498418B1 (en) | 2013-07-12 | 2022-06-10 | Sequential precursor dosing in an ald multi-station/batch reactor |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201361845911P | 2013-07-12 | 2013-07-12 | |
US14/133,246 US8940646B1 (en) | 2013-07-12 | 2013-12-18 | Sequential precursor dosing in an ALD multi-station/batch reactor |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US14/571,191 Continuation US9236244B2 (en) | 2013-07-12 | 2014-12-15 | Sequential precursor dosing in an ALD multi-station/batch reactor |
Publications (2)
Publication Number | Publication Date |
---|---|
US20150017812A1 true US20150017812A1 (en) | 2015-01-15 |
US8940646B1 US8940646B1 (en) | 2015-01-27 |
Family
ID=52277417
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US14/133,246 Active US8940646B1 (en) | 2013-07-12 | 2013-12-18 | Sequential precursor dosing in an ALD multi-station/batch reactor |
US14/571,191 Active US9236244B2 (en) | 2013-07-12 | 2014-12-15 | Sequential precursor dosing in an ALD multi-station/batch reactor |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US14/571,191 Active US9236244B2 (en) | 2013-07-12 | 2014-12-15 | Sequential precursor dosing in an ALD multi-station/batch reactor |
Country Status (3)
Country | Link |
---|---|
US (2) | US8940646B1 (en) |
KR (3) | KR102296320B1 (en) |
TW (1) | TWI614363B (en) |
Cited By (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20150279681A1 (en) * | 2014-03-31 | 2015-10-01 | Asm Ip Holding B.V. | Plasma atomic layer deposition |
US9508547B1 (en) * | 2015-08-17 | 2016-11-29 | Lam Research Corporation | Composition-matched curtain gas mixtures for edge uniformity modulation in large-volume ALD reactors |
US9617638B2 (en) | 2014-07-30 | 2017-04-11 | Lam Research Corporation | Methods and apparatuses for showerhead backside parasitic plasma suppression in a secondary purge enabled ALD system |
RU172394U1 (en) * | 2017-01-13 | 2017-07-06 | Федеральное государственное автономное образовательное учреждение высшего образования "Национальный исследовательский университет "Московский институт электронной техники" | ATOMIC LAYER DEPOSITION DEVICE |
US9738977B1 (en) | 2016-06-17 | 2017-08-22 | Lam Research Corporation | Showerhead curtain gas method and system for film profile modulation |
US20170314129A1 (en) * | 2016-04-29 | 2017-11-02 | Lam Research Corporation | Variable cycle and time rf activation method for film thickness matching in a multi-station deposition system |
WO2019018227A1 (en) * | 2017-07-19 | 2019-01-24 | Lam Research Corporation | Atomic layer clean for removal of photoresist patterning scum |
WO2020006313A1 (en) * | 2018-06-29 | 2020-01-02 | Lam Research Corporation | Oxidative conversion in atomic layer deposition processes |
US10566213B2 (en) | 2016-12-19 | 2020-02-18 | Lam Research Corporation | Atomic layer etching of tantalum |
US10577691B2 (en) | 2014-05-15 | 2020-03-03 | Lam Research Corporation | Single ALD cycle thickness control in multi-station substrate deposition systems |
US10685836B2 (en) | 2016-04-29 | 2020-06-16 | Lam Research Corporation | Etching substrates using ALE and selective deposition |
US10697059B2 (en) | 2017-09-15 | 2020-06-30 | Lam Research Corporation | Thickness compensation by modulation of number of deposition cycles as a function of chamber accumulation for wafer to wafer film thickness matching |
US10796912B2 (en) | 2017-05-16 | 2020-10-06 | Lam Research Corporation | Eliminating yield impact of stochastics in lithography |
US10832909B2 (en) | 2017-04-24 | 2020-11-10 | Lam Research Corporation | Atomic layer etch, reactive precursors and energetic sources for patterning applications |
US20200399758A1 (en) * | 2017-12-29 | 2020-12-24 | Varian Semiconductor Equipment Associates, Inc. | Techniques for controlling precursors in chemical deposition processes |
US11111581B2 (en) | 2012-06-25 | 2021-09-07 | Lam Research Corporation | Suppression of parasitic deposition in a substrate processing system by suppressing precursor flow and plasma outside of substrate region |
US20220155689A1 (en) * | 2020-11-17 | 2022-05-19 | Applied Materials, Inc. | Photoresist deposition using independent multichannel showerhead |
US11694911B2 (en) * | 2016-12-20 | 2023-07-04 | Lam Research Corporation | Systems and methods for metastable activated radical selective strip and etch using dual plenum showerhead |
US12087573B2 (en) | 2019-07-17 | 2024-09-10 | Lam Research Corporation | Modulation of oxidation profile for substrate processing |
Families Citing this family (360)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10378106B2 (en) | 2008-11-14 | 2019-08-13 | Asm Ip Holding B.V. | Method of forming insulation film by modified PEALD |
US9394608B2 (en) | 2009-04-06 | 2016-07-19 | Asm America, Inc. | Semiconductor processing reactor and components thereof |
US8802201B2 (en) | 2009-08-14 | 2014-08-12 | Asm America, Inc. | Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species |
US9312155B2 (en) | 2011-06-06 | 2016-04-12 | Asm Japan K.K. | High-throughput semiconductor-processing apparatus equipped with multiple dual-chamber modules |
US9793148B2 (en) | 2011-06-22 | 2017-10-17 | Asm Japan K.K. | Method for positioning wafers in multiple wafer transport |
US10364496B2 (en) | 2011-06-27 | 2019-07-30 | Asm Ip Holding B.V. | Dual section module having shared and unshared mass flow controllers |
US10854498B2 (en) | 2011-07-15 | 2020-12-01 | Asm Ip Holding B.V. | Wafer-supporting device and method for producing same |
US20130023129A1 (en) | 2011-07-20 | 2013-01-24 | Asm America, Inc. | Pressure transmitter for a semiconductor processing environment |
US9017481B1 (en) | 2011-10-28 | 2015-04-28 | Asm America, Inc. | Process feed management for semiconductor substrate processing |
US8946830B2 (en) | 2012-04-04 | 2015-02-03 | Asm Ip Holdings B.V. | Metal oxide protective layer for a semiconductor device |
US9558931B2 (en) | 2012-07-27 | 2017-01-31 | Asm Ip Holding B.V. | System and method for gas-phase sulfur passivation of a semiconductor surface |
US9659799B2 (en) | 2012-08-28 | 2017-05-23 | Asm Ip Holding B.V. | Systems and methods for dynamic semiconductor process scheduling |
US9021985B2 (en) | 2012-09-12 | 2015-05-05 | Asm Ip Holdings B.V. | Process gas management for an inductively-coupled plasma deposition reactor |
US9324811B2 (en) | 2012-09-26 | 2016-04-26 | Asm Ip Holding B.V. | Structures and devices including a tensile-stressed silicon arsenic layer and methods of forming same |
US10714315B2 (en) | 2012-10-12 | 2020-07-14 | Asm Ip Holdings B.V. | Semiconductor reaction chamber showerhead |
US9640416B2 (en) | 2012-12-26 | 2017-05-02 | Asm Ip Holding B.V. | Single-and dual-chamber module-attachable wafer-handling chamber |
US20160376700A1 (en) | 2013-02-01 | 2016-12-29 | Asm Ip Holding B.V. | System for treatment of deposition reactor |
US9589770B2 (en) | 2013-03-08 | 2017-03-07 | Asm Ip Holding B.V. | Method and systems for in-situ formation of intermediate reactive species |
US9484191B2 (en) | 2013-03-08 | 2016-11-01 | Asm Ip Holding B.V. | Pulsed remote plasma method and system |
US8993054B2 (en) | 2013-07-12 | 2015-03-31 | Asm Ip Holding B.V. | Method and system to reduce outgassing in a reaction chamber |
US8940646B1 (en) * | 2013-07-12 | 2015-01-27 | Lam Research Corporation | Sequential precursor dosing in an ALD multi-station/batch reactor |
US9018111B2 (en) | 2013-07-22 | 2015-04-28 | Asm Ip Holding B.V. | Semiconductor reaction chamber with plasma capabilities |
US9793115B2 (en) | 2013-08-14 | 2017-10-17 | Asm Ip Holding B.V. | Structures and devices including germanium-tin films and methods of forming same |
US9240412B2 (en) | 2013-09-27 | 2016-01-19 | Asm Ip Holding B.V. | Semiconductor structure and device and methods of forming same using selective epitaxial process |
US9556516B2 (en) | 2013-10-09 | 2017-01-31 | ASM IP Holding B.V | Method for forming Ti-containing film by PEALD using TDMAT or TDEAT |
US10179947B2 (en) | 2013-11-26 | 2019-01-15 | Asm Ip Holding B.V. | Method for forming conformal nitrided, oxidized, or carbonized dielectric film by atomic layer deposition |
US10683571B2 (en) | 2014-02-25 | 2020-06-16 | Asm Ip Holding B.V. | Gas supply manifold and method of supplying gases to chamber using same |
US10167557B2 (en) | 2014-03-18 | 2019-01-01 | Asm Ip Holding B.V. | Gas distribution system, reactor including the system, and methods of using the same |
US9447498B2 (en) * | 2014-03-18 | 2016-09-20 | Asm Ip Holding B.V. | Method for performing uniform processing in gas system-sharing multiple reaction chambers |
US11015245B2 (en) | 2014-03-19 | 2021-05-25 | Asm Ip Holding B.V. | Gas-phase reactor and system having exhaust plenum and components thereof |
US9404587B2 (en) | 2014-04-24 | 2016-08-02 | ASM IP Holding B.V | Lockout tagout for semiconductor vacuum valve |
US10858737B2 (en) | 2014-07-28 | 2020-12-08 | Asm Ip Holding B.V. | Showerhead assembly and components thereof |
US9543180B2 (en) | 2014-08-01 | 2017-01-10 | Asm Ip Holding B.V. | Apparatus and method for transporting wafers between wafer carrier and process tool under vacuum |
US9890456B2 (en) | 2014-08-21 | 2018-02-13 | Asm Ip Holding B.V. | Method and system for in situ formation of gas-phase compounds |
US10941490B2 (en) | 2014-10-07 | 2021-03-09 | Asm Ip Holding B.V. | Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same |
US9657845B2 (en) | 2014-10-07 | 2017-05-23 | Asm Ip Holding B.V. | Variable conductance gas distribution apparatus and method |
KR102300403B1 (en) | 2014-11-19 | 2021-09-09 | 에이에스엠 아이피 홀딩 비.브이. | Method of depositing thin film |
KR102263121B1 (en) | 2014-12-22 | 2021-06-09 | 에이에스엠 아이피 홀딩 비.브이. | Semiconductor device and manufacuring method thereof |
US9478415B2 (en) | 2015-02-13 | 2016-10-25 | Asm Ip Holding B.V. | Method for forming film having low resistance and shallow junction depth |
US10529542B2 (en) | 2015-03-11 | 2020-01-07 | Asm Ip Holdings B.V. | Cross-flow reactor and method |
US10276355B2 (en) | 2015-03-12 | 2019-04-30 | Asm Ip Holding B.V. | Multi-zone reactor, system including the reactor, and method of using the same |
US10253412B2 (en) | 2015-05-22 | 2019-04-09 | Lam Research Corporation | Deposition apparatus including edge plenum showerhead assembly |
US10458018B2 (en) | 2015-06-26 | 2019-10-29 | Asm Ip Holding B.V. | Structures including metal carbide material, devices including the structures, and methods of forming same |
US10600673B2 (en) | 2015-07-07 | 2020-03-24 | Asm Ip Holding B.V. | Magnetic susceptor to baseplate seal |
US10043661B2 (en) | 2015-07-13 | 2018-08-07 | Asm Ip Holding B.V. | Method for protecting layer by forming hydrocarbon-based extremely thin film |
US9899291B2 (en) | 2015-07-13 | 2018-02-20 | Asm Ip Holding B.V. | Method for protecting layer by forming hydrocarbon-based extremely thin film |
US10083836B2 (en) | 2015-07-24 | 2018-09-25 | Asm Ip Holding B.V. | Formation of boron-doped titanium metal films with high work function |
US11421321B2 (en) | 2015-07-28 | 2022-08-23 | Asm Ip Holding B.V. | Apparatuses for thin film deposition |
US10204790B2 (en) | 2015-07-28 | 2019-02-12 | Asm Ip Holding B.V. | Methods for thin film deposition |
US10087525B2 (en) | 2015-08-04 | 2018-10-02 | Asm Ip Holding B.V. | Variable gap hard stop design |
US9647114B2 (en) | 2015-08-14 | 2017-05-09 | Asm Ip Holding B.V. | Methods of forming highly p-type doped germanium tin films and structures and devices including the films |
US9711345B2 (en) | 2015-08-25 | 2017-07-18 | Asm Ip Holding B.V. | Method for forming aluminum nitride-based film by PEALD |
US9960072B2 (en) | 2015-09-29 | 2018-05-01 | Asm Ip Holding B.V. | Variable adjustment for precise matching of multiple chamber cavity housings |
US9909214B2 (en) | 2015-10-15 | 2018-03-06 | Asm Ip Holding B.V. | Method for depositing dielectric film in trenches by PEALD |
US10211308B2 (en) | 2015-10-21 | 2019-02-19 | Asm Ip Holding B.V. | NbMC layers |
US10322384B2 (en) | 2015-11-09 | 2019-06-18 | Asm Ip Holding B.V. | Counter flow mixer for process chamber |
US9455138B1 (en) | 2015-11-10 | 2016-09-27 | Asm Ip Holding B.V. | Method for forming dielectric film in trenches by PEALD using H-containing gas |
US9905420B2 (en) | 2015-12-01 | 2018-02-27 | Asm Ip Holding B.V. | Methods of forming silicon germanium tin films and structures and devices including the films |
US9607837B1 (en) | 2015-12-21 | 2017-03-28 | Asm Ip Holding B.V. | Method for forming silicon oxide cap layer for solid state diffusion process |
US9735024B2 (en) | 2015-12-28 | 2017-08-15 | Asm Ip Holding B.V. | Method of atomic layer etching using functional group-containing fluorocarbon |
US9627221B1 (en) | 2015-12-28 | 2017-04-18 | Asm Ip Holding B.V. | Continuous process incorporating atomic layer etching |
US11139308B2 (en) | 2015-12-29 | 2021-10-05 | Asm Ip Holding B.V. | Atomic layer deposition of III-V compounds to form V-NAND devices |
US10529554B2 (en) | 2016-02-19 | 2020-01-07 | Asm Ip Holding B.V. | Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches |
US10468251B2 (en) | 2016-02-19 | 2019-11-05 | Asm Ip Holding B.V. | Method for forming spacers using silicon nitride film for spacer-defined multiple patterning |
US9754779B1 (en) | 2016-02-19 | 2017-09-05 | Asm Ip Holding B.V. | Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches |
US10501866B2 (en) | 2016-03-09 | 2019-12-10 | Asm Ip Holding B.V. | Gas distribution apparatus for improved film uniformity in an epitaxial system |
US10343920B2 (en) | 2016-03-18 | 2019-07-09 | Asm Ip Holding B.V. | Aligned carbon nanotubes |
US9892913B2 (en) | 2016-03-24 | 2018-02-13 | Asm Ip Holding B.V. | Radial and thickness control via biased multi-port injection settings |
US10190213B2 (en) | 2016-04-21 | 2019-01-29 | Asm Ip Holding B.V. | Deposition of metal borides |
US10865475B2 (en) | 2016-04-21 | 2020-12-15 | Asm Ip Holding B.V. | Deposition of metal borides and silicides |
US10087522B2 (en) | 2016-04-21 | 2018-10-02 | Asm Ip Holding B.V. | Deposition of metal borides |
US10367080B2 (en) | 2016-05-02 | 2019-07-30 | Asm Ip Holding B.V. | Method of forming a germanium oxynitride film |
US10032628B2 (en) | 2016-05-02 | 2018-07-24 | Asm Ip Holding B.V. | Source/drain performance through conformal solid state doping |
KR102592471B1 (en) | 2016-05-17 | 2023-10-20 | 에이에스엠 아이피 홀딩 비.브이. | Method of forming metal interconnection and method of fabricating semiconductor device using the same |
US11453943B2 (en) | 2016-05-25 | 2022-09-27 | Asm Ip Holding B.V. | Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor |
US10388509B2 (en) | 2016-06-28 | 2019-08-20 | Asm Ip Holding B.V. | Formation of epitaxial layers via dislocation filtering |
US10612137B2 (en) | 2016-07-08 | 2020-04-07 | Asm Ip Holdings B.V. | Organic reactants for atomic layer deposition |
US9859151B1 (en) | 2016-07-08 | 2018-01-02 | Asm Ip Holding B.V. | Selective film deposition method to form air gaps |
US9793135B1 (en) | 2016-07-14 | 2017-10-17 | ASM IP Holding B.V | Method of cyclic dry etching using etchant film |
US10714385B2 (en) | 2016-07-19 | 2020-07-14 | Asm Ip Holding B.V. | Selective deposition of tungsten |
KR102354490B1 (en) | 2016-07-27 | 2022-01-21 | 에이에스엠 아이피 홀딩 비.브이. | Method of processing a substrate |
US9887082B1 (en) | 2016-07-28 | 2018-02-06 | Asm Ip Holding B.V. | Method and apparatus for filling a gap |
US9812320B1 (en) | 2016-07-28 | 2017-11-07 | Asm Ip Holding B.V. | Method and apparatus for filling a gap |
US10395919B2 (en) | 2016-07-28 | 2019-08-27 | Asm Ip Holding B.V. | Method and apparatus for filling a gap |
KR102532607B1 (en) | 2016-07-28 | 2023-05-15 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing apparatus and method of operating the same |
US10177025B2 (en) | 2016-07-28 | 2019-01-08 | Asm Ip Holding B.V. | Method and apparatus for filling a gap |
US10090316B2 (en) | 2016-09-01 | 2018-10-02 | Asm Ip Holding B.V. | 3D stacked multilayer semiconductor memory using doped select transistor channel |
US10410943B2 (en) | 2016-10-13 | 2019-09-10 | Asm Ip Holding B.V. | Method for passivating a surface of a semiconductor and related systems |
US10643826B2 (en) | 2016-10-26 | 2020-05-05 | Asm Ip Holdings B.V. | Methods for thermally calibrating reaction chambers |
US11532757B2 (en) | 2016-10-27 | 2022-12-20 | Asm Ip Holding B.V. | Deposition of charge trapping layers |
US10714350B2 (en) | 2016-11-01 | 2020-07-14 | ASM IP Holdings, B.V. | Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures |
US10435790B2 (en) | 2016-11-01 | 2019-10-08 | Asm Ip Holding B.V. | Method of subatmospheric plasma-enhanced ALD using capacitively coupled electrodes with narrow gap |
US10229833B2 (en) | 2016-11-01 | 2019-03-12 | Asm Ip Holding B.V. | Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures |
US10643904B2 (en) | 2016-11-01 | 2020-05-05 | Asm Ip Holdings B.V. | Methods for forming a semiconductor device and related semiconductor device structures |
US10134757B2 (en) | 2016-11-07 | 2018-11-20 | Asm Ip Holding B.V. | Method of processing a substrate and a device manufactured by using the method |
KR102546317B1 (en) | 2016-11-15 | 2023-06-21 | 에이에스엠 아이피 홀딩 비.브이. | Gas supply unit and substrate processing apparatus including the same |
US10340135B2 (en) | 2016-11-28 | 2019-07-02 | Asm Ip Holding B.V. | Method of topologically restricted plasma-enhanced cyclic deposition of silicon or metal nitride |
KR20180068582A (en) | 2016-12-14 | 2018-06-22 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing apparatus |
US9916980B1 (en) | 2016-12-15 | 2018-03-13 | Asm Ip Holding B.V. | Method of forming a structure on a substrate |
US11581186B2 (en) | 2016-12-15 | 2023-02-14 | Asm Ip Holding B.V. | Sequential infiltration synthesis apparatus |
US11447861B2 (en) | 2016-12-15 | 2022-09-20 | Asm Ip Holding B.V. | Sequential infiltration synthesis apparatus and a method of forming a patterned structure |
KR102700194B1 (en) | 2016-12-19 | 2024-08-28 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing apparatus |
US10269558B2 (en) | 2016-12-22 | 2019-04-23 | Asm Ip Holding B.V. | Method of forming a structure on a substrate |
US10867788B2 (en) | 2016-12-28 | 2020-12-15 | Asm Ip Holding B.V. | Method of forming a structure on a substrate |
US11390950B2 (en) | 2017-01-10 | 2022-07-19 | Asm Ip Holding B.V. | Reactor system and method to reduce residue buildup during a film deposition process |
US10655221B2 (en) | 2017-02-09 | 2020-05-19 | Asm Ip Holding B.V. | Method for depositing oxide film by thermal ALD and PEALD |
US10468261B2 (en) | 2017-02-15 | 2019-11-05 | Asm Ip Holding B.V. | Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures |
US9972501B1 (en) | 2017-03-14 | 2018-05-15 | Nano-Master, Inc. | Techniques and systems for continuous-flow plasma enhanced atomic layer deposition (PEALD) |
US10529563B2 (en) | 2017-03-29 | 2020-01-07 | Asm Ip Holdings B.V. | Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures |
US10283353B2 (en) | 2017-03-29 | 2019-05-07 | Asm Ip Holding B.V. | Method of reforming insulating film deposited on substrate with recess pattern |
US10103040B1 (en) | 2017-03-31 | 2018-10-16 | Asm Ip Holding B.V. | Apparatus and method for manufacturing a semiconductor device |
USD830981S1 (en) | 2017-04-07 | 2018-10-16 | Asm Ip Holding B.V. | Susceptor for semiconductor substrate processing apparatus |
KR102457289B1 (en) | 2017-04-25 | 2022-10-21 | 에이에스엠 아이피 홀딩 비.브이. | Method for depositing a thin film and manufacturing a semiconductor device |
US10770286B2 (en) | 2017-05-08 | 2020-09-08 | Asm Ip Holdings B.V. | Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures |
US10892156B2 (en) | 2017-05-08 | 2021-01-12 | Asm Ip Holding B.V. | Methods for forming a silicon nitride film on a substrate and related semiconductor device structures |
US10446393B2 (en) | 2017-05-08 | 2019-10-15 | Asm Ip Holding B.V. | Methods for forming silicon-containing epitaxial layers and related semiconductor device structures |
US10504742B2 (en) | 2017-05-31 | 2019-12-10 | Asm Ip Holding B.V. | Method of atomic layer etching using hydrogen plasma |
US10886123B2 (en) | 2017-06-02 | 2021-01-05 | Asm Ip Holding B.V. | Methods for forming low temperature semiconductor layers and related semiconductor device structures |
US12040200B2 (en) | 2017-06-20 | 2024-07-16 | Asm Ip Holding B.V. | Semiconductor processing apparatus and methods for calibrating a semiconductor processing apparatus |
JP6811147B2 (en) * | 2017-06-23 | 2021-01-13 | 東京エレクトロン株式会社 | How to inspect the gas supply system |
US11306395B2 (en) | 2017-06-28 | 2022-04-19 | Asm Ip Holding B.V. | Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus |
US10685834B2 (en) | 2017-07-05 | 2020-06-16 | Asm Ip Holdings B.V. | Methods for forming a silicon germanium tin layer and related semiconductor device structures |
KR20190009245A (en) | 2017-07-18 | 2019-01-28 | 에이에스엠 아이피 홀딩 비.브이. | Methods for forming a semiconductor device structure and related semiconductor device structures |
US11018002B2 (en) | 2017-07-19 | 2021-05-25 | Asm Ip Holding B.V. | Method for selectively depositing a Group IV semiconductor and related semiconductor device structures |
US11374112B2 (en) | 2017-07-19 | 2022-06-28 | Asm Ip Holding B.V. | Method for depositing a group IV semiconductor and related semiconductor device structures |
US10541333B2 (en) | 2017-07-19 | 2020-01-21 | Asm Ip Holding B.V. | Method for depositing a group IV semiconductor and related semiconductor device structures |
US10312055B2 (en) | 2017-07-26 | 2019-06-04 | Asm Ip Holding B.V. | Method of depositing film by PEALD using negative bias |
US10590535B2 (en) | 2017-07-26 | 2020-03-17 | Asm Ip Holdings B.V. | Chemical treatment, deposition and/or infiltration apparatus and method for using the same |
US10605530B2 (en) | 2017-07-26 | 2020-03-31 | Asm Ip Holding B.V. | Assembly of a liner and a flange for a vertical furnace as well as the liner and the vertical furnace |
US10770336B2 (en) | 2017-08-08 | 2020-09-08 | Asm Ip Holding B.V. | Substrate lift mechanism and reactor including same |
US10692741B2 (en) | 2017-08-08 | 2020-06-23 | Asm Ip Holdings B.V. | Radiation shield |
US10249524B2 (en) | 2017-08-09 | 2019-04-02 | Asm Ip Holding B.V. | Cassette holder assembly for a substrate cassette and holding member for use in such assembly |
US11769682B2 (en) | 2017-08-09 | 2023-09-26 | Asm Ip Holding B.V. | Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith |
US11139191B2 (en) | 2017-08-09 | 2021-10-05 | Asm Ip Holding B.V. | Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith |
US10236177B1 (en) | 2017-08-22 | 2019-03-19 | ASM IP Holding B.V.. | Methods for depositing a doped germanium tin semiconductor and related semiconductor device structures |
USD900036S1 (en) | 2017-08-24 | 2020-10-27 | Asm Ip Holding B.V. | Heater electrical connector and adapter |
US11830730B2 (en) | 2017-08-29 | 2023-11-28 | Asm Ip Holding B.V. | Layer forming method and apparatus |
US11056344B2 (en) | 2017-08-30 | 2021-07-06 | Asm Ip Holding B.V. | Layer forming method |
KR102491945B1 (en) | 2017-08-30 | 2023-01-26 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing apparatus |
US11295980B2 (en) | 2017-08-30 | 2022-04-05 | Asm Ip Holding B.V. | Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures |
KR102401446B1 (en) | 2017-08-31 | 2022-05-24 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing apparatus |
US10147597B1 (en) | 2017-09-14 | 2018-12-04 | Lam Research Corporation | Turbulent flow spiral multi-zone precursor vaporizer |
US10607895B2 (en) | 2017-09-18 | 2020-03-31 | Asm Ip Holdings B.V. | Method for forming a semiconductor device structure comprising a gate fill metal |
KR102630301B1 (en) | 2017-09-21 | 2024-01-29 | 에이에스엠 아이피 홀딩 비.브이. | Method of sequential infiltration synthesis treatment of infiltrateable material and structures and devices formed using same |
US10844484B2 (en) | 2017-09-22 | 2020-11-24 | Asm Ip Holding B.V. | Apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods |
US10658205B2 (en) | 2017-09-28 | 2020-05-19 | Asm Ip Holdings B.V. | Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber |
US10403504B2 (en) | 2017-10-05 | 2019-09-03 | Asm Ip Holding B.V. | Method for selectively depositing a metallic film on a substrate |
US10319588B2 (en) | 2017-10-10 | 2019-06-11 | Asm Ip Holding B.V. | Method for depositing a metal chalcogenide on a substrate by cyclical deposition |
US10923344B2 (en) | 2017-10-30 | 2021-02-16 | Asm Ip Holding B.V. | Methods for forming a semiconductor structure and related semiconductor structures |
KR102443047B1 (en) | 2017-11-16 | 2022-09-14 | 에이에스엠 아이피 홀딩 비.브이. | Method of processing a substrate and a device manufactured by the same |
US10910262B2 (en) | 2017-11-16 | 2021-02-02 | Asm Ip Holding B.V. | Method of selectively depositing a capping layer structure on a semiconductor device structure |
US11022879B2 (en) | 2017-11-24 | 2021-06-01 | Asm Ip Holding B.V. | Method of forming an enhanced unexposed photoresist layer |
WO2019103610A1 (en) | 2017-11-27 | 2019-05-31 | Asm Ip Holding B.V. | Apparatus including a clean mini environment |
JP7214724B2 (en) | 2017-11-27 | 2023-01-30 | エーエスエム アイピー ホールディング ビー.ブイ. | Storage device for storing wafer cassettes used in batch furnaces |
US10290508B1 (en) | 2017-12-05 | 2019-05-14 | Asm Ip Holding B.V. | Method for forming vertical spacers for spacer-defined patterning |
US10872771B2 (en) | 2018-01-16 | 2020-12-22 | Asm Ip Holding B. V. | Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures |
TWI799494B (en) | 2018-01-19 | 2023-04-21 | 荷蘭商Asm 智慧財產控股公司 | Deposition method |
CN111630203A (en) | 2018-01-19 | 2020-09-04 | Asm Ip私人控股有限公司 | Method for depositing gap filling layer by plasma auxiliary deposition |
USD903477S1 (en) | 2018-01-24 | 2020-12-01 | Asm Ip Holdings B.V. | Metal clamp |
US11018047B2 (en) | 2018-01-25 | 2021-05-25 | Asm Ip Holding B.V. | Hybrid lift pin |
USD880437S1 (en) | 2018-02-01 | 2020-04-07 | Asm Ip Holding B.V. | Gas supply plate for semiconductor manufacturing apparatus |
US10535516B2 (en) | 2018-02-01 | 2020-01-14 | Asm Ip Holdings B.V. | Method for depositing a semiconductor structure on a surface of a substrate and related semiconductor structures |
JP6839672B2 (en) * | 2018-02-06 | 2021-03-10 | 株式会社Kokusai Electric | Semiconductor device manufacturing methods, substrate processing devices and programs |
US11081345B2 (en) | 2018-02-06 | 2021-08-03 | Asm Ip Holding B.V. | Method of post-deposition treatment for silicon oxide film |
US10896820B2 (en) | 2018-02-14 | 2021-01-19 | Asm Ip Holding B.V. | Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process |
JP7124098B2 (en) | 2018-02-14 | 2022-08-23 | エーエスエム・アイピー・ホールディング・ベー・フェー | Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process |
US10731249B2 (en) | 2018-02-15 | 2020-08-04 | Asm Ip Holding B.V. | Method of forming a transition metal containing film on a substrate by a cyclical deposition process, a method for supplying a transition metal halide compound to a reaction chamber, and related vapor deposition apparatus |
KR102636427B1 (en) | 2018-02-20 | 2024-02-13 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing method and apparatus |
US10658181B2 (en) | 2018-02-20 | 2020-05-19 | Asm Ip Holding B.V. | Method of spacer-defined direct patterning in semiconductor fabrication |
US10975470B2 (en) | 2018-02-23 | 2021-04-13 | Asm Ip Holding B.V. | Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment |
US11473195B2 (en) | 2018-03-01 | 2022-10-18 | Asm Ip Holding B.V. | Semiconductor processing apparatus and a method for processing a substrate |
US11629406B2 (en) | 2018-03-09 | 2023-04-18 | Asm Ip Holding B.V. | Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate |
US11114283B2 (en) | 2018-03-16 | 2021-09-07 | Asm Ip Holding B.V. | Reactor, system including the reactor, and methods of manufacturing and using same |
KR102646467B1 (en) | 2018-03-27 | 2024-03-11 | 에이에스엠 아이피 홀딩 비.브이. | Method of forming an electrode on a substrate and a semiconductor device structure including an electrode |
US11088002B2 (en) | 2018-03-29 | 2021-08-10 | Asm Ip Holding B.V. | Substrate rack and a substrate processing system and method |
US10510536B2 (en) | 2018-03-29 | 2019-12-17 | Asm Ip Holding B.V. | Method of depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber |
US11230766B2 (en) | 2018-03-29 | 2022-01-25 | Asm Ip Holding B.V. | Substrate processing apparatus and method |
KR102501472B1 (en) | 2018-03-30 | 2023-02-20 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing method |
US12025484B2 (en) | 2018-05-08 | 2024-07-02 | Asm Ip Holding B.V. | Thin film forming method |
TWI843623B (en) | 2018-05-08 | 2024-05-21 | 荷蘭商Asm Ip私人控股有限公司 | Methods for depositing an oxide film on a substrate by a cyclical deposition process and related device structures |
KR20190129718A (en) | 2018-05-11 | 2019-11-20 | 에이에스엠 아이피 홀딩 비.브이. | Methods for forming a doped metal carbide film on a substrate and related semiconductor device structures |
KR102596988B1 (en) | 2018-05-28 | 2023-10-31 | 에이에스엠 아이피 홀딩 비.브이. | Method of processing a substrate and a device manufactured by the same |
US11718913B2 (en) | 2018-06-04 | 2023-08-08 | Asm Ip Holding B.V. | Gas distribution system and reactor system including same |
TWI840362B (en) | 2018-06-04 | 2024-05-01 | 荷蘭商Asm Ip私人控股有限公司 | Wafer handling chamber with moisture reduction |
US11286562B2 (en) | 2018-06-08 | 2022-03-29 | Asm Ip Holding B.V. | Gas-phase chemical reactor and method of using same |
US10797133B2 (en) | 2018-06-21 | 2020-10-06 | Asm Ip Holding B.V. | Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures |
KR102568797B1 (en) | 2018-06-21 | 2023-08-21 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing system |
WO2020003000A1 (en) | 2018-06-27 | 2020-01-02 | Asm Ip Holding B.V. | Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material |
TW202409324A (en) | 2018-06-27 | 2024-03-01 | 荷蘭商Asm Ip私人控股有限公司 | Cyclic deposition processes for forming metal-containing material |
US10612136B2 (en) | 2018-06-29 | 2020-04-07 | ASM IP Holding, B.V. | Temperature-controlled flange and reactor system including same |
KR102686758B1 (en) | 2018-06-29 | 2024-07-18 | 에이에스엠 아이피 홀딩 비.브이. | Method for depositing a thin film and manufacturing a semiconductor device |
US10755922B2 (en) | 2018-07-03 | 2020-08-25 | Asm Ip Holding B.V. | Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition |
US10388513B1 (en) | 2018-07-03 | 2019-08-20 | Asm Ip Holding B.V. | Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition |
US10767789B2 (en) | 2018-07-16 | 2020-09-08 | Asm Ip Holding B.V. | Diaphragm valves, valve components, and methods for forming valve components |
US10483099B1 (en) | 2018-07-26 | 2019-11-19 | Asm Ip Holding B.V. | Method for forming thermally stable organosilicon polymer film |
US11053591B2 (en) | 2018-08-06 | 2021-07-06 | Asm Ip Holding B.V. | Multi-port gas injection system and reactor system including same |
US10883175B2 (en) | 2018-08-09 | 2021-01-05 | Asm Ip Holding B.V. | Vertical furnace for processing substrates and a liner for use therein |
US10829852B2 (en) | 2018-08-16 | 2020-11-10 | Asm Ip Holding B.V. | Gas distribution device for a wafer processing apparatus |
US11430674B2 (en) | 2018-08-22 | 2022-08-30 | Asm Ip Holding B.V. | Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods |
US11024523B2 (en) | 2018-09-11 | 2021-06-01 | Asm Ip Holding B.V. | Substrate processing apparatus and method |
KR102707956B1 (en) | 2018-09-11 | 2024-09-19 | 에이에스엠 아이피 홀딩 비.브이. | Method for deposition of a thin film |
US11049751B2 (en) | 2018-09-14 | 2021-06-29 | Asm Ip Holding B.V. | Cassette supply system to store and handle cassettes and processing apparatus equipped therewith |
TWI844567B (en) | 2018-10-01 | 2024-06-11 | 荷蘭商Asm Ip私人控股有限公司 | Substrate retaining apparatus, system including the apparatus, and method of using same |
US11232963B2 (en) | 2018-10-03 | 2022-01-25 | Asm Ip Holding B.V. | Substrate processing apparatus and method |
KR102592699B1 (en) | 2018-10-08 | 2023-10-23 | 에이에스엠 아이피 홀딩 비.브이. | Substrate support unit and apparatuses for depositing thin film and processing the substrate including the same |
US10847365B2 (en) | 2018-10-11 | 2020-11-24 | Asm Ip Holding B.V. | Method of forming conformal silicon carbide film by cyclic CVD |
US10811256B2 (en) | 2018-10-16 | 2020-10-20 | Asm Ip Holding B.V. | Method for etching a carbon-containing feature |
KR102546322B1 (en) | 2018-10-19 | 2023-06-21 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing apparatus and substrate processing method |
KR102605121B1 (en) | 2018-10-19 | 2023-11-23 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing apparatus and substrate processing method |
USD948463S1 (en) | 2018-10-24 | 2022-04-12 | Asm Ip Holding B.V. | Susceptor for semiconductor substrate supporting apparatus |
US10381219B1 (en) | 2018-10-25 | 2019-08-13 | Asm Ip Holding B.V. | Methods for forming a silicon nitride film |
US11087997B2 (en) | 2018-10-31 | 2021-08-10 | Asm Ip Holding B.V. | Substrate processing apparatus for processing substrates |
KR20200051105A (en) | 2018-11-02 | 2020-05-13 | 에이에스엠 아이피 홀딩 비.브이. | Substrate support unit and substrate processing apparatus including the same |
US11572620B2 (en) | 2018-11-06 | 2023-02-07 | Asm Ip Holding B.V. | Methods for selectively depositing an amorphous silicon film on a substrate |
US11031242B2 (en) | 2018-11-07 | 2021-06-08 | Asm Ip Holding B.V. | Methods for depositing a boron doped silicon germanium film |
US10847366B2 (en) | 2018-11-16 | 2020-11-24 | Asm Ip Holding B.V. | Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process |
US10818758B2 (en) | 2018-11-16 | 2020-10-27 | Asm Ip Holding B.V. | Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures |
US10559458B1 (en) | 2018-11-26 | 2020-02-11 | Asm Ip Holding B.V. | Method of forming oxynitride film |
US12040199B2 (en) | 2018-11-28 | 2024-07-16 | Asm Ip Holding B.V. | Substrate processing apparatus for processing substrates |
US11217444B2 (en) | 2018-11-30 | 2022-01-04 | Asm Ip Holding B.V. | Method for forming an ultraviolet radiation responsive metal oxide-containing film |
KR102636428B1 (en) | 2018-12-04 | 2024-02-13 | 에이에스엠 아이피 홀딩 비.브이. | A method for cleaning a substrate processing apparatus |
US11158513B2 (en) | 2018-12-13 | 2021-10-26 | Asm Ip Holding B.V. | Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures |
JP7504584B2 (en) | 2018-12-14 | 2024-06-24 | エーエスエム・アイピー・ホールディング・ベー・フェー | Method and system for forming device structures using selective deposition of gallium nitride - Patents.com |
TWI819180B (en) | 2019-01-17 | 2023-10-21 | 荷蘭商Asm 智慧財產控股公司 | Methods of forming a transition metal containing film on a substrate by a cyclical deposition process |
KR20200091543A (en) | 2019-01-22 | 2020-07-31 | 에이에스엠 아이피 홀딩 비.브이. | Semiconductor processing device |
CN111524788B (en) | 2019-02-01 | 2023-11-24 | Asm Ip私人控股有限公司 | Method for topologically selective film formation of silicon oxide |
KR20200102357A (en) | 2019-02-20 | 2020-08-31 | 에이에스엠 아이피 홀딩 비.브이. | Apparatus and methods for plug fill deposition in 3-d nand applications |
TWI845607B (en) | 2019-02-20 | 2024-06-21 | 荷蘭商Asm Ip私人控股有限公司 | Cyclical deposition method and apparatus for filling a recess formed within a substrate surface |
JP2020136678A (en) | 2019-02-20 | 2020-08-31 | エーエスエム・アイピー・ホールディング・ベー・フェー | Method for filing concave part formed inside front surface of base material, and device |
KR102626263B1 (en) | 2019-02-20 | 2024-01-16 | 에이에스엠 아이피 홀딩 비.브이. | Cyclical deposition method including treatment step and apparatus for same |
TWI842826B (en) | 2019-02-22 | 2024-05-21 | 荷蘭商Asm Ip私人控股有限公司 | Substrate processing apparatus and method for processing substrate |
KR20200108242A (en) | 2019-03-08 | 2020-09-17 | 에이에스엠 아이피 홀딩 비.브이. | Method for Selective Deposition of Silicon Nitride Layer and Structure Including Selectively-Deposited Silicon Nitride Layer |
KR20200108243A (en) | 2019-03-08 | 2020-09-17 | 에이에스엠 아이피 홀딩 비.브이. | Structure Including SiOC Layer and Method of Forming Same |
US11742198B2 (en) | 2019-03-08 | 2023-08-29 | Asm Ip Holding B.V. | Structure including SiOCN layer and method of forming same |
KR20200116033A (en) | 2019-03-28 | 2020-10-08 | 에이에스엠 아이피 홀딩 비.브이. | Door opener and substrate processing apparatus provided therewith |
KR20200116855A (en) | 2019-04-01 | 2020-10-13 | 에이에스엠 아이피 홀딩 비.브이. | Method of manufacturing semiconductor device |
KR20200123380A (en) | 2019-04-19 | 2020-10-29 | 에이에스엠 아이피 홀딩 비.브이. | Layer forming method and apparatus |
KR20200125453A (en) | 2019-04-24 | 2020-11-04 | 에이에스엠 아이피 홀딩 비.브이. | Gas-phase reactor system and method of using same |
KR20200130121A (en) | 2019-05-07 | 2020-11-18 | 에이에스엠 아이피 홀딩 비.브이. | Chemical source vessel with dip tube |
KR20200130118A (en) | 2019-05-07 | 2020-11-18 | 에이에스엠 아이피 홀딩 비.브이. | Method for Reforming Amorphous Carbon Polymer Film |
KR20200130652A (en) | 2019-05-10 | 2020-11-19 | 에이에스엠 아이피 홀딩 비.브이. | Method of depositing material onto a surface and structure formed according to the method |
JP2020188254A (en) | 2019-05-16 | 2020-11-19 | エーエスエム アイピー ホールディング ビー.ブイ. | Wafer boat handling device, vertical batch furnace, and method |
JP2020188255A (en) | 2019-05-16 | 2020-11-19 | エーエスエム アイピー ホールディング ビー.ブイ. | Wafer boat handling device, vertical batch furnace, and method |
USD975665S1 (en) | 2019-05-17 | 2023-01-17 | Asm Ip Holding B.V. | Susceptor shaft |
USD947913S1 (en) | 2019-05-17 | 2022-04-05 | Asm Ip Holding B.V. | Susceptor shaft |
USD935572S1 (en) | 2019-05-24 | 2021-11-09 | Asm Ip Holding B.V. | Gas channel plate |
USD922229S1 (en) | 2019-06-05 | 2021-06-15 | Asm Ip Holding B.V. | Device for controlling a temperature of a gas supply unit |
KR20200141003A (en) | 2019-06-06 | 2020-12-17 | 에이에스엠 아이피 홀딩 비.브이. | Gas-phase reactor system including a gas detector |
KR20200143254A (en) | 2019-06-11 | 2020-12-23 | 에이에스엠 아이피 홀딩 비.브이. | Method of forming an electronic structure using an reforming gas, system for performing the method, and structure formed using the method |
USD944946S1 (en) | 2019-06-14 | 2022-03-01 | Asm Ip Holding B.V. | Shower plate |
USD931978S1 (en) | 2019-06-27 | 2021-09-28 | Asm Ip Holding B.V. | Showerhead vacuum transport |
KR20210005515A (en) | 2019-07-03 | 2021-01-14 | 에이에스엠 아이피 홀딩 비.브이. | Temperature control assembly for substrate processing apparatus and method of using same |
JP7499079B2 (en) | 2019-07-09 | 2024-06-13 | エーエスエム・アイピー・ホールディング・ベー・フェー | Plasma device using coaxial waveguide and substrate processing method |
CN112216646A (en) | 2019-07-10 | 2021-01-12 | Asm Ip私人控股有限公司 | Substrate supporting assembly and substrate processing device comprising same |
KR20210010307A (en) | 2019-07-16 | 2021-01-27 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing apparatus |
KR20210010820A (en) | 2019-07-17 | 2021-01-28 | 에이에스엠 아이피 홀딩 비.브이. | Methods of forming silicon germanium structures |
KR20210010816A (en) | 2019-07-17 | 2021-01-28 | 에이에스엠 아이피 홀딩 비.브이. | Radical assist ignition plasma system and method |
US11643724B2 (en) | 2019-07-18 | 2023-05-09 | Asm Ip Holding B.V. | Method of forming structures using a neutral beam |
TWI839544B (en) | 2019-07-19 | 2024-04-21 | 荷蘭商Asm Ip私人控股有限公司 | Method of forming topology-controlled amorphous carbon polymer film |
KR20210010817A (en) | 2019-07-19 | 2021-01-28 | 에이에스엠 아이피 홀딩 비.브이. | Method of Forming Topology-Controlled Amorphous Carbon Polymer Film |
CN112309843A (en) | 2019-07-29 | 2021-02-02 | Asm Ip私人控股有限公司 | Selective deposition method for achieving high dopant doping |
CN112309900A (en) | 2019-07-30 | 2021-02-02 | Asm Ip私人控股有限公司 | Substrate processing apparatus |
CN112309899A (en) | 2019-07-30 | 2021-02-02 | Asm Ip私人控股有限公司 | Substrate processing apparatus |
US11587815B2 (en) | 2019-07-31 | 2023-02-21 | Asm Ip Holding B.V. | Vertical batch furnace assembly |
US11587814B2 (en) | 2019-07-31 | 2023-02-21 | Asm Ip Holding B.V. | Vertical batch furnace assembly |
US11227782B2 (en) | 2019-07-31 | 2022-01-18 | Asm Ip Holding B.V. | Vertical batch furnace assembly |
CN118422165A (en) | 2019-08-05 | 2024-08-02 | Asm Ip私人控股有限公司 | Liquid level sensor for chemical source container |
USD965044S1 (en) | 2019-08-19 | 2022-09-27 | Asm Ip Holding B.V. | Susceptor shaft |
USD965524S1 (en) | 2019-08-19 | 2022-10-04 | Asm Ip Holding B.V. | Susceptor support |
JP2021031769A (en) | 2019-08-21 | 2021-03-01 | エーエスエム アイピー ホールディング ビー.ブイ. | Production apparatus of mixed gas of film deposition raw material and film deposition apparatus |
USD949319S1 (en) | 2019-08-22 | 2022-04-19 | Asm Ip Holding B.V. | Exhaust duct |
KR20210024423A (en) | 2019-08-22 | 2021-03-05 | 에이에스엠 아이피 홀딩 비.브이. | Method for forming a structure with a hole |
USD930782S1 (en) | 2019-08-22 | 2021-09-14 | Asm Ip Holding B.V. | Gas distributor |
USD940837S1 (en) | 2019-08-22 | 2022-01-11 | Asm Ip Holding B.V. | Electrode |
USD979506S1 (en) | 2019-08-22 | 2023-02-28 | Asm Ip Holding B.V. | Insulator |
US11286558B2 (en) | 2019-08-23 | 2022-03-29 | Asm Ip Holding B.V. | Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film |
KR20210024420A (en) | 2019-08-23 | 2021-03-05 | 에이에스엠 아이피 홀딩 비.브이. | Method for depositing silicon oxide film having improved quality by peald using bis(diethylamino)silane |
KR20210029090A (en) | 2019-09-04 | 2021-03-15 | 에이에스엠 아이피 홀딩 비.브이. | Methods for selective deposition using a sacrificial capping layer |
KR20210029663A (en) | 2019-09-05 | 2021-03-16 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing apparatus |
US11562901B2 (en) | 2019-09-25 | 2023-01-24 | Asm Ip Holding B.V. | Substrate processing method |
CN112593212B (en) | 2019-10-02 | 2023-12-22 | Asm Ip私人控股有限公司 | Method for forming topologically selective silicon oxide film by cyclic plasma enhanced deposition process |
TWI846953B (en) | 2019-10-08 | 2024-07-01 | 荷蘭商Asm Ip私人控股有限公司 | Substrate processing device |
KR20210042810A (en) | 2019-10-08 | 2021-04-20 | 에이에스엠 아이피 홀딩 비.브이. | Reactor system including a gas distribution assembly for use with activated species and method of using same |
KR20210043460A (en) | 2019-10-10 | 2021-04-21 | 에이에스엠 아이피 홀딩 비.브이. | Method of forming a photoresist underlayer and structure including same |
US12009241B2 (en) | 2019-10-14 | 2024-06-11 | Asm Ip Holding B.V. | Vertical batch furnace assembly with detector to detect cassette |
TWI834919B (en) | 2019-10-16 | 2024-03-11 | 荷蘭商Asm Ip私人控股有限公司 | Method of topology-selective film formation of silicon oxide |
US11637014B2 (en) | 2019-10-17 | 2023-04-25 | Asm Ip Holding B.V. | Methods for selective deposition of doped semiconductor material |
KR20210047808A (en) | 2019-10-21 | 2021-04-30 | 에이에스엠 아이피 홀딩 비.브이. | Apparatus and methods for selectively etching films |
KR20210050453A (en) | 2019-10-25 | 2021-05-07 | 에이에스엠 아이피 홀딩 비.브이. | Methods for filling a gap feature on a substrate surface and related semiconductor structures |
US11646205B2 (en) | 2019-10-29 | 2023-05-09 | Asm Ip Holding B.V. | Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same |
KR20210054983A (en) | 2019-11-05 | 2021-05-14 | 에이에스엠 아이피 홀딩 비.브이. | Structures with doped semiconductor layers and methods and systems for forming same |
US11501968B2 (en) | 2019-11-15 | 2022-11-15 | Asm Ip Holding B.V. | Method for providing a semiconductor device with silicon filled gaps |
KR20210062561A (en) | 2019-11-20 | 2021-05-31 | 에이에스엠 아이피 홀딩 비.브이. | Method of depositing carbon-containing material on a surface of a substrate, structure formed using the method, and system for forming the structure |
KR20210065848A (en) | 2019-11-26 | 2021-06-04 | 에이에스엠 아이피 홀딩 비.브이. | Methods for selectivley forming a target film on a substrate comprising a first dielectric surface and a second metallic surface |
CN112951697A (en) | 2019-11-26 | 2021-06-11 | Asm Ip私人控股有限公司 | Substrate processing apparatus |
CN112885692A (en) | 2019-11-29 | 2021-06-01 | Asm Ip私人控股有限公司 | Substrate processing apparatus |
CN112885693A (en) | 2019-11-29 | 2021-06-01 | Asm Ip私人控股有限公司 | Substrate processing apparatus |
JP7527928B2 (en) | 2019-12-02 | 2024-08-05 | エーエスエム・アイピー・ホールディング・ベー・フェー | Substrate processing apparatus and substrate processing method |
KR20210070898A (en) | 2019-12-04 | 2021-06-15 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing apparatus |
TW202125596A (en) | 2019-12-17 | 2021-07-01 | 荷蘭商Asm Ip私人控股有限公司 | Method of forming vanadium nitride layer and structure including the vanadium nitride layer |
US11527403B2 (en) | 2019-12-19 | 2022-12-13 | Asm Ip Holding B.V. | Methods for filling a gap feature on a substrate surface and related semiconductor structures |
TW202140135A (en) | 2020-01-06 | 2021-11-01 | 荷蘭商Asm Ip私人控股有限公司 | Gas supply assembly and valve plate assembly |
KR20210089079A (en) | 2020-01-06 | 2021-07-15 | 에이에스엠 아이피 홀딩 비.브이. | Channeled lift pin |
US11993847B2 (en) | 2020-01-08 | 2024-05-28 | Asm Ip Holding B.V. | Injector |
US11087959B2 (en) | 2020-01-09 | 2021-08-10 | Nano-Master, Inc. | Techniques for a hybrid design for efficient and economical plasma enhanced atomic layer deposition (PEALD) and plasma enhanced chemical vapor deposition (PECVD) |
KR102675856B1 (en) | 2020-01-20 | 2024-06-17 | 에이에스엠 아이피 홀딩 비.브이. | Method of forming thin film and method of modifying surface of thin film |
TW202130846A (en) | 2020-02-03 | 2021-08-16 | 荷蘭商Asm Ip私人控股有限公司 | Method of forming structures including a vanadium or indium layer |
TW202146882A (en) | 2020-02-04 | 2021-12-16 | 荷蘭商Asm Ip私人控股有限公司 | Method of verifying an article, apparatus for verifying an article, and system for verifying a reaction chamber |
US11776846B2 (en) | 2020-02-07 | 2023-10-03 | Asm Ip Holding B.V. | Methods for depositing gap filling fluids and related systems and devices |
US11640900B2 (en) | 2020-02-12 | 2023-05-02 | Nano-Master, Inc. | Electron cyclotron rotation (ECR)-enhanced hollow cathode plasma source (HCPS) |
US11781243B2 (en) | 2020-02-17 | 2023-10-10 | Asm Ip Holding B.V. | Method for depositing low temperature phosphorous-doped silicon |
TW202203344A (en) | 2020-02-28 | 2022-01-16 | 荷蘭商Asm Ip控股公司 | System dedicated for parts cleaning |
KR20210116240A (en) | 2020-03-11 | 2021-09-27 | 에이에스엠 아이피 홀딩 비.브이. | Substrate handling device with adjustable joints |
KR20210116249A (en) | 2020-03-11 | 2021-09-27 | 에이에스엠 아이피 홀딩 비.브이. | lockout tagout assembly and system and method of using same |
CN113394086A (en) | 2020-03-12 | 2021-09-14 | Asm Ip私人控股有限公司 | Method for producing a layer structure having a target topological profile |
KR20210124042A (en) | 2020-04-02 | 2021-10-14 | 에이에스엠 아이피 홀딩 비.브이. | Thin film forming method |
TW202146689A (en) | 2020-04-03 | 2021-12-16 | 荷蘭商Asm Ip控股公司 | Method for forming barrier layer and method for manufacturing semiconductor device |
TW202145344A (en) | 2020-04-08 | 2021-12-01 | 荷蘭商Asm Ip私人控股有限公司 | Apparatus and methods for selectively etching silcon oxide films |
US11821078B2 (en) | 2020-04-15 | 2023-11-21 | Asm Ip Holding B.V. | Method for forming precoat film and method for forming silicon-containing film |
KR20210128343A (en) | 2020-04-15 | 2021-10-26 | 에이에스엠 아이피 홀딩 비.브이. | Method of forming chromium nitride layer and structure including the chromium nitride layer |
US11996289B2 (en) | 2020-04-16 | 2024-05-28 | Asm Ip Holding B.V. | Methods of forming structures including silicon germanium and silicon layers, devices formed using the methods, and systems for performing the methods |
KR20210132600A (en) | 2020-04-24 | 2021-11-04 | 에이에스엠 아이피 홀딩 비.브이. | Methods and systems for depositing a layer comprising vanadium, nitrogen, and a further element |
JP2021172884A (en) | 2020-04-24 | 2021-11-01 | エーエスエム・アイピー・ホールディング・ベー・フェー | Method of forming vanadium nitride-containing layer and structure comprising vanadium nitride-containing layer |
TW202146831A (en) | 2020-04-24 | 2021-12-16 | 荷蘭商Asm Ip私人控股有限公司 | Vertical batch furnace assembly, and method for cooling vertical batch furnace |
KR20210134226A (en) | 2020-04-29 | 2021-11-09 | 에이에스엠 아이피 홀딩 비.브이. | Solid source precursor vessel |
KR20210134869A (en) | 2020-05-01 | 2021-11-11 | 에이에스엠 아이피 홀딩 비.브이. | Fast FOUP swapping with a FOUP handler |
TW202147543A (en) | 2020-05-04 | 2021-12-16 | 荷蘭商Asm Ip私人控股有限公司 | Semiconductor processing system |
KR20210141379A (en) | 2020-05-13 | 2021-11-23 | 에이에스엠 아이피 홀딩 비.브이. | Laser alignment fixture for a reactor system |
TW202146699A (en) | 2020-05-15 | 2021-12-16 | 荷蘭商Asm Ip私人控股有限公司 | Method of forming a silicon germanium layer, semiconductor structure, semiconductor device, method of forming a deposition layer, and deposition system |
KR20210143653A (en) | 2020-05-19 | 2021-11-29 | 에이에스엠 아이피 홀딩 비.브이. | Substrate processing apparatus |
KR20210145078A (en) | 2020-05-21 | 2021-12-01 | 에이에스엠 아이피 홀딩 비.브이. | Structures including multiple carbon layers and methods of forming and using same |
KR102702526B1 (en) | 2020-05-22 | 2024-09-03 | 에이에스엠 아이피 홀딩 비.브이. | Apparatus for depositing thin films using hydrogen peroxide |
TW202201602A (en) | 2020-05-29 | 2022-01-01 | 荷蘭商Asm Ip私人控股有限公司 | Substrate processing device |
TW202212620A (en) | 2020-06-02 | 2022-04-01 | 荷蘭商Asm Ip私人控股有限公司 | Apparatus for processing substrate, method of forming film, and method of controlling apparatus for processing substrate |
TW202218133A (en) | 2020-06-24 | 2022-05-01 | 荷蘭商Asm Ip私人控股有限公司 | Method for forming a layer provided with silicon |
TW202217953A (en) | 2020-06-30 | 2022-05-01 | 荷蘭商Asm Ip私人控股有限公司 | Substrate processing method |
KR102707957B1 (en) | 2020-07-08 | 2024-09-19 | 에이에스엠 아이피 홀딩 비.브이. | Method for processing a substrate |
TW202219628A (en) | 2020-07-17 | 2022-05-16 | 荷蘭商Asm Ip私人控股有限公司 | Structures and methods for use in photolithography |
TW202204662A (en) | 2020-07-20 | 2022-02-01 | 荷蘭商Asm Ip私人控股有限公司 | Method and system for depositing molybdenum layers |
US12040177B2 (en) | 2020-08-18 | 2024-07-16 | Asm Ip Holding B.V. | Methods for forming a laminate film by cyclical plasma-enhanced deposition processes |
KR20220027026A (en) | 2020-08-26 | 2022-03-07 | 에이에스엠 아이피 홀딩 비.브이. | Method and system for forming metal silicon oxide and metal silicon oxynitride |
TW202229601A (en) | 2020-08-27 | 2022-08-01 | 荷蘭商Asm Ip私人控股有限公司 | Method of forming patterned structures, method of manipulating mechanical property, device structure, and substrate processing system |
USD990534S1 (en) | 2020-09-11 | 2023-06-27 | Asm Ip Holding B.V. | Weighted lift pin |
USD1012873S1 (en) | 2020-09-24 | 2024-01-30 | Asm Ip Holding B.V. | Electrode for semiconductor processing apparatus |
US12009224B2 (en) | 2020-09-29 | 2024-06-11 | Asm Ip Holding B.V. | Apparatus and method for etching metal nitrides |
KR20220045900A (en) | 2020-10-06 | 2022-04-13 | 에이에스엠 아이피 홀딩 비.브이. | Deposition method and an apparatus for depositing a silicon-containing material |
CN114293174A (en) | 2020-10-07 | 2022-04-08 | Asm Ip私人控股有限公司 | Gas supply unit and substrate processing apparatus including the same |
TW202229613A (en) | 2020-10-14 | 2022-08-01 | 荷蘭商Asm Ip私人控股有限公司 | Method of depositing material on stepped structure |
KR20220053482A (en) | 2020-10-22 | 2022-04-29 | 에이에스엠 아이피 홀딩 비.브이. | Method of depositing vanadium metal, structure, device and a deposition assembly |
TW202223136A (en) | 2020-10-28 | 2022-06-16 | 荷蘭商Asm Ip私人控股有限公司 | Method for forming layer on substrate, and semiconductor processing system |
TW202235649A (en) | 2020-11-24 | 2022-09-16 | 荷蘭商Asm Ip私人控股有限公司 | Methods for filling a gap and related systems and devices |
TW202235675A (en) | 2020-11-30 | 2022-09-16 | 荷蘭商Asm Ip私人控股有限公司 | Injector, and substrate processing apparatus |
US11946137B2 (en) | 2020-12-16 | 2024-04-02 | Asm Ip Holding B.V. | Runout and wobble measurement fixtures |
TW202231903A (en) | 2020-12-22 | 2022-08-16 | 荷蘭商Asm Ip私人控股有限公司 | Transition metal deposition method, transition metal layer, and deposition assembly for depositing transition metal on substrate |
USD980813S1 (en) | 2021-05-11 | 2023-03-14 | Asm Ip Holding B.V. | Gas flow control plate for substrate processing apparatus |
USD981973S1 (en) | 2021-05-11 | 2023-03-28 | Asm Ip Holding B.V. | Reactor wall for substrate processing apparatus |
USD1023959S1 (en) | 2021-05-11 | 2024-04-23 | Asm Ip Holding B.V. | Electrode for substrate processing apparatus |
USD980814S1 (en) | 2021-05-11 | 2023-03-14 | Asm Ip Holding B.V. | Gas distributor for substrate processing apparatus |
USD990441S1 (en) | 2021-09-07 | 2023-06-27 | Asm Ip Holding B.V. | Gas flow control plate |
CN118382919A (en) * | 2021-12-13 | 2024-07-23 | 朗姆研究公司 | Valve system for balancing gas flow to multiple stations of a substrate processing system |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080066678A1 (en) * | 2006-09-19 | 2008-03-20 | Intevac Inc. | Apparatus and methods for transporting and processing substrates |
US20090035946A1 (en) * | 2007-07-31 | 2009-02-05 | Asm International N.V. | In situ deposition of different metal-containing films using cyclopentadienyl metal precursors |
US20110217469A1 (en) * | 2008-12-31 | 2011-09-08 | Lawrence Chung-Lai Lei | Methods and Systems of Transferring, Docking and Processing Substrates |
US8309374B2 (en) * | 2008-10-07 | 2012-11-13 | Applied Materials, Inc. | Advanced platform for processing crystalline silicon solar cells |
US20130093049A1 (en) * | 2011-10-18 | 2013-04-18 | Intermolecular, Inc. | High Productivity Combinatorial Dual Shadow Mask Design |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6984591B1 (en) | 2000-04-20 | 2006-01-10 | International Business Machines Corporation | Precursor source mixtures |
US6541353B1 (en) * | 2000-08-31 | 2003-04-01 | Micron Technology, Inc. | Atomic layer doping apparatus and method |
US6630201B2 (en) | 2001-04-05 | 2003-10-07 | Angstron Systems, Inc. | Adsorption process for atomic layer deposition |
US6800173B2 (en) | 2000-12-15 | 2004-10-05 | Novellus Systems, Inc. | Variable gas conductance control for a process chamber |
US20020144786A1 (en) | 2001-04-05 | 2002-10-10 | Angstron Systems, Inc. | Substrate temperature control in an ALD reactor |
US20020144657A1 (en) | 2001-04-05 | 2002-10-10 | Chiang Tony P. | ALD reactor employing electrostatic chuck |
US6902620B1 (en) | 2001-12-19 | 2005-06-07 | Novellus Systems, Inc. | Atomic layer deposition systems and methods |
KR100578786B1 (en) * | 2004-05-28 | 2006-05-11 | 삼성전자주식회사 | Method of forming a thin film using an atomic layer deposition process and method of forming a capacitor of a semiconductor device using the same |
KR100538096B1 (en) * | 2004-03-16 | 2005-12-21 | 삼성전자주식회사 | Method for forming a capacitor using atomic layer deposition method |
KR100651599B1 (en) * | 2005-11-15 | 2006-11-29 | 동부일렉트로닉스 주식회사 | Atomic layer deposition device |
US20070259111A1 (en) | 2006-05-05 | 2007-11-08 | Singh Kaushal K | Method and apparatus for photo-excitation of chemicals for atomic layer deposition of dielectric film |
US7798096B2 (en) | 2006-05-05 | 2010-09-21 | Applied Materials, Inc. | Plasma, UV and ion/neutral assisted ALD or CVD in a batch tool |
KR20080027009A (en) * | 2006-09-22 | 2008-03-26 | 에이에스엠지니텍코리아 주식회사 | Atomic layer deposition apparatus and method for depositing laminated films using the same |
US20090081356A1 (en) | 2007-09-26 | 2009-03-26 | Fedorovskaya Elena A | Process for forming thin film encapsulation layers |
US8012859B1 (en) * | 2010-03-31 | 2011-09-06 | Tokyo Electron Limited | Atomic layer deposition of silicon and silicon-containing films |
US8985152B2 (en) | 2012-06-15 | 2015-03-24 | Novellus Systems, Inc. | Point of use valve manifold for semiconductor fabrication equipment |
US8940646B1 (en) * | 2013-07-12 | 2015-01-27 | Lam Research Corporation | Sequential precursor dosing in an ALD multi-station/batch reactor |
-
2013
- 2013-12-18 US US14/133,246 patent/US8940646B1/en active Active
-
2014
- 2014-07-11 TW TW103124005A patent/TWI614363B/en active
- 2014-07-14 KR KR1020140088693A patent/KR102296320B1/en active IP Right Grant
- 2014-12-15 US US14/571,191 patent/US9236244B2/en active Active
-
2021
- 2021-08-25 KR KR1020210112559A patent/KR102409456B1/en active IP Right Grant
-
2022
- 2022-06-10 KR KR1020220070920A patent/KR102498418B1/en active IP Right Grant
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080066678A1 (en) * | 2006-09-19 | 2008-03-20 | Intevac Inc. | Apparatus and methods for transporting and processing substrates |
US20090035946A1 (en) * | 2007-07-31 | 2009-02-05 | Asm International N.V. | In situ deposition of different metal-containing films using cyclopentadienyl metal precursors |
US8309374B2 (en) * | 2008-10-07 | 2012-11-13 | Applied Materials, Inc. | Advanced platform for processing crystalline silicon solar cells |
US20110217469A1 (en) * | 2008-12-31 | 2011-09-08 | Lawrence Chung-Lai Lei | Methods and Systems of Transferring, Docking and Processing Substrates |
US8367565B2 (en) * | 2008-12-31 | 2013-02-05 | Archers Inc. | Methods and systems of transferring, docking and processing substrates |
US20130093049A1 (en) * | 2011-10-18 | 2013-04-18 | Intermolecular, Inc. | High Productivity Combinatorial Dual Shadow Mask Design |
Cited By (41)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11725282B2 (en) | 2012-06-25 | 2023-08-15 | Novellus Systems, Inc. | Suppression of parasitic deposition in a substrate processing system by suppressing precursor flow and plasma outside of substrate region |
US11111581B2 (en) | 2012-06-25 | 2021-09-07 | Lam Research Corporation | Suppression of parasitic deposition in a substrate processing system by suppressing precursor flow and plasma outside of substrate region |
US20150279681A1 (en) * | 2014-03-31 | 2015-10-01 | Asm Ip Holding B.V. | Plasma atomic layer deposition |
US12077864B2 (en) * | 2014-03-31 | 2024-09-03 | Asm Ip Holding B.V. | Plasma atomic layer deposition |
US9637823B2 (en) * | 2014-03-31 | 2017-05-02 | Asm Ip Holding B.V. | Plasma atomic layer deposition |
US20210025059A1 (en) * | 2014-03-31 | 2021-01-28 | Asm Ip Holding B.V. | Plasma atomic layer deposition |
US10822700B2 (en) | 2014-03-31 | 2020-11-03 | Asm Ip Holding B.V. | Plasma atomic layer deposition |
US10072337B2 (en) | 2014-03-31 | 2018-09-11 | Asm Ip Holding B.V. | Plasma atomic layer deposition |
US10480078B2 (en) | 2014-03-31 | 2019-11-19 | Asm Ip Holdings B.V. | Plasma atomic layer deposition |
US10577691B2 (en) | 2014-05-15 | 2020-03-03 | Lam Research Corporation | Single ALD cycle thickness control in multi-station substrate deposition systems |
US10407773B2 (en) | 2014-07-30 | 2019-09-10 | Lam Research Corporation | Methods and apparatuses for showerhead backside parasitic plasma suppression in a secondary purge enabled ALD system |
US9617638B2 (en) | 2014-07-30 | 2017-04-11 | Lam Research Corporation | Methods and apparatuses for showerhead backside parasitic plasma suppression in a secondary purge enabled ALD system |
US9508547B1 (en) * | 2015-08-17 | 2016-11-29 | Lam Research Corporation | Composition-matched curtain gas mixtures for edge uniformity modulation in large-volume ALD reactors |
JP2021158386A (en) * | 2016-04-29 | 2021-10-07 | ラム リサーチ コーポレーションLam Research Corporation | Variable cycle and time rf activation method for film thickness matching in multi-station deposition system |
JP7540043B2 (en) | 2016-04-29 | 2024-08-26 | ラム リサーチ コーポレーション | Variable cycle and time RF activation method for film thickness matching in a multi-station deposition system |
US12077859B2 (en) | 2016-04-29 | 2024-09-03 | Lam Research Corporation | Variable cycle and time RF activation method for film thickness matching in a multi-station deposition system |
JP7282130B2 (en) | 2016-04-29 | 2023-05-26 | ラム リサーチ コーポレーション | Variable cycle and time RF activation method for film thickness matching in multi-station deposition systems |
US10685836B2 (en) | 2016-04-29 | 2020-06-16 | Lam Research Corporation | Etching substrates using ALE and selective deposition |
US20170314129A1 (en) * | 2016-04-29 | 2017-11-02 | Lam Research Corporation | Variable cycle and time rf activation method for film thickness matching in a multi-station deposition system |
US9738977B1 (en) | 2016-06-17 | 2017-08-22 | Lam Research Corporation | Showerhead curtain gas method and system for film profile modulation |
US10202691B2 (en) | 2016-06-17 | 2019-02-12 | Lam Research Corporation | Showerhead curtain gas method and system for film profile modulation |
US11721558B2 (en) | 2016-12-19 | 2023-08-08 | Lam Research Corporation | Designer atomic layer etching |
US10566212B2 (en) | 2016-12-19 | 2020-02-18 | Lam Research Corporation | Designer atomic layer etching |
US10566213B2 (en) | 2016-12-19 | 2020-02-18 | Lam Research Corporation | Atomic layer etching of tantalum |
US11239094B2 (en) | 2016-12-19 | 2022-02-01 | Lam Research Corporation | Designer atomic layer etching |
US11694911B2 (en) * | 2016-12-20 | 2023-07-04 | Lam Research Corporation | Systems and methods for metastable activated radical selective strip and etch using dual plenum showerhead |
RU172394U1 (en) * | 2017-01-13 | 2017-07-06 | Федеральное государственное автономное образовательное учреждение высшего образования "Национальный исследовательский университет "Московский институт электронной техники" | ATOMIC LAYER DEPOSITION DEVICE |
US10832909B2 (en) | 2017-04-24 | 2020-11-10 | Lam Research Corporation | Atomic layer etch, reactive precursors and energetic sources for patterning applications |
US10494715B2 (en) | 2017-04-28 | 2019-12-03 | Lam Research Corporation | Atomic layer clean for removal of photoresist patterning scum |
US11257674B2 (en) | 2017-05-16 | 2022-02-22 | Lam Research Corporation | Eliminating yield impact of stochastics in lithography |
US10796912B2 (en) | 2017-05-16 | 2020-10-06 | Lam Research Corporation | Eliminating yield impact of stochastics in lithography |
WO2019018227A1 (en) * | 2017-07-19 | 2019-01-24 | Lam Research Corporation | Atomic layer clean for removal of photoresist patterning scum |
US10697059B2 (en) | 2017-09-15 | 2020-06-30 | Lam Research Corporation | Thickness compensation by modulation of number of deposition cycles as a function of chamber accumulation for wafer to wafer film thickness matching |
US11286560B2 (en) | 2017-09-15 | 2022-03-29 | Lam Research Corporation | Thickness compensation by modulation of number of deposition cycles as a function of chamber accumulation for wafer to wafer film thickness matching |
US11718914B2 (en) * | 2017-12-29 | 2023-08-08 | Varian Semiconductor Equipment Associates, Inc. | Techniques for controlling precursors in chemical deposition processes |
US20200399758A1 (en) * | 2017-12-29 | 2020-12-24 | Varian Semiconductor Equipment Associates, Inc. | Techniques for controlling precursors in chemical deposition processes |
US12104253B2 (en) | 2017-12-29 | 2024-10-01 | Varian Semiconductor Equipment Associates, Inc. | Techniques for controlling precursors in chemical deposition processes |
WO2020006313A1 (en) * | 2018-06-29 | 2020-01-02 | Lam Research Corporation | Oxidative conversion in atomic layer deposition processes |
US12087574B2 (en) | 2018-06-29 | 2024-09-10 | Lam Research Corporation | Oxidative conversion in atomic layer deposition processes |
US12087573B2 (en) | 2019-07-17 | 2024-09-10 | Lam Research Corporation | Modulation of oxidation profile for substrate processing |
US20220155689A1 (en) * | 2020-11-17 | 2022-05-19 | Applied Materials, Inc. | Photoresist deposition using independent multichannel showerhead |
Also Published As
Publication number | Publication date |
---|---|
KR20150008015A (en) | 2015-01-21 |
KR102409456B1 (en) | 2022-06-14 |
KR102498418B1 (en) | 2023-02-09 |
KR102296320B1 (en) | 2021-08-31 |
KR20220084002A (en) | 2022-06-21 |
US8940646B1 (en) | 2015-01-27 |
KR20210108346A (en) | 2021-09-02 |
US20150099372A1 (en) | 2015-04-09 |
US9236244B2 (en) | 2016-01-12 |
TW201516174A (en) | 2015-05-01 |
TWI614363B (en) | 2018-02-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9236244B2 (en) | Sequential precursor dosing in an ALD multi-station/batch reactor | |
KR102694640B1 (en) | Chamber undercoat preparation method for low temperature ald films | |
US11646198B2 (en) | Ultrathin atomic layer deposition film accuracy thickness control | |
KR102328850B1 (en) | Sub-saturated atomic layer deposition and conformal film deposition | |
KR102439698B1 (en) | Nitride film formed by plasma-enhanced and thermal atomic layer deposition process | |
KR102538780B1 (en) | Methods and apparatuses for uniform reduction of in-feature wet etch rate of a silicon nitride film formed by ald | |
CN107665811B (en) | Gap fill for variable aspect ratio features using compound PEALD and PECVD methods | |
US20160329206A1 (en) | Methods of modulating residual stress in thin films | |
US9966255B2 (en) | Method of densifying films in semiconductor device | |
US20240327973A1 (en) | Plasma enhanced atomic layer deposition of silicon-containing films | |
WO2023178273A1 (en) | Reducing capacitance in semiconductor devices | |
WO2023114401A1 (en) | Atomic layer deposition pulse sequence engineering for improved conformality for low temperature precursors |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: LAM RESEARCH CORPORATION, CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:CHANDRASEKHARAN, RAMESH;LAVOIE, ADRIEN;SLEVIN, DAMIEN;AND OTHERS;SIGNING DATES FROM 20140527 TO 20141008;REEL/FRAME:033957/0472 |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 4TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1551) Year of fee payment: 4 |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 8TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1552); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY Year of fee payment: 8 |