US20140158984A1 - Semiconductor structure - Google Patents

Semiconductor structure Download PDF

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US20140158984A1
US20140158984A1 US13/917,645 US201313917645A US2014158984A1 US 20140158984 A1 US20140158984 A1 US 20140158984A1 US 201313917645 A US201313917645 A US 201313917645A US 2014158984 A1 US2014158984 A1 US 2014158984A1
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layer
layers
grading
gallium indium
silicon substrate
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Chi-Feng Huang
Sheng-Han Tu
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Genesis Photonics Inc
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Genesis Photonics Inc
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Publication of US20140158984A1 publication Critical patent/US20140158984A1/en
Priority to US14/940,173 priority Critical patent/US9859462B2/en
Priority to US14/940,175 priority patent/US20160072010A1/en
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    • H—ELECTRICITY
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/15—Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
    • H01L29/151—Compositional structures
    • H01L29/152—Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation
    • H01L29/154—Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation comprising at least one long range structurally disordered material, e.g. one-dimensional vertical amorphous superlattices
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    • H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
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    • H01L21/02367—Substrates
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    • H01L21/02436—Intermediate layers between substrates and deposited layers
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    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
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    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/201—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
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    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds
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    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds

Definitions

  • the invention relates to a semiconductor structure. More particularly, the invention relates to a semiconductor structure having grading stress buffer layers.
  • a light emitting diode now has advantages of high luminance, low power consumption, compactness, low driving voltage, being mercury free, and so forth. Therefore, the LED has been extensively applied in the field of displays and illumination.
  • an LED chip is fabricated by using a broad band-gap semiconductor material, such as gallium nitride (GaN).
  • GaN gallium nitride
  • the difference between the lattice constant of GaN and that of a hetero-substrate cannot be ignored.
  • GaN grown on the hetero-substrate undergoes lattice dislocation, and the lattice dislocation extends toward a thickness direction of the GaN layer.
  • the material of GaN relative to the hetero-substrate will create great structural stress. As the growth thickness becomes thicker, the stress accumulated becomes greater. When exceeding a threshold value, the material layer will be unable to support the stress, and must deform to release the stress. As such, the lattice dislocation not only causes crystal growth defects which reduce the light emitting efficiency of the LED and shortens lifetime, it also can not grow very thick GaN.
  • the invention is directed to a semiconductor structure, capable of releasing the stress problem caused by conventional lattice mismatch, and reducing lattice dislocation from extending in a thickness direction.
  • the invention provides a semiconductor structure, including a silicon substrate, an aluminum nitride layer, and a plurality of grading stress buffer layers.
  • the aluminum nitride layer is disposed on the silicon substrate.
  • the grading stress buffer layers are disposed on the aluminum nitride layer.
  • Each grading stress buffer layer includes a grading layer and a transition layer stacked up sequentially.
  • a chemical formula of the grading layer is Al 1 ⁇ x Ga x N, wherein the x value is increased from one side near the silicon substrate to a side away from the silicon substrate, and 0 ⁇ x ⁇ 1.
  • a chemical formula of the transition layer is the same as the chemical formula of a side surface of the grading layer away from the silicon substrate.
  • the chemical formula of the transition layer of the grading stress buffer layer furthest away from the silicon substrate is GaN.
  • the thickness of the grading layer of the grading stress buffer layers increase from a side close to the silicon substrate to a side away from the silicon substrate.
  • the thickness of each grading layer ranges from 50 nm to 700 nm.
  • the thickness of the transition layer of the grading stress buffer layers increase from a side close to the silicon substrate to a side away from the silicon substrate.
  • the thickness of each transition layer ranges from 50 nm to 700 nm.
  • the x value of the chemical formula of the transition layer increases as an arithmetic progression.
  • the grading stress buffer layers include 2 to 10 grading stress buffer layers.
  • the semiconductor structure further includes a superlattice structure layer, disposed between the aluminum nitride layer and the plurality of grading stress buffer layers.
  • the superlattice structure layer includes a plurality of aluminum gallium indium nitride structure layers.
  • Each aluminum gallium indium nitride structure layer includes a first aluminum gallium indium nitride layer and a second aluminum gallium indium nitride layer stacked on each other.
  • the chemical formula of the first aluminum gallium indium nitride layers is Al s Ga t In (1-s-t) N, wherein 0 ⁇ s ⁇ 1, 0 ⁇ t ⁇ 1, and 0 ⁇ s+t ⁇ 1.
  • each aluminum gallium indium nitride structure layer ranges from 5 nm to 500 nm.
  • the thickness of the superlattice structure layer ranges from 20 nm to 5000 nm.
  • the superlattice structure layer includes 5 or more aluminum gallium indium nitride structure layers.
  • the semiconductor structure further includes a superlattice structure layer, disposed between the plurality of grading stress buffer layers.
  • the superlattice structure layer includes a plurality of aluminum gallium indium nitride structure layers.
  • Each aluminum gallium indium nitride structure layer includes a first aluminum gallium indium nitride layer and a second aluminum gallium indium nitride layer stacked on each other.
  • the chemical formula of the first aluminum gallium indium nitride layers is Al s Ga t In (1-s-t) N, wherein 0 ⁇ s ⁇ 1, 0 ⁇ t ⁇ 1, and 0 ⁇ s+t ⁇ 1.
  • the chemical formula of the second aluminum gallium indium nitride layers is Al m Ga n In (1-m-n) N, wherein 0 ⁇ m ⁇ 1, 0 ⁇ n ⁇ 1, and 0 ⁇ m+n ⁇ 1.
  • each aluminum gallium indium nitride structure layer ranges from 5 nm to 500 nm.
  • the thickness of the superlattice structure layer ranges from 20 nm to 5000 nm.
  • the superlattice structure layer includes 5 or more aluminum gallium indium nitride structure layers.
  • the amount of gallium can be increased, so as to achieve a GaN layer.
  • the stress generated from the lattice difference between the GaN layer and the silicon substrate can be effectively reduced.
  • lattice dislocation extending in a thickness direction can also be effectively reduced, improving the overall quality of the semiconductor structure.
  • FIG. 1 is a schematic cross-sectional view of a semiconductor structure according to an embodiment of the invention.
  • FIG. 2 is a schematic cross-sectional view of a semiconductor structure according to another embodiment of the invention.
  • FIG. 3 is a schematic cross-sectional view of a semiconductor structure according to yet another embodiment of the invention.
  • a layer (or film) or a structure when a layer (or film) or a structure is disposed “above” or “below” another substrate, another layer (or film), or another structure, it should be understood that the layer (or film) or the structure can be “directly” located on another substrate, layer (or film), or another structure. Or, the two layers (or films) or structures can have one or more middle layers so as to be “indirectly” disposed on each other.
  • the Examiner can refer to the attached figures for the position of each layer.
  • FIG. 1 is a schematic cross-sectional view of a semiconductor structure according to an embodiment of the invention.
  • a semiconductor structure 100 a includes a silicon substrate 110 , an aluminum nitride layer 120 , and a plurality of grading stress buffer layers 140 a, 140 b, 140 c, and 140 d ( FIG. 1 only shows four).
  • the silicon substrate 110 has an upper surface 112 .
  • the aluminum nitride layer 120 is disposed on the upper surface 112 of the silicon substrate 110 .
  • the grading stress buffer layers 140 a, 140 b, 140 c, and 140 d are disposed on the aluminum nitride layer 120 .
  • Each grading stress buffer layer 140 a (or 140 b, 140 c , 140 d ) includes a grading layer 142 a (or 142 b, 142 c, 142 d ) and a transition layer 144 a (or 144 b, 144 c, 144 d ) stacked up sequentially.
  • a chemical formula of the grading layers 142 a, 142 b, 142 c, 142 d is Al 1 ⁇ x Ga x N, wherein the x value is increased from one side near the upper surface 112 of the silicon substrate 110 to a side away from the upper surface 112 of the silicon substrate 110 , and 0 ⁇ x ⁇ 1.
  • Each transition layer 144 a (or 144 b, 144 c, 144 d ) and a side surface 1422 a (or 1422 b, 1422 c, 1422 d ) of each grading layer 142 a (or 142 b, 142 c, 142 d ) furthest away from the silicon substrate is made up of the same elements.
  • the x value of the chemical formula of the grading layer 142 a of the grading stress buffer layer 140 a is, for example, between 0 and 0.25. That is to say, the Al amount of the grading layer 142 a decreases from a side close to the aluminum nitride layer 120 to a side away from the aluminum nitride layer 120 (i.e. the Al amount decreases from 1 to 0.75). The Ga amount increases from a side close to the aluminum nitride layer 120 to a side away from the aluminum nitride layer 120 (i.e. the Ga amount increases from 0 to 0.25).
  • the transition layer 144 a and the side surface 1422 a of the grading layer 142 a furthest from the silicon substrate 110 are made up of the same elements (i.e. the chemical formula of the transition layer 144 a is Al 0.75 Ga 0.25 N).
  • the x value of the chemical formula of the grading layer 142 b of the grading stress buffer layer 140 b is, for example, between 0.25 and 0.5. That is to say, the Al amount of the grading layer 142 b decreases from a side close to the aluminum nitride layer 120 to a side away from the aluminum nitride layer 120 (i.e. the Al amount decreases from 0.75 to 0.5). The Ga amount increases from a side close to the aluminum nitride layer 120 to a side away from the aluminum nitride layer 120 (i.e. the Ga amount increases from 0.25 to 0.5).
  • the transition layer 144 b and the side surface 1422 b of the grading layer 142 b furthest from the silicon substrate are made up of the same elements (i.e. the chemical formula of the transition layer 144 b is Al 0.5 Ga 0.5 N).
  • the x value of the chemical formula of the grading layer 142 c of the grading stress buffer layer 140 c is, for example, between 0.5 and 0.75. That is to say, the Al amount of the grading layer 142 c decreases from a side close to the aluminum nitride layer 120 to a side away from the aluminum nitride layer 120 (i.e. the Al amount decreases from 0.5 to 0.25). The Ga amount increases from a side close to the aluminum nitride layer 120 to a side away from the aluminum nitride layer 120 (i.e. the Ga amount increases from 0.5 to 0.75).
  • the transition layer 144 c and the side surface 1422 c of the grading layer 142 c furthest from the silicon substrate are made up of the same elements (i.e. the chemical formula of the transition layer 144 c is Al 0.25 Ga 0.75 N).
  • the x value of the chemical formula of the grading layer 142 d of the grading stress buffer layer 140 d is, for example, between 0.75 and 1. That is to say, the Al amount of the grading layer 142 d decreases from a side close to the aluminum nitride layer 120 to a side away from the aluminum nitride layer 120 (i.e. the Al amount decreases from 0.25 to 0). The Ga amount increases from a side close to the aluminum nitride layer 120 to a side away from the aluminum nitride layer 120 (i.e. the Ga amount increases from 0.75 to 1).
  • transition layer 144 d of the grading stress buffer layer 140 d furthest from the silicon substrate 110 and the side surface 1422 d of the grading layer 142 d furthest from the silicon substrate are made up of the same elements (i.e. the chemical formula of the last transition layer 144 d is GaN).
  • the x value (i.e. the gallium amount) of the chemical formula of the transition layers 144 a, 144 b, 144 c, 144 d of the grading stress buffer layers 140 a , 140 b, 140 c, 140 d increases as an arithmetic progression, and the aluminum amount decreases with a proportional arithmetic progression.
  • the x value of the chemical formula of the transition layers 144 a, 144 b, 144 c, 144 d can increase without an arithmetic progression, and is not limited thereto.
  • the thicknesses h 1 , h 2 , h 3 , h 4 of the grading layers 142 a, 142 b , 142 c, 142 d of the grading stress buffer layers 140 a, 140 b, 140 c, 140 d increase from close to an upper surface 112 of the silicon substrate 110 to away from the upper surface 112 of the silicon substrate 110 . That is to say, the thickness h 1 of the grading layer 142 a is less than the thickness h 2 of the grading layer 142 b. The thickness h 2 of the grading layer 142 b is less than the thickness h 3 of the grading layer 142 c.
  • the thickness h 3 of the grading layer 142 c is less than the thickness h 4 of the grading layer 142 d.
  • the thickness h 1 (or h 2 , h 3 , h 4 ) of each grading layer 142 a (or 142 b, 142 c, 142 d ) ranges between 50 nm and 700 nm. It should be noted that with the thicknesses of the grading layers falling within this range, the growth quality is more stable and will be less likely to have defects.
  • the thicknesses of the transition layers 144 a, 144 b, 144 c, 144 d of the grading stress buffer layers 140 a, 140 b, 140 c, 140 d increase from close to an upper surface 112 of the silicon substrate 110 to away from the upper surface 112 of the silicon substrate 110 . That is to say, the thickness h 1 ′ of the transition layer 144 a is less than the thickness h 2 ′ of the transition layer 144 b.
  • the thickness h 2 ′ of the transition layer 144 b is less than the thickness h 3 ′ of the transition layer 144 c.
  • the thickness h 3 ′ of the transition layer 144 c is less than the thickness h 4 ′ of the transition layer 144 d.
  • the thickness h 1 ′ (or h 2 ′, h 3 ′, h 4 ′) of each transition layer 144 a ranges between 50 nm and 700 nm. It should be noted that with the thicknesses of the transition layers falling within this range, the growth quality is more stable and will be less likely to have defects.
  • the grading stress buffer layers 140 a, 140 b, 140 c, 140 d are disposed on the aluminum nitride layer 120 .
  • the aluminum amount in the transition layers 144 a, 144 b, 144 c, 144 d decreases as an arithmetic progression, and the gallium amount increases as an arithmetic progression.
  • the transition layer 144 a, 144 b, 144 c, 144 d and the side surface 1422 a (or 1422 b , 1422 c, 1422 d ) of the grading layer 142 a, 142 b, 142 c, 142 d furthest from the silicon substrate 110 are made up of the same aluminum amount and gallium amount.
  • a GaN layer can be obtained (i.e. transition layer 144 d ).
  • the grading stress buffer layers 140 a, 140 b, 140 c, 140 d can be used to reduce the stress caused by the expansion coefficient and the lattice difference between the GaN layer (i.e. the transition layer 144 d ) and the silicon substrate 110 .
  • grading stress buffer layers 140 a , 140 b, 140 c, 140 d having the function of relieving stress
  • conventional lattice dislocation extending in a thickness direction can also be reduced, improving the overall quality of the semiconductor structure 100 a.
  • the number of the grading stress buffer layers 140 a, 140 b, 140 c , 140 d shown are exemplary.
  • One skilled in the art can adjust the amount of aluminum and gallium and increase the number of grading stress buffer layers. If the x value (i.e. the gallium amount) increases by an arithmetic progression of 0.1, the number of grading stress buffer layers can be 10. This way, the stress caused by the expansion coefficient and the lattice difference between the GaN layer (i.e. the transition layer 144 d ) and the silicon substrate 110 can be reduced; details are not repeated herein.
  • FIG. 2 is a schematic cross-sectional view of a semiconductor structure according to another embodiment of the invention.
  • the semiconductor structure 100 b of the embodiment is similar to the semiconductor structure 100 a of FIG. 1 .
  • the semiconductor structure 100 b of the embodiment further includes a superlattice structure layer 150 a .
  • the superlattice structure layer 150 a is disposed between the aluminum nitride layer 120 and the grading stress buffer layers 140 a, 140 b, 140 c, 140 d.
  • the superlattice structure layer 150 a is disposed between the aluminum nitride layer 120 and the grading stress buffer layer 140 a.
  • the super lattice structure layer 150 a includes a plurality of aluminum gallium indium nitride structure layers 152 a 1 , 152 a 2 ( FIG. 2 only shows two).
  • Each aluminum gallium indium nitride structure layer 152 a 1 (or 152 a 2 ) includes a first aluminum gallium indium nitride layer 151 a 1 (or 151 a 2 ) and a second aluminum gallium indium nitride layer 153 a 1 (or 153 a 2 ) stacked on each other.
  • the chemical formula of the first aluminum gallium indium nitride layers 151 a 1 , 151 a 2 is Al s Ga t In (1-s-t) N, wherein 0 ⁇ s ⁇ 1, 0 ⁇ t ⁇ 1, and 0 ⁇ s+t ⁇ 1.
  • the ratio of the elements of the first aluminum gallium indium nitride layer 151 a 1 (or 151 a 2 ) and the second aluminum gallium indium nitride layer 153 a 1 (or 153 a 2 ) are not exactly the same.
  • the chemical formula of the first aluminum gallium indium nitride layer 151 a 1 of the aluminum gallium indium nitride structure layer 152 a 1 is Al 0.3 Ga 0.2 In 0.5 N
  • the chemical formula of the second aluminum gallium indium nitride layer 153 a 1 is Al 0.3 Ga 0.4 In 0.3 N
  • the thickness t 1 , t 2 of each aluminum gallium indium nitride structure layer 152 a 1 , 152 a 2 ranges, for example, from 5 nm to 500 nm.
  • the thickness t of the superlattice structure 150 a for example, ranges from 20 nm to 5000 nm.
  • the number of aluminum gallium indium nitride structure layers 152 a 1 , 152 a 2 is at least five. Because the superlattice structure 150 a is disposed between the aluminum nitride layer 120 and the grading stress buffer layer 140 a, the design can help in reducing the stress caused by the expansion coefficient and the lattice difference between the grading stress buffer layer 140 a and the silicon substrate 110 . In addition, the dislocation formed before the superlattice structure 150 a is grown can be prevented, so that the dislocation is unable to continue to grow. This further improves the quality of the semiconductor structure 100 b.
  • FIG. 3 is a schematic cross-sectional view of a semiconductor structure according to yet another embodiment of the invention.
  • the semiconductor structure 100 c of the embodiment is similar to the semiconductor structure 100 a of FIG. 1 .
  • the semiconductor structure 100 c of the embodiment further includes a superlattice structure layer 150 b .
  • the superlattice structure layer 150 b is disposed between the grading stress buffer layer 140 a and the grading stress buffer layer 140 b.
  • the superlattice structure layer 150 b includes a plurality of aluminum gallium indium nitride structure layers 152 b 1 , 152 b 2 .
  • Each aluminum gallium indium nitride structure layer 152 b 1 (or 152 b 2 ) includes a first aluminum gallium indium nitride layer 151 b 1 (or 151 b 2 ) and a second aluminum gallium indium nitride layer 153 b 1 (or 153 b 2 ) stacked on each other.
  • the chemical formula of the first aluminum gallium indium nitride layers 151 b 1 , 151 b 2 is Al s Ga t In (1-s-t) N, wherein 0 ⁇ s ⁇ 1, 0 ⁇ t ⁇ 1, and 0 ⁇ s+t ⁇ 1.
  • the chemical formula of the second aluminum gallium indium nitride layers 153 b 1 , 153 b 2 is Al m Ga n In (1-m-n) )N, wherein 0 ⁇ m ⁇ 1, 0 ⁇ n ⁇ 1, and 0 ⁇ m+n ⁇ 1.
  • the chemical formula of the first aluminum gallium indium nitride layer 151 b 1 of the aluminum gallium indium nitride structure layer 152 b 1 is Al 0.3 Ga 0.2 In 0.5 N
  • the chemical formula of the second aluminum gallium indium nitride layer 153 b 1 is Al 0.3 Ga 0.4 In 0.3 N
  • the thickness t 1 ′, t 2 ′ of each aluminum gallium indium nitride structure layer 152 b 1 , 152 b 2 ranges, for example, from 5 nm to 500 nm.
  • the thickness t′ of the superlattice structure 150 b for example, ranges from 20 nm to 5000 nm.
  • the number of aluminum gallium indium nitride structure layers 152 b 1 , 152 b 2 is at least five. Because the superlattice structure 150 a is disposed between the adjacent grading stress buffer layers 140 a, 140 b, the design can help in reducing the stress caused by the expansion coefficient and the lattice difference between the grading stress buffer layers 140 a, 140 b. In addition, the dislocation formed before the superlattice structure 150 b is grown can be prevented, so that the dislocation is unable to continue to grow. This further improves the quality of the semiconductor structure 100 c.
  • the invention does not limit the position and type of the superlattice structures 150 a, 150 b even though the superlattice structures 150 a, 150 b have been to described to be located between the aluminum nitride layer 120 and the grading stress buffer layer 140 a, or, between the grading stress buffer layer 140 a and the grading stress buffer layer 140 b.
  • the superlattice structure can be disposed between any two neighboring layers of the grading stress buffer layers 140 a, 140 b, 140 c, 140 d; for example, between the grading layer 142 a and the transition layer 144 a, or the grading layer 142 c and the transition layer 144 c.
  • the superlattice structures can at the same time be disposed between the aluminum nitride layer 120 and the grading stress buffer layer 140 a, and between any two neighboring layers of the grading stress buffer layers 140 a, 140 b, 140 c, 140 d.
  • One skilled in the art can adjust or increase the design of the superlattice structures accordingly, so as to satisfy reducing of dislocation. This is still a part of the technical proposal of the invention and does not depart from the protection scope of the invention.
  • the amount of gallium can be increased, so as to achieve a GaN layer. Therefore, the stress generated from the lattice difference between the GaN layer and the silicon substrate can be effectively reduced. In addition, lattice dislocation extending in a thickness direction can also be effectively reduced, improving the overall quality of the semiconductor structure.

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Abstract

A semiconductor structure includes a silicon substrate, an aluminum nitride layer and a plurality of grading stress buffer layers. The aluminum nitride layer is disposed on the silicon substrate. The grading stress buffer layers are disposed on the aluminum nitride layer. Each grading stress buffer layer includes a grading layer and a transition layer stacked up sequentially. A chemical formula of the grading layer is Al1−xGaxN, wherein the x value is increased from one side near the silicon substrate to a side away from the silicon substrate, and 0≦x≦1. A chemical formula of the transition layer is the same as the chemical formula of a side surface of the grading layer away from the silicon substrate. The chemical formula of the transition layer of the grading stress buffer layer furthest from the silicon substrate is GaN.

Description

    CROSS-REFERENCE TO RELATED APPLICATION
  • This application claims the priority benefit of Taiwan application serial no. 101145835, filed on Dec. 6, 2012. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.
    • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • The invention relates to a semiconductor structure. More particularly, the invention relates to a semiconductor structure having grading stress buffer layers.
  • 2. Description of Related Art
  • With the progress of semiconductor technologies, a light emitting diode (LED) now has advantages of high luminance, low power consumption, compactness, low driving voltage, being mercury free, and so forth. Therefore, the LED has been extensively applied in the field of displays and illumination. In general, an LED chip is fabricated by using a broad band-gap semiconductor material, such as gallium nitride (GaN). However, in addition to the difference in thermal expansion coefficient and chemical properties, the difference between the lattice constant of GaN and that of a hetero-substrate cannot be ignored. Hence, due to lattice mismatch, GaN grown on the hetero-substrate undergoes lattice dislocation, and the lattice dislocation extends toward a thickness direction of the GaN layer. Further, because of lattice mismatch between GaN and the hetero-substrate, the material of GaN relative to the hetero-substrate will create great structural stress. As the growth thickness becomes thicker, the stress accumulated becomes greater. When exceeding a threshold value, the material layer will be unable to support the stress, and must deform to release the stress. As such, the lattice dislocation not only causes crystal growth defects which reduce the light emitting efficiency of the LED and shortens lifetime, it also can not grow very thick GaN.
    • SUMMARY OF THE INVENTION
  • The invention is directed to a semiconductor structure, capable of releasing the stress problem caused by conventional lattice mismatch, and reducing lattice dislocation from extending in a thickness direction.
  • The invention provides a semiconductor structure, including a silicon substrate, an aluminum nitride layer, and a plurality of grading stress buffer layers. The aluminum nitride layer is disposed on the silicon substrate. The grading stress buffer layers are disposed on the aluminum nitride layer. Each grading stress buffer layer includes a grading layer and a transition layer stacked up sequentially. A chemical formula of the grading layer is Al1−xGaxN, wherein the x value is increased from one side near the silicon substrate to a side away from the silicon substrate, and 0≦x≦1. A chemical formula of the transition layer is the same as the chemical formula of a side surface of the grading layer away from the silicon substrate. The chemical formula of the transition layer of the grading stress buffer layer furthest away from the silicon substrate is GaN.
  • In an embodiment of the invention, the thickness of the grading layer of the grading stress buffer layers increase from a side close to the silicon substrate to a side away from the silicon substrate.
  • In an embodiment of the invention, the thickness of each grading layer ranges from 50 nm to 700 nm.
  • In an embodiment of the invention, the thickness of the transition layer of the grading stress buffer layers increase from a side close to the silicon substrate to a side away from the silicon substrate.
  • In an embodiment of the invention, the thickness of each transition layer ranges from 50 nm to 700 nm.
  • In an embodiment of the invention, the x value of the chemical formula of the transition layer increases as an arithmetic progression.
  • In an embodiment of the invention, the grading stress buffer layers include 2 to 10 grading stress buffer layers.
  • In an embodiment of the invention, the semiconductor structure further includes a superlattice structure layer, disposed between the aluminum nitride layer and the plurality of grading stress buffer layers. The superlattice structure layer includes a plurality of aluminum gallium indium nitride structure layers. Each aluminum gallium indium nitride structure layer includes a first aluminum gallium indium nitride layer and a second aluminum gallium indium nitride layer stacked on each other. The chemical formula of the first aluminum gallium indium nitride layers is AlsGatIn(1-s-t)N, wherein 0<s<1, 0<t<1, and 0<s+t≦1. The chemical formula of the second aluminum gallium indium nitride layers is AlmGanIn(1-m-n)N, wherein 0<m<1, 0<n<1, and 0<m+n≦1. When m=s, n≠t, and when n=t, m≠s.
  • In an embodiment of the invention, the thickness of each aluminum gallium indium nitride structure layer ranges from 5 nm to 500 nm.
  • In an embodiment of the invention, the thickness of the superlattice structure layer ranges from 20 nm to 5000 nm.
  • In an embodiment of the invention, the superlattice structure layer includes 5 or more aluminum gallium indium nitride structure layers.
  • In an embodiment of the invention, the semiconductor structure further includes a superlattice structure layer, disposed between the plurality of grading stress buffer layers. The superlattice structure layer includes a plurality of aluminum gallium indium nitride structure layers. Each aluminum gallium indium nitride structure layer includes a first aluminum gallium indium nitride layer and a second aluminum gallium indium nitride layer stacked on each other. The chemical formula of the first aluminum gallium indium nitride layers is AlsGatIn(1-s-t)N, wherein 0<s<1, 0<t<1, and 0<s+t≦1. The chemical formula of the second aluminum gallium indium nitride layers is AlmGanIn(1-m-n)N, wherein 0<m<1, 0<n<1, and 0<m+n≦1. When m=s, n≠t, and when n=t, m≠.
  • In an embodiment of the invention, the thickness of each aluminum gallium indium nitride structure layer ranges from 5 nm to 500 nm.
  • In an embodiment of the invention, the thickness of the superlattice structure layer ranges from 20 nm to 5000 nm.
  • In an embodiment of the invention, the superlattice structure layer includes 5 or more aluminum gallium indium nitride structure layers.
  • Based on the above, since a plurality of grading stress buffer layers are disposed on the aluminum nitride layer of the invention, the amount of gallium can be increased, so as to achieve a GaN layer. As such, the stress generated from the lattice difference between the GaN layer and the silicon substrate can be effectively reduced. In addition, lattice dislocation extending in a thickness direction can also be effectively reduced, improving the overall quality of the semiconductor structure.
  • Several exemplary embodiments accompanied with figures are described in detail below to further describe the invention in details.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • The accompanying drawings are included to provide a further understanding of the disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the disclosure and, together with the description, serve to explain the principles of the invention.
  • FIG. 1 is a schematic cross-sectional view of a semiconductor structure according to an embodiment of the invention.
  • FIG. 2 is a schematic cross-sectional view of a semiconductor structure according to another embodiment of the invention.
  • FIG. 3 is a schematic cross-sectional view of a semiconductor structure according to yet another embodiment of the invention.
    •  DESCRIPTION OF EMBODIMENTS
  • In the description of the following embodiments, when a layer (or film) or a structure is disposed “above” or “below” another substrate, another layer (or film), or another structure, it should be understood that the layer (or film) or the structure can be “directly” located on another substrate, layer (or film), or another structure. Or, the two layers (or films) or structures can have one or more middle layers so as to be “indirectly” disposed on each other. The Examiner can refer to the attached figures for the position of each layer.
  • FIG. 1 is a schematic cross-sectional view of a semiconductor structure according to an embodiment of the invention. Referring to FIG. 1, in the embodiment, a semiconductor structure 100 a includes a silicon substrate 110, an aluminum nitride layer 120, and a plurality of grading stress buffer layers 140 a, 140 b, 140 c, and 140 d (FIG. 1 only shows four). The silicon substrate 110 has an upper surface 112. The aluminum nitride layer 120 is disposed on the upper surface 112 of the silicon substrate 110. The grading stress buffer layers 140 a, 140 b, 140 c, and 140 d are disposed on the aluminum nitride layer 120. Each grading stress buffer layer 140 a (or 140 b, 140 c, 140 d) includes a grading layer 142 a (or 142 b, 142 c, 142 d) and a transition layer 144 a (or 144 b, 144 c, 144 d) stacked up sequentially. A chemical formula of the grading layers 142 a, 142 b, 142 c, 142 d is Al1−xGaxN, wherein the x value is increased from one side near the upper surface 112 of the silicon substrate 110 to a side away from the upper surface 112 of the silicon substrate 110, and 0≦x≦1. Each transition layer 144 a (or 144 b, 144 c, 144 d) and a side surface 1422 a (or 1422 b, 1422 c, 1422 d) of each grading layer 142 a (or 142 b, 142 c, 142 d) furthest away from the silicon substrate is made up of the same elements.
  • For example, the x value of the chemical formula of the grading layer 142 a of the grading stress buffer layer 140 a is, for example, between 0 and 0.25. That is to say, the Al amount of the grading layer 142 a decreases from a side close to the aluminum nitride layer 120 to a side away from the aluminum nitride layer 120 (i.e. the Al amount decreases from 1 to 0.75). The Ga amount increases from a side close to the aluminum nitride layer 120 to a side away from the aluminum nitride layer 120 (i.e. the Ga amount increases from 0 to 0.25). The transition layer 144 a and the side surface 1422 a of the grading layer 142 a furthest from the silicon substrate 110 are made up of the same elements (i.e. the chemical formula of the transition layer 144 a is Al0.75Ga0.25N).
  • Similarly, the x value of the chemical formula of the grading layer 142 b of the grading stress buffer layer 140 b is, for example, between 0.25 and 0.5. That is to say, the Al amount of the grading layer 142 b decreases from a side close to the aluminum nitride layer 120 to a side away from the aluminum nitride layer 120 (i.e. the Al amount decreases from 0.75 to 0.5). The Ga amount increases from a side close to the aluminum nitride layer 120 to a side away from the aluminum nitride layer 120 (i.e. the Ga amount increases from 0.25 to 0.5). The transition layer 144 b and the side surface 1422 b of the grading layer 142 b furthest from the silicon substrate are made up of the same elements (i.e. the chemical formula of the transition layer 144 b is Al0.5Ga0.5N).
  • The x value of the chemical formula of the grading layer 142 c of the grading stress buffer layer 140 c is, for example, between 0.5 and 0.75. That is to say, the Al amount of the grading layer 142 c decreases from a side close to the aluminum nitride layer 120 to a side away from the aluminum nitride layer 120 (i.e. the Al amount decreases from 0.5 to 0.25). The Ga amount increases from a side close to the aluminum nitride layer 120 to a side away from the aluminum nitride layer 120 (i.e. the Ga amount increases from 0.5 to 0.75). The transition layer 144 c and the side surface 1422 c of the grading layer 142 c furthest from the silicon substrate are made up of the same elements (i.e. the chemical formula of the transition layer 144 c is Al0.25Ga0.75N).
  • The x value of the chemical formula of the grading layer 142 d of the grading stress buffer layer 140 d is, for example, between 0.75 and 1. That is to say, the Al amount of the grading layer 142 d decreases from a side close to the aluminum nitride layer 120 to a side away from the aluminum nitride layer 120 (i.e. the Al amount decreases from 0.25 to 0). The Ga amount increases from a side close to the aluminum nitride layer 120 to a side away from the aluminum nitride layer 120 (i.e. the Ga amount increases from 0.75 to 1). Specifically, the transition layer 144 d of the grading stress buffer layer 140 d furthest from the silicon substrate 110 and the side surface 1422 d of the grading layer 142 d furthest from the silicon substrate are made up of the same elements (i.e. the chemical formula of the last transition layer 144 d is GaN).
  • That is to say, the x value (i.e. the gallium amount) of the chemical formula of the transition layers 144 a, 144 b, 144 c, 144 d of the grading stress buffer layers 140 a, 140 b, 140 c, 140 d increases as an arithmetic progression, and the aluminum amount decreases with a proportional arithmetic progression. Of course, in other embodiments, the x value of the chemical formula of the transition layers 144 a, 144 b, 144 c, 144 d can increase without an arithmetic progression, and is not limited thereto.
  • Furthermore, the thicknesses h1, h2, h3, h4 of the grading layers 142 a, 142 b, 142 c, 142 d of the grading stress buffer layers 140 a, 140 b, 140 c, 140 d increase from close to an upper surface 112 of the silicon substrate 110 to away from the upper surface 112 of the silicon substrate 110. That is to say, the thickness h1 of the grading layer 142 a is less than the thickness h2 of the grading layer 142 b. The thickness h2 of the grading layer 142 b is less than the thickness h3 of the grading layer 142 c. The thickness h3 of the grading layer 142 c is less than the thickness h4 of the grading layer 142 d. Herein, preferably, the thickness h1 (or h2, h3, h4) of each grading layer 142 a (or 142 b, 142 c, 142 d) ranges between 50 nm and 700 nm. It should be noted that with the thicknesses of the grading layers falling within this range, the growth quality is more stable and will be less likely to have defects.
  • In addition, the thicknesses of the transition layers 144 a, 144 b, 144 c, 144 d of the grading stress buffer layers 140 a, 140 b, 140 c, 140 d increase from close to an upper surface 112 of the silicon substrate 110 to away from the upper surface 112 of the silicon substrate 110. That is to say, the thickness h1′ of the transition layer 144 a is less than the thickness h2′ of the transition layer 144 b. The thickness h2′ of the transition layer 144 b is less than the thickness h3′ of the transition layer 144 c. The thickness h3′ of the transition layer 144 c is less than the thickness h4′ of the transition layer 144 d. Herein, preferably, the thickness h1′ (or h2′, h3′, h4′) of each transition layer 144 a (or 144 b, 144 c, 144 d) ranges between 50 nm and 700 nm. It should be noted that with the thicknesses of the transition layers falling within this range, the growth quality is more stable and will be less likely to have defects.
  • In the semiconductor structure 100 a of the embodiment, the grading stress buffer layers 140 a, 140 b, 140 c, 140 d are disposed on the aluminum nitride layer 120. The aluminum amount in the transition layers 144 a, 144 b, 144 c, 144 d decreases as an arithmetic progression, and the gallium amount increases as an arithmetic progression. The transition layer 144 a, 144 b, 144 c, 144 d and the side surface 1422 a (or 1422 b, 1422 c, 1422 d) of the grading layer 142 a, 142 b, 142 c, 142 d furthest from the silicon substrate 110 are made up of the same aluminum amount and gallium amount. Thus, a GaN layer can be obtained (i.e. transition layer 144 d). The grading stress buffer layers 140 a, 140 b, 140 c, 140 d can be used to reduce the stress caused by the expansion coefficient and the lattice difference between the GaN layer (i.e. the transition layer 144 d) and the silicon substrate 110. Besides the grading stress buffer layers 140 a, 140 b, 140 c, 140 d having the function of relieving stress, conventional lattice dislocation extending in a thickness direction can also be reduced, improving the overall quality of the semiconductor structure 100 a.
  • Of course, the number of the grading stress buffer layers 140 a, 140 b, 140 c, 140 d shown are exemplary. One skilled in the art can adjust the amount of aluminum and gallium and increase the number of grading stress buffer layers. If the x value (i.e. the gallium amount) increases by an arithmetic progression of 0.1, the number of grading stress buffer layers can be 10. This way, the stress caused by the expansion coefficient and the lattice difference between the GaN layer (i.e. the transition layer 144 d) and the silicon substrate 110 can be reduced; details are not repeated herein.
  • It is noted that the following embodiment uses the same reference numerals and partial content of the previous embodiment. The same reference numerals represent similar components, and repeated description is omitted. Those not described in the following embodiment can be referred to in the above embodiment.
  • FIG. 2 is a schematic cross-sectional view of a semiconductor structure according to another embodiment of the invention. Referring to FIG. 2, the semiconductor structure 100 b of the embodiment is similar to the semiconductor structure 100 a of FIG. 1. The difference between the two is that the semiconductor structure 100 b of the embodiment further includes a superlattice structure layer 150 a. The superlattice structure layer 150 a is disposed between the aluminum nitride layer 120 and the grading stress buffer layers 140 a, 140 b, 140 c, 140 d.
  • In detail, the superlattice structure layer 150 a is disposed between the aluminum nitride layer 120 and the grading stress buffer layer 140 a. The super lattice structure layer 150 a includes a plurality of aluminum gallium indium nitride structure layers 152 a 1, 152 a 2 (FIG. 2 only shows two). Each aluminum gallium indium nitride structure layer 152 a 1 (or 152 a 2) includes a first aluminum gallium indium nitride layer 151 a 1 (or 151 a 2) and a second aluminum gallium indium nitride layer 153 a 1 (or 153 a 2) stacked on each other. The chemical formula of the first aluminum gallium indium nitride layers 151 a 1, 151 a 2 is AlsGatIn(1-s-t)N, wherein 0<s<1, 0<t<1, and 0<s+t≦1. The chemical formula of the second aluminum gallium indium nitride layers 153 a 1, 153 a 2 is AlmGanIn(1-m-n)N, wherein 0<m<1, 0<n<1, and 0<m+n≦1. When m=s, n≠t, and when n=t, m≠s. That is to say, the ratio of the elements of the first aluminum gallium indium nitride layer 151 a 1 (or 151 a 2) and the second aluminum gallium indium nitride layer 153 a 1 (or 153 a 2) are not exactly the same.
  • For example, the chemical formula of the first aluminum gallium indium nitride layer 151 a 1 of the aluminum gallium indium nitride structure layer 152 a 1 is Al0.3Ga0.2In0.5N, and the chemical formula of the second aluminum gallium indium nitride layer 153 a 1 is Al0.3Ga0.4In0.3N. In addition, the thickness t1, t2 of each aluminum gallium indium nitride structure layer 152 a 1, 152 a 2 ranges, for example, from 5 nm to 500 nm. The thickness t of the superlattice structure 150 a, for example, ranges from 20 nm to 5000 nm. Preferably, the number of aluminum gallium indium nitride structure layers 152 a 1, 152 a 2 is at least five. Because the superlattice structure 150 a is disposed between the aluminum nitride layer 120 and the grading stress buffer layer 140 a, the design can help in reducing the stress caused by the expansion coefficient and the lattice difference between the grading stress buffer layer 140 a and the silicon substrate 110. In addition, the dislocation formed before the superlattice structure 150 a is grown can be prevented, so that the dislocation is unable to continue to grow. This further improves the quality of the semiconductor structure 100 b.
  • FIG. 3 is a schematic cross-sectional view of a semiconductor structure according to yet another embodiment of the invention. Referring to FIG. 3, the semiconductor structure 100 c of the embodiment is similar to the semiconductor structure 100 a of FIG. 1. The difference between the two is that the semiconductor structure 100 c of the embodiment further includes a superlattice structure layer 150 b. The superlattice structure layer 150 b is disposed between the grading stress buffer layer 140 a and the grading stress buffer layer 140 b. The superlattice structure layer 150 b includes a plurality of aluminum gallium indium nitride structure layers 152 b 1, 152 b 2. Each aluminum gallium indium nitride structure layer 152 b 1 (or 152 b 2) includes a first aluminum gallium indium nitride layer 151 b 1 (or 151 b 2) and a second aluminum gallium indium nitride layer 153 b 1 (or 153 b 2) stacked on each other. The chemical formula of the first aluminum gallium indium nitride layers 151 b 1, 151 b 2 is AlsGatIn(1-s-t)N, wherein 0<s<1, 0<t<1, and 0<s+t≦1. The chemical formula of the second aluminum gallium indium nitride layers 153 b 1, 153 b 2 is AlmGanIn(1-m-n))N, wherein 0<m<1, 0<n<1, and 0<m+n≦1. When m=s, n≠t, and when n=t, m≠s. That is to say, the ratio of the elements of the first aluminum gallium indium nitride layer 151 b 1 (or 151 b 2) and the second aluminum gallium indium nitride layer 153 b 1 (or 153 b 2) are not exactly the same.
  • For example, the chemical formula of the first aluminum gallium indium nitride layer 151 b 1 of the aluminum gallium indium nitride structure layer 152 b 1 is Al0.3Ga0.2In0.5N, and the chemical formula of the second aluminum gallium indium nitride layer 153 b 1 is Al0.3Ga0.4In0.3N. In addition, the thickness t1′, t2′ of each aluminum gallium indium nitride structure layer 152 b 1, 152 b 2 ranges, for example, from 5 nm to 500 nm. The thickness t′ of the superlattice structure 150 b, for example, ranges from 20 nm to 5000 nm. Preferably, the number of aluminum gallium indium nitride structure layers 152 b 1, 152 b 2 is at least five. Because the superlattice structure 150 a is disposed between the adjacent grading stress buffer layers 140 a, 140 b, the design can help in reducing the stress caused by the expansion coefficient and the lattice difference between the grading stress buffer layers 140 a, 140 b. In addition, the dislocation formed before the superlattice structure 150 b is grown can be prevented, so that the dislocation is unable to continue to grow. This further improves the quality of the semiconductor structure 100 c.
  • It should be noted that the invention does not limit the position and type of the superlattice structures 150 a, 150 b even though the superlattice structures 150 a, 150 b have been to described to be located between the aluminum nitride layer 120 and the grading stress buffer layer 140 a, or, between the grading stress buffer layer 140 a and the grading stress buffer layer 140 b. In other embodiments not shown, the superlattice structure can be disposed between any two neighboring layers of the grading stress buffer layers 140 a, 140 b, 140 c, 140 d; for example, between the grading layer 142 a and the transition layer 144 a, or the grading layer 142 c and the transition layer 144 c. Or, the superlattice structures can at the same time be disposed between the aluminum nitride layer 120 and the grading stress buffer layer 140 a, and between any two neighboring layers of the grading stress buffer layers 140 a, 140 b, 140 c, 140 d. One skilled in the art can adjust or increase the design of the superlattice structures accordingly, so as to satisfy reducing of dislocation. This is still a part of the technical proposal of the invention and does not depart from the protection scope of the invention.
  • To sum up, since a plurality of grading stress buffer layers are disposed on the aluminum nitride layer of the invention, the amount of gallium can be increased, so as to achieve a GaN layer. Therefore, the stress generated from the lattice difference between the GaN layer and the silicon substrate can be effectively reduced. In addition, lattice dislocation extending in a thickness direction can also be effectively reduced, improving the overall quality of the semiconductor structure.
  • It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the disclosed embodiments without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the disclosure cover modifications and variations of this specification provided they fall within the scope of the following claims and their equivalents.

Claims (15)

What is claimed is:
1. A semiconductor structure, comprising:
a silicon substrate;
an aluminum nitride layer disposed on the silicon substrate; and
a plurality of grading stress buffer layers disposed on the aluminum nitride layer, wherein each of the grading stress buffer layers includes a grading layer and a transition layer stacked up sequentially, a chemical formula of each of the grading layers is Al1−xGaxN, wherein an x value is increased from a side near the silicon substrate to a side away from the silicon substrate, and 0≦x≦1, wherein a chemical formula of each of the transition layers is the same as a chemical formula of a side surface furthest away from the silicon substrate of each of the corresponding grading layers, and a chemical formula of the transition layer of the grading stress buffer layer furthest away from the silicon substrate is GaN.
2. The semiconductor structure as claimed in claim 1, wherein a thickness of each of the grading layers of the grading stress buffer layers increase from a side close to the silicon substrate to a side away from the silicon substrate.
3. The semiconductor structure as claimed in claim 2, wherein the thickness of each of the grading layers is between 50 nm and 700 nm.
4. The semiconductor structure as claimed in claim 1, wherein a thickness of each of the transition layers of the grading stress buffer layers increase from a side close to the silicon substrate to a side away from the silicon substrate.
5. The semiconductor structure as claimed in claim 4, wherein the thickness of each of the transition layers is between 50 nm and 700 nm.
6. The semiconductor structure as claimed in claim 1, wherein the x value of the chemical formula of the transition layers increases as an arithmetic progression.
7. The semiconductor structure as claimed in claim 1, wherein a number of the grading stress buffer layers is 2 to 10 grading stress buffer layers.
8. The semiconductor structure as claimed in claim 1, further comprising a superlattice structure layer, disposed between the aluminum nitride layer and the plurality of grading stress buffer layers, wherein the superlattice structure layer includes a plurality of aluminum gallium indium nitride structure layers, each of the aluminum gallium indium nitride structure layers includes a first aluminum gallium indium nitride layer and a second aluminum gallium indium nitride layer stacked on each other, a chemical formula of the first aluminum gallium indium nitride layers is AlsGatIn(1-s-t)N, wherein 0<s<1, 0<t<1, and 0<s+t≦1, and a chemical formula of the second aluminum gallium indium nitride layers is AlmGanIn(1-m-n)N, wherein 0<m<1, 0<n<1, and 0<m+n≦1, and when m=s, n≠t, and when n=t, m≠s.
9. The semiconductor structure as claimed in claim 8, wherein a thickness of each of the aluminum gallium indium nitride structure layers is between 5 nm and 500 nm.
10. The semiconductor structure as claimed in claim 9, wherein the thickness of the superlattice structure layer is between 20 nm and 5000 nm.
11. The semiconductor structure as claimed in claim 8, wherein the superlattice structure layer includes 5 or more aluminum gallium indium nitride structure layers.
12. The semiconductor structure as claimed in claim 1, further comprising a superlattice structure layer, disposed between the plurality of grading stress buffer layers, wherein the superlattice structure layer includes a plurality of aluminum gallium indium nitride structure layers, each of the aluminum gallium indium nitride structure layers includes a first aluminum gallium indium nitride layer and a second aluminum gallium indium nitride layer stacked on each other, a chemical formula of the first aluminum gallium indium nitride layers is AlsGatIn(1-s-t)N, wherein 0<s<1, 0<t<1, and 0<s+t≦1, and a chemical formula of the second aluminum gallium indium nitride layers is AlmGanIn(1-m-n)N, wherein 0<m<1, 0<n<1, and 0<m+n≦1, and when m=s, n≠t, and when n=t, m≠s.
13. The semiconductor structure as claimed in claim 12, wherein a thickness of each of the aluminum gallium indium nitride structure layers is between 5 nm and 500 nm.
14. The semiconductor structure as claimed in claim 13, wherein the thickness of the superlattice structure layer is between 20 nm and 5000 nm.
15. The semiconductor structure as claimed in claim 12, wherein the superlattice structure layer includes 5 or more aluminum gallium indium nitride structure layers.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160359005A1 (en) * 2015-06-05 2016-12-08 Globalwafers Co., Ltd. Semiconductor device
US9859462B2 (en) 2012-12-06 2018-01-02 Genesis Photonics Inc. Semiconductor structure
US10229977B2 (en) 2016-09-19 2019-03-12 Genesis Photonics Inc. Nitrogen-containing semiconductor device
CN116825917A (en) * 2023-08-31 2023-09-29 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109763097A (en) * 2019-01-09 2019-05-17 纳狮新材料(浙江)有限公司 Mechanical part and preparation method thereof with composite coating

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090224226A1 (en) * 2008-03-05 2009-09-10 Advanced Optoelectronic Technology Inc. Light emitting device of group iii nitride based semiconductor
US20110140173A1 (en) * 2009-12-16 2011-06-16 National Semiconductor Corporation Low OHMIC contacts containing germanium for gallium nitride or other nitride-based power devices

Family Cites Families (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02177511A (en) 1988-12-28 1990-07-10 Matsushita Electric Ind Co Ltd Ferrite magnetic material and manufacture thereof
US5606185A (en) * 1994-12-01 1997-02-25 Hughes Aircraft Company Parabolically graded base-collector double heterojunction bipolar transistor
US5874747A (en) * 1996-02-05 1999-02-23 Advanced Technology Materials, Inc. High brightness electroluminescent device emitting in the green to ultraviolet spectrum and method of making the same
US6459100B1 (en) 1998-09-16 2002-10-01 Cree, Inc. Vertical geometry ingan LED
US6649287B2 (en) * 2000-12-14 2003-11-18 Nitronex Corporation Gallium nitride materials and methods
US6956250B2 (en) * 2001-02-23 2005-10-18 Nitronex Corporation Gallium nitride materials including thermally conductive regions
CN1505843B (en) 2001-06-15 2010-05-05 克里公司 GaN based LED formed on a SiC substrate
US7030428B2 (en) * 2001-12-03 2006-04-18 Cree, Inc. Strain balanced nitride heterojunction transistors
CN1431722A (en) 2003-02-18 2003-07-23 华南师范大学 Blue light emitting device of III group nitrogen semi-conductor
CN101697366B (en) * 2003-05-09 2012-12-19 克里公司 LED via ion implant isolation
US20050194584A1 (en) * 2003-11-12 2005-09-08 Slater David B.Jr. LED fabrication via ion implant isolation
JP2005203520A (en) 2004-01-14 2005-07-28 Sumitomo Electric Ind Ltd Semiconductor light emitting element
KR100456063B1 (en) 2004-02-13 2004-11-10 에피밸리 주식회사 Ⅲ-Nitride compound semiconductor light emitting device
KR100756841B1 (en) 2006-03-13 2007-09-07 서울옵토디바이스주식회사 Light emitting diode having graded buffer layer and fabrication method thereof
CN101267008A (en) 2007-03-16 2008-09-17 先进开发光电股份有限公司 Photoelectrical semiconductor component with 3-familty Ni compound semiconductor buffer layer and its making method
JP2009026865A (en) 2007-07-18 2009-02-05 Toyoda Gosei Co Ltd Manufacturing method of group iii nitride-based compound semiconductor light emitting element
CN101527341B (en) 2008-03-07 2013-04-24 展晶科技(深圳)有限公司 III-family nitrogen compound semiconductor light-emitting diode
KR20090117538A (en) 2008-05-09 2009-11-12 삼성전기주식회사 Nitride semiconductor light emitting device
JP4572963B2 (en) 2008-07-09 2010-11-04 住友電気工業株式会社 Group III nitride semiconductor light emitting device and epitaxial wafer
TW201005986A (en) 2008-07-16 2010-02-01 Tekcore Co Ltd Optronic device and manufacturing method thereof
CN101685844A (en) 2008-09-27 2010-03-31 中国科学院物理研究所 GaN-based Single chip white light emitting diode epitaxial material
US20110056429A1 (en) 2009-08-21 2011-03-10 Soraa, Inc. Rapid Growth Method and Structures for Gallium and Nitrogen Containing Ultra-Thin Epitaxial Structures for Devices
WO2011055774A1 (en) * 2009-11-06 2011-05-12 日本碍子株式会社 Epitaxial substrate for semiconductor element, semiconductor element, and method for producing epitaxial substrate for semiconductor element
US8785305B2 (en) * 2009-12-11 2014-07-22 National Semiconductor Corporation Backside stress compensation for gallium nitride or other nitride-based semiconductor devices
US8604461B2 (en) 2009-12-16 2013-12-10 Cree, Inc. Semiconductor device structures with modulated doping and related methods
CN101740691A (en) 2009-12-22 2010-06-16 苏州纳晶光电有限公司 High-power gallium nitride based LED with novel structure
CN102136536A (en) 2010-01-25 2011-07-27 亚威朗(美国) Strain balanced light emitting device
KR20120032329A (en) * 2010-09-28 2012-04-05 삼성전자주식회사 Semiconductor device
US8476146B2 (en) 2010-12-03 2013-07-02 Taiwan Semiconductor Manufacturing Company, Ltd. Reducing wafer distortion through a low CTE layer
JP2014508416A (en) 2011-02-28 2014-04-03 コーニング インコーポレイテッド Semiconductor laser with indium-containing cladding layer
JP5874593B2 (en) 2011-12-23 2016-03-02 豊田合成株式会社 Group III nitride semiconductor light emitting device and method for manufacturing the same
US9165766B2 (en) 2012-02-03 2015-10-20 Transphorm Inc. Buffer layer structures suited for III-nitride devices with foreign substrates
US9136430B2 (en) 2012-08-09 2015-09-15 Samsung Electronics Co., Ltd. Semiconductor buffer structure, semiconductor device including the same, and method of manufacturing semiconductor device using semiconductor buffer structure
US20140097443A1 (en) 2012-10-09 2014-04-10 Industrial Technology Research Institute Nitride semiconductor device
TWI495154B (en) 2012-12-06 2015-08-01 Genesis Photonics Inc Semiconductor structure
CN103022290B (en) 2012-12-19 2015-09-09 湘能华磊光电股份有限公司 LED epitaxial structure with quaternary InAlGaN and preparation method thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090224226A1 (en) * 2008-03-05 2009-09-10 Advanced Optoelectronic Technology Inc. Light emitting device of group iii nitride based semiconductor
US20110140173A1 (en) * 2009-12-16 2011-06-16 National Semiconductor Corporation Low OHMIC contacts containing germanium for gallium nitride or other nitride-based power devices

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9859462B2 (en) 2012-12-06 2018-01-02 Genesis Photonics Inc. Semiconductor structure
US20160359005A1 (en) * 2015-06-05 2016-12-08 Globalwafers Co., Ltd. Semiconductor device
US20210005718A1 (en) * 2015-06-05 2021-01-07 Globalwafers Co., Ltd. Semiconductor device
US11923422B2 (en) * 2015-06-05 2024-03-05 Globalwafers Co., Ltd. Semiconductor device
US10229977B2 (en) 2016-09-19 2019-03-12 Genesis Photonics Inc. Nitrogen-containing semiconductor device
CN113451468A (en) * 2016-09-19 2021-09-28 新世纪光电股份有限公司 Nitrogen-containing semiconductor element
CN116825917A (en) * 2023-08-31 2023-09-29 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode

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