US20130061468A1 - Manufacturing method of package carrier - Google Patents

Manufacturing method of package carrier Download PDF

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US20130061468A1
US20130061468A1 US13/670,424 US201213670424A US2013061468A1 US 20130061468 A1 US20130061468 A1 US 20130061468A1 US 201213670424 A US201213670424 A US 201213670424A US 2013061468 A1 US2013061468 A1 US 2013061468A1
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substrate
conducting element
metal layer
layer
heat conducting
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US13/670,424
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Shih-Hao Sun
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    • H—ELECTRICITY
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    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/486—Via connections through the substrate with or without pins
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
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    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H01L33/642—Heat extraction or cooling elements characterized by the shape
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    • H01L2224/48235—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a via metallisation of the item
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    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85444—Gold (Au) as principal constituent
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    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85455—Nickel (Ni) as principal constituent
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    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
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    • H01L24/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
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    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H01L33/641—Heat extraction or cooling elements characterized by the materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.

Definitions

  • the invention relates to a chip package structure and a manufacturing method thereof. More particularly, the invention relates to a package carrier and a manufacturing method thereof.
  • a leadframe serving as a carrier of a chip is frequently employed in a conventional wire bonding technique. As contact density on a chip gradually increases, the leadframe which is unable to satisfy current demands on the high contact density is replaced by a package substrate which can achieve favorable contact density. Besides, the chip is packaged onto the package substrate by conductive media, such as metal wires or bumps.
  • LED chip is packaged before use.
  • the LED chip emits light and generates a large amount of thermal energy simultaneously. If the thermal energy generated by the LED chip is unable to quickly dissipate and amasses within the LED package structure, the temperature of the LED package structure will be raised continuously. Therefore, the LED chip may have decayed illumination and a shorter lifetime, and if serious, may even have permanent damage due to overheating.
  • the current package technology focuses on decreasing the thermal stress of the package structure to increase the lifetime and the reliability.
  • the invention is directed to a package carrier, suitable for carrying a heat generating component.
  • the invention is directed to a manufacturing method used to manufacture the package carrier.
  • the invention provides a method of fabricating a package carrier.
  • the method includes the following steps.
  • a substrate is provided.
  • the substrate has a top surface and a bottom surface opposite to the top surface.
  • a first opening communicating the upper surface and the lower surface of the substrate is formed.
  • a heat conducting element inside the first opening of the substrate is formed, wherein the heat conducting element is fixed in the first opening of the substrate via an insulating material.
  • At least a through hole passing through the substrate is formed.
  • a metal layer is formed on the upper surface and the lower surface of the substrate and inside the through hole, wherein the metal layer covers the upper surface, the lower surface, the heat conducting element, and the insulating material of the substrate.
  • a portion of the metal layer is removed.
  • a solder mask is formed on a metal layer.
  • a surface passivation layer is formed and covers a portion of the metal layer exposed by the solder mask and a portion of the metal layer located inside the through hole.
  • the invention further provides a package carrier, suitable for packaging a heat generating component.
  • the package carrier includes a substrate, a heat conducting element, an insulating material, a metal layer, a solder mask, and a surface passivation layer.
  • the substrate has an upper surface, a lower surface opposite to the upper surface, a first opening communicating the upper surface and the lower surface and at least a through hole.
  • the heat conducting element is disposed in the first opening of the substrate.
  • the insulating material is filled in the first opening of the substrate to fix the heat conducting element within the first opening of the substrate.
  • the metal layer is disposed on the upper surface, the lower surface, and the through hole of the substrate, wherein the metal layer exposes a portion of the substrate.
  • the solder mask is disposed on the metal layer.
  • the surface passivation layer covers a portion of the metal layer exposed by the solder mask and a portion of the metal layer located inside the through hole, and the heat conducting element is disposed on a portion of the surface passivation
  • the package carrier of the invention has a heat conducting element, and the heat conducting element is embedded in the substrate. Therefore, when a heat generating component mounted on the package carrier generates heat, the heat conducting element and the metal layer of the substrate can quickly transmit the heat to the outside. Therefore, the package carrier of the invention can effectively dissipate the heat generated by the heat generating component, and thus improves the effectiveness and longevity of the heat generating component.
  • FIG. 1A through FIG. 1E are cross-sectional views illustrating a manufacturing method of a package carrier according to an embodiment of the invention.
  • FIG. 2 is a cross-sectional view illustrating the package carrier of FIG. 1E carrying a heat generating component.
  • FIG. 3A through FIG. 3E are cross-sectional views illustrating a manufacturing method of a package carrier according to another embodiment of the invention.
  • FIG. 4 is a cross-sectional view illustrating the package carrier of FIG. 3E carrying a heat generating component.
  • FIG. 1A through FIG. 1E are cross-sectional views illustrating a manufacturing method of a package carrier according to an embodiment of the invention.
  • a substrate 110 a is provided, wherein the substrate 110 a has an upper surface 111 a and a lower surface 113 a opposite to the upper surface 111 a .
  • the substrate 110 a is formed by, for example, a first copper foil 112 a , a second copper foil 114 a , and an insulating layer 116 a .
  • the insulating layer 116 a is disposed between the first copper foil 112 a and the second copper foil 114 a . That is to say, the substrate 110 a of the embodiment is a double-sided plate.
  • a first opening 115 a communicating the upper surface 111 a and the lower surface 113 a of the substrate 110 a is formed, wherein the step of forming the first opening 115 a is, for example, punching or routing.
  • FIG. 1B at least a through hole 117 a passing through the substrate 110 a is formed ( FIG. 1B only shows one), wherein the step of forming the through hole 117 a is, for example, mechanical drilling or laser drilling.
  • an electroplating seed layer 170 is formed on the upper surface 111 a and the lower surface 113 a of the substrate 110 a , the inner wall of the through hole 117 a , and the inner wall of the first opening 115 a.
  • a heat conducting element 120 is disposed inside the first opening 115 a of the substrate 110 a , wherein the heat conducting element 120 is, for example, fixed in the first opening 115 a of the substrate 110 a via an insulating material 130 . That is to say, the insulating material 130 is disposed in the first opening 115 a of the substrate 110 a to fix the position of the heat conducting element 120 relative to the substrate 110 a.
  • the heat conducting element 120 is constructed through a first conductive layer 122 , a second conductive layer 124 , and an insulating material layer 126 .
  • the insulating material layer 126 is disposed between the first conductive layer 122 and the second conductive layer 124 .
  • a thermal expansion coefficient of the heat conducting element 120 is less than a thermal expansion coefficient of the substrate 110 a
  • a thermal conductivity coefficient of the heat conducting element 120 is greater than a thermal conductivity coefficient of the substrate 110 a .
  • the thermal expansion coefficient of the heat conducting element 120 is, for example, 3 to 30 ppm/° C.
  • the thermal conductivity coefficient of the heat conducting element 120 is between 20 and 500 W/m*K.
  • the thermal conductivity coefficient of the insulating material layer 126 of the heat conducting element 120 is greater than the thermal conductivity coefficient of the insulating layer 116 a of the substrate 110 a .
  • a material of the heat conducting element 120 is, for example, ceramic with through silicon via (TSV), ceramic without TSV, silicon with TSV, silicon without TSV, silicon carbide, diamond, or metal.
  • the invention does not limit the sequence of the steps of forming the through hole 117 a and disposing the heat conducting element 120 , even though the steps are described as first forming the through hole 117 a and then disposing the heat conducting element 120 in the first opening 115 a of the substrate 110 a .
  • the heat conducting element 120 can first be disposed in the first opening 115 a of the substrate 110 a , and then the through hole 117 a is formed.
  • the sequence of the steps of forming the through hole 117 a and disposing the heat conducting element 120 is merely exemplary and is not limited thereto.
  • a metal layer 140 is formed on the upper surface 111 a and the lower surface 113 a of the substrate 110 a and on the electroplating seed layer 170 inside the through hole 117 a , wherein the metal layer 140 covers the upper surface 111 a and the lower surface 113 a of the substrate 110 a , the heat conducting element 120 , and the insulating material 130 .
  • the step of forming the metal layer 140 is, for example, electroplating, wherein the electroplating seed layer 170 can increase the reliability of electroplating the metal layer 140 .
  • a portion of the metal layer 140 and a portion of the electroplating seed layer 170 under the portion of the metal layer 140 , a portion of the first copper foil 112 a , and a portion of the second copper foil 114 a are removed to expose a portion of the insulating layer 116 a . Then, a solder mask 150 is formed on the metal layer 140 .
  • a surface passivation layer 160 is formed, wherein the surface passivation layer 160 covers a portion of the metal layer 140 exposed by the solder mask 150 and a portion of the metal layer 140 located inside the through hole 117 a , and further covers a portion of the first copper foil 112 a and a portion of the second copper foil 114 a exposed by the insulating layer 116 a .
  • a material of the surface passivation layer 160 includes, for example, Ni and Au. As such, the package carrier 100 a is completely formed.
  • the package carrier 100 a of the embodiment includes the substrate 110 a , the heat conducting element 120 , the insulating material 130 , the metal layer 140 , the solder mask 150 , and the surface passivation layer 160 .
  • the substrate 110 a is constructed of the first copper foil 112 a , the second copper foil 114 a , and the insulating layer 116 a .
  • the substrate 110 a has the upper surface 111 a , and the lower surface 113 a opposite to the upper surface 111 a , the first opening 115 a communicating the upper surface 111 a and the lower surface 113 a and at least a through hole 117 a .
  • the heat conducting element 120 is disposed in the first opening 115 a of the substrate 110 a .
  • the insulating material 130 is filled in the first opening 115 a of the substrate 110 a to fix the heat conducting element 120 within the first opening 115 a of the substrate 110 a .
  • the metal layer 140 is disposed on the upper surface 111 a and the lower surface 113 a of the substrate 110 a and inside the through hole 117 a , and the metal layer 140 exposes a portion of the substrate 110 a .
  • the solder mask 150 is disposed on the metal layer 140 .
  • the surface passivation layer 160 covers a portion of the metal layer 140 exposed by the solder mask 150 and a portion of the metal layer 140 located inside the through hole 117 a , and further covers a portion of the first copper foil 112 a and a portion of the second copper foil 114 a exposed by the insulating layer 116 a.
  • FIG. 2 is a cross-sectional view illustrating the package carrier of FIG. 1E carrying a heat generating component.
  • the package carrier 100 a is suitable to carry a heat generating component 200 , wherein the heat generating component 200 is disposed on a portion of the surface passivation layer 160 over the heat conducting element 120 , and the heat generating component 200 is, for example, an electronic chip or an optoelectronic component, but the invention is not limited thereto.
  • the electronic chip can be an integrated circuit chip such as a graphic chip or a memory chip, and can be a single chip or a chip module.
  • the optoelectronic component is, for example, an LED, a laser diode, or a high intensity discharge lamp.
  • the heat generating component 200 is described as an LED.
  • the heat generating component 200 (e.g. a semiconductor chip) can be electrically connected to the surface passivation layer 160 through wire bonding with a plurality of conductive wires 220 .
  • An encapsulant 210 can also be used to cover the heat generating component 200 , the conductive wires 220 and a portion of the package carrier 100 a so as to protect the electrical connection between the heat generating component 200 , and the conductive wires 220 and the package carrier 100 a . Since the thermal expansion coefficient of the heat conducting element 120 of the embodiment is less than the thermal expansion coefficient of the substrate 110 a , the difference between the thermal expansion coefficients of the heat generating component 200 , the heat conducting element 120 and the substrate 110 a can be gradually decreased.
  • the increase of stress because of the thermal expansion coefficient difference from being too great between the heat generating component 200 , the heat conducting element 120 , and the substrate 110 a can be avoided. Also, the heat generating component 200 can be prevented from peeling and damage, and thus the reliability of the package carrier 100 a is raised.
  • the thermal conductivity coefficient of the heat conducting element 120 is greater than the thermal conductivity coefficient of the substrate 110 a , and the heat conducting element 120 is embedded in the substrate 110 a , the heat generated by the heat generating component 200 disposed on the package carrier 100 a can be quickly transmitted to the outside through the heat conducting element 120 and the metal layer 140 on the substrate 110 a . Therefore, the package carrier 100 a of the embodiment can effectively dissipate the heat generated by the heat generating component 200 , and thus the effectiveness and longevity of the heat generating component 200 is improved.
  • the invention does not limit the bonding type between the heat generating component 200 and the package carrier 100 a , and the type of the heat generating component 200 .
  • the heat generating component 200 can also be electrically connected and located on the metal layer 140 over the heat conducting element 120 through a plurality of bumps (not shown) by flip chip bonding.
  • the heat generating component 200 can be a chip package (not shown) mounted on the package carrier 100 a through surface mount technology (SMT).
  • SMT surface mount technology
  • FIG. 3A through FIG. 3E are cross-sectional views illustrating a manufacturing method of a package carrier according to another embodiment of the invention.
  • the substrate 110 b is provided, wherein the substrate 110 b has an upper surface 111 b and a lower surface 113 b opposite to the upper surface 111 b .
  • the substrate 110 b is, for example, constructed by a metal plate 112 b and at least an insulating block 114 b ( FIG. 3A shows two), wherein the metal plate 112 b has at least a second opening 119 b ( FIG. 3 shows two) communicating the upper surface 111 b and the lower surface 113 b , and these insulating blocks 114 b are disposed in the second openings 119 b.
  • a first opening 115 b passing through the metal plate 112 b is formed, wherein the step of forming the first opening 115 b is, for example, punching or routing.
  • FIG. 3B At least a through hole 117 b ( FIG. 3B shows two) passing through the insulating block 114 b is formed, wherein the step of forming the through hole 117 b is, for example, mechanical drilling or laser drilling.
  • the heat conducting element 120 is disposed inside the first opening 115 b , wherein the heat conducting element 120 is, for example, fixed in the first opening 115 b via an insulating material 130 . That is to say, the insulating material 130 is disposed in the first opening 115 b to fix the position of the heat conducting element 120 relative to the substrate 110 b.
  • the heat conducting element 120 is constructed through the first conductive layer 122 , the second conductive layer 124 , and the insulating material layer 126 .
  • the insulating material layer 126 is disposed between the first conductive layer 122 and the second conductive layer 124 .
  • a thermal expansion coefficient of the heat conducting element 120 is less than a thermal expansion coefficient of the substrate 110 b , and a thermal conductivity coefficient of the heat conducting element 120 is greater than a thermal conductivity coefficient of the substrate 110 b .
  • the thermal expansion coefficient of the heat conducting element 120 is, for example, 3 to 30 ppm/° C.
  • the thermal conductivity coefficient of the heat conducting element 120 is between 20 and 500 W/m*K.
  • a material of the heat conducting element 120 is, for example, ceramic with through silicon via (TSV), ceramic without TSV, silicon with TSV, silicon without TSV, silicon carbide, diamond, or metal.
  • the invention does not limit the sequence of the steps of forming the through hole 117 b and disposing the heat conducting element 120 , even though the steps are described as first forming the through hole 117 b and then disposing the heat conducting element 120 in the first opening 115 b .
  • the heat conducting element 120 can first be disposed in the first opening 115 b , and then the through hole 117 b is formed.
  • the sequence of the steps of forming the through hole 117 b and disposing the heat conducting element 120 is merely exemplary and is not limited thereto.
  • a metal layer 140 is formed on the upper surface 111 b and the lower surface 113 b of the substrate 110 b and inside the through hole 117 b of the substrate 110 b , wherein the metal layer 140 covers the upper surface 111 b and the lower surface 113 b of the substrate 110 b , the heat conducting element 120 , and the insulating material 130 .
  • the step of forming the conductive layer 140 is, for example, electroplating.
  • a portion of the metal layer 140 is removed to expose a portion of each of the insulating blocks 114 b located in the second opening 119 b .
  • a solder mask 150 is formed on the metal layer 140 .
  • a surface passivation layer 160 is formed, wherein the surface passivation layer 160 covers a portion of the metal layer 140 exposed by the solder mask 150 and a portion of the metal layer 140 located inside the through hole 117 b , and further covers a portion of the metal layer 140 exposed by the insulating block 114 b .
  • a material of the surface passivation layer 160 includes, for example, Ni and Au. As such, a package carrier 100 b is completely formed.
  • the package carrier 100 b of the embodiment includes the substrate 110 b , the heat conducting element 120 , the insulating material 130 , the metal layer 140 , the solder mask 150 , and the surface passivation layer 160 .
  • the substrate 110 b is constructed of the metal plate 112 b and the insulating blocks 114 b .
  • the substrate 110 b has the upper surface 111 b and the lower surface 113 b opposite to the upper surface 111 b .
  • the metal plate 112 b has the first opening 115 b and the second opening 119 b , and the insulating blocks 114 b have the through holes 117 b .
  • the heat conducting element 120 is disposed in the first opening 115 b of the metal plate 112 b .
  • the insulating material 130 is filled in the first opening 115 b to fix the heat conducting element 120 within the first opening 115 b .
  • the metal layer 140 is disposed on the upper surface 111 b and the lower surface 113 b of the substrate 110 b and inside the through hole 117 b , and exposes a portion of each of the insulating block 114 b located on the corresponding second opening 119 b .
  • the solder mask 150 is disposed on the metal layer 140 .
  • the surface passivation layer 160 covers a portion of the metal layer 140 exposed by the solder mask 150 and a portion of the metal layer 140 located inside the through hole 117 b , and further covers a portion of the metal layer 140 exposed by the insulating block 114 b.
  • FIG. 4 is a cross-sectional view illustrating the package carrier of FIG. 3E carrying a heat generating component.
  • the package carrier 100 b is suitable to carry a heat generating component 200 , wherein the heat generating component 200 is disposed on a portion of the surface passivation layer 160 over the corresponding heat conducting element 120 , and the heat generating component 200 is, for example, an electronic chip or an optoelectronic component, but the invention is not limited thereto.
  • the electronic chip can be an integrated circuit chip such as a graphic chip or a memory chip, and can be a single chip or a chip module.
  • the optoelectronic component is, for example, an LED, a laser diode, or a high intensity discharge lamp.
  • the heat generating component 200 is described as an LED.
  • the heat generating component 200 (e.g. a semiconductor chip) can be electrically connected to the surface passivation layer 160 through wire bonding with a plurality of conductive wires 220 .
  • An encapsulant 210 can also be used to cover the heat generating component 200 , the conductive wires 220 and a portion of the package carrier 100 b so as to protect the electrical connection between the heat generating component 200 , and the conductive wires 220 and the package carrier 100 b . Since the thermal expansion coefficient of the heat conducting element 120 of the embodiment is less than the thermal expansion coefficient of the substrate 110 b , the difference between the thermal expansion coefficients of the heat generating component 200 , the heat conducting element 120 and the substrate 110 b can be gradually decreased.
  • the increase of stress because of the thermal expansion coefficient difference from being too great between the heat generating component 200 , the heat conducting element 120 , and the substrate 110 b can be avoided. Also, the heat generating component 200 can be prevented from peeling and damage, and thus the reliability of the package carrier 100 b is raised.
  • the thermal conductivity coefficient of the heat conducting element 120 is greater than the thermal conductivity coefficient of the substrate 110 b , and the heat conducting element 120 is embedded in the substrate 110 b , the heat generated by the heat generating component 200 disposed on the package carrier 100 b can be quickly transmitted to the outside through the heat conducting element 120 and the metal layer 140 on the substrate 110 b . Therefore, the package carrier 100 b of the embodiment can effectively dissipate the heat generated by the heat generating component 200 , and thus the effectiveness and longevity of the heat generating component 200 is improved.
  • the invention does not limit the bonding type between the heat generating component 200 and the package carrier 100 b , and the type of the heat generating component 200 .
  • the heat generating component 200 can also be electrically connected and located on the metal layer 140 over the heat conducting element 120 through a plurality of bumps (not shown) by flip chip bonding.
  • the heat generating component 200 can be a chip package (not shown) mounted on the package carrier 100 b through surface mount technology (SMT).
  • SMT surface mount technology
  • the package carrier of the invention since the package carrier of the invention has a heat conducting element, and the heat conducting element is embedded in the substrate so that the heat generated by the heat generating component disposed on the package carrier can be quickly transmitted to the outside through the heat conducting element and the metal layer on the substrate. Therefore, the package carrier of the invention can effectively dissipate the heat generated by the heat generating component, and thus the effectiveness and longevity of the heat generating component is improved. Since the thermal expansion coefficient of the heat conducting element of the invention is less than the thermal expansion coefficient of the substrate, the difference between the thermal expansion coefficients of the heat generating component, the heat conducting element and the substrate can be gradually decreased. Thus, the increase of stress because of the thermal expansion coefficient difference from being too great between the heat generating component, the heat conducting element, and the substrate can be avoided. Also, the heat generating component can be prevented from peeling and damage, and thus the reliability of the package carrier is raised.

Abstract

A manufacturing method of a package carrier is provided. A substrate having an upper and lower surface is provided. A first opening communicating the upper and lower surface of the substrate is formed. A heat conducting element is disposed inside the first opening, wherein the heat conducting element is fixed in the first opening via an insulating material. At least a through hole passing through the substrate is formed. A metal layer is formed on the upper and lower surface of the substrate and inside the through hole. The metal layer covers the upper and lower surface of the substrate, the heat conducting element and the insulating material. A portion of the metal layer is removed. A solder mask is formed on the metal layer. A surface passivation layer is formed and covers the metal layer exposed by the solder mask and the metal layer located inside the through hole.

Description

    CROSS-REFERENCE TO RELATED APPLICATION
  • This application is a Divisional of and claims the priority benefit of U.S. patent application Ser. No. 13/090,285, filed on Apr. 20, 2011, now pending, which claims the priority benefits of Taiwan application Serial No. 100101972, filed on Jan. 19, 2011. The entirety of each of the above-mentioned patent applications is hereby incorporated by reference herein and made a part of specification.
    • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • The invention relates to a chip package structure and a manufacturing method thereof. More particularly, the invention relates to a package carrier and a manufacturing method thereof.
  • 2. Description of Related Art
  • The purpose of a chip package is to protect a bare chip, lower the chip contact density, and provide the chip with good heat dissipation. A leadframe serving as a carrier of a chip is frequently employed in a conventional wire bonding technique. As contact density on a chip gradually increases, the leadframe which is unable to satisfy current demands on the high contact density is replaced by a package substrate which can achieve favorable contact density. Besides, the chip is packaged onto the package substrate by conductive media, such as metal wires or bumps.
  • Regarding current and common light emitting diode (LED) package structures, an LED chip is packaged before use. The LED chip emits light and generates a large amount of thermal energy simultaneously. If the thermal energy generated by the LED chip is unable to quickly dissipate and amasses within the LED package structure, the temperature of the LED package structure will be raised continuously. Therefore, the LED chip may have decayed illumination and a shorter lifetime, and if serious, may even have permanent damage due to overheating.
  • Since the thermal expansion coefficients of a LED chip and a package carrier are mismatched, the generated thermal stress and warpage are more and more critical so that the reliability of the LED package structure is lowered. Thus, besides enhancing the light extraction efficiency, the current package technology focuses on decreasing the thermal stress of the package structure to increase the lifetime and the reliability.
    • SUMMARY OF THE INVENTION
  • The invention is directed to a package carrier, suitable for carrying a heat generating component.
  • The invention is directed to a manufacturing method used to manufacture the package carrier.
  • The invention provides a method of fabricating a package carrier. The method includes the following steps. A substrate is provided. The substrate has a top surface and a bottom surface opposite to the top surface. A first opening communicating the upper surface and the lower surface of the substrate is formed. A heat conducting element inside the first opening of the substrate is formed, wherein the heat conducting element is fixed in the first opening of the substrate via an insulating material. At least a through hole passing through the substrate is formed. A metal layer is formed on the upper surface and the lower surface of the substrate and inside the through hole, wherein the metal layer covers the upper surface, the lower surface, the heat conducting element, and the insulating material of the substrate. A portion of the metal layer is removed. A solder mask is formed on a metal layer. A surface passivation layer is formed and covers a portion of the metal layer exposed by the solder mask and a portion of the metal layer located inside the through hole.
  • The invention further provides a package carrier, suitable for packaging a heat generating component. The package carrier includes a substrate, a heat conducting element, an insulating material, a metal layer, a solder mask, and a surface passivation layer. The substrate has an upper surface, a lower surface opposite to the upper surface, a first opening communicating the upper surface and the lower surface and at least a through hole. The heat conducting element is disposed in the first opening of the substrate. The insulating material is filled in the first opening of the substrate to fix the heat conducting element within the first opening of the substrate. The metal layer is disposed on the upper surface, the lower surface, and the through hole of the substrate, wherein the metal layer exposes a portion of the substrate. The solder mask is disposed on the metal layer. The surface passivation layer covers a portion of the metal layer exposed by the solder mask and a portion of the metal layer located inside the through hole, and the heat conducting element is disposed on a portion of the surface passivation layer over the heat conducting element.
  • Based on the above, the package carrier of the invention has a heat conducting element, and the heat conducting element is embedded in the substrate. Therefore, when a heat generating component mounted on the package carrier generates heat, the heat conducting element and the metal layer of the substrate can quickly transmit the heat to the outside. Therefore, the package carrier of the invention can effectively dissipate the heat generated by the heat generating component, and thus improves the effectiveness and longevity of the heat generating component.
  • In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanying figures are described in detail below.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • The accompanying drawings are included to provide a further understanding of the disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the disclosure and, together with the description, serve to explain the principles of the disclosure.
  • FIG. 1A through FIG. 1E are cross-sectional views illustrating a manufacturing method of a package carrier according to an embodiment of the invention.
  • FIG. 2 is a cross-sectional view illustrating the package carrier of FIG. 1E carrying a heat generating component.
  • FIG. 3A through FIG. 3E are cross-sectional views illustrating a manufacturing method of a package carrier according to another embodiment of the invention.
  • FIG. 4 is a cross-sectional view illustrating the package carrier of FIG. 3E carrying a heat generating component.
    •  DESCRIPTION OF EMBODIMENTS
  • FIG. 1A through FIG. 1E are cross-sectional views illustrating a manufacturing method of a package carrier according to an embodiment of the invention. Referring to FIG. 1A, in a manufacturing method of a package carrier according to the embodiment, a substrate 110 a is provided, wherein the substrate 110 a has an upper surface 111 a and a lower surface 113 a opposite to the upper surface 111 a. In the embodiment, the substrate 110 a is formed by, for example, a first copper foil 112 a, a second copper foil 114 a, and an insulating layer 116 a. The insulating layer 116 a is disposed between the first copper foil 112 a and the second copper foil 114 a. That is to say, the substrate 110 a of the embodiment is a double-sided plate.
  • Next, referring to FIG. 1B, a first opening 115 a communicating the upper surface 111 a and the lower surface 113 a of the substrate 110 a is formed, wherein the step of forming the first opening 115 a is, for example, punching or routing.
  • Still referring to FIG. 1B, at least a through hole 117 a passing through the substrate 110 a is formed (FIG. 1B only shows one), wherein the step of forming the through hole 117 a is, for example, mechanical drilling or laser drilling. In order to increase the reliability of follow-up steps, an electroplating seed layer 170 is formed on the upper surface 111 a and the lower surface 113 a of the substrate 110 a, the inner wall of the through hole 117 a, and the inner wall of the first opening 115 a.
  • Referring to FIG. 1C, a heat conducting element 120 is disposed inside the first opening 115 a of the substrate 110 a, wherein the heat conducting element 120 is, for example, fixed in the first opening 115 a of the substrate 110 a via an insulating material 130. That is to say, the insulating material 130 is disposed in the first opening 115 a of the substrate 110 a to fix the position of the heat conducting element 120 relative to the substrate 110 a.
  • In the embodiment, the heat conducting element 120 is constructed through a first conductive layer 122, a second conductive layer 124, and an insulating material layer 126. The insulating material layer 126 is disposed between the first conductive layer 122 and the second conductive layer 124. A thermal expansion coefficient of the heat conducting element 120 is less than a thermal expansion coefficient of the substrate 110 a, and a thermal conductivity coefficient of the heat conducting element 120 is greater than a thermal conductivity coefficient of the substrate 110 a. In detail, the thermal expansion coefficient of the heat conducting element 120 is, for example, 3 to 30 ppm/° C., and the thermal conductivity coefficient of the heat conducting element 120 is between 20 and 500 W/m*K. The thermal conductivity coefficient of the insulating material layer 126 of the heat conducting element 120 is greater than the thermal conductivity coefficient of the insulating layer 116 a of the substrate 110 a. In addition, a material of the heat conducting element 120 is, for example, ceramic with through silicon via (TSV), ceramic without TSV, silicon with TSV, silicon without TSV, silicon carbide, diamond, or metal.
  • It should be noted that the invention does not limit the sequence of the steps of forming the through hole 117 a and disposing the heat conducting element 120, even though the steps are described as first forming the through hole 117 a and then disposing the heat conducting element 120 in the first opening 115 a of the substrate 110 a. Of course, in another embodiment, the heat conducting element 120 can first be disposed in the first opening 115 a of the substrate 110 a, and then the through hole 117 a is formed. Hence, the sequence of the steps of forming the through hole 117 a and disposing the heat conducting element 120 is merely exemplary and is not limited thereto.
  • Next, referring to FIG. 1D, a metal layer 140 is formed on the upper surface 111 a and the lower surface 113 a of the substrate 110 a and on the electroplating seed layer 170 inside the through hole 117 a, wherein the metal layer 140 covers the upper surface 111 a and the lower surface 113 a of the substrate 110 a, the heat conducting element 120, and the insulating material 130. In the embodiment, the step of forming the metal layer 140 is, for example, electroplating, wherein the electroplating seed layer 170 can increase the reliability of electroplating the metal layer 140.
  • Referring to FIG. 1E, a portion of the metal layer 140 and a portion of the electroplating seed layer 170 under the portion of the metal layer 140, a portion of the first copper foil 112 a, and a portion of the second copper foil 114 a are removed to expose a portion of the insulating layer 116 a. Then, a solder mask 150 is formed on the metal layer 140. Finally, a surface passivation layer 160 is formed, wherein the surface passivation layer 160 covers a portion of the metal layer 140 exposed by the solder mask 150 and a portion of the metal layer 140 located inside the through hole 117 a, and further covers a portion of the first copper foil 112 a and a portion of the second copper foil 114 a exposed by the insulating layer 116 a. In the embodiment, a material of the surface passivation layer 160 includes, for example, Ni and Au. As such, the package carrier 100 a is completely formed.
  • Structurally, the package carrier 100 a of the embodiment includes the substrate 110 a, the heat conducting element 120, the insulating material 130, the metal layer 140, the solder mask 150, and the surface passivation layer 160. The substrate 110 a is constructed of the first copper foil 112 a, the second copper foil 114 a, and the insulating layer 116 a. The substrate 110 a has the upper surface 111 a, and the lower surface 113 a opposite to the upper surface 111 a, the first opening 115 a communicating the upper surface 111 a and the lower surface 113 a and at least a through hole 117 a. The heat conducting element 120 is disposed in the first opening 115 a of the substrate 110 a. The insulating material 130 is filled in the first opening 115 a of the substrate 110 a to fix the heat conducting element 120 within the first opening 115 a of the substrate 110 a. The metal layer 140 is disposed on the upper surface 111 a and the lower surface 113 a of the substrate 110 a and inside the through hole 117 a, and the metal layer 140 exposes a portion of the substrate 110 a. The solder mask 150 is disposed on the metal layer 140. The surface passivation layer 160 covers a portion of the metal layer 140 exposed by the solder mask 150 and a portion of the metal layer 140 located inside the through hole 117 a, and further covers a portion of the first copper foil 112 a and a portion of the second copper foil 114 a exposed by the insulating layer 116 a.
  • FIG. 2 is a cross-sectional view illustrating the package carrier of FIG. 1E carrying a heat generating component. Referring to FIG. 2, in the embodiment, the package carrier 100 a is suitable to carry a heat generating component 200, wherein the heat generating component 200 is disposed on a portion of the surface passivation layer 160 over the heat conducting element 120, and the heat generating component 200 is, for example, an electronic chip or an optoelectronic component, but the invention is not limited thereto. For example, the electronic chip can be an integrated circuit chip such as a graphic chip or a memory chip, and can be a single chip or a chip module. The optoelectronic component is, for example, an LED, a laser diode, or a high intensity discharge lamp. The heat generating component 200 is described as an LED.
  • In detail, the heat generating component 200 (e.g. a semiconductor chip) can be electrically connected to the surface passivation layer 160 through wire bonding with a plurality of conductive wires 220. An encapsulant 210 can also be used to cover the heat generating component 200, the conductive wires 220 and a portion of the package carrier 100 a so as to protect the electrical connection between the heat generating component 200, and the conductive wires 220 and the package carrier 100 a. Since the thermal expansion coefficient of the heat conducting element 120 of the embodiment is less than the thermal expansion coefficient of the substrate 110 a, the difference between the thermal expansion coefficients of the heat generating component 200, the heat conducting element 120 and the substrate 110 a can be gradually decreased. Thus, the increase of stress because of the thermal expansion coefficient difference from being too great between the heat generating component 200, the heat conducting element 120, and the substrate 110 a can be avoided. Also, the heat generating component 200 can be prevented from peeling and damage, and thus the reliability of the package carrier 100 a is raised.
  • In addition, since the thermal conductivity coefficient of the heat conducting element 120 is greater than the thermal conductivity coefficient of the substrate 110 a, and the heat conducting element 120 is embedded in the substrate 110 a, the heat generated by the heat generating component 200 disposed on the package carrier 100 a can be quickly transmitted to the outside through the heat conducting element 120 and the metal layer 140 on the substrate 110 a. Therefore, the package carrier 100 a of the embodiment can effectively dissipate the heat generated by the heat generating component 200, and thus the effectiveness and longevity of the heat generating component 200 is improved.
  • It should be noted that even though the embodiment describes the heat generating component 200 is electrically connected to the package carrier 100 a and the metal layer 140 through wire bonding, the invention does not limit the bonding type between the heat generating component 200 and the package carrier 100 a, and the type of the heat generating component 200. In another embodiment, the heat generating component 200 can also be electrically connected and located on the metal layer 140 over the heat conducting element 120 through a plurality of bumps (not shown) by flip chip bonding. In still another embodiment, the heat generating component 200 can be a chip package (not shown) mounted on the package carrier 100 a through surface mount technology (SMT). The bonding type between the heat generating component 200 and the package carrier 100 a and the type of the heat generating component 200 are merely exemplary and should not be construed as limitations to the invention.
  • FIG. 3A through FIG. 3E are cross-sectional views illustrating a manufacturing method of a package carrier according to another embodiment of the invention. Referring to FIG. 3A, in a manufacturing method of the package carrier according to the embodiment, the substrate 110 b is provided, wherein the substrate 110 b has an upper surface 111 b and a lower surface 113 b opposite to the upper surface 111 b. In the embodiment, the substrate 110 b is, for example, constructed by a metal plate 112 b and at least an insulating block 114 b (FIG. 3A shows two), wherein the metal plate 112 b has at least a second opening 119 b (FIG. 3 shows two) communicating the upper surface 111 b and the lower surface 113 b, and these insulating blocks 114 b are disposed in the second openings 119 b.
  • Next, referring to FIG. 3B, a first opening 115 b passing through the metal plate 112 b is formed, wherein the step of forming the first opening 115 b is, for example, punching or routing.
  • Still referring to FIG. 3B, at least a through hole 117 b (FIG. 3B shows two) passing through the insulating block 114 b is formed, wherein the step of forming the through hole 117 b is, for example, mechanical drilling or laser drilling.
  • Referring to FIG. 3C, the heat conducting element 120 is disposed inside the first opening 115 b, wherein the heat conducting element 120 is, for example, fixed in the first opening 115 b via an insulating material 130. That is to say, the insulating material 130 is disposed in the first opening 115 b to fix the position of the heat conducting element 120 relative to the substrate 110 b.
  • In the embodiment, the heat conducting element 120 is constructed through the first conductive layer 122, the second conductive layer 124, and the insulating material layer 126. The insulating material layer 126 is disposed between the first conductive layer 122 and the second conductive layer 124. A thermal expansion coefficient of the heat conducting element 120 is less than a thermal expansion coefficient of the substrate 110 b, and a thermal conductivity coefficient of the heat conducting element 120 is greater than a thermal conductivity coefficient of the substrate 110 b. In detail, the thermal expansion coefficient of the heat conducting element 120 is, for example, 3 to 30 ppm/° C., and the thermal conductivity coefficient of the heat conducting element 120 is between 20 and 500 W/m*K. In addition, a material of the heat conducting element 120 is, for example, ceramic with through silicon via (TSV), ceramic without TSV, silicon with TSV, silicon without TSV, silicon carbide, diamond, or metal.
  • It should be noted that the invention does not limit the sequence of the steps of forming the through hole 117 b and disposing the heat conducting element 120, even though the steps are described as first forming the through hole 117 b and then disposing the heat conducting element 120 in the first opening 115 b. Of course, in another embodiment, the heat conducting element 120 can first be disposed in the first opening 115 b, and then the through hole 117 b is formed. Hence, the sequence of the steps of forming the through hole 117 b and disposing the heat conducting element 120 is merely exemplary and is not limited thereto.
  • Next, referring to FIG. 3D, a metal layer 140 is formed on the upper surface 111 b and the lower surface 113 b of the substrate 110 b and inside the through hole 117 b of the substrate 110 b, wherein the metal layer 140 covers the upper surface 111 b and the lower surface 113 b of the substrate 110 b, the heat conducting element 120, and the insulating material 130. In the embodiment, the step of forming the conductive layer 140 is, for example, electroplating.
  • Next, referring to FIG. 3E, a portion of the metal layer 140 is removed to expose a portion of each of the insulating blocks 114 b located in the second opening 119 b. Then, a solder mask 150 is formed on the metal layer 140. Finally, a surface passivation layer 160 is formed, wherein the surface passivation layer 160 covers a portion of the metal layer 140 exposed by the solder mask 150 and a portion of the metal layer 140 located inside the through hole 117 b, and further covers a portion of the metal layer 140 exposed by the insulating block 114 b. In the embodiment, a material of the surface passivation layer 160 includes, for example, Ni and Au. As such, a package carrier 100 b is completely formed.
  • Structurally, the package carrier 100 b of the embodiment includes the substrate 110 b, the heat conducting element 120, the insulating material 130, the metal layer 140, the solder mask 150, and the surface passivation layer 160. The substrate 110 b is constructed of the metal plate 112 b and the insulating blocks 114 b. The substrate 110 b has the upper surface 111 b and the lower surface 113 b opposite to the upper surface 111 b. The metal plate 112 b has the first opening 115 b and the second opening 119 b, and the insulating blocks 114 b have the through holes 117 b. The heat conducting element 120 is disposed in the first opening 115 b of the metal plate 112 b. The insulating material 130 is filled in the first opening 115 b to fix the heat conducting element 120 within the first opening 115 b. The metal layer 140 is disposed on the upper surface 111 b and the lower surface 113 b of the substrate 110 b and inside the through hole 117 b, and exposes a portion of each of the insulating block 114 b located on the corresponding second opening 119 b. The solder mask 150 is disposed on the metal layer 140. The surface passivation layer 160 covers a portion of the metal layer 140 exposed by the solder mask 150 and a portion of the metal layer 140 located inside the through hole 117 b, and further covers a portion of the metal layer 140 exposed by the insulating block 114 b.
  • FIG. 4 is a cross-sectional view illustrating the package carrier of FIG. 3E carrying a heat generating component. Referring to FIG. 4, in the embodiment, the package carrier 100 b is suitable to carry a heat generating component 200, wherein the heat generating component 200 is disposed on a portion of the surface passivation layer 160 over the corresponding heat conducting element 120, and the heat generating component 200 is, for example, an electronic chip or an optoelectronic component, but the invention is not limited thereto. For example, the electronic chip can be an integrated circuit chip such as a graphic chip or a memory chip, and can be a single chip or a chip module. The optoelectronic component is, for example, an LED, a laser diode, or a high intensity discharge lamp. The heat generating component 200 is described as an LED.
  • In detail, the heat generating component 200 (e.g. a semiconductor chip) can be electrically connected to the surface passivation layer 160 through wire bonding with a plurality of conductive wires 220. An encapsulant 210 can also be used to cover the heat generating component 200, the conductive wires 220 and a portion of the package carrier 100 b so as to protect the electrical connection between the heat generating component 200, and the conductive wires 220 and the package carrier 100 b. Since the thermal expansion coefficient of the heat conducting element 120 of the embodiment is less than the thermal expansion coefficient of the substrate 110 b, the difference between the thermal expansion coefficients of the heat generating component 200, the heat conducting element 120 and the substrate 110 b can be gradually decreased. Thus, the increase of stress because of the thermal expansion coefficient difference from being too great between the heat generating component 200, the heat conducting element 120, and the substrate 110 b can be avoided. Also, the heat generating component 200 can be prevented from peeling and damage, and thus the reliability of the package carrier 100 b is raised.
  • In addition, since the thermal conductivity coefficient of the heat conducting element 120 is greater than the thermal conductivity coefficient of the substrate 110 b, and the heat conducting element 120 is embedded in the substrate 110 b, the heat generated by the heat generating component 200 disposed on the package carrier 100 b can be quickly transmitted to the outside through the heat conducting element 120 and the metal layer 140 on the substrate 110 b. Therefore, the package carrier 100 b of the embodiment can effectively dissipate the heat generated by the heat generating component 200, and thus the effectiveness and longevity of the heat generating component 200 is improved.
  • It should be noted that even though the embodiment describes the heat generating component 200 is electrically connected to the package carrier 100 b and the metal layer 140 through wiring bonding, the invention does not limit the bonding type between the heat generating component 200 and the package carrier 100 b, and the type of the heat generating component 200. In another embodiment, the heat generating component 200 can also be electrically connected and located on the metal layer 140 over the heat conducting element 120 through a plurality of bumps (not shown) by flip chip bonding. In still another embodiment, the heat generating component 200 can be a chip package (not shown) mounted on the package carrier 100 b through surface mount technology (SMT). The bonding type between heat generating component 200 and the package carrier 100 b and the type of the heat generating component 200 are merely exemplary and should not be construed as limitations to the invention.
  • To sum up, since the package carrier of the invention has a heat conducting element, and the heat conducting element is embedded in the substrate so that the heat generated by the heat generating component disposed on the package carrier can be quickly transmitted to the outside through the heat conducting element and the metal layer on the substrate. Therefore, the package carrier of the invention can effectively dissipate the heat generated by the heat generating component, and thus the effectiveness and longevity of the heat generating component is improved. Since the thermal expansion coefficient of the heat conducting element of the invention is less than the thermal expansion coefficient of the substrate, the difference between the thermal expansion coefficients of the heat generating component, the heat conducting element and the substrate can be gradually decreased. Thus, the increase of stress because of the thermal expansion coefficient difference from being too great between the heat generating component, the heat conducting element, and the substrate can be avoided. Also, the heat generating component can be prevented from peeling and damage, and thus the reliability of the package carrier is raised.
  • Although the invention has been described with reference to the above embodiments, it will be apparent to one of the ordinary skill in the art that modifications to the described embodiment may be made without departing from the spirit of the invention. Accordingly, the scope of the invention will be defined by the attached claims not by the above detailed descriptions.

Claims (10)

1. A manufacturing method of a package carrier, comprising:
providing a substrate, the substrate including an upper surface and a lower surface opposite to the upper surface;
forming a first opening communicating the upper surface and the lower surface of the substrate;
disposing a heat conducting element inside the first opening of the substrate, wherein the heat conducting element is fixed in the first opening of the substrate via an insulating material;
forming at least a through hole passing through the substrate;
forming a metal layer on the upper surface and the lower surface of the substrate and inside the through hole, wherein the metal layer covers the upper surface, the lower surface, the heat conducting element, and the insulating material of the substrate;
removing a portion of the metal layer;
forming a solder mask on the metal layer; and
forming a surface passivation layer covering a portion of the metal layer exposed by the solder mask and a portion of the metal layer located inside the through hole.
2. The manufacturing method of a package carrier as claimed in claim 1, wherein the substrate includes a first copper foil, a second copper foil, and an insulating layer, and the insulating layer is disposed between the first copper foil and the second copper foil.
3. The manufacturing method of a package carrier as claimed in claim 2, further comprising:
when removing a portion of the metal layer, removing a portion of the first copper foil and a portion of the second copper foil of a lower portion of the metal layer to expose a portion of the insulating layer; and
when forming the surface passivation layer, the surface passivation layer further covering a portion of the first copper foil and a portion of the second copper foil exposed by the insulating layer.
4. The manufacturing method of a package carrier as claimed in claim 1, wherein the substrate includes a metal plate and at least one insulating block, the metal plate has a first opening, and the insulating block has the through hole.
5. The manufacturing method of a package carrier as claimed in claim 4, further comprising:
before forming the through hole, forming at least a second opening passing through the metal plate and communicating the upper surface and the lower surface of the substrate;
after forming the second opening, forming the insulating block in the second opening of the substrate; and
forming the through hole passing through the insulating block.
6. The manufacturing method of a package carrier as claimed in claim 5, further comprising:
removing a portion of the metal layer until a portion of the insulating block located in the second opening is exposed; and
when forming the surface passivation layer, the surface passivation layer further covering a portion of the metal layer exposed by the insulating block.
7. The manufacturing method of a package carrier as claimed in claim 1, wherein the heat conducting element includes a first conductive layer, a second conductive layer, and an insulating material layer, and the insulating material layer is located between the first conductive layer and the second conductive layer.
8. The manufacturing method of a package carrier as claimed in claim 1, wherein a material of the heat conducting element includes ceramics, silicon, silicon carbide, diamond, or metal.
9. The manufacturing method of a package carrier as claimed in claim 1, wherein the step of forming the metal layer includes electroplating.
10. The manufacturing method of a package carrier as claimed in claim 1, wherein a thermal expansion coefficient of the heat conducting element is less than a thermal expansion coefficient of the substrate, and a thermal conductivity coefficient of the heat conducting element is greater than a thermal conductivity coefficient of the substrate.
US13/670,424 2011-01-19 2012-11-06 Manufacturing method of package carrier Abandoned US20130061468A1 (en)

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Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8103996B2 (en) * 2008-06-24 2012-01-24 Cadence Design Systems, Inc. Method and apparatus for thermal analysis of through-silicon via (TSV)
US10433414B2 (en) 2010-12-24 2019-10-01 Rayben Technologies (HK) Limited Manufacturing method of printing circuit board with micro-radiators
DE102012108107A1 (en) 2012-08-31 2014-03-27 Epcos Ag light emitting diode device
TWI471990B (en) * 2012-11-05 2015-02-01 矽品精密工業股份有限公司 Carrier member for fastening semiconductor package and method of forming semiconductor package
TWI489918B (en) 2012-11-23 2015-06-21 Subtron Technology Co Ltd Package carrier
TWI503934B (en) * 2013-05-09 2015-10-11 Advanced Semiconductor Eng Semiconductor element and manufacturing method thereof and semiconductor package
US11291146B2 (en) 2014-03-07 2022-03-29 Bridge Semiconductor Corp. Leadframe substrate having modulator and crack inhibiting structure and flip chip assembly using the same
JP6367980B2 (en) * 2014-06-18 2018-08-01 エレメント シックス テクノロジーズ リミテッド Electronic device component with integrated diamond heat spreader
JPWO2016080333A1 (en) * 2014-11-21 2017-08-24 株式会社村田製作所 module
KR102295105B1 (en) * 2014-12-29 2021-08-31 삼성전기주식회사 Circuit board and manufacturing method thereof
TWI542271B (en) 2015-02-11 2016-07-11 旭德科技股份有限公司 Package substrate and manufacturing method thereof
TWI611541B (en) * 2015-09-07 2018-01-11 鈺橋半導體股份有限公司 Method of making wiring board having electrical isolator and moisture inhibiting cap incorporated therein and semiconductor assembly thereof
TWI584420B (en) 2015-09-16 2017-05-21 旭德科技股份有限公司 Package carrier and manufacturing method thereof
CN205491419U (en) * 2015-09-22 2016-08-17 乐健集团有限公司 Printed circuit board and led light source module
KR102565119B1 (en) * 2016-08-25 2023-08-08 삼성전기주식회사 Electronic component embedded substrate and manufacturing method threrof
CN112635432A (en) * 2019-10-09 2021-04-09 欣兴电子股份有限公司 Package substrate and manufacturing method thereof
CN112654131A (en) * 2019-10-12 2021-04-13 深南电路股份有限公司 Manufacturing method of heat-conducting and electric-insulating circuit board and circuit board
CN112103194A (en) * 2020-08-27 2020-12-18 珠海越亚半导体股份有限公司 Switching substrate, manufacturing method thereof and device packaging structure

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3174393B2 (en) * 1992-04-24 2001-06-11 シチズン時計株式会社 Manufacturing method of electronic component mounting board
JP3984552B2 (en) * 2003-01-06 2007-10-03 株式会社イースタン Manufacturing method of package for semiconductor device
CN2750621Y (en) * 2004-06-15 2006-01-04 彭进安 Metal based circuit board
JP2006066519A (en) * 2004-08-25 2006-03-09 Kyocera Corp Wiring circuit board for light-emitting element and the light-emitting device
JP4378334B2 (en) * 2005-09-09 2009-12-02 日本碍子株式会社 Heat spreader module and manufacturing method thereof
JP4728980B2 (en) * 2007-02-21 2011-07-20 古河電気工業株式会社 Printed wiring board and manufacturing method thereof
TWI360375B (en) * 2007-03-29 2012-03-11 Advanced Semiconductor Eng Carrier with embedded component and manufacturing

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TWI435393B (en) 2014-04-21
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CN102610709A (en) 2012-07-25
US20120181696A1 (en) 2012-07-19
JP2012151473A (en) 2012-08-09

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