US20110209344A1 - Wiring board and method of manufacturing wiring board - Google Patents
Wiring board and method of manufacturing wiring board Download PDFInfo
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- US20110209344A1 US20110209344A1 US13/106,330 US201113106330A US2011209344A1 US 20110209344 A1 US20110209344 A1 US 20110209344A1 US 201113106330 A US201113106330 A US 201113106330A US 2011209344 A1 US2011209344 A1 US 2011209344A1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
- H05K3/4691—Rigid-flexible multilayer circuits comprising rigid and flexible layers, e.g. having in the bending regions only flexible layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
- H05K1/0366—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
- H05K1/0373—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement containing additives, e.g. fillers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0187—Dielectric layers with regions of different dielectrics in the same layer, e.g. in a printed capacitor for locally changing the dielectric properties
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0206—Materials
- H05K2201/0209—Inorganic, non-metallic particles
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/096—Vertically aligned vias, holes or stacked vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09845—Stepped hole, via, edge, bump or conductor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1536—Temporarily stacked PCBs
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
- H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
- H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
Abstract
A wiring board and method of forming a wiring board. The wiring board includes a first substrate and a second substrate having a smaller mounting area than a mounting area of the first substrate. A base substrate is laminated between the first substrate and the second substrate such that the first substrate extends beyond at least one edge of the second substrate. At least one of the base substrate, the first substrate or the second substrate comprises pliable resin, and at least one other of the base substrate, the first substrate or the second substrate comprises an inorganic filler.
Description
- The present application is a divisional and claims the benefits of priority to U.S. application Ser. No. 12/144,691, filed Jun. 24, 2008, which claims the benefit of priority to U.S. Provisional Application Ser. No. 60/950,220 filed Jul. 17, 2007. The contents of those applications are incorporated herein by reference in their entirety.
- 1. Technical Field
- The present invention, relates to a wiring board formed by combining at least two boards each having a different size mounting area, and a method of manufacturing such a wiring board.
- 2. Description of Related Art
- Japanese Laid-Open Patent Publication H5-152693 discloses technology to solve insufficient rigidity in a wiring board. The technology relates to a wiring board having a reinforced section formed by making an extended portion of a flexible substrate and folding the extended portion.
- Further, during a step to form built-up layers in a partial section of a wiring board, the build-up resin for forming built-up resin layers may occasionally overflow. Thus, in Japanese Laid-Open Patent Publication 2006-32830, a wiring board using framed built-up resin films where the periphery of the built-up resins is surrounded by a framing member is disclosed. The entire content of each of H5-152693 and 2006-32830 is incorporated herein by reference.
- One aspect of the invention includes a wiring board having a first substrate, and a second substrate having a smaller mounting area than a mounting area of the first substrate. A base substrate is laminated between the first substrate and the second substrate such that the first substrate extends beyond at least one edge of the second substrate. At least one of the base substrate, the first substrate or the second substrate comprises pliable resin, and at least one other of the base substrate, the first substrate or the second substrate comprises an inorganic filler.
- Another aspect of the invention includes a method of manufacturing a wiring board, including forming a base substrate, and forming a first insulation layer on a first surface of the base substrate and a second insulating layer on a second surface of the base substrate opposing the first surface. The first insulating layer is cut in a first area and the second insulating layer is cut in a second area offset from the first area to form a first substrate laminated to a second substrate with the base layer interposed therebetween, the second substrate having a smaller mounting area than that of the first substrate such that the first substrate extends beyond an edge of the second substrate. At least one of the base substrate, the first substrate or the second substrate is formed to include pliable resin, and at least one other of the base substrate, the first substrate or the second substrate is formed to include an inorganic filler.
- A more complete appreciation of the invention and many of the attendant advantages thereof will be readily obtained as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings, wherein:
-
FIG. 1A is a side view illustrating a wiring board according to an embodiment of the present invention. -
FIG. 1B is a plan view illustrating a wiring board according to an embodiment of the present invention. -
FIG. 2 is a cross-sectional view illustrating a wiring board according to an embodiment of the present invention. -
FIG. 3 is a cross-sectional view illustrating a wiring board according to an embodiment of the present invention. -
FIG. 4 is a cross-sectional view illustrating a wiring board according to an embodiment of the present invention. -
FIG. 5 is a cross-sectional view illustrating a wiring board according to an embodiment of the present invention. -
FIG. 6 is a cross-sectional view illustrating a wiring board according to an embodiment of the present invention. -
FIG. 7A illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7B illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7C illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7D illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7E illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7F illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7G illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7H illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7I illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7J illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7K illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7L illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7M illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7N illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7O illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7P illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7Q illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7R illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7S illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 7T is a view illustrating wiring boards according to an embodiment of the present invention. -
FIG. 8 is a cross-sectional view of a wiring board according to an embodiment of the present invention. -
FIG. 9 is a cross-sectional view of a wiring board according to an embodiment of the present invention. -
FIG. 10 is a cross-sectional view of a wiring board according to an embodiment of the present invention. -
FIG. 11A illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 11B illustrates a step of a method to manufacture a wiring board according to an embodiment of the present invention. -
FIG. 12A is a cross-sectional view of a wiring board according to an embodiment of the present invention. -
FIG. 12B is a cross-sectional view of a wiring board according to an embodiment of the present invention. - In the following, an embodiment of a wiring board according to a specific example of the present invention is described with reference to the drawings.
- As shown in
FIG. 1A , wiringboard 19 according to a specific example of the present invention has a different thickness on one edge from that on the other edge. The number of layers in the section having a different thickness (thicker section) differs from the number of layers in the thinner section. Namely, wiringboard 19 has thickmulti-layer section 13 and relatively thin fewer-layer section 14.Multi-layer section 13 is formed by laminating two layers;first substrate 1 andsecond substrate 2. Fewer-layer section 14 hasfirst substrate 1, which is extended frommulti-layer section 13. Thus, as used herein, the term “multi-layer section” means two or more layers or boards, while the term “fewer layer section” means one or more layers or boards. - As shown in
FIGS. 1A and 1B ,first substrate 1 andsecond substrate 2 have the same width and different lengths, and one end offirst substrate 1 is aligned with one end ofsecond substrate 2 such that another end of the first substrate extends beyond the second substrate. However, it is not necessary for any ends of the first and second substrates to be aligned, as will be discussed further below. In the embodiment ofFIGS. 1A and 1B , thefirst substrate 1 andsecond substrate 2 are each formed with pliable base material mainly containing epoxy resin. - On the surfaces (mounting surfaces) of
first substrate 1 andsecond substrate 2, connection pads to connect electronic components are formed; on the surfaces (mounting surfaces) and inner surfaces offirst substrate 1 andsecond substrate 2, wiring patterns to structure electrical circuits are formed. On the mounting surfaces offirst substrate 1 andsecond substrate 2,electronic components Electronic components - Wiring
board 19 is placed, for example, in the casing of a cell phone device. Under such circumstance,electronic component 7 positioned in fewer-layer section 14 is structured, for example, with the keypad of a keyboard; andelectronic component 8 positioned inmulti-layer section 13 is structured with an electronic chip, IC module, functional components and others, for example. Also, in the step portion formed bymulti-layer section 13 and fewer-layer section 14, for example, a thin-type battery is placed. - Next, a detailed structure of
wiring board 19 having the above overall structure is described in reference toFIG. 2 . As illustrated,first substrate 1 andsecond substrate 2 are laminated withbase substrate 3 provided in between. One end (the left end as illustrated in the drawing) ofbase substrate 3 is made to be flush withfirst substrate 1 andsecond substrate 2. Thus, thebase substrate 3 is laminated between the first substrate and the second substrate such that thefirst substrate 1 extends beyond an edge of thesecond substrate 2. Alternatively, only an almost middle region of thewiring board 19 can be a thick multilayer section while opposing ends of the wiring board are each a thinner fewer layer section. An example of the almost middle region is the area inFIG. 2 between one cross section line (not shown) through the edge of the second substrate which forms the step structure, and another cross section line (not shown) through an edge ofcomponents 8 which is closest to the throughhole 63. Still alternatively, thefirst substrate 1 andsecond substrate 2 having the same width and different lengths can be arranged such that opposing ends of thefirst substrate 1 each extend beyond thesecond substrate 2 as shown in the examples inFIGS. 12A and 12B , which will be further discussed below. - However, it is not necessary to have any peripheral edges of the first and second substrate aligned. That is, the wiring board can have an entire peripheral region (for example, formed by the
first substrate 1 alone orsecond substrate 2 alone) that is thinner than an interior non-peripheral region (for example, formed by the first and second substrates together). Thus, according to embodiments of the invention, at least a central portion of the wiring board is a thicker multi layer section, and at least a portion of the periphery of the wiring board is a thinner fewer layer section. As used herein “central portion” means a non-peripheral area of the wiring board having a thicker multilayer section, but does not mean the geometric center of the wiring board. - One or more of the base substrate the first substrate or the second substrate can include a pliable resin. In the embodiment of
FIG. 2 ,base substrate 3 is made of resin containing inorganic filler. The resin containing inorganic filler is prepared by combining silica filler with glass-epoxy resin. For silica filler, fused silica (SiO2) is used.Base substrate 3 is made 50-100 μm, preferably about 100 μm. -
Base substrate 3 is formed to be shorter thansecond substrate 2, and betweenfirst substrate 1 andsecond substrate 2, groove (hereinafter referred to as “interlayer groove section”) 11 is formed.Interlayer groove section 11 is an aperture. The groove may be filled with elastic material or viscous material such as silicone gel or silicone oil. When wiringboard 19 receives an impact from being dropped, the groove aperture or silicone gel or silicone oil that is filled in the interior of the groove cushions the impact as a shock-absorbing layer. Therefore, by being structured in this way, tolerance to impact from being dropped may be improved. -
First substrate 1 has a structure of laminated multiple insulation layers (1 a, 1 b, 1 c). Each insulation layer is made of epoxy resin or the like with a thickness approximately 10 μm-60 μm. On the upper surface of insulation layer (1 a), between epoxy-resin layers (1 a) and (1 b), between insulation layers (1 b) and (1 c) and on the lower surface of insulation layer (1 c), wiring patterns (111 a, 111 b, 111 c, 111 d) are formed respectively. Each wiring pattern (111 a, 111 b, 111 c, 111 d) electrically connects required portions inside the circuit substrate. -
Second substrate 2 also has a structure of laminated multiple insulation layers (2 a, 2 b, 2 c) made of epoxy resin or the like with a thickness approximately 10 μm-60 μm. On the lower surface of insulation layer (2 a), between epoxy-resin layers (2 a) and (2 b), between insulation layers (2 b) and (2 c) and on the upper surface of insulation layer (2 c), wiring patterns (211 a, 211 b, 211 c, 211 d) are formed respectively. Each wiring pattern (211 a, 211 b, 211 c, 211 d) electrically connects required portions inside the circuit substrate. - On the exposed portion of the lower surface of
first substrate 1 and the exposed portion of the upper surface of the second substrate, adhesion prevention layers 12 as a protective insulation layer are formed. At the step portion created when laminatingfirst substrate 1 andsecond substrate 2, conductive pattern (111 d) is formed. Also, to the right of conductive pattern (111 d) formed at the step portion, conductive pattern (111 d) is formed as well. -
Keypad 7 is arranged on the conductive pattern formed on the surface of fewer-layer section 14. Further, usingsolder 9,electronic chip 8 is anchored and connected to wiring patterns and built-upvias 4 throughconnection pads 10. Forsolder 9, Sn/Ag/Cu was used. - Moreover, through-
hole 63 is formed, penetratingbase substrate 3, further penetratingfirst substrate 1 andsecond substrate 2, and connecting wiring pattern (111 a) and wiring pattern (211 d) ofsecond substrate 2. The inner surface of through-hole 63 is plated so as to electrically connect wiring patterns. The area enveloped by plated through-hole 63 may be filled with resin such as epoxy-resin. - The term “through-hole” refers to an electrical connection between conductors using a hole or aperture. In general, a through-hole may be referred to as a platted through-hole. A through-hole can provide a conductive connection between a conductor formed on one end of the through-hole to a conductor formed on the other end of the through-hole. For example, a through-hole can provide a conductive connection between outer layers of a multi-layer printed circuit board and/or may provide conductive connection to or between inner circuits of a multilayer printed circuit board. In forming a through-hole, a penetrating hole is first formed by drilling, and a conductor is formed in the penetrating hole by metal plating (such as copper plating). In addition to providing electrical connection as noted above, a through-hole can receive the terminal of an electronic part for insertion mounting and fixing the electronic part to a printed circuit board.
- In
first substrate 1 andsecond substrate 2, multiple built-upvias 4 are formed. Built-upvias 4 are structured by stackingvias 44 formed in each insulation layer (1 a-1 c, 2 a-2 c). Built-upvias 4 connect required portions of wiring patterns (111 a-111 d) and also connect required portions of wiring patterns (211 a-211 d). On the inner surface of each via 44 forming built-up via 4, a conductive layer made of copper plating or the like is formed. As shown inFIG. 3 , the interior of each via 44 is filled with conductor such as copper. However, as shown inFIG. 4 , the interior of via 44 may be filled with resin such as epoxy-resin. Thus, the term “via” as used herein, means an opening formed in a substrate such as an insulating layer. - Wiring
board 19 having the above structure, for example, transmits operational signals fromkeypad 7 to an IC chip through built-upvias 4, wiring patterns (111 a-111 d) and through-hole 63, and the signals are then processed at the IC chip. By doing so, varieties of signal processing may be conducted. - Also, as described above, wiring
board 19 is structured withmulti-layer section 13 and fewer-layer section 14 and has a step portion. And at the lower portion of fewer-layer section 14, a large-volume component such as a cell-phone battery may be placed. - In the embodiment of
FIG. 2 , sincebase substrate 3 is made of glass-epoxy resin containing silica filler, it is highly rigid. Therefore,multi-layer section 13, because ofbase substrate 3 placed there, is highly rigid compared with fewer-layer section 14. On the other hand, fewer-layer section 14 is relatively flexible compared withmulti-layer section 13. Thus, it is possible to place electronic components on eithersections - Also, for example, when the electronic device is dropped and an impact or the like is exerted on wiring
board 19, due to the relative flexibility of fewer-layer section 14 compared withmulti-layer section 13, fewer-layer section 14 vibrates as shown byarrow 37 inFIG. 5 . Since portions of fewer-layer section 14 vibrate, the impact from being dropped or the like is converted to vibration motion energy, and the impact is absorbed accordingly. As a result, the risk of rupture in the wiring that connects the electronic components mounted on wiringboard 19 may be minimized. - Furthermore, since
first insulation layer 1 andsecond insulation layer 2 are formed with pliable resin, when an impact is exerted on the wiring board,first insulation layer 1 andsecond insulation layer 2 absorb the impact as shock-absorbing layers. - Also, built-up
vias 4 are formed as a stacked via made by laminatingmultiple vias 44. By making such a stacked interlayer connection structure, the wiring length is shortened, and thus preferable for mounting electronic components requiring large amounts of electricity. - Moreover, built-up
vias 4 have a certain degree of mobility. Therefore, for example, when the electronic device is dropped and an impact is exerted on wiringboard 19, the impact may be absorbed at built-upvias 4 through the movement of built-upvias 4 as shown byarrows FIG. 6 . As a result, the risk of rupture in the wiring that connects the electronic components mounted on wiringboard 19 may be minimized. - In addition, if solid material or the like is filled in
interlayer groove section 11, when the impact from being dropped is exerted on the wiring board,interlayer groove section 11 cushions the impact as a shock-absorbing layer. Accordingly, wheninterlayer groove section 11 is formed, by improving tolerance to impact from being dropped, the risk of rupture in the wiring that connects the electronic components mounted on the wiring board may be minimized. - Also, in certain circumstances, two wiring boards of the present invention may be combined and sold in such a way that each fewer-
layer section 14 is closely placed to provide compact shipment of the boards as will be further discussed with respect toFIG. 7T below. Here, if a wiring pattern is formed at the step portion created whenfirst substrate 1 andsecond substrate 2 are laminated, in a circumstance when a user or the like uses the combined wiring boards of the present invention separately, warping of the wiring boards may be prevented. Namely,multi-layer section 13, because ofbase substrate 3 positioned there, is rigid compared with fewer-layer section 14. Thus, when a user, such as a device manufacturer, uses the combined wiring boards of the present invention separately, warping does not occur atmulti-layer section 13. On the other hand, fewer-layer section 14 is flexible compared withmulti-layer section 13. Thus, when a user separates the combined wiring boards of the present invention, warping could possibly occur at fewer-layer section 14, especially at the step portion of fewer-layer section 14 created whenfirst substrate 1 andsecond substrate 2 are laminated. However, if a wiring pattern is formed at the step portion, in a circumstance when a user or the like uses the combined wiring boards of the present invention separately, warping may be reduced or prevented. - In the following, a method of
manufacturing wiring board 19 according to the present invention is described. - First, as shown in
FIG. 7A ,dummy core 52, which will formadhesion prevention layer 12, is prepared.Dummy core 52 is made, for example, of a C-stage epoxy-resin. Ondummy core 52,copper foil 51 is deposited. - Next, as shown in
FIG. 7B , by patterningcopper foil 51,conductive patterns 111 d are formed at a predetermined position. - Next, as shown by arrows in
FIG. 7C ,dummy core 52 is cut by a laser or the like (represented by the arrows inFIG. 7C ) to adjust its length to a length preferred for use inwiring board 19. As seen inFIG. 7C , thedummy core 52 is cut intodummy cores - In addition, as shown in
FIG. 7D ,core 55, which functions asbase substrate 3, is prepared.Core 55 is made, for example, of highly rigid material such as glass-epoxy resin containing inorganic filler such as glass filler or silica filler. On both surfaces ofcore 55,copper foil 54 is deposited. - Next, as shown in
FIG. 7E , by patterningcopper foil 54, conductive patterns (111 d, 211 a) are formed to structure wiring patterns. - Next, as shown by an arrow in
FIG. 7F , incore 55 using a laser or the like, a hole to insertdummy core 52 is formed as shown by the arrows inFIG. 7F . - Next, as shown in
FIG. 7G , cut-out dummy cores (52 a, 52 b) are placed in such a way thatconductive pattern 111 d is laminated facing inward. Then, laminated dummy cores (52 a, 52 b) and cutcore 55 are horizontally connected. Then, on the top and bottom of dummy cores (52 a, 52 b) andcore 55, prepreg (62 a, 62 b) are laminated. For prepreg (62 a, 62 b), low-flow prepreg impregnated with low-flow epoxy-resin is preferred. Then, on the surfaces of prepreg (62 a, 62 b), copper foils (61 a, 61 b) are deposited. - Next, as shown in
FIG. 7H , on the laminate shown inFIG. 7G , pressure is applied as schematically represented by arrows inFIG. 7H . Pressure is, for example, applied by hydraulic power using hydraulic pressing equipment under conditions calling for temperature of 200° C., pressure of 40 kgf and pressing time of three (3) hours. By doing so, resin is squeezed out from the prepreg, and the prepreg (62 a, 62 b) andcore material 55 will be integrated accordingly. At this time, since dummy cores (52 a, 52 b) are made of a C-stage epoxy-resin, the materials indummy core 52 are not integrated with each other. For applying pressure, vacuum pressing may be employed instead of hydraulic pressing. By conducting vacuum pressing, bubbles may be kept from mixing into the resin which forms the insulation layers. Vacuum pressing is conducted, for example, for an hour. Peak heating temperature is set, for example, at 175° C.; and vacuum-pressing pressure is set, for example, at 3.90×106 [Pa]. - Next, as shown in
FIG. 7I , by removing the unnecessary portions ofcopper foil 61 from the laminate shown inFIG. 7H ,wiring patterns 62 c are formed. - Next, as shown in
FIG. 7J , epoxy resin (72 a, 72 b) is further laminated to form inner layers. On both surfaces of epoxy resin (72 a, 72 b), copper foil (71 a, 71 b) is formed. Then, pressure is applied as represented by the arrows inFIG. 7J . Pressure may be applied, for example, by hydraulic power using hydraulic pressing equipment, or by vacuum pressing. - Then, as shown in
FIG. 7K , vias 44 are formed. Namely, inepoxy resin 72 made of insulation resin, openings for via-holes are formed. Those openings may be formed by a laser beam. Then, to remove resin residue remaining on the side and bottom surfaces of the openings formed by the laser beam, a desmear treatment is preferably performed. The desmear treatment is performed using an oxygen plasma discharge treatment, a corona discharge treatment, an ultra-violet laser treatment or an exima laser treatment, for example. - In the openings formed by a laser beam, conductive material is filled to form filled via holes. As for conductive material, conductive paste or metal plating formed by an electrolytic plating process is preferred. For example, vias 44 are filled with conductor such as copper plating. To reduce the manufacturing cost and improve productivity by simplifying the filled-via forming step, filling with a conductive paste is preferred. For example, a conductive paste (such as thermo-set resin containing conductive particles) may be printed by screen-printing, filled in
vias 44 and cured. By filling the interiors ofvias 44 with the same conductive paste material, connection reliability when thermo-stress is exerted onvias 44 may be improved. On the other hand, regarding connection reliability, metal plating formed by an electrolytic plating process is preferred. Especially, electrolytic copper plating is preferred. - Then, as shown in
FIG. 7L , by removing the unnecessary portions of copper foil 71, inner-layer patterns 71 c are formed. - Next, as shown in
FIG. 7M , after inner layers and vias are further formed, epoxy-resin (81 a, 81 b) is laminated to form outer layers. On both surfaces of epoxy-resin (81 a, 81 b), copper foil (82 a, 82 b) is deposited. Here, a copper foil sheet containing resin (Resin Copper Film: RCF) may be deposited and pressed. - Next, as shown in
FIG. 7N , vias 64 are formed in the RCF. Further, in the laminated layers shown inFIG. 7M , holes 63 are bored by a drill. Theholes 63 penetrate the base substrate and insulation layers formed on both sides of the base substrate. By doing so, through-holes 63 are formed. Then, using copper plating or the like, the interiors of thevias 64 and through-holes 63 are provided with a conductor. As seen inFIG. 7O , by patterning the surface copper foil, conductive patterns are formed. - Next, as shown in
FIG. 7O , the interiors of through-holes 63 are filled with epoxy resin, and by removing unnecessary portions of copper foil (82 a, 82 b), outer-layer patterns 82 c are formed. - Next, as shown in
FIG. 7P , solder resist 83 is formed. Here, the solder resist indicates heat-resistant coating material, which is used when applying solder to cover the portions which are intended to keep the solder from adhering thereto. For solder-resist varieties, photo-setting-type solder resist and thermo-setting-type solder resist may be used. For a coating method, a screen-printing method or curtain-coating method may be used. - Next, as shown in
FIG. 7Q , to protect outer-layer patterns, gold plating 91 is performed by chemical plating. Other than chemical plating, methods such as fusion plating and electrical plating may be used. Moreover, methods other than gold plating, such as alloy plating may be used. - Next, as shown by
arrows 40 inFIG. 7R , laser beams from laser processing equipment, for example a CO2 laser, are beamed using conductive patterns (111 d) as a stopper to cut insulation layers and the copper foil sheet containing resin (RCF). Here, the thickness of conductive patterns (111 d) is preferred to be made approximately 5-10 μm: if too thin, laser beams penetrate the pattern; and if too thick, conductive circuit patterns with a fine line width are difficult to form. - By laser cutting as shown in
FIG. 7R , interlayer groove sections (11 a, 11 b) are also formed. Namely, by laser cutting, using adhesion prevention layer (12 a, 12 b) formed onfirst substrate 1 andadhesion prevention layer 12 formed onsecond substrate 2 as groove side-walls, and one surface ofbase substrate 3 as the groove bottom surface, interlayer groove sections (11 a, 11 b) are formed. - Lastly, as shown in
FIG. 7S ,electronic components 92 are mounted.Electronic components 92 areelectronic chip 8 andkeypad 7, for example. Further, interlayer groove sections (11 a, 11 b) may be filled with elastic material, viscous material or the like as depicted by the darkened portion shown in the interlayer groove portions inFIG. 7S . - Then, as shown in
FIG. 7T , wiring board (19A) and wiring board (19B) are used separately. In such a circumstance, since adhesion prevention layers (12 a, 12 b) are formed, wiring board (19A) and wiring board (19B) may be separated by a simple process to be used separately. Regarding a wiring board according to embodiments of the present invention, when an electronic device such as a cell phone receives an impact from being dropped or the like, connection breakage of electronic components or the like mounted in the wiring board may be prevented. In addition, when being shipped to a user, the wiring board can be handled compactly, and when being used by the user, the combined wiring boards can be separated easily. - In the first embodiment of the present invention described in relation to
FIG. 2 ,base substrate 3 contains resin containing inorganic filler, andfirst insulation layer 1 andsecond insulation layer 2 contain pliable resin. However, according to another embodiment of the present invention, as shown inFIG. 8 ,base substrate 3 contains pliable resin andfirst insulation layer 1 andsecond insulation layer 2 contain base material of resin-impregnated inorganic fabric. The rest of the structure is substantially the same as in the embodiment ofFIG. 2 . - The pliable resin forming
base substrate 3 contains mainly epoxy resin. The base material of resin-impregnated inorganic fabric formingfirst insulation layer 1 andsecond insulation layer 2 is prepared by curing prepreg. The prepreg is prepared by impregnating glass-cloth inorganic fabric with epoxy resin and preliminarily thermosetting the resin to advance the level of curing. Although the resin to be used for the prepreg is preferred to have low-flow characteristics, a resin with regular-flow characteristics may also be used. Also, prepreg may be prepared by reducing the amount of epoxy resin to be impregnated in glass-cloth inorganic fabric. - Since
base substrate 3 is formed with pliable resin in the embodiment ofFIG. 8 , when an impact is exerted on the wiring board,base substrate 3 absorbs the impact as a shock-absorbing layer. Therefore, when an electronic device such as a cell phone receives an impact from being dropped or the like, the risk of rupture in the wiring that connects the electronic components mounted on the wiring board may be minimized. - The manufacturing method of a wiring board according to the embodiment of
FIG. 8 is similar to the method ofFIGS. 7A-7T , except that a base material of resin impregnated inorganic fabric is used for a resin to be laminated inFIGS. 7G , 7J, and 7M. The rest of the manufacturing method is substantially the same as in the embodiment ofFIGS. 7A-7T . - According to the embodiment of the present invention described in relation to
FIG. 2 ,base substrate 3 contains resin containing inorganic filler, andfirst insulation layer 1 andsecond insulation layer 2 contain pliable resin. However, according to another embodiment of the present invention, as shown inFIG. 9 ,base substrate 3 contains pliable resin andfirst insulation layer 1 andsecond insulation layer 2 contain resin containing inorganic filler. The rest of the structure is substantially the same as in the embodiment ofFIG. 2 . - The pliable resin forming
base substrate 3 contains mainly epoxy resin. The resin containing inorganic filler formingfirst insulation layer 1 andsecond insulation layer 2 is prepared by combining silica filler with epoxy resin. For the silica filler, fused silica (SiO2) is used. - Since
base substrate 3 is formed with pliable resin in the embodiment ofFIG. 9 , when an impact is exerted on the wiring board,base substrate 3 absorbs the impact as a shock-absorbing layer. Therefore, when an electronic device such as a cell phone receives an impact from being dropped or the like, the wiring that connects the electronic components mounted on the wiring board may be prevented. - The manufacturing method of a wiring board according to the embodiment of
FIG. 9 is similar to the method ofFIGS. 7A-7T , except that a resin containing inorganic filler is used for a resin to be laminated inFIGS. 7G , 7J, and 7M. The rest of the manufacturing method is substantially the same as in the embodiment ofFIGS. 7A-7T . - As shown in
FIG. 10 , in the another embodiment, at the portion whereadhesion prevention layer 12 is made flush with the edge ofsecond substrate 2,opening 5 is formed. The rest of the structure is substantially the same as in the embodiment ofFIG. 2 . Underopening 5, part of wiring pattern (111 d) is positioned to provide a groove, which forms an aperture. The groove may be filled with elastic material or viscous material such as silicone gel or silicone oil. When wiringboard 19 receives an impact from being dropped, the aperture or silicone gel or silicone oil filled in the groove cushions the impact as a shock-absorbing layer. Therefore, by making such a structure, tolerance to impact from being dropped may be improved. - Also, if solid material or the like is filled in
opening 5, the filled solid material or the like may play a role in decreasing warping at the juncture ofmulti-layer section 13 and fewer-layer section 14 where the number of layers is reduced. Accordingly, at the juncture ofmulti-layer section 13 and fewer-layer section 14, cracks may be prevented. Furthermore, if opening 5 is filled, for example, with solid material such as resin, the filled solid material plays a role in protecting conductive pattern (111 d) mounted onfirst substrate 1. Therefore, tolerance to corrosion on conductive pattern (111 d) may be improved. - A method of manufacturing a wiring board according to the embodiment of
FIG. 10 is similar to the method of manufacturing a wiring board according to the embodiment in reference toFIGS. 7A-7F ,FIGS. 7H-7R and 7T. However, instead ofFIG. 7G , as shown inFIG. 11A , cut-out dummy cores (52 a, 52 b) are placed in a way so thatconductive patterns 111 d are laminated facing outward. Moreover, instead ofFIG. 7S , as shown inFIG. 11B ,opening 5 is filled with viscous material such as silicone oil. Theopening 5 ofFIGS. 10 and 11 may be implemented with any of the embodiments of the wiring board discussed above. - As noted above, embodiments of the invention are not limited to one end of
first substrate 1 and one end ofsecond substrate 2 being aligned. As shown inFIG. 12A , one end ofsecond substrate 2 may protrude from one end offirst substrate 1, and one end of thefirst substrate 1 may protrude from thesecond substrate 2. Here, the protruding portions of the first and second substrates make up a periphery portion of the wiring board that is thinner than a center portion of the wiring board which includes thefirst substrate 1,second substrate 2 andbase 3. - Also, as shown in
FIG. 12B , opposite ends offirst substrate 1 may protrude from ends ofsecond substrate 2. Here, the protruding portions of only the first and second substrate make up a periphery portion of the wiring board that is thinner than a center portion of the wiring board which includes thefirst substrate 1,second substrate 2 andbase 3. - In a wiring board according to the embodiment of
FIG. 2 ,first substrate 1 andsecond substrate 2 are in a layered structure having a rectangular outline. However, they are not limited to such, but may be in a layered structure having a circular, hexagonal or octagonal outline. - Also, in a wiring board according to the embodiment of
FIG. 2 ,base substrate 3 is formed with glass-epoxy resin containing fused silica (SiO2), but it is not limited to such. As for silica filler, crystalline silica (SiO2) may also be used, and instead of silica filler, glass filler may possibly be combined. As for glass filler, aluminum oxide (Al2O3), magnesium oxide (MgO), boron nitride (BN), or aluminum nitride (AlN) may be used. Also, sodium oxide (Na2O), potassium oxide (K2O), boric oxide (B2O3), and phosphoric oxide (P2O5) may be used in combination thereof. Furthermore, as for inorganic filler, it is not limited to silica filler or glass filler, but inorganic incombustible agents such as antimony trioxide, antimony pentoxide, magnesium hydroxide, aluminum hydroxide, guanidinium salts, zinc borate, molybdic compound, and zinc stannate may be used. Talc, barium sulfate, calcium carbonate, or mica powder may also be used. - Also, in a wiring board according to the embodiment of
FIG. 2 , first insulation layer andsecond insulation layer 2 are made of pliable resin containing mainly epoxy resin. However, pliable resin is not limited to such, but any one of the following resins or a combination thereof may be used: epoxy, polyimide, polycarbonate, polyphenylen ether denaturated, polyphenylen oxide, polybutylene-telephtalate, polyacrylate, polysulfone polyphenylen-sulfid, polyether-etherketone, tetrafluoroethylene, bismaleimide, polysulfone, polyethersulfone, polyphenylsulfone, polyphthalamide, polyamide-imide, polyketone, polyacetale. As for epoxy resin, the following may be used: naphthalene-type epoxy resin, dicyclo-pentadiene-type epoxy resin, biphenyl-type epoxy resin, bisphenole A-type epoxy resin, bisphenol F-type epoxy resin, bisphenol S-type epoxy resin, phenol novolac-type epoxy resin, alkylphenol novolac-type epoxy resin, alalkyl-type epoxy resin, biphenol-type epoxy resin, anthracene-type epoxy resin, epoxydated condensate of phenolic groups and aromatic compound aldehyde containing phenolic hydroxyl groups, triglycidyl isocyanurate and alicyclic epoxy resin. - According to the embodiment of
FIG. 2 , as forsolder 9, Sn/Ag/Cu was used. However,solder 9 is not limited to such; solder containing antimony, tin, lead, indium or copper may be used. Also, eutectic crystal metals such as Sn/Sb, Sn/Ag, Sn/Pb or Sb/Cu may be used as well. Among such eutectic crystal metals, to avoid having a bad influence on the substrates, using metals having relatively low melting temperatures, 250° C. or lower, is preferred. - According to the embodiment of
FIG. 2 ,interlayer groove section 11 is filled with silicone gel, which is viscous silicone. However, such is not the only example, andinterlayer groove section 11 may be filled with solid material. As for solid material to be filled ininterlayer groove section 11, high-polymer rubber is preferred as a solid material having viscosity and elasticity. Specifically, butyl rubber, isoprene rubber, butadiene rubber, styrene-butadiene rubber or ethylene-propylene rubber may be used. Moreover,interlayer groove section 11 may be filled with a gas. As the gas to be filled ininterlayer groove section 11, a rare gas such as argon, or nitrogen or oxygen may also be used. - Also, according to the embodiment of
FIG. 8 , a prepreg was prepared by impregnating glass-cloth inorganic fabric with epoxy resin and preliminarily thermosetting the resin to advance the level of curing. However, such is not the only example. In addition to epoxy resin, or other than epoxy resin, any one of the following resins or a combination thereof may be used to prepare prepreg: polyimide, polycarbonate, polyphenylen ether denaturated, polyphenylen oxide, polybutylene-telephtalate, polyacrylate, polysulfone polyphenylen-sulfid, polyether-etherketone, tetrafluoroethylene, bismaleimide, polysulfone, polyethersulfone, polyphenylsulfone, polyphthalamide, polyamide-imide, polyketone, polyacetale. - Also, for the inorganic fabric, it is not limited to glass cloth, but fabrics such as alumina fabric, carbon fabric (carbon fiber), silicon carbide fabric, silicon nitride fabric or the like may be used singly or in combination thereof.
- According to the embodiment of
FIG. 10 , inopening 5, silicone gel, which is viscous silicone, is filled. However, the material to be filled inopening 5 is not limited to such, but solid material may be used. As solid material to be filled inopening 5, high-polymer rubber as a solid material having viscosity and elasticity is preferred. More specifically, butyl rubber, isoprene rubber, butadiene rubber, styrene-butadiene rubber or ethylene-propylene rubber may be used. As the material to be filled inopening 5, a liquid or solid material is preferred, but a gas may be used. In such a case, as the gas to be filled inopening 5, a rare gas such as argon, or nitrogen or oxygen may be used. - In addition,
first substrate 1 is not necessarily formed single-layered, but may be formed multi-layered. Namely,first substrate 1 may be structured with a lower-layer insulation layer and an upper-layer insulation layer. Here, a lower-layer insulation layer indicates the insulation layer formed close tobase substrate 3; and an upper-layer insulation layer indicates an insulation layer formed on the outer surface of the wiring board. Furthermore,first substrate 1 may be structured with a lower-layer insulation layer, an upper-layer insulation layer and an intermediate insulation layer placed in between. The intermediate insulation layer may be made multi-layered. According to the embodiment ofFIG. 2 , the lower-layer insulation layer corresponds to epoxy-resin layer (1 c), the intermediate insulation layer corresponds to epoxy-resin layer (1 b) and the upper-layer insulation layer corresponds to epoxy-resin layer (1 a). - Also, the second substrate is not necessarily formed single-layered, but may be formed multi-layered.
Second substrate 2 may also be structured with a lower-layer insulation layer and an upper-layer insulation layer. Furthermore,second substrate 2 may be structured with a lower-layer insulation layer, an upper-layer insulation layer and an intermediate insulation layer placed in between. In the First Embodiment, the lower-layer insulation layer corresponds to epoxy-resin layer (2 a), the intermediate insulation layer corresponds to epoxy-resin layer (2 b) and the upper-layer insulation layer corresponds to epoxy-resin layer (2 c). On top of the upper-layer insulation layer and on top of the lower-layer insulation layer, conductive patterns may be formed. Then, those conductive patterns may be connected with each other throughvias 44. - The present invention may be employed in a wiring board which can mount electronic components, specifically, in a wiring board which can mount electronic components for compact electronic devices.
Claims (15)
1: A method of manufacturing a wiring board comprising:
forming a base substrate;
forming a first insulation layer on a first surface of the base substrate and a second insulating layer on a second surface of the base substrate opposing the first surface; and
cutting the first insulating layer in a first area and cutting the second insulating layer in a second area offset from said first area to form a first substrate laminated to a second substrate with the base layer interposed therebetween, the second substrate having a smaller mounting area than that of the first substrate such that the first substrate extends beyond an edge of the second substrate,
wherein at least one of the base substrate, the first substrate or the second substrate is formed to include pliable resin, and at least one other of the base substrate, the first substrate or the second substrate is formed to include an inorganic filler.
2. The method of manufacturing a wiring board according to claim 1 , wherein:
the first substrate and second substrate are formed to include pliable resin, and
the base substrate is formed to include resin containing inorganic filler.
3. The method according to claim 1 , wherein:
the base substrate is formed to include pliable resin,
the first substrate is formed to include either resin containing inorganic filler or base material of resin-impregnated inorganic fabric, and
the second substrate is formed to include either resin containing inorganic filler or base material of resin-impregnated inorganic fabric.
4. The method of manufacturing a wiring board according to claim 1 , further comprising forming a via in at least one of the first substrate or the second substrate.
5. The method of manufacturing a wiring board according to claim 1 , further comprising:
forming an interlayer groove portion between the first substrate and the second substrate; and
filling the interlayer groove portion with at least one of a gas, liquid or solid material.
6. The method of manufacturing a wiring board according to claim 1 , further comprising forming a warping prevention portion at a step portion created when the first substrate and the second substrate are laminated with the base substrate interposed therebetween.
7. The method of manufacturing a wiring board according to claim 1 , further comprising:
forming an opening at a step portion created when the first substrate and the second substrate are laminated with the base substrate interposed therebetween; and
filling the opening with at least one of a gas, liquid or solid material.
8. The method of manufacturing a wiring board according to claim 2 , wherein the base substrate is formed to include an inorganic filler comprising either silica filler or glass filler.
9. The method of manufacturing a wiring board according to claim 3 wherein at least one of the first and second substrates is formed to include the resin impregnated inorganic fabric and the resin impregnated inorganic fabric comprises glass cloth.
10. The method of manufacturing a wiring board according to claim 1 , further comprising:
forming a conductive pattern on the first substrate;
forming a conductive pattern on the second substrate; and
connecting the conductive pattern on the first substrate and the conductive pattern on the second substrate by way of the through-hole.
11. The method of manufacturing a wiring board according to claim 4 , further comprising:
forming a conductive layer on an inner surface of the via by plating; and
filling the via with metal.
12. The manufacturing method of wiring board according to claim 4 , further comprising:
forming a conductive layer on an inner surface of the via by plating; and
filling the via with resin.
13. The method of manufacturing a wiring board according to claim 1 , wherein:
the forming the first substrate comprises forming the first substrate with a first lower-layer insulation layer and a first upper-layer insulation layer, and the forming the second substrate comprises forming the second substrate with a second lower-layer insulation layer and a second upper-layer insulation layer.
14. The method of manufacturing a wiring board according to claim 13 , further comprising:
forming a conductive pattern on each of the upper-layer insulation layers;
forming a conductive pattern on each of the lower-layer insulation layers; and
connecting each conductive pattern on the upper-layer insulation layers to a respective conductive pattern on the lower-layer insulation layers through vias.
15. The method of manufacturing a wiring board according to claim 1 , further comprising forming the first insulation layer on the first surface of the base substrate and a second insulating layer on a second surface of the base substrate such that opposing ends of the first substrate are not aligned with an end of the second substrate such that a central portion of the wiring board is thicker than a peripheral portion of the wiring board corresponding to the opposing ends.
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US13/106,330 US20110209344A1 (en) | 2007-07-17 | 2011-05-12 | Wiring board and method of manufacturing wiring board |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8359738B2 (en) | 2007-07-17 | 2013-01-29 | Ibiden Co., Ltd. | Method of manufacturing wiring board |
US8522429B2 (en) | 2007-07-17 | 2013-09-03 | Ibiden Co., Ltd. | Method of manufacturing wiring board |
US9147584B2 (en) * | 2011-11-16 | 2015-09-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Rotating curing |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
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US8071883B2 (en) * | 2006-10-23 | 2011-12-06 | Ibiden Co., Ltd. | Flex-rigid wiring board including flexible substrate and non-flexible substrate and method of manufacturing the same |
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CN209949597U (en) * | 2016-10-24 | 2020-01-14 | 株式会社村田制作所 | Multilayer substrate |
USD877099S1 (en) * | 2017-03-15 | 2020-03-03 | Sumitomo Electric Industries, Ltd. | Flexible printed wiring board for a module |
Citations (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6697039B1 (en) * | 1999-02-24 | 2004-02-24 | Minolta Co., Ltd. | Information displaying apparatus |
US20040089471A1 (en) * | 2000-06-14 | 2004-05-13 | Matsushita Electric Industrial Co., Ltd. | Printed circuit board and method of manufacturing the same |
US20050016764A1 (en) * | 2003-07-25 | 2005-01-27 | Fumio Echigo | Wiring substrate for intermediate connection and multi-layered wiring board and their production |
US20060012030A1 (en) * | 2004-03-02 | 2006-01-19 | Kwun-Yao Ho | Multi-conducting through hole structure |
US20060083895A1 (en) * | 2004-10-15 | 2006-04-20 | Ibiden Co., Ltd. | Multilayer core board and manufacturing method thereof |
US20060180344A1 (en) * | 2003-01-20 | 2006-08-17 | Shoji Ito | Multilayer printed wiring board and process for producing the same |
US20060202344A1 (en) * | 1997-03-13 | 2006-09-14 | Ibiden Co., Ltd. | Printed Wiring Board and Method for Manufacturing The Same |
US20060218782A1 (en) * | 2003-02-26 | 2006-10-05 | Tuominen Risto | Method for manufacturing an electronic module |
US20060273446A1 (en) * | 2003-01-22 | 2006-12-07 | Junya Sato | Circuit board device and method of interconnecting wiring boards |
US20060281343A1 (en) * | 2003-04-30 | 2006-12-14 | Shinji Uchida | Printed wiring board connection structure |
US20070126123A1 (en) * | 2005-12-01 | 2007-06-07 | Fujifilm Corporation | Wiring board and wiring board connecting apparatus |
US7246435B2 (en) * | 2005-02-09 | 2007-07-24 | Fujitsu Limited | Wiring board and method for fabricating the same |
US20080283276A1 (en) * | 2007-05-17 | 2008-11-20 | Ibiden Co., Ltd | Wiring board and method of manufacturing wiring board |
US20090007425A1 (en) * | 2006-02-09 | 2009-01-08 | Eiichi Shinada | Method for Manufacturing Multilayer Wiring Board |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05152693A (en) | 1991-11-30 | 1993-06-18 | Nitto Denko Corp | Flexible printed board with reinforcing part and manufacture thereof |
JP3311977B2 (en) | 1997-12-05 | 2002-08-05 | イビデン株式会社 | Adhesive for electroless plating and multilayer printed wiring board |
JP2000013019A (en) | 1998-06-23 | 2000-01-14 | Sharp Corp | Built-up multilayer printed wiring board and its manufacture |
JP3744383B2 (en) | 2000-06-09 | 2006-02-08 | 松下電器産業株式会社 | Composite wiring board and manufacturing method thereof |
JP2005079402A (en) | 2003-09-01 | 2005-03-24 | Fujikura Ltd | Circuit board and its manufacturing method |
JP2005236205A (en) | 2004-02-23 | 2005-09-02 | Sharp Corp | Mutilayer printed-wiring board and manufacturing method therefor |
JP2005268505A (en) | 2004-03-18 | 2005-09-29 | Fujikura Ltd | Multilayer wiring board and its manufacturing method |
JP2005336287A (en) | 2004-05-26 | 2005-12-08 | Matsushita Electric Works Ltd | Thermosetting adhesive sheet for flexible printed wiring board, manufacturing method therefor and multilayer flexible printed wiring board and flex-rigid printed wiring board using the same |
JP2006032830A (en) | 2004-07-21 | 2006-02-02 | Fujikura Ltd | Method for manufacturing partial build-up wiring circuit board |
JP2006202891A (en) | 2005-01-19 | 2006-08-03 | Fujikura Ltd | Method for manufacturing rigid flexible printed wiring board |
-
2008
- 2008-06-24 US US12/144,691 patent/US8035983B2/en not_active Expired - Fee Related
-
2011
- 2011-05-12 US US13/106,330 patent/US20110209344A1/en not_active Abandoned
Patent Citations (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060202344A1 (en) * | 1997-03-13 | 2006-09-14 | Ibiden Co., Ltd. | Printed Wiring Board and Method for Manufacturing The Same |
US6697039B1 (en) * | 1999-02-24 | 2004-02-24 | Minolta Co., Ltd. | Information displaying apparatus |
US20040089471A1 (en) * | 2000-06-14 | 2004-05-13 | Matsushita Electric Industrial Co., Ltd. | Printed circuit board and method of manufacturing the same |
US20060180344A1 (en) * | 2003-01-20 | 2006-08-17 | Shoji Ito | Multilayer printed wiring board and process for producing the same |
US20060273446A1 (en) * | 2003-01-22 | 2006-12-07 | Junya Sato | Circuit board device and method of interconnecting wiring boards |
US20060218782A1 (en) * | 2003-02-26 | 2006-10-05 | Tuominen Risto | Method for manufacturing an electronic module |
US20060281343A1 (en) * | 2003-04-30 | 2006-12-14 | Shinji Uchida | Printed wiring board connection structure |
US20050016764A1 (en) * | 2003-07-25 | 2005-01-27 | Fumio Echigo | Wiring substrate for intermediate connection and multi-layered wiring board and their production |
US20060012030A1 (en) * | 2004-03-02 | 2006-01-19 | Kwun-Yao Ho | Multi-conducting through hole structure |
US20060083895A1 (en) * | 2004-10-15 | 2006-04-20 | Ibiden Co., Ltd. | Multilayer core board and manufacturing method thereof |
US7246435B2 (en) * | 2005-02-09 | 2007-07-24 | Fujitsu Limited | Wiring board and method for fabricating the same |
US20070126123A1 (en) * | 2005-12-01 | 2007-06-07 | Fujifilm Corporation | Wiring board and wiring board connecting apparatus |
US20090007425A1 (en) * | 2006-02-09 | 2009-01-08 | Eiichi Shinada | Method for Manufacturing Multilayer Wiring Board |
US20080283276A1 (en) * | 2007-05-17 | 2008-11-20 | Ibiden Co., Ltd | Wiring board and method of manufacturing wiring board |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8359738B2 (en) | 2007-07-17 | 2013-01-29 | Ibiden Co., Ltd. | Method of manufacturing wiring board |
US8522429B2 (en) | 2007-07-17 | 2013-09-03 | Ibiden Co., Ltd. | Method of manufacturing wiring board |
US9147584B2 (en) * | 2011-11-16 | 2015-09-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Rotating curing |
Also Published As
Publication number | Publication date |
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US20090020317A1 (en) | 2009-01-22 |
US8035983B2 (en) | 2011-10-11 |
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