US20110121349A1 - Light-emitting diode and manufacturing method thereof - Google Patents

Light-emitting diode and manufacturing method thereof Download PDF

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Publication number
US20110121349A1
US20110121349A1 US12/781,803 US78180310A US2011121349A1 US 20110121349 A1 US20110121349 A1 US 20110121349A1 US 78180310 A US78180310 A US 78180310A US 2011121349 A1 US2011121349 A1 US 2011121349A1
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US
United States
Prior art keywords
transparent conductive
metal circuit
led
conductive layer
metal
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US12/781,803
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English (en)
Inventor
Szu-Yuan Weng
Yu-Huan Liu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Everlight Electronics Co Ltd
Original Assignee
Everlight Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Everlight Electronics Co Ltd filed Critical Everlight Electronics Co Ltd
Assigned to EVERLIGHT ELECTRONICS CO., LTD. reassignment EVERLIGHT ELECTRONICS CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: LIU, YU-HUAN, WENG, SZU-YUAN
Publication of US20110121349A1 publication Critical patent/US20110121349A1/en
Priority to US13/649,348 priority Critical patent/US8604510B2/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the present invention relates to a light emitting diode (LED) and a manufacturing method thereof More particularly, the present invention relates to a light emitting diode with double-side emission and a manufacturing method thereof
  • LEDs Due to advantages of low power consumption and small volume, LEDs have been extensively applied to fabrication of different sized array light emitting module and applied in indicators in information, communication and consumptive electronic appliances and display devices.
  • the light emitting module with double-side emission can be applied in the electronic devices, such as LED advertisement display screens or flip-open type cell phones.
  • the light emitting module with double-side emission may achieve the goal of reducing the manufacturing costs, weight and thickness by using a panel with double-side emission.
  • a light emitting module can have a plurality of LED dies with different color, simultaneously.
  • the white LED module of the backlight module as an example, because the white LED module is made with red, green and blue LEDs, the epitaxial materials of different color die are difference, and further the voltage characteristics are difference and the design of the control circuit is more complex.
  • the LED module and packaging method thereof can be achieved the goal of double-side emission.
  • the present invention provides a light-emitting diode with double-side emission and a manufacturing method thereof.
  • a light-emitting diode includes a transparent substrate, a first transparent conductive layer, a second transparent conductive layer, a plurality of metal circuits and a LED chip.
  • the first transparent conductive layer and the second transparent conductive layer are respectively disposed on a region of the transparent substrate and electrically isolated from each other.
  • the metal circuits are disposed on the first transparent conductive layer and the second transparent conductive layer respectively, and cover the portions of the first transparent conductive layer and the second transparent conductive layer.
  • the LED chip is disposed on the metal circuits and electrically connected to the metal circuits. The LED chip is suitable for emitting a light, and a portion of the light emits toward the transparent substrate.
  • the manufacturing method of LED includes forming a first transparent conductive layer and a second transparent conductive layer by plating a transparent conductive material on the transparent substrate and etching the transparent conductive material.
  • a plurality of metal circuits is respectively disposed on portions of the first transparent conductive layer and second transparent conductive layer.
  • the LED chip is disposed on the metal circuits so that the LED chip is electrically connected to the metal circuits.
  • a LED is provided.
  • the LED includes a transparent substrate, a transparent conductive pattern layer, a first metal circuit, a second metal circuit, an insulating layer and a LED chip.
  • the transparent conductive pattern layer is disposed on the transparent substrate, and the first metal circuit and the second metal circuit on the transparent conductive pattern layer intersect with each other.
  • the insulating layer is disposed between the second metal circuit and the first metal circuit to electrically isolate the first metal circuit and the second metal circuit.
  • the LED chip is disposed on the first metal circuit and the second metal circuit and electrically connected to the first metal circuit and the second metal circuit. The LED chip is suitable for emitting a light, and a portion of the light emits toward the transparent substrate.
  • the manufacturing method of LED includes forming a transparent conductive pattern by plating a transparent conductive material on the transparent substrate and etching the transparent conductive material.
  • the first metal circuit is deposited on a portion of the transparent conductive pattern
  • the second metal circuit is deposited on the other portion of the transparent conductive pattern, so that the first metal circuit and the second metal circuit on the transparent conductive pattern layer intersect with each other, and the first metal circuit and the second metal circuit are isolated form each other through the insulating layer disposed between the first metal circuit and the second metal circuit.
  • the LED chip is disposed on the first metal circuit and the second metal circuit and electrically connected to the first metal circuit and the second metal circuit.
  • FIG. 1 A is a schematic cross-sectional diagram showing a transparent conductive material layer formed on a transparent substrate according to one embodiment of the present invention.
  • FIG. 1B is a schematic cross-sectional diagram showing a first transparent conductive layer and a second transparent conductive layer formed on the transparent conductive material layer depicted in FIG. 1A .
  • FIG. 1C is a schematic cross-sectional diagram showing the metal circuits deposited on the first transparent conductive layer and the second transparent conductive layer depicted in FIG. 1B .
  • FIG. 1D is a schematic cross-sectional view of an LED chip disposed on the metal circuits depicted in FIG. 1C .
  • FIG. 2 is a top view schematically illustrating the LED chip depicted in FIG. 1D .
  • FIG. 3A is a schematic cross-sectional diagram showing a transparent conductive material layer formed on a transparent substrate according to another embodiment of the present invention.
  • FIG. 3B is a schematic cross-sectional diagram showing a transparent conductive pattern formed on the transparent conductive material layer depicted in FIG. 3A .
  • FIG. 3C is a schematic cross-sectional diagram showing the metal circuits deposited on the transparent conductive pattern depicted in FIG. 3B .
  • FIG. 3D is a schematic cross-sectional view of an insulating layer formed on the first metal circuit and the second metal circuit depicted in FIG. 3C .
  • FIG. 3E is a schematic cross-sectional view of a metal layer formed on the insulating layer depicted in FIG. 3D to connect the different sections of the second metal circuit.
  • FIG. 3F is a schematic cross-sectional view of an LED chip disposed on the first metal circuit and the second metal circuit depicted in FIG. 3E .
  • FIG. 4 is schematic views showing an intersection circuit according to the manufacturing flow charts depicted in FIG. 3A-3F .
  • FIGS. 1A-1D are schematic cross-sectional flowcharts illustrating a manufacturing process of a light-emitting (LED) diode according to an embodiment of the present invention.
  • a transparent substrate 100 whereon a transparent conductive material layer 110 has been formed is provided.
  • a method of forming the transparent conductive material layer 110 is, for example, evaporation.
  • a thickness of the transparent conductive material layer 110 can be between 1600 ⁇ 2100 angstrom ( ⁇ ), and a resistance of the transparent conductive material layer 110 is 10 ohmic ( ⁇ ).
  • FIG. 1B is a schematic cross-sectional diagram showing a first transparent conductive layer and a second transparent conductive layer formed on the transparent conductive material layer depicted in FIG. 1A .
  • the first transparent conductive layer 113 and the second transparent conductive layer 114 are formed through etching the transparent conductive material layer 110 .
  • the method for etching the transparent conductive material layer 110 is, for example, a lithography and etching process.
  • FIG. 1C is a schematic cross-sectional diagram showing the metal circuits deposited on the first transparent conductive layer and the second transparent conductive layer depicted in FIG. 1B .
  • the metal circuit 133 is deposited on a portion of the first transparent conductive layer 113
  • the metal circuit 134 is deposited on a portion of the second transparent conductive layer 114 .
  • FIG. 1D is a schematic cross-sectional view of an LED chip disposed on the metal circuits depicted in FIG. 1C .
  • the LED chip 140 is disposed on the first metal circuit 133 and the second metal circuit 134 , so that the LED chip 140 is electrically connected to the first metal circuit 133 and the second metal circuit 134 .
  • the LED chip 140 is disposed on the metal circuit by flip chip, and the method of disposing includes fixing the LED chip 140 on the metal circuit through a silver glue of a eutectic bonding.
  • FIG. 2 is a top view schematically illustrating the LED chip depicted in FIG. 1D .
  • the cross-sectional structure along line 1 D in FIG. 2 is as shown in the FIG. 1D .
  • the LED 150 includes a transparent substrate 100 , a first transparent conductive layer 113 , a second transparent conductive layer 114 , a first metal circuit 133 , a second metal circuit 134 and a LED chip 140 .
  • the first transparent conductive layer 113 and the second transparent conductive layer 114 are respectively disposed on a region of the transparent substrate 100 and electrically isolated from each other.
  • the first metal circuit 133 is disposed on the first transparent conductive layer 113 and covers a portion of the first transparent conductive layer 113 .
  • the second metal circuit 134 is disposed on the second transparent conductive layer 114 and covers a portion of the second transparent conductive layer 114 .
  • the LED chip 140 is disposed on the first metal circuit 133 and the second metal circuit 134 and electrically connected to the first metal circuit 133 and the second metal circuit 134 .
  • the LED chip 140 is suitable for emitting a light, and a portion of the light emits toward the transparent substrate.
  • the substrate comprises a glass substrate, a plastic substrate or a flexible substrate.
  • the thickness of the transparent substrate can be 1.1 micrometers ( ⁇ m).
  • the transparent conductive layer can be a conductive layer with indium tin oxide.
  • the material of the metal circuit is, for example, gold, aluminum, copper, or alloy thereof.
  • FIGS. 3A-3F are schematic cross-sectional flowcharts illustrating a manufacturing process of a light-emitting diode (LED) according to another embodiment of the present invention.
  • FIG. 3A is a schematic cross-sectional diagram showing a transparent conductive material layer formed on a transparent substrate.
  • a transparent conductive material 210 is plated on a transparent substrate 200 .
  • a method of forming the transparent conductive material 210 is, for example, evaporation.
  • a thickness of the transparent conductive material 210 can be between 1600 ⁇ 2100 angstrom ( ⁇ ), and a resistance of the transparent conductive material layer 210 is 10 ohmic( ⁇ ).
  • FIG. 3B is a schematic cross-sectional diagram showing a transparent conductive pattern formed by etching the transparent conductive material layer 210 .
  • Patterns 212 a , 212 b , 212 c are formed by etching the transparent conductive material layer 210 .
  • the method for etching the transparent conductive material layer 210 is, for example, a lithography and etching process.
  • FIG. 3C is a schematic view of the metal circuits deposited on the transparent conductive pattern 212 .
  • the first metal circuit 222 is deposited on a portion of the pattern 212 c of the transparent conductive pattern
  • the section 223 a of the second metal circuit 223 is deposited on a portion of the pattern 212 a
  • the section 223 b of the second metal circuit is deposited on a portion of the pattern 212 b.
  • FIG. 3D is a schematic view of an insulating layer formed on the first metal circuit 222 .
  • the insulating layer 230 covers a portion of the first metal circuit 222 and extends crossing a portion of the sections 223 a , 223 b of the second metal circuit 223 .
  • FIG. 3E is a schematic view of a metal layer formed on the insulating layer to connect the sections 223 a , 223 b of the second metal circuit 223 .
  • a metal layer is deposited on a portion of the insulating layer 230 , the sections 223 a , 223 b of the second metal circuit 223 to form a connecting section 240 to connect the sections 223 a , 223 b of the second metal circuit 223 .
  • the first metal circuit 222 and the second metal circuit 223 on the transparent conductive pattern layer intersect with each other by the connecting section 240 .
  • the insulating layer 230 is disposed between the first metal circuit 222 and the second metal circuit 223 to electrically isolate the first metal circuit 222 and the second metal circuit 223 .
  • FIG. 3F is a schematic view of an LED chip disposed on the first metal circuit and the second metal circuit.
  • the first metal circuit 222 and the second metal circuit 223 respectively extend and connect to a positive electrode and a negative electrode, and the LED chip 140 is disposed on the positive electrode and the negative electrode so as to electrically connect to the first metal circuit 222 and the second metal circuit 223 .
  • FIG. 4 is schematic views showing an intersection circuit according to the manufacturing flow charts depicted in FIG. 3A-3F .
  • the intersection circuit 300 includes a transparent substrate 200 , a transparent conductive pattern layer 212 , a first metal circuit 222 and a second metal circuit 223 , an insulating layer 230 and a LED chip 400 .
  • the transparent conductive pattern layer 212 is disposed on the transparent substrate 200 , and the first metal circuit 222 and the second metal circuit 223 on the transparent conductive pattern layer 212 intersect with each other.
  • the insulating layer 230 is disposed between the second metal circuit 223 and the first metal circuit 222 to electrically isolate the first metal circuit 222 and the second metal circuit 223 .
  • the LED chip 400 is disposed on the first metal circuit 222 and the second metal circuit 223 and electrically connected to the first metal circuit 222 and the second metal circuit 223 .
  • the LED chip 400 is disposed on the metal circuits by flip chip, and the method of disposing includes fixing the light emitting chip on the metal circuit through a silver glue of a eutectic bonding.
  • the LED chip 400 is suitable for emitting a light, and a portion of the light emits toward the transparent substrate.
  • the substrate comprises a glass substrate, a plastic substrate or a flexible substrate.
  • the thickness of the transparent substrate can be 1.1 micrometers ( ⁇ m).
  • the transparent conductive layer can be a conductive layer with indium tin oxide.
  • the material of the metal circuit is, for example, gold, aluminum, copper, or alloy thereof.
  • a material of the insulating layer is, for example, silicon oxide, nitride dioxide or a common-used insulating material.
  • first metal circuit the second metal circuit, the insulating layer, the metal circuit pattern or the shape, the position, the size and the amount, the located of the positive electrode and the negative electrode of light emitting chip only serves as an example and is not intended to limit the present invention.
US12/781,803 2009-11-25 2010-05-17 Light-emitting diode and manufacturing method thereof Abandoned US20110121349A1 (en)

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US13/649,348 US8604510B2 (en) 2009-11-25 2012-10-11 Light-emitting diode mounted on intersected and discontinuous transparent conductive pattern layers and manufacturing method thereof

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TW098140165A TWI404241B (zh) 2009-11-25 2009-11-25 發光二極體及其封裝方法
TW98140165 2009-11-25

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104009147A (zh) * 2014-06-12 2014-08-27 上海虔敬节能环保科技有限公司 一种led多功能封装结构及其封装工艺

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103916499B (zh) * 2014-04-07 2016-08-24 蔡合 手机内存卡切换连接装置
CN106601726A (zh) * 2017-01-10 2017-04-26 广州市祺虹电子科技有限公司 一种彩色透明led发光板

Citations (4)

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Publication number Priority date Publication date Assignee Title
US6270236B1 (en) * 1998-11-27 2001-08-07 Siemens Aktiengesellschaft L.E.D Lighting unit with transparent carrier panel
US6667497B1 (en) * 2002-06-21 2003-12-23 Advanced Optoelectronic Technology LED package
US20060029326A1 (en) * 2002-03-25 2006-02-09 Canon Kabushiki Kaisha Optical waveguide apparatus and method for making the same
US20080176398A1 (en) * 2007-01-18 2008-07-24 Kanti Jain High throughput, low cost dual-mode patterning method for large area substrates

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US6548956B2 (en) * 1994-12-13 2003-04-15 The Trustees Of Princeton University Transparent contacts for organic devices
TW200847114A (en) * 2007-05-30 2008-12-01 Au Optronics Corp A circuit signal connection interface, a manufacture method thereof, and an electronic device using the same
US8067784B2 (en) * 2008-03-25 2011-11-29 Bridge Semiconductor Corporation Semiconductor chip assembly with post/base heat spreader and substrate

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6270236B1 (en) * 1998-11-27 2001-08-07 Siemens Aktiengesellschaft L.E.D Lighting unit with transparent carrier panel
US20060029326A1 (en) * 2002-03-25 2006-02-09 Canon Kabushiki Kaisha Optical waveguide apparatus and method for making the same
US6667497B1 (en) * 2002-06-21 2003-12-23 Advanced Optoelectronic Technology LED package
US20080176398A1 (en) * 2007-01-18 2008-07-24 Kanti Jain High throughput, low cost dual-mode patterning method for large area substrates

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104009147A (zh) * 2014-06-12 2014-08-27 上海虔敬节能环保科技有限公司 一种led多功能封装结构及其封装工艺

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US20130032850A1 (en) 2013-02-07
US8604510B2 (en) 2013-12-10
TWI404241B (zh) 2013-08-01
TW201119099A (en) 2011-06-01

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AS Assignment

Owner name: EVERLIGHT ELECTRONICS CO., LTD., TAIWAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:WENG, SZU-YUAN;LIU, YU-HUAN;REEL/FRAME:024398/0226

Effective date: 20100514

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION