US20100208442A1 - Wiring board assembly and manufacturing method thereof - Google Patents
Wiring board assembly and manufacturing method thereof Download PDFInfo
- Publication number
- US20100208442A1 US20100208442A1 US12/705,776 US70577610A US2010208442A1 US 20100208442 A1 US20100208442 A1 US 20100208442A1 US 70577610 A US70577610 A US 70577610A US 2010208442 A1 US2010208442 A1 US 2010208442A1
- Authority
- US
- United States
- Prior art keywords
- wiring board
- reinforcing member
- slits
- stiffener
- resin material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
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Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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- H01L2924/1461—MEMS
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15172—Fan-out arrangement of the internal vias
- H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
- H05K2201/2009—Reinforced areas, e.g. for a specific part of a flexible printed circuit
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
- H05K2201/2018—Presence of a frame in a printed circuit or printed circuit assembly
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
Definitions
- the present invention relates to a wiring board assembly in which a wiring board is reinforced by a reinforcing member to prevent warpage or bending of the wiring board, and a method of manufacturing the wiring board assembly.
- a semiconductor integrated circuit chip (hereinafter just referred to as “IC chip”) has various applications such as a microprocessor for a computer. There is a tendency to provide an increasing number of terminals on the IC chip with a smaller terminal pitch for higher speed and performance of the IC chip.
- a plurality of terminals are arranged closely in an array on a bottom side of the IC chip and are connected by flip-chip bonding to terminals of a motherboard.
- the direct mounting of the IC chip on the motherboard is however difficult due to a great difference between the terminal pitch of the IC chip and the terminal pitch of the motherboard. It has thus been common practice to produce a semiconductor package by mounting the IC chip on a chip mounting wiring board, and then, mount the semiconductor package on the motherboard as proposed in Japanese Laid-Open Patent Publication No. 2002-026500.
- the IC chip is generally formed of a semiconductor material such as silicon having a thermal expansion coefficient of about 2.0 ppm/° C. to 5.0 ppm/° C.
- the chip mounting wiring board is often formed of a resin material having a higher thermal expansion coefficient than that of the semiconductor martial of the IC chip.
- a so-called “build-up wiring board” is already put to practical use.
- the build-up wiring board includes a core substrate and a plurality of resin insulation layers and conduction layers alternately laminated as build-up layers on top and bottom sides of the core substrate.
- the core substrate is commonly formed of a resin material such as a resin-impregnated glass fiber material (e.g.
- electrical wiring e.g. through-hole conductors
- core substrate for electrical connection between the conduction layers on the top and bottom sides of the core substrate.
- Japanese Laid-Open Patent Publication No. 2002-026171 proposes a coreless wiring board that has no core substrate of relatively large thickness. In the absence of the core substrate, the total wiring length of the coreless wiring board becomes shortened to reduce the transmission loss of high-frequency signals and to enable the high-speed operation of the IC chip.
- the absence of the core substrate leads to a smaller thickness and lower rigidity of the wiring board. It is thus likely that, when solder bumps for flip-chip bonding get cooled, the coreless wiring board will be warped to its chip mounting side under the influence of a thermal stress due to a difference in thermal expansion coefficient between the chip material and the wiring board material. The warpage or bending of the wiring board becomes a cause of a crack in the joint between the IC chip and the wiring board or an open failure in the IC chip and, by extension, a deterioration in yield rate and reliability of the semiconductor package.
- a semiconductor package 100 that includes a resin wiring board 101 , an IC chip 106 mounted on a chip mounting surface 102 of the resin wiring board 101 and a frame-shaped stiffener 105 (as a reinforcing member) fixed to the chip mounting surface 102 of the resin wiring board 101 with the IC chip 106 exposed through an opening of the stiffener 105 as shown in FIG. 39 .
- the stiffener 105 may alternatively be fixed to a bottom surface 103 of the resin wiring board 101 .
- the stiffener 105 is formed of e.g.
- the resin wiring board 101 may be warped or bent under the influence of a thermal stress due to a difference in thermal expansion coefficient between the resin wiring board 101 and the metal stiffener 105 .
- Japanese Laid-Open Patent Publication No. 2007-299887 proposes a modified wiring board stiffener 110 having slits 114 to distribute a thermal stress on the stiffener 110 as shown in FIG. 40 .
- the slits 114 are formed to extend from corners of an opening 112 toward corners 111 of the stiffener 110 .
- Each of the slits 114 has one end open to the opening 112 and the other end located adjacent to the corner 111 of the stiffener 111 so that the stiffener 110 is not completely divided into separate pieces and is connected at some portions around the corners 111 .
- a wiring board assembly comprising: a rectangular plate-shaped wiring board having a plurality of resin insulation layers and conduction layers alternately laminated together to define opposite first and second main surfaces and a plurality of connection terminals arranged on the first main surface for surface contact with terminals of a chip; and a rectangular frame-shaped reinforcing member fixed to the first main surface of the wiring board with the connection terminals exposed through an opening of the reinforcing member, the reinforcing member having a plurality of structural pieces separated by slits extending from an inner circumferential surface to an outer circumferential surface of the reinforcing member.
- a wiring board assembly comprising: a rectangular plate-shaped wiring board having a plurality of resin insulation layers and conduction layers alternately laminated together to define opposite first and second main surfaces and a plurality of connection terminals arranged on the first main surface for surface contact with terminals of a chip; and a rectangular frame-shaped reinforcing member fixed to the first main surface of the wiring board with the connection terminals exposed through an opening of the reinforcing member, the reinforcing member having a plurality of structural pieces separated by slits and a resin material filled in the slits to bond the structural pieces together by the resin material.
- a manufacturing method of a wiring board assembly comprising: producing a rectangular plate-shaped wiring board, the wiring board having a plurality of resin insulation layers and conduction layers alternately laminated together to define opposite first and second main surfaces and a plurality of connection terminals arranged on the first main surface for surface contact with terminals of a chip; providing a rectangular frame-shaped reinforcing member, the reinforcing member being divided into a plurality of structural pieces by slits; filling a resin material in the slits to bond the structural pieces together by the resin material; and fixing the reinforcing member to the first main surface of the wiring board with the connection terminals exposed through an opening of the reinforcing member.
- FIG. 1 is a section view of a wiring board assembly according to a first embodiment of the present invention.
- FIG. 2 is a top view of the wiring board assembly according to the first embodiment of the present invention.
- FIGS. 3 to 13 are schematic views showing a method of manufacturing the wiring board assembly according to the first embodiment of the present invention.
- FIG. 14 is a schematic view of a stiffener of the wiring board assembly in a state where structural pieces of the stiffener are displaced in position relative to each other under a thermal stress.
- FIG. 15 is a top view of a wiring board assembly according to a second embodiment of the present invention.
- FIG. 16 is a section view of part of the wiring board assembly according to the second embodiment of the present invention.
- FIG. 17 is a perspective view of a stiffener for a wiring board according to a third embodiment of the present invention.
- FIG. 18 is a perspective view of a stiffener for a wiring board according to a fourth embodiment of the present invention.
- FIG. 19 is a perspective view of a stiffener for a wiring board according to a fifth embodiment of the present invention.
- FIG. 20 is a perspective view of a stiffener for a wiring board according to a sixth embodiment of the present invention.
- FIG. 21 is a perspective view of a stiffener for a wiring board according to a seventh embodiment of the present invention.
- FIG. 22 is a perspective view of a stiffener for a wiring board according to an eighth embodiment of the present invention.
- FIG. 23 is a top view of a wiring board assembly according to a ninth embodiment of the present invention.
- FIG. 24 is a section view of the wiring board assembly according to the ninth embodiment of the present invention.
- FIGS. 25 and 26 are schematic views showing one method of manufacturing the wiring board assembly according to the ninth embodiment of the present invention.
- FIGS. 27 to 29 are schematic views showing another method of manufacturing the wiring board assembly according to the ninth embodiment of the present invention.
- FIG. 30 is a top view of a wiring board assembly according to a tenth embodiment of the present invention.
- FIG. 31 is a section view of the wiring board assembly according to the tenth embodiment of the present invention.
- FIG. 32 is a top view of a wiring board assembly according to an eleventh embodiment of the present invention.
- FIG. 33 is a section view of the wiring board assembly according to the eleventh embodiment of the present invention.
- FIG. 34 is a top view of a wiring board assembly according to a twelfth embodiment of the present invention.
- FIG. 35 is a top view of a wiring board assembly according to a thirteenth embodiment of the present invention.
- FIG. 36 is a top view of a wiring board assembly according to a fourteenth embodiment of the present invention.
- FIG. 37 is a top view of a wiring board assembly according to a fifteenth embodiment of the present invention.
- FIG. 38 is a section view of part of a wiring board assembly according to a sixteenth embodiment of the present invention.
- FIG. 39 is a perspective view of a conventional wiring board assembly.
- FIG. 40 is a top view of a conventional wiring board stiffer.
- thermo expansion coefficient means an average of measurements at a temperature between 0° C. and a glass transition temperature Tg.
- a semiconductor package 10 includes a wiring board 40 , a chip 12 mounted on the wiring board 40 and a stiffener 31 fixed as a reinforcing member to the wiring board 40 .
- the semiconductor package 10 has a ball grid array (BGA) configuration.
- the configuration of the semiconductor package 10 is not however limited to the BGA package configuration.
- the semiconductor package 10 may alternatively have a pin grid array (PGA) configuration, a land grid array (LGA) configuration or any other configuration.
- the form of the chip 21 is not particularly limited.
- the chip 21 can be either a chip condenser, a semiconductor integrated circuit chip (IC chip) such as DRAM (Dynamic Random Access Memory) or SRAM (Static Random Access Memory) for use as a microprocessor in a computer, a MEMS (Micro Electro Mechanical System) element produced by a semiconductor manufacturing process, or any other chip component such as a chip transistor, a chip diode, a chip resistor, a chip coil or a chip inductor.
- the chip 21 is an IC chip made of silicon having a thermal expansion coefficient of 4.2 ppm/° C. and formed into a rectangular parallelepiped (plate) shape of 15.0 mm length, 15.0 mm width and 0.8 mm thickness.
- the assembly of the wiring board 40 and the stiffener 31 and, occasionally, the chip 21 is referred to as a wiring board assembly 11 .
- the wiring board 40 is formed into a rectangular plate shape of e.g. 50.0 mm length, 50.0 mm width and 0.4 mm thickness with a plurality of (in the first embodiment, four) resin insulation layers 43 , 44 , 45 and 46 and conduction layers 51 .
- the resin insulation layers 43 , 44 , 45 and 46 and the conduction layers 51 are alternately laminated together, with no core substrate, so as to define two opposite top and bottom main surfaces 41 and 42 of the wiring board 40 .
- Each of the resin insulation layers 43 to 46 is made of an insulating resin material.
- the material of the resin insulation layers 43 to 46 can be selected as appropriate in terms of the insulation property, thermal resistance, moisture resistance etc required of the resin insulation layers 43 to 46 .
- Suitable examples of the material of the resin insulation layers 43 to 46 are: thermosetting resins such as epoxy resin, phenol resin, urethane resin, silicone resin and polyimide resin; and thermoplastic resins such as polycarbonate resin, acrylic resin, polyacetal resin and polypropylene resin.
- the insulation layers 43 to 46 are formed of epoxy resin and have a thermal expansion coefficient of about 30 ppm/° C.
- each of the conduction layers 51 is generally formed of copper and has a thermal expansion coefficient of about 17 ppm/° C.
- the form of the conduction layers 51 is not particularly limited.
- the conduction layers 51 can be formed by any known circuit formation process such as subtractive process, semi-additive process or full-additive process. Specific examples of the circuit formation process are copper foil etching, electroless copper plating and electrolytic copper plating.
- the conduction layers 51 can be formed by applying thin copper films by sputtering or chemical vapor deposition (CVD) and subjecting the thin copper films to etching, or by printing a conductive copper paste.
- the wiring board 40 also includes a plurality of terminal pads 52 (as connection terminals) arranged in an array on a chip mounting area 23 of the top surface 41 (i.e. the top surface of the resin insulation layer 46 ) and solder bumps 54 arranged on the respective terminal pads 52 for connection to surface contact terminals 22 of the chip 21 .
- the terminal pads 52 are generally formed of copper.
- the form of the terminal pads 52 is not also particularly limited.
- the terminal pads 52 can be formed by any known circuit formation process such as subtractive process, semi-additive process or full-additive process. Specific examples of the circuit formation process are copper foil etching, electroless copper plating and electrolytic copper plating.
- the terminal pads 52 can be formed by applying thin copper films by sputtering or chemical vapor deposition (CVD) and then subjecting the thin copper films to etching, or by printing conductive copper paste.
- the wiring board 40 further includes a plurality of BGA pads 53 arranged in an array on the bottom surface 54 (i.e. the bottom surface of the resin insulation layer 43 ) and solder bumps 55 arranged on the respective BGA pads 53 for connection to a motherboard.
- the BGA pads can be formed in the same manner as the terminal pads 52 .
- the resin insulation layers 43 to 46 have a plurality of via holes 56 and via conductors 57 formed in the via holes 56 for connection of the conduction layers 51 to the terminal pads 52 and to the BGA pads 53 .
- the via holes 56 can be formed by e.g. laser drilling process using a YAG laser or a carbon dioxide laser; whereas the via conductors 57 can be formed by e.g. plating. It is preferable that the via conductors 57 increase in diameter in the same direction for assured manufacturing of the coreless wiring board 40 .
- each of the via holes 56 is shaped into a frustum of a cone and tapered down toward the top so that the via conductors 57 gradually increases in diameter toward the bottom.
- the stiffener 31 is fixed to the top surface 41 of the wiring board 40 to provide sufficient rigidity to the wiring board 40 since the wiring board 40 has no core substrate and cannot secure sufficient rigidity by itself. More specifically, the stiffener 31 is formed into a rectangular frame shape of e.g. 50.0 mm length, 50.0 mm width and 2.0 mm thickness (as viewed from the top) and joined to the top surface 41 of the wiring board 40 in such a manner that the terminal pads 52 and the solder bumps 54 (and the chip 21 , when mounted on the chip mounting area 23 of the top surface 41 of the wiring board 40 ) are exposed through a center opening 35 of the stiffener 31 .
- the opening 35 is substantially rectangular in shape (as viewed from the top) and has a rounded square cross section of 20 mm length and 20 mm width where four rounded corners thereof are formed with a curvature radius of 1.5 mm.
- the stiffener 31 has a plurality of (in the first embodiment, four) structural pieces 36 separated by slits 39 .
- the slits 39 extend from an inner circumferential surface 37 to an outer circumferential surface 38 of the stiffener 31 so that the stiffener 31 is completely divided into the separate structural pieces 36 .
- the formation of such non-linear slits 39 makes it possible to, when there occurs a thermal stress on the stiffener 31 due to a difference in thermal expansion coefficient between the stiffener 31 and the wiring board 40 during manufacturing of the wiring board assembly 11 (semiconductor package 10 ), relieve the thermal stress on the stiffener 31 and prevent warpage or bending of the wiring board 40 effectively and assuredly.
- the slits 39 are preferably formed into a non-linear shape and, more specifically, a crank shape with four right-angle bends (as viewed from the top) as shown in FIG. 2 .
- the structural pieces 36 of the stiffener 31 are of the same L-like shape and same size, each of which has a recessed portion at one end thereof and a protruding portion on the other end, and are arranged symmetrically with respect to the center of the wiring board assembly 11 with the protruding portion of one of the structural pieces 36 engaged in the recessed portion of the other adjacent one of the structural pieces 36 .
- the structural pieces 36 of the stiffener 31 partly overlap each other in the plane direction of the stiffener 31 even if displaced in position to relieve the thermal stress as shown in FIG. 14 .
- the wiring board 40 can be thus protected from warpage or bending assuredly by the overlap of the structural pieces 36 of the stiffener 31 .
- the formation of the structural pieces 36 in the same shape and size allows cost reduction as compared to the formation of the structural pieces 36 in different shapes.
- the symmetric arrangement of the structural pieces 36 also allows more effective and assured prevention of warpage or bending of the wiring board 40 .
- the structural pieces 36 of the stiffener 31 are preferably formed of a material having higher rigidity than the resin material of the wiring board 40 .
- the use of such a high rigidity material makes it possible to, even when the stiffener 31 is made relatively small in thickness, provide sufficiently high rigidity to the wiring board 40 for high resistance to external stress so that the wiring board assembly 11 can combine a small thickness with high rigidity.
- Preferred examples of the material of the stiffener 31 are: metal materials such as iron, gold, silver, copper, copper alloy, iron-nickel alloy, silicon and gallium arsenide; ceramic materials such as low-temperature firing material e.g.
- a composite of a resin material and an inorganic material e.g. a composite material in which a metal plate or ceramic plate is attached to a resin substrate
- the stiffener 31 (the structural pieces 36 ) is formed of copper and made larger in thickness than the wiring board 40 so that the coreless wiring board 40 can be reinforced properly by the stiffener 31 . Further, the stiffener 31 has a thermal expansion coefficient of about 17 ppm/° C., which is lower than the thermal expansion coefficient (about 30 ppm/° C.) of the resin insulation layers 43 to 46 of the wiring board 40 , in the first embodiment.
- the stiffener 31 has a joint surface 32 held in surface contact with and joined to a circumferential area (around the chip mounting area 23 ) of the top surface 41 of the wiring board 40 and a non-joint surface 33 located opposite from the joint surface 32 .
- the stiffener 31 can be fixed by any known technique to the wiring board 40 depending on the material and shape of the stiffener 31 .
- the joint surface 32 of the stiffener 31 is fixed by an adhesive 30 to the circumferential area of the top surface 41 of the wiring board 40 .
- the adhesive 30 there can be used any appropriate one such as an acrylic adhesive, an epoxy adhesive, a cyanoacrylate adhesive or a rubber adhesive. The use of the adhesive 30 allows easy and assured fixing of the stiffener 31 to the wiring board 40 .
- the wiring board assembly 11 can be manufactured by the following procedure, including a wiring board production step, a solder bump forming step, a stiffener production step, a fixing step and a chip mounting step.
- the wiring board 40 is produced in the wiring board production step.
- a base material 69 is formed by preparing a support substrate 70 (e.g. glass/epoxy substrate) of sufficient strength and applying a resin insulation base film (e.g. epoxy resin film) to form a resin insulation base coat layer 71 on the support substrate 70 .
- a laminated metal sheet material 72 is then placed on the base coat layer 71 of the base material 69 as shown in FIG. 4 .
- the laminated metal sheet material 72 has two copper foil sheets detachably laminated together by metal plating (e.g. chromium plating).
- the base material 69 and the laminated metal sheet material 72 develops such adhesion that the laminated metal sheet material 72 would not become separated from the base coat layer 71 of the base material 69 in the subsequent production process.
- an insulating resin sheet material 75 is placed to cover the laminated metal sheet material 72 and cured by heat pressing in a vacuum with a vacuum heat press machine to thereby form the resin insulation layer 46 .
- the thus-formed resin insulation layer 46 has a center portion held in contact with the laminated metal sheet material 72 and a circumferential portion held in contact with the base coat layer 71 so as to seal the laminated metal sheet material 72 .
- FIG. 5 an insulating resin sheet material 75 is placed to cover the laminated metal sheet material 72 and cured by heat pressing in a vacuum with a vacuum heat press machine to thereby form the resin insulation layer 46 .
- the thus-formed resin insulation layer 46 has a center portion held in contact with the laminated metal sheet material 72 and a circumferential portion held in contact with the base coat layer 71 so as to seal
- the via holes 56 are formed by laser processing (drilling) the resin insulation layer 46 and subjected to desmearing to remove smears from the via holes 56 .
- the via conductors 57 are formed in the via holes 56 by a known circuit formation process such as electroless copper plating or electrolytic copper plating.
- the conduction layer 51 is etched to define a wiring pattern on the resin insulation layer 46 by a known patterning process such as semi-additive process.
- the resin insulation layers 43 to 45 and the other conduction layers 51 are successively formed in the same manner as above, thereby yielding a laminate 80 in which the resin insulation layers 43 to 46 and the conduction layers 51 are alternately laminated together on the base material 69 via the laminated metal sheet material 72 as shown in FIG. 8 .
- a portion 81 of the laminate 80 located on the laminated metal sheet material 72 is to be used as the wiring board 40 and is thus occasionally referred to as a “wiring board portion”.
- the wiring board portion 81 is cut from the laminate 80 with a dicing machine. At this time, the laminate 80 and the base material 60 (support substrate 70 and base coat layer 71 ) are cut simultaneously along the border between the wiring board portion 81 and its circumferential portion 82 so that the outer edge of the laminated metal sheet material 72 becomes exposed. Namely, the contact between the resin insulation layer 46 and the base coat layer 71 is lost upon removal of the circumferential portion 82 from the laminate 80 . The wiring board portion 81 is thus bonded to the base material 69 only via the metal sheet material 72 .
- the copper foil sheets 73 and 74 are detached from each other to separate the wiring board portion 81 from the base material 69 .
- the copper foil sheet 73 on the bottom side of the wiring board portion 81 is subjected to patterning by etching, thereby forming the terminal pads 52 on the outermost resin insulation layer 46 as shown in FIG. 10 .
- the wiring board 40 is provided.
- solder bumps 54 are formed on the terminal pads 52 on the outermost resin insulation layer 46 of the wiring board 40 as shown in FIG. 11 by mounting solder balls on the terminal pads 52 with a solder ball mounting machine and reflowing the solder balls with heating at a given temperature.
- the solder bumps 55 are also formed on the BGA pads 53 on the outermost resin insulation layer 43 of the wiring board 40 in the same manner as above.
- the structural pieces 36 of the stiffener 31 are produced by cutting a plate material (e.g. copper plate) with any known cutting machine in the stiffener production step.
- a plate material e.g. copper plate
- the stiffener 31 is fixed to the top surface 41 of the wiring board 40 in the fixing step.
- the adhesive 30 is first applied to the joint surface 32 of each of the structural pieces 36 of the stiffener 31 .
- the structural pieces 36 of the stiffener 31 are placed on the top surface 41 of the wiring board 40 to bring the joint surface 32 of each of the structural pieces 36 of the stiffener 31 into contact with the top surface 41 of the wiring board 40 and to engage the protruding portion of one of the structural pieces 36 in the recessed portion of the other adjacent one of the structural pieces 36 .
- the adhesive 30 is cured with heating at e.g. about 150° C. Upon cooling the adhesive 30 to room temperature after the curing, the structural pieces 36 of the stiffener 31 are fixed by the adhesive 30 to the top surface 41 of the wiring board 40 .
- the frame-shaped stiffener 31 in one piece, fixed the stiffener 31 to the wiring board 40 , and then, divide the stiffener 31 by the slits 39 into the separate structural pieces 36 .
- the stiffener 31 may be produced in one piece, with some parts of the slits 39 cut in the stiffener 31 , and divided into the separate pieces 36 by cutting the remaining parts of the slits 39 in the stiffener 31 after fixing the stiffener 31 to the wiring board 40 .
- the chip 21 is finally mounted on the chip mounting area 23 of the wiring board 40 in the chip mounting step.
- the contact terminals 22 of the chip 21 are aligned with the solder bumps 54 of the wiring board 40 and joined to the solder bumps 54 of the wiring board 40 by reflowing the solder bumps 54 with heating.
- the wiring board assembly 11 it is accordingly possible for the wiring board assembly 11 to relieve the thermal stress on the stiffener 31 by the slits 39 and prevent warpage or bending of the wiring board 40 assuredly so that the chip 21 can be mounted on the wiring board 40 properly for improved yield rate and reliability of the semiconductor package 10 .
- a semiconductor package 10 A according to the second embodiment of the present invention includes a wiring board 40 A, a chip 21 mounted on the wiring board 40 A and a stiffener 31 A fixed as a reinforcing member to the wiring board 40 A as shown in FIGS. 15 and 16 .
- the assembly of the wiring board 40 A and the stiffener 31 A and, occasionally, the chip 21 is referred to as a wiring board assembly 11 A.
- the wiring board assembly 11 A of the second embodiment is structurally similar to the wiring board assembly 11 of the first embodiment, except that: the stiffener 31 A has four structural pieces 36 A separated by linear slits 39 A; and the wiring board 40 has a plurality of plain conduction layers 51 A each arranged between adjacent ones of the resin insulation layers 43 to 46 at positions corresponding to each of the slits 39 A.
- the slits 39 A are formed in the centers of the four sides of the rectangular stiffener 31 A so as to extend linearly from the inner circumferential surface 37 to the outer circumferential surface 38 of the stiffener 31 A in directions perpendicular to the sides of the stiffener 31 A, respectively, so that the structural pieces 36 A of the stiffener 31 has the same L shape and size.
- the slits 39 A are linear in shape as in the second embodiment, it is possible to relieve a thermal stress applied to the stiffener 31 A due to a difference in thermal expansion coefficient between the stiffener 31 A and the wiring board 40 A and to prevent warpage or bending of the wiring board 40 A so that the chip 21 can be mounted on the wiring board 40 A properly for improved yield rate and reliability of the semiconductor package 10 A.
- each of the slits 39 A is made smaller in width at the joint surface 32 than at the non-joint surface 33 of the stiffener 31 A as shown in FIG. 16 .
- the width of the slits 39 A gradually decreases from the non-joint surface 33 to the joint surface 32 of the stiffener 31 A so that the slits 39 A are substantially V-shaped in cross section. It is possible to secure a wider area of the joint surface 32 of the stiffener 31 A and fix the stiffener 31 A to the wiring board 40 A assuredly by decreasing the width of the slits 39 A at the joint surface 32 .
- the portions of the wiring board 40 A corresponding to the slits 39 of the stiffener 31 are lower in rigidity and strength and are thus susceptible to warpage or bending.
- the plain conduction layers 51 A are arranged between the resin insulation layers 43 to 46 so as to correspond in position to each of the slits 39 A.
- the plain conduction layers 51 A are dummy conductors that do not have no connections to the via conductors 57 and thus do not perform an electrical function, but perform the function to reinforce the slit-corresponding portions of the wiring board 40 A. It is thus possible to provide the wiring board assembly 11 A with sufficient rigidity and strength so that the chip mounting area 23 of the wiring board 40 A can secure flatness to mount thereon the chip 21 .
- the shape and number of the structural pieces 36 , 36 A (i.e. the form, position and number of the slits 39 , 39 A) of the stiffener 31 , 31 A are not particularly limited to the above and can be modified as appropriate as in the following embodiments.
- a stiffener 31 B for a wiring board according to the third embodiment of the present invention (as a modification of the first embodiment) has four structural pieces 36 B separated by non-linear slits 39 B as shown in FIG. 17 .
- the slits 39 B are formed into a crank shape as viewed from the side in contrast to the first embodiment in which the slits 39 are a crank shape as viewed from the top.
- a stiffener 31 C for a wiring board according to the fourth embodiment of the present embodiment has four structural pieces 36 C separated by linear slits 39 C as shown in FIG. 18 .
- a stiffener 31 D for a wiring board according to the fifth embodiment of the present embodiment has four structural pieces 36 D separated by linear slits 39 D as shown in FIG. 19 .
- the slits 39 C, 39 D are inclined with respect to the respective sides of the stiffener 31 C, 31 D in contrast to the second embodiment in which the slits 39 A are perpendicular to the respective sides of the stiffer 21 A.
- a stiffener 31 E for a wiring board according to the seventh embodiment of the present invention has four structural pieces 36 E separated by linear slits 39 E as shown in FIG. 20 .
- the slits 39 are formed in respective corner portions of the rectangular stiffener 31 E so that the structural pieces 36 E of the stiffener 31 E have a trapezoidal shape as viewed from the top in contrast to the first to sixth embodiments in which the slits 39 , 39 A, 39 B, 39 C, 39 D are formed in the centers of the respective sides of the rectangular stiffener 31 , 31 A, 31 B, 31 C, 31 D.
- stiffener 31 F for a wiring board as shown in FIG. 21 according to the seventh embodiment of the present invention.
- the stiffener 31 F has two structural pieces 31 F of e.g. L-shape in contrast to the first to sixth embodiments in which the stiffener 31 , 31 A, 31 B, 31 C, 31 D, 31 E has four structural pieces 36 , 36 A, 36 B, 36 C, 36 D, 36 E.
- a stiffener with three, five or more structural pieces.
- the stiffener 31 G for a wiring board as shown in FIG. 22 according to the eighth embodiment of the present invention.
- the stiffener 31 G has structural pieces 36 G 1 and 36 G 2 of different shapes (the same width but different lengths) in contrast to the first to seventh embodiments in which the structural pieces 36 , 36 A, 36 B, 36 C, 36 D, 36 E, 36 F of the stiffener 31 , 31 A, 31 B, 31 C, 31 D, 31 E, 31 F are formed in the same shape and size.
- stiffeners 31 B to 31 G can suitably be used in place of the stiffener 31 , 31 A.
- a semiconductor package 10 H includes a wiring board 40 H, a chip 21 mounted on the wiring board 40 H and a stiffener 31 H fixed as a reinforcing member to the wiring board 40 H.
- the assembly of the wiring board 40 H and the stiffener 31 H and, occasionally, the chip 21 is referred to as a wiring board assembly 11 H.
- the ninth embodiment is structurally similar to the above embodiments, except that the stiffener 31 H has structural pieces 36 H separated by slits 39 H and bonded together by a resin material R 1 ; and the clearance between the chip 21 and the top surface 41 of the wiring board 40 H is filled with an underfill material 25 .
- the wiring board 40 H is not necessarily a coreless wiring board in the ninth embodiment.
- the slits 39 H does not necessarily but preferably extend from the inner circumferential surface 37 to the outer circumferential surface 38 of the stiffener 31 H so that the stiffener 31 H is completely divided by the slits 39 H into the separate structural pieces 36 H. More specifically, the slits 39 extend linearly in a radial manner so as to be inclined with respect to and diagonally intersect the respective sides of the stiffener 31 H in the ninth embodiment.
- the structural pieces 36 H of the stiffener 31 H are the same in shape and size.
- the portions of the wiring board 40 H corresponding to the slits 39 H of the stiffener 31 H are lower in rigidity and strength and are thus susceptible to warpage or bending.
- the chip mounting area 23 of the wiring board 40 H may thus fail to secure sufficient flatness to mount thereon the chip 21 . This is more pronounced when the wiring board 40 H is a coreless wiring board.
- the resin material R 1 is filled in the slits 39 H so that the structural pieces 36 H of the stiffener 31 H are bonded together by the resin material R 1 . It is thus possible to reinforce the slit-corresponding portions of the wiring board 40 H and secure sufficient flatness in the chip mounting area 23 of the wiring board 40 H.
- the resin material R 1 is not particularly restricted. Any known resin can be used as the resin material R 1 .
- the resin material R 1 is a dedicated epoxy resin having a thermal expansion coefficient of about 40 ppm/° C., which is higher than the thermal expansion coefficient (about 30 ppm/° C.) of the resin of the resin insulation layers 43 to 46 of the wiring board 40 H.
- the thermal expansion coefficient of the structural pieces 36 H of the stiffener 31 H, the thermal expansion coefficient of the wiring board 40 H and the thermal expansion coefficient of the resin material R 1 are not particularly limited and can be set as appropriate, it is preferable to satisfy such a relationship that: the thermal expansion coefficient of the structural pieces 36 H of the stiffener 31 H is lower than that of the wiring board 40 H; and the thermal expansion coefficient of the resin material R 1 is higher than that of the wiring board 40 H. It is possible to relieve the thermal stress on the stiffener 31 H efficiently upon satisfaction of the above thermal expansion coefficient relationship.
- the resin material R 1 can be the same resin as that used in the resin insulation layers 43 to 46 .
- the resin material R 1 is the same as the material of the resin insulation layers 43 to 46 , it is possible to secure compatibility of the resin material R 1 with the resin insulation layers 43 to 46 and attain good adhesion between the stiffener 31 H and the wiring board 40 H.
- the dedicated resin material to fill the slits 39 H it is easily possible to avoid complication of the manufacturing process and increase of the manufacturing cost of the wiring board assembly 11 H.
- the wiring board assembly 11 H can be manufactured by the following procedure in the ninth embodiment.
- the wiring board production step and the solder bump forming step of the ninth embodiment are the same as those of the first embodiment.
- the structural pieces 36 of the stiffener 31 are cut from a plate material (e.g. copper plate) with any known cutting machine and arranged in a two dimension by e.g. using a positioning mold in such a manner as to form the slits 39 of the same width between the structural pieces 36 .
- the resin material R 1 is prepared in uncured form and filled in the slits 39 .
- each of the slits 39 can be fully filled with the resin material R 1 (i.e. the resin material R 1 can be filled to the full depth of the slits 39 ) or can be partially filled with the resin material R 1 .
- the resin material R 1 is then cured by heat or ultraviolet radiation.
- the structural pieces 36 are bonded together by the resin material R 1 and integrally assembled into the stiffener 31 H as shown in FIG. 25 .
- the stiffener 31 H is fixed to the top surface 41 of the wiring board 40 H in the fixing step.
- the adhesive 30 is first applied to the joint surface 32 of the stiffener 31 H.
- the stiffener 31 H is then placed on the top surface 41 of the wiring board 40 H to bring the joint surface 32 of the stiffener 31 H into contact with the top surface 41 of the wiring board 40 H as shown in FIG. 26 .
- the adhesive 30 is cured with heating at e.g. about 150° C.
- the stiffener 31 H is fixed by the adhesive 30 to the top surface 41 of the wiring board 40 H.
- the chip 21 is mounted on the chip mounting area 23 of the wiring board 40 H in the chip mounting step.
- the clearance between the chip 21 and the top surface 41 of the wiring board 40 H is sealed by the underfill material 25 .
- the structural pieces 36 H of the stiffener 31 are bonded together and physically integrated into one by filling the resin material R 1 in the slits 39 before fixing the stiffener 31 H to the wiring board 40 H. It is thus possible to maintain the relative positions of the structural pieces 36 H so that the stiffener 31 H can be fixed to the wiring board 40 H without misalignment of the structural pieces 36 . This allows easy and assured manufacturing of the wiring board assembly 11 H.
- the adhesive 30 is first applied to the joint surface 32 of each of the structural pieces 36 H of the stiffener 31 H as shown in FIG. 27 .
- the structural pieces 36 H of the stiffener 31 H are then placed on the top surface 41 of the wiring board 40 H to bring the joint surface 32 of each of the structural pieces 36 H into contact with the top surface 41 of the wiring board 40 H as shown in FIG. 28 .
- the adhesive 30 is cured with heating at e.g. about 150° C. and cooled to room temperature after the curing.
- the structural pieces 36 of the stiffener 31 are fixed by the adhesive 30 to the top surface 41 of the wiring board 40 H.
- the resin material R 1 in uncured form is filled in the slits 39 H and cured by heat or ultraviolet radiation so that the structural pieces 36 H are bonded together by the resin material R 1 and integrally assembled into the stiffener 31 H as shown in FIG. 29 . It is possible to manufacture the wiring board assembly 11 H relatively easily and assuredly even by fixing the structural pieces 36 H of the stiffener 31 H to the wiring board 40 H before filling the resin material R 1 in the slits 39 H.
- a semiconductor package 10 I according to the tenth embodiment of the present invention includes a wiring board 40 I, a chip 21 mounted on the wiring board 40 I and a stiffener 31 fixed as a reinforcing member to the wiring board 40 I as shown in FIGS. 30 and 31 .
- the assembly of the wiring board 40 I and the stiffener 31 and, occasionally, the chip 21 is referred to as a wiring board assembly 11 I.
- the stiffener 31 I has a plurality of structural pieces 36 I separated by slits 39 I and bonded together by filling a resin material R 1 in the slits 39 I.
- the tenth embodiment is structurally similar to the ninth embodiment, except for the resin material R 1 of the stiffener 31 I.
- the underfill material 25 is used not only to seal the clearance between the chip 21 and the top surface 41 of the wiring board 40 I but also used as the resin material R 1 to fill in the slits 39 I and bond the structural pieces 36 I of the stiffener 31 I together.
- the slits 39 I in the stiffener 31 I and filling the resin material R 1 in the slits 39 I it is possible to relieve a thermal stress applied to the stiffener 31 I due to a difference in thermal expansion coefficient between the stiffener 31 I and the wiring board 40 I, while providing sufficient rigidity to the wiring board 40 I, and thereby possible to prevent warpage or bending of the wiring board 40 I assuredly so that the chip 21 can be mounted on the wiring board 40 I properly for improved yield rate and reliability of the semiconductor package 10 I. It is further possible to secure compatibility of the resin material R 1 with the underfill material 25 and attain good adhesion between the stiffener 31 I and the wiring board 40 I by using the same material as the resin material R 1 and the underfill material 25 . As there is no need to prepare the dedicated resin material to fill the slits 39 I, it is easily possible to avoid complication of the manufacturing process and increase of the manufacturing cost of the wiring board assembly 11 I.
- the semiconductor package 10 I is completed as follows in the tenth embodiment.
- the wiring board production step and the solder bump forming step are the same as above.
- the structural pieces 36 I of the stiffener 31 I are cut from a plate material and bonded by the adhesive 30 to the top surface 41 of the wiring board 40 I without the resin material R 1 (underfill material 25 ) being filled in the slits 39 I between the structural pieces 36 I.
- the underfill material 25 is simultaneously filled in the clearance between the chip 21 and the top surface 41 of the wiring board 40 I and in the slits 39 I between the structural pieces 36 I of the stiffener 31 I. It is possible to manufacture the semiconductor package 10 I relatively easily and assuredly by such a procedure.
- a semiconductor package 10 J according to the eleventh embodiment of the present invention includes a wiring board 40 J, a chip 21 mounted on the wiring board 40 J and a stiffener 31 J fixed as a reinforcing member to the wing board 40 J as shown in FIGS. 32 and 33 .
- the assembly of the wiring board 40 J and the stiffener 31 J and, occasionally, the chip 21 is referred to as a wiring board assembly 11 J.
- the stiffener 31 J has a plurality of structural pieces 36 J separated by slits 39 J and bonded together by filling a resin material R 1 in the slits 39 J.
- the eleventh embodiment is structurally similar to the ninth and tenth embodiments, except for the resin material R 1 of the stiffener 30 J.
- the adhesive 30 is used not only to fix the stiffener 31 J to the top surface 41 of the wiring board 40 J but also used as the resin material R 1 to fill in the slits 39 J and bond the structural pieces 36 J of the stiffener 31 J together.
- the slits 39 J in the stiffener 31 J By forming the slits 39 J in the stiffener 31 J and filling the resin material R 1 in the slits 39 J, it is possible to relieve a thermal stress applied to the stiffener 31 J due to a difference in thermal expansion coefficient between the stiffener 31 J and the wiring board 40 J, while providing sufficient rigidity to the wiring board 40 J, and thereby possible to prevent warpage or bending of the wiring board 40 J assuredly so that the chip 21 can be mounted on the wiring board 40 J properly for improved yield rate and reliability of the semiconductor package 10 J. As there is no need to prepare the dedicated resin material R 1 to fill the slits 39 J, it is easily possible to avoid complication of the manufacturing process of the wiring board assembly 11 J and increase of the manufacturing cost of the wiring board assembly 11 J.
- the semiconductor package 10 J is completed as follows in the tenth embodiment.
- the wiring board production step and the solder bump forming step are the same as above.
- the structural pieces 36 J of the stiffener 31 J are cut from a plate material. After the adhesive 30 is applied to the joint surface 32 of each of the structural pieces 36 J of the stiffener 31 J, the structural pieces 36 of the stiffener 31 J are placed on the top surface 41 of the wiring board 40 J.
- the resin material R 1 adheresive 30 ) is then filled in the slits 39 J of the stiffener 31 J.
- the adhesive 30 between the joint surface 32 of the stiffener 31 J and the top surface 41 of the wiring board 40 J is cured simultaneously with the resin material R 1 (adhesive 30 ) in the slits of the stiffener 31 J. Namely, the fixing step and the resin material filling step are completed simultaneously by using the same material as the resin material R 1 and the adhesive 30 .
- the underfill material 25 is filled in the clearance between the chip 21 and the top surface 41 of the wiring board 40 J. It is possible to manufacture the semiconductor package 10 J relatively easily and assuredly by such a procedure.
- the shape and number of the structural pieces 36 H, 36 I, 36 J i.e. the form, position and number of the slits 39 H, 39 I, 39 J) of the stiffener 31 H, 31 I, 31 J are not particularly limited to the above and can be modified as appropriate as explained below.
- a wiring board assembly 11 K in which a stiffener 31 K has four structural pieces 36 K separated by four slits 39 K and a resin material R 1 filled in the slits 39 K as shown in FIG. 34 .
- the slits 39 J are formed linearly in corner portions of the stiffener 31 K.
- the structural pieces 36 K of the stiffener 31 K are thus formed into a trapezoidal shape as viewed from the top and bonded together by the resin material R 1 .
- a wiring board assembly 11 L in which a stiffener 31 L has four structural pieces 36 L separated by four slits 39 L and a resin material R 1 filled in the slits 39 L as shown in FIG. 35 .
- the slits 39 L are formed linearly in the centers of the four sides of the rectangular stiffener 31 L so as to extend perpendicular to the sides of the stiffener 31 L, respectively.
- the structural pieces 36 L of the stiffener 31 L have the same L shape and size and are bonded by the resin material R 1 .
- a wiring board assembly 11 M in which a stiffener 31 M has four structural pieces 36 M separated by four slits 39 M and a resin material R 1 filled in the slits 39 M as shown in FIG. 36 .
- the slits 39 M are formed into a non-linear shape (more specifically, crank shape) as viewed from the top and bonded together by the resin material R 1 .
- the formation of such non-linear slits 39 M allows the structural pieces 36 M, even if displaced in position to relieve the thermal stress, to partly overlap each other in the plane direction of the stiffener 31 M.
- the wiring board can be thus protected from warpage or bending assuredly by the overlap of the structural pieces 36 M.
- a wiring board assembly 11 N in which a stiffener 31 N has two structural pieces 36 N separated by slits 36 and a resin material R 1 filled in the slits 36 N as shown in FIG. 37 .
- the structural pieces 36 N of the stiffener 31 N have the same L shape and size.
- each of the slits 39 O is made smaller in width at the joint surface 32 than at the non-joint surface 33 of the stiffener 31 O as in the case of the second embodiment. More specifically, the width of the slits 39 O gradually decreases from the non-joint surface 33 to the joint surface 32 of the stiffener 31 O so that the slits 39 O are substantially V-shaped in cross section.
- the wiring board 40 O includes plain conduction layers 51 A each arranged between adjacent ones of the resin insulation layers 43 to 46 at positions corresponding to each of the slits 39 O in the sixteenth embodiment as in the case of the second embodiment.
- the plain conduction layers 51 A are dummy conductors that do not have no connections to the via conductors 57 and thus do not perform an electrical function, but perform the function to reinforce the portions of the wiring board 40 O corresponding to the slits 39 O of the stiffener 31 O. It is thus possible to provide the wiring board assembly 11 O with sufficient rigidity and strength so that the chip mounting area 23 of the wiring board 40 O can secure flatness to mount thereon the chip 21 .
- the slits 39 , 39 B, 39 C, 39 D, 39 E, 39 F, 39 G, 39 H, 39 I, 39 J, 39 K, 39 L, 39 N can be made smaller in width at the joint surface 32 than at the non-joint surface 33 of the stiffener 31 , 31 B, 31 C, 31 D, 31 E, 31 F, 31 G, 31 H, 31 I, 31 J, 31 K, 31 L, 31 N in the first and third to fifteenth embodiments as in the case of the second and sixteenth embodiments.
- the plain conductors 51 A can also be provided in the wiring board 40 , 40 B, 40 C, 40 D, 40 E, 40 F, 40 G, 40 H, 40 I, 40 J, 40 K, 40 L, 40 N in the first and third to fifteenth embodiments as in the case of the second and sixteenth embodiments.
- the resin material R 1 can be either any dedicated resin material, the same resin material as that of the resin insulation layers 43 to 46 , the underfill material 25 , or the adhesive 30 in the twelfth to sixteenth embodiments.
- a wiring board assembly comprising: a rectangular plate-shaped wiring board having a plurality of resin insulation layers and conduction layers alternately laminated together to define opposite first and second surfaces and a plurality of connection terminals arranged on the first main surface for surface contact with terminals of a chip; and a rectangular frame-shaped reinforcing member fixed to the first main surface of the wiring board with the connection terminals exposed through an opening of the reinforcing member, the reinforcing member having a plurality of structural pieces separated by the slits and a resin material filled in the slits to bond the structural pieces together, wherein the structural pieces of the reinforcing member have a lower thermal expansion coefficient than that of the wiring board; and wherein the resin material of the reinforcing material has a higher thermal expansion coefficient than that of the wiring board.
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Abstract
Description
- The present invention relates to a wiring board assembly in which a wiring board is reinforced by a reinforcing member to prevent warpage or bending of the wiring board, and a method of manufacturing the wiring board assembly.
- A semiconductor integrated circuit chip (hereinafter just referred to as “IC chip”) has various applications such as a microprocessor for a computer. There is a tendency to provide an increasing number of terminals on the IC chip with a smaller terminal pitch for higher speed and performance of the IC chip. In general, a plurality of terminals are arranged closely in an array on a bottom side of the IC chip and are connected by flip-chip bonding to terminals of a motherboard. The direct mounting of the IC chip on the motherboard is however difficult due to a great difference between the terminal pitch of the IC chip and the terminal pitch of the motherboard. It has thus been common practice to produce a semiconductor package by mounting the IC chip on a chip mounting wiring board, and then, mount the semiconductor package on the motherboard as proposed in Japanese Laid-Open Patent Publication No. 2002-026500.
- The IC chip is generally formed of a semiconductor material such as silicon having a thermal expansion coefficient of about 2.0 ppm/° C. to 5.0 ppm/° C. On the other hand, the chip mounting wiring board is often formed of a resin material having a higher thermal expansion coefficient than that of the semiconductor martial of the IC chip. As one type of the resin wiring board, a so-called “build-up wiring board” is already put to practical use. The build-up wiring board includes a core substrate and a plurality of resin insulation layers and conduction layers alternately laminated as build-up layers on top and bottom sides of the core substrate. The core substrate is commonly formed of a resin material such as a resin-impregnated glass fiber material (e.g. a glass/epoxy resin) and made much larger in thickness than the build-up layers, thereby having high rigidity to function as a reinforcement in the wiring board. Further, electrical wiring (e.g. through-hole conductors) is formed through the core substrate for electrical connection between the conduction layers on the top and bottom sides of the core substrate.
- In recent years, high-frequency signals have been applied to the IC chip for high-speed operation of the IC chip. In this case, the mounting of the IC chip on the build-up wiring board results in a transmission loss of high-frequency signal or a circuit malfunction and causes interference with the high-speed operation of the IC chip due to high inductance of the electrical wiring in the core substrate. As a solution to such a problem, Japanese Laid-Open Patent Publication No. 2002-026171 proposes a coreless wiring board that has no core substrate of relatively large thickness. In the absence of the core substrate, the total wiring length of the coreless wiring board becomes shortened to reduce the transmission loss of high-frequency signals and to enable the high-speed operation of the IC chip. However, the absence of the core substrate leads to a smaller thickness and lower rigidity of the wiring board. It is thus likely that, when solder bumps for flip-chip bonding get cooled, the coreless wiring board will be warped to its chip mounting side under the influence of a thermal stress due to a difference in thermal expansion coefficient between the chip material and the wiring board material. The warpage or bending of the wiring board becomes a cause of a crack in the joint between the IC chip and the wiring board or an open failure in the IC chip and, by extension, a deterioration in yield rate and reliability of the semiconductor package.
- In order to solve the above problem, there has been proposed a
semiconductor package 100 that includes aresin wiring board 101, anIC chip 106 mounted on achip mounting surface 102 of theresin wiring board 101 and a frame-shaped stiffener 105 (as a reinforcing member) fixed to thechip mounting surface 102 of theresin wiring board 101 with theIC chip 106 exposed through an opening of thestiffener 105 as shown inFIG. 39 . Thestiffener 105 may alternatively be fixed to abottom surface 103 of theresin wiring board 101. When thestiffener 105 is formed of e.g. a metal material having higher rigidity than that of theresin wiring board 10, however, theresin wiring board 101 may be warped or bent under the influence of a thermal stress due to a difference in thermal expansion coefficient between theresin wiring board 101 and themetal stiffener 105. - As one measure to prevent such wiring board warpage or bending, Japanese Laid-Open Patent Publication No. 2007-299887 proposes a modified
wiring board stiffener 110 having slits 114 to distribute a thermal stress on thestiffener 110 as shown inFIG. 40 . In this proposed technique, theslits 114 are formed to extend from corners of anopening 112 towardcorners 111 of thestiffener 110. Each of theslits 114 has one end open to theopening 112 and the other end located adjacent to thecorner 111 of thestiffener 111 so that thestiffener 110 is not completely divided into separate pieces and is connected at some portions around thecorners 111. There thus arises a possibility of concentration of the thermal stress on such connected corner portions of thestiffener 110 whereby thestiffener 110 may fail to prevent warpage or bending of the resin wiring board. The occurrence of warpage or bending of the resin wiring board causes a deterioration in yield rate and reliability of the semiconductor package due to the difficulty of properly mounting the IC chip on the wiring board. - It is therefore an object of the present invention to provide a wiring board assembly having a wiring board and a reinforcing member fixed to the wiring board so as to relieve a stress on the reinforcing member and prevent warpage or bending of the wiring board assuredly. It is also an object of the present invention to provide a method of manufacturing the wiring board assembly.
- According to a first aspect of the present invention, there is provided a wiring board assembly, comprising: a rectangular plate-shaped wiring board having a plurality of resin insulation layers and conduction layers alternately laminated together to define opposite first and second main surfaces and a plurality of connection terminals arranged on the first main surface for surface contact with terminals of a chip; and a rectangular frame-shaped reinforcing member fixed to the first main surface of the wiring board with the connection terminals exposed through an opening of the reinforcing member, the reinforcing member having a plurality of structural pieces separated by slits extending from an inner circumferential surface to an outer circumferential surface of the reinforcing member.
- According to a second aspect of the present invention, there is provided a wiring board assembly, comprising: a rectangular plate-shaped wiring board having a plurality of resin insulation layers and conduction layers alternately laminated together to define opposite first and second main surfaces and a plurality of connection terminals arranged on the first main surface for surface contact with terminals of a chip; and a rectangular frame-shaped reinforcing member fixed to the first main surface of the wiring board with the connection terminals exposed through an opening of the reinforcing member, the reinforcing member having a plurality of structural pieces separated by slits and a resin material filled in the slits to bond the structural pieces together by the resin material.
- According to a third aspect of the present invention, there is provided a manufacturing method of a wiring board assembly, comprising: producing a rectangular plate-shaped wiring board, the wiring board having a plurality of resin insulation layers and conduction layers alternately laminated together to define opposite first and second main surfaces and a plurality of connection terminals arranged on the first main surface for surface contact with terminals of a chip; providing a rectangular frame-shaped reinforcing member, the reinforcing member being divided into a plurality of structural pieces by slits; filling a resin material in the slits to bond the structural pieces together by the resin material; and fixing the reinforcing member to the first main surface of the wiring board with the connection terminals exposed through an opening of the reinforcing member.
- The other objects and features of the present invention will also become understood from the following description.
-
FIG. 1 is a section view of a wiring board assembly according to a first embodiment of the present invention. -
FIG. 2 is a top view of the wiring board assembly according to the first embodiment of the present invention. -
FIGS. 3 to 13 are schematic views showing a method of manufacturing the wiring board assembly according to the first embodiment of the present invention. -
FIG. 14 is a schematic view of a stiffener of the wiring board assembly in a state where structural pieces of the stiffener are displaced in position relative to each other under a thermal stress. -
FIG. 15 is a top view of a wiring board assembly according to a second embodiment of the present invention. -
FIG. 16 is a section view of part of the wiring board assembly according to the second embodiment of the present invention. -
FIG. 17 is a perspective view of a stiffener for a wiring board according to a third embodiment of the present invention. -
FIG. 18 is a perspective view of a stiffener for a wiring board according to a fourth embodiment of the present invention. -
FIG. 19 is a perspective view of a stiffener for a wiring board according to a fifth embodiment of the present invention. -
FIG. 20 is a perspective view of a stiffener for a wiring board according to a sixth embodiment of the present invention. -
FIG. 21 is a perspective view of a stiffener for a wiring board according to a seventh embodiment of the present invention. -
FIG. 22 is a perspective view of a stiffener for a wiring board according to an eighth embodiment of the present invention. -
FIG. 23 is a top view of a wiring board assembly according to a ninth embodiment of the present invention. -
FIG. 24 is a section view of the wiring board assembly according to the ninth embodiment of the present invention. -
FIGS. 25 and 26 are schematic views showing one method of manufacturing the wiring board assembly according to the ninth embodiment of the present invention. -
FIGS. 27 to 29 are schematic views showing another method of manufacturing the wiring board assembly according to the ninth embodiment of the present invention. -
FIG. 30 is a top view of a wiring board assembly according to a tenth embodiment of the present invention. -
FIG. 31 is a section view of the wiring board assembly according to the tenth embodiment of the present invention. -
FIG. 32 is a top view of a wiring board assembly according to an eleventh embodiment of the present invention. -
FIG. 33 is a section view of the wiring board assembly according to the eleventh embodiment of the present invention. -
FIG. 34 is a top view of a wiring board assembly according to a twelfth embodiment of the present invention. -
FIG. 35 is a top view of a wiring board assembly according to a thirteenth embodiment of the present invention. -
FIG. 36 is a top view of a wiring board assembly according to a fourteenth embodiment of the present invention. -
FIG. 37 is a top view of a wiring board assembly according to a fifteenth embodiment of the present invention. -
FIG. 38 is a section view of part of a wiring board assembly according to a sixteenth embodiment of the present invention. -
FIG. 39 is a perspective view of a conventional wiring board assembly. -
FIG. 40 is a top view of a conventional wiring board stiffer. - The present invention will be described in detail below by way of first to sixteenth embodiments, in which like parts and portions are designated by like reference numerals to avoid repeated explanations thereof. In the following description, the terms “top” and “bottom” are used for purposes of illustration and are not intended to limit the present invention to any particular orientation. Further, the parameter “thermal expansion coefficient” means an average of measurements at a temperature between 0° C. and a glass transition temperature Tg.
- As shown in
FIGS. 1 and 2 , asemiconductor package 10 according to the first embodiment of the present invention includes awiring board 40, a chip 12 mounted on thewiring board 40 and astiffener 31 fixed as a reinforcing member to thewiring board 40. In the first embodiment, thesemiconductor package 10 has a ball grid array (BGA) configuration. The configuration of thesemiconductor package 10 is not however limited to the BGA package configuration. Thesemiconductor package 10 may alternatively have a pin grid array (PGA) configuration, a land grid array (LGA) configuration or any other configuration. Further, the form of thechip 21 is not particularly limited. Thechip 21 can be either a chip condenser, a semiconductor integrated circuit chip (IC chip) such as DRAM (Dynamic Random Access Memory) or SRAM (Static Random Access Memory) for use as a microprocessor in a computer, a MEMS (Micro Electro Mechanical System) element produced by a semiconductor manufacturing process, or any other chip component such as a chip transistor, a chip diode, a chip resistor, a chip coil or a chip inductor. In the first embodiment, thechip 21 is an IC chip made of silicon having a thermal expansion coefficient of 4.2 ppm/° C. and formed into a rectangular parallelepiped (plate) shape of 15.0 mm length, 15.0 mm width and 0.8 mm thickness. Herein, the assembly of thewiring board 40 and thestiffener 31 and, occasionally, thechip 21 is referred to as awiring board assembly 11. - The
wiring board 40 is formed into a rectangular plate shape of e.g. 50.0 mm length, 50.0 mm width and 0.4 mm thickness with a plurality of (in the first embodiment, four) resin insulation layers 43, 44, 45 and 46 and conduction layers 51. The resin insulation layers 43, 44, 45 and 46 and the conduction layers 51 are alternately laminated together, with no core substrate, so as to define two opposite top and bottommain surfaces wiring board 40. - Each of the resin insulation layers 43 to 46 is made of an insulating resin material. The material of the resin insulation layers 43 to 46 can be selected as appropriate in terms of the insulation property, thermal resistance, moisture resistance etc required of the resin insulation layers 43 to 46. Suitable examples of the material of the resin insulation layers 43 to 46 are: thermosetting resins such as epoxy resin, phenol resin, urethane resin, silicone resin and polyimide resin; and thermoplastic resins such as polycarbonate resin, acrylic resin, polyacetal resin and polypropylene resin. A composite of a glass fiber material (e.g. a woven or nonwoven glass fabric) or an organic fiber material (e.g. polyamide fiber) with any of the above resin materials, or a resin-resin composite formed by e.g. impregnating a fluorocarbon resin substrate of three-dimensional network structure (e.g. continuously porous polytetrafluoroethylene (PTFE) substrate) with a thermosetting resin (e.g. epoxy resin), can also be used as the material of the resin insulation layers 43 to 46. In the first embodiment, the insulation layers 43 to 46 are formed of epoxy resin and have a thermal expansion coefficient of about 30 ppm/° C.
- On the other hand, each of the conduction layers 51 is generally formed of copper and has a thermal expansion coefficient of about 17 ppm/° C. The form of the conduction layers 51 is not particularly limited. The conduction layers 51 can be formed by any known circuit formation process such as subtractive process, semi-additive process or full-additive process. Specific examples of the circuit formation process are copper foil etching, electroless copper plating and electrolytic copper plating. Alternatively, the conduction layers 51 can be formed by applying thin copper films by sputtering or chemical vapor deposition (CVD) and subjecting the thin copper films to etching, or by printing a conductive copper paste.
- The
wiring board 40 also includes a plurality of terminal pads 52 (as connection terminals) arranged in an array on achip mounting area 23 of the top surface 41 (i.e. the top surface of the resin insulation layer 46) and solder bumps 54 arranged on therespective terminal pads 52 for connection to surfacecontact terminals 22 of thechip 21. Theterminal pads 52 are generally formed of copper. The form of theterminal pads 52 is not also particularly limited. Theterminal pads 52 can be formed by any known circuit formation process such as subtractive process, semi-additive process or full-additive process. Specific examples of the circuit formation process are copper foil etching, electroless copper plating and electrolytic copper plating. Alternatively, theterminal pads 52 can be formed by applying thin copper films by sputtering or chemical vapor deposition (CVD) and then subjecting the thin copper films to etching, or by printing conductive copper paste. - The
wiring board 40 further includes a plurality ofBGA pads 53 arranged in an array on the bottom surface 54 (i.e. the bottom surface of the resin insulation layer 43) and solder bumps 55 arranged on therespective BGA pads 53 for connection to a motherboard. The BGA pads can be formed in the same manner as theterminal pads 52. - Furthermore, the resin insulation layers 43 to 46 have a plurality of via
holes 56 and viaconductors 57 formed in the via holes 56 for connection of the conduction layers 51 to theterminal pads 52 and to theBGA pads 53. The via holes 56 can be formed by e.g. laser drilling process using a YAG laser or a carbon dioxide laser; whereas the viaconductors 57 can be formed by e.g. plating. It is preferable that the viaconductors 57 increase in diameter in the same direction for assured manufacturing of thecoreless wiring board 40. In the first embodiment, each of the via holes 56 is shaped into a frustum of a cone and tapered down toward the top so that the viaconductors 57 gradually increases in diameter toward the bottom. - The
stiffener 31 is fixed to thetop surface 41 of thewiring board 40 to provide sufficient rigidity to thewiring board 40 since thewiring board 40 has no core substrate and cannot secure sufficient rigidity by itself. More specifically, thestiffener 31 is formed into a rectangular frame shape of e.g. 50.0 mm length, 50.0 mm width and 2.0 mm thickness (as viewed from the top) and joined to thetop surface 41 of thewiring board 40 in such a manner that theterminal pads 52 and the solder bumps 54 (and thechip 21, when mounted on thechip mounting area 23 of thetop surface 41 of the wiring board 40) are exposed through acenter opening 35 of thestiffener 31. In the first embodiment, theopening 35 is substantially rectangular in shape (as viewed from the top) and has a rounded square cross section of 20 mm length and 20 mm width where four rounded corners thereof are formed with a curvature radius of 1.5 mm. - As shown in
FIG. 2 , thestiffener 31 has a plurality of (in the first embodiment, four)structural pieces 36 separated byslits 39. Theslits 39 extend from an innercircumferential surface 37 to an outercircumferential surface 38 of thestiffener 31 so that thestiffener 31 is completely divided into the separatestructural pieces 36. The formation of suchnon-linear slits 39 makes it possible to, when there occurs a thermal stress on thestiffener 31 due to a difference in thermal expansion coefficient between thestiffener 31 and thewiring board 40 during manufacturing of the wiring board assembly 11 (semiconductor package 10), relieve the thermal stress on thestiffener 31 and prevent warpage or bending of thewiring board 40 effectively and assuredly. - In the first embodiment, the
slits 39 are preferably formed into a non-linear shape and, more specifically, a crank shape with four right-angle bends (as viewed from the top) as shown inFIG. 2 . Thestructural pieces 36 of thestiffener 31 are of the same L-like shape and same size, each of which has a recessed portion at one end thereof and a protruding portion on the other end, and are arranged symmetrically with respect to the center of thewiring board assembly 11 with the protruding portion of one of thestructural pieces 36 engaged in the recessed portion of the other adjacent one of thestructural pieces 36. In this structure, thestructural pieces 36 of thestiffener 31 partly overlap each other in the plane direction of thestiffener 31 even if displaced in position to relieve the thermal stress as shown inFIG. 14 . Thewiring board 40 can be thus protected from warpage or bending assuredly by the overlap of thestructural pieces 36 of thestiffener 31. Further, the formation of thestructural pieces 36 in the same shape and size allows cost reduction as compared to the formation of thestructural pieces 36 in different shapes. The symmetric arrangement of thestructural pieces 36 also allows more effective and assured prevention of warpage or bending of thewiring board 40. - The
structural pieces 36 of thestiffener 31 are preferably formed of a material having higher rigidity than the resin material of thewiring board 40. The use of such a high rigidity material makes it possible to, even when thestiffener 31 is made relatively small in thickness, provide sufficiently high rigidity to thewiring board 40 for high resistance to external stress so that thewiring board assembly 11 can combine a small thickness with high rigidity. Preferred examples of the material of thestiffener 31 are: metal materials such as iron, gold, silver, copper, copper alloy, iron-nickel alloy, silicon and gallium arsenide; ceramic materials such as low-temperature firing material e.g. alumina, glass ceramics or crystallized glass), aluminium nitride, silicon carbide and silicon nitride; and resin materials such as epoxy resin, polybutene resin, polyamide resin, polybutylene terephthalate resin, polyphenylene sulfide resin, polyimide resin, bismaleimide triazine resin, polycarbonate resin, polyphenylene ether resin and acrylonitrile butadiene styrene copolymer (ABS resin). A composite of a resin material and an inorganic material (e.g. a composite material in which a metal plate or ceramic plate is attached to a resin substrate) can also be suitably used as the material of thestiffener 31. In the first embodiment, the stiffener 31 (the structural pieces 36) is formed of copper and made larger in thickness than thewiring board 40 so that thecoreless wiring board 40 can be reinforced properly by thestiffener 31. Further, thestiffener 31 has a thermal expansion coefficient of about 17 ppm/° C., which is lower than the thermal expansion coefficient (about 30 ppm/° C.) of the resin insulation layers 43 to 46 of thewiring board 40, in the first embodiment. - The
stiffener 31 has ajoint surface 32 held in surface contact with and joined to a circumferential area (around the chip mounting area 23) of thetop surface 41 of thewiring board 40 and anon-joint surface 33 located opposite from thejoint surface 32. There is no particular limit on the technique of fixing thestiffener 31 to thewiring board 40. Thestiffener 31 can be fixed by any known technique to thewiring board 40 depending on the material and shape of thestiffener 31. In the first embodiment, thejoint surface 32 of thestiffener 31 is fixed by an adhesive 30 to the circumferential area of thetop surface 41 of thewiring board 40. As the adhesive 30, there can be used any appropriate one such as an acrylic adhesive, an epoxy adhesive, a cyanoacrylate adhesive or a rubber adhesive. The use of the adhesive 30 allows easy and assured fixing of thestiffener 31 to thewiring board 40. - The
wiring board assembly 11 can be manufactured by the following procedure, including a wiring board production step, a solder bump forming step, a stiffener production step, a fixing step and a chip mounting step. - First, the
wiring board 40 is produced in the wiring board production step. - As shown in
FIG. 3 , abase material 69 is formed by preparing a support substrate 70 (e.g. glass/epoxy substrate) of sufficient strength and applying a resin insulation base film (e.g. epoxy resin film) to form a resin insulationbase coat layer 71 on thesupport substrate 70. A laminatedmetal sheet material 72 is then placed on thebase coat layer 71 of thebase material 69 as shown inFIG. 4 . Herein, the laminatedmetal sheet material 72 has two copper foil sheets detachably laminated together by metal plating (e.g. chromium plating). Upon placement of the laminatedmetal sheet material 72 on thebase coat layer 71 of thebase material 69, thebase material 69 and the laminatedmetal sheet material 72 develops such adhesion that the laminatedmetal sheet material 72 would not become separated from thebase coat layer 71 of thebase material 69 in the subsequent production process. As shown inFIG. 5 , an insulatingresin sheet material 75 is placed to cover the laminatedmetal sheet material 72 and cured by heat pressing in a vacuum with a vacuum heat press machine to thereby form theresin insulation layer 46. The thus-formedresin insulation layer 46 has a center portion held in contact with the laminatedmetal sheet material 72 and a circumferential portion held in contact with thebase coat layer 71 so as to seal the laminatedmetal sheet material 72. As shown inFIG. 6 , the via holes 56 are formed by laser processing (drilling) theresin insulation layer 46 and subjected to desmearing to remove smears from the via holes 56. As shown inFIG. 7 , the viaconductors 57 are formed in the via holes 56 by a known circuit formation process such as electroless copper plating or electrolytic copper plating. Further, theconduction layer 51 is etched to define a wiring pattern on theresin insulation layer 46 by a known patterning process such as semi-additive process. The resin insulation layers 43 to 45 and the other conduction layers 51 are successively formed in the same manner as above, thereby yielding a laminate 80 in which the resin insulation layers 43 to 46 and the conduction layers 51 are alternately laminated together on thebase material 69 via the laminatedmetal sheet material 72 as shown inFIG. 8 . Aportion 81 of the laminate 80 located on the laminatedmetal sheet material 72 is to be used as thewiring board 40 and is thus occasionally referred to as a “wiring board portion”. - The
wiring board portion 81 is cut from the laminate 80 with a dicing machine. At this time, the laminate 80 and the base material 60 (support substrate 70 and base coat layer 71) are cut simultaneously along the border between thewiring board portion 81 and itscircumferential portion 82 so that the outer edge of the laminatedmetal sheet material 72 becomes exposed. Namely, the contact between theresin insulation layer 46 and thebase coat layer 71 is lost upon removal of thecircumferential portion 82 from the laminate 80. Thewiring board portion 81 is thus bonded to thebase material 69 only via themetal sheet material 72. - As shown in
FIG. 9 , thecopper foil sheets wiring board portion 81 from thebase material 69. Thecopper foil sheet 73 on the bottom side of thewiring board portion 81 is subjected to patterning by etching, thereby forming theterminal pads 52 on the outermostresin insulation layer 46 as shown inFIG. 10 . With this, thewiring board 40 is provided. - Subsequently, the solder bumps 54 are formed on the
terminal pads 52 on the outermostresin insulation layer 46 of thewiring board 40 as shown inFIG. 11 by mounting solder balls on theterminal pads 52 with a solder ball mounting machine and reflowing the solder balls with heating at a given temperature. The solder bumps 55 are also formed on theBGA pads 53 on the outermostresin insulation layer 43 of thewiring board 40 in the same manner as above. - On the other hand, the
structural pieces 36 of thestiffener 31 are produced by cutting a plate material (e.g. copper plate) with any known cutting machine in the stiffener production step. - After that, the
stiffener 31 is fixed to thetop surface 41 of thewiring board 40 in the fixing step. As shown inFIG. 12 , the adhesive 30 is first applied to thejoint surface 32 of each of thestructural pieces 36 of thestiffener 31. Then, thestructural pieces 36 of thestiffener 31 are placed on thetop surface 41 of thewiring board 40 to bring thejoint surface 32 of each of thestructural pieces 36 of thestiffener 31 into contact with thetop surface 41 of thewiring board 40 and to engage the protruding portion of one of thestructural pieces 36 in the recessed portion of the other adjacent one of thestructural pieces 36. The adhesive 30 is cured with heating at e.g. about 150° C. Upon cooling the adhesive 30 to room temperature after the curing, thestructural pieces 36 of thestiffener 31 are fixed by the adhesive 30 to thetop surface 41 of thewiring board 40. - Alternatively, it is conceivable to produce the frame-shaped
stiffener 31 in one piece, fixed thestiffener 31 to thewiring board 40, and then, divide thestiffener 31 by theslits 39 into the separatestructural pieces 36. In this case, thestiffener 31 may be produced in one piece, with some parts of theslits 39 cut in thestiffener 31, and divided into theseparate pieces 36 by cutting the remaining parts of theslits 39 in thestiffener 31 after fixing thestiffener 31 to thewiring board 40. - The
chip 21 is finally mounted on thechip mounting area 23 of thewiring board 40 in the chip mounting step. Thecontact terminals 22 of thechip 21 are aligned with the solder bumps 54 of thewiring board 40 and joined to the solder bumps 54 of thewiring board 40 by reflowing the solder bumps 54 with heating. - It is accordingly possible for the
wiring board assembly 11 to relieve the thermal stress on thestiffener 31 by theslits 39 and prevent warpage or bending of thewiring board 40 assuredly so that thechip 21 can be mounted on thewiring board 40 properly for improved yield rate and reliability of thesemiconductor package 10. - A
semiconductor package 10A according to the second embodiment of the present invention includes awiring board 40A, achip 21 mounted on thewiring board 40A and astiffener 31A fixed as a reinforcing member to thewiring board 40A as shown inFIGS. 15 and 16 . The assembly of thewiring board 40A and thestiffener 31A and, occasionally, thechip 21 is referred to as awiring board assembly 11A. Thewiring board assembly 11A of the second embodiment is structurally similar to thewiring board assembly 11 of the first embodiment, except that: thestiffener 31A has fourstructural pieces 36A separated bylinear slits 39A; and thewiring board 40 has a plurality of plain conduction layers 51A each arranged between adjacent ones of the resin insulation layers 43 to 46 at positions corresponding to each of theslits 39A. - As shown in
FIG. 15 , theslits 39A are formed in the centers of the four sides of therectangular stiffener 31A so as to extend linearly from the innercircumferential surface 37 to the outercircumferential surface 38 of thestiffener 31A in directions perpendicular to the sides of thestiffener 31A, respectively, so that thestructural pieces 36A of thestiffener 31 has the same L shape and size. Even in the case where theslits 39A are linear in shape as in the second embodiment, it is possible to relieve a thermal stress applied to thestiffener 31A due to a difference in thermal expansion coefficient between thestiffener 31A and thewiring board 40A and to prevent warpage or bending of thewiring board 40A so that thechip 21 can be mounted on thewiring board 40A properly for improved yield rate and reliability of thesemiconductor package 10A. - Further, each of the
slits 39A is made smaller in width at thejoint surface 32 than at thenon-joint surface 33 of thestiffener 31A as shown inFIG. 16 . In the second embodiment, the width of theslits 39A gradually decreases from thenon-joint surface 33 to thejoint surface 32 of thestiffener 31A so that theslits 39A are substantially V-shaped in cross section. It is possible to secure a wider area of thejoint surface 32 of thestiffener 31A and fix thestiffener 31A to thewiring board 40A assuredly by decreasing the width of theslits 39A at thejoint surface 32. - It is herein assumed that the portions of the
wiring board 40A corresponding to theslits 39 of thestiffener 31 are lower in rigidity and strength and are thus susceptible to warpage or bending. - As one technique to reinforce and add rigidity and strength to these slit-corresponding portions of the
wiring board 40A, the plain conduction layers 51A are arranged between the resin insulation layers 43 to 46 so as to correspond in position to each of theslits 39A. The plain conduction layers 51A are dummy conductors that do not have no connections to the viaconductors 57 and thus do not perform an electrical function, but perform the function to reinforce the slit-corresponding portions of thewiring board 40A. It is thus possible to provide thewiring board assembly 11A with sufficient rigidity and strength so that thechip mounting area 23 of thewiring board 40A can secure flatness to mount thereon thechip 21. - The shape and number of the
structural pieces slits stiffener - A
stiffener 31B for a wiring board according to the third embodiment of the present invention (as a modification of the first embodiment) has fourstructural pieces 36B separated bynon-linear slits 39B as shown inFIG. 17 . In the third embodiment, theslits 39B are formed into a crank shape as viewed from the side in contrast to the first embodiment in which theslits 39 are a crank shape as viewed from the top. - A
stiffener 31C for a wiring board according to the fourth embodiment of the present embodiment (as one modification of the second embodiment) has fourstructural pieces 36C separated bylinear slits 39C as shown inFIG. 18 . Astiffener 31D for a wiring board according to the fifth embodiment of the present embodiment (as another modification of the second embodiment) has fourstructural pieces 36D separated bylinear slits 39D as shown inFIG. 19 . In the fourth and fifth embodiment, theslits stiffener slits 39A are perpendicular to the respective sides of the stiffer 21A. - A
stiffener 31E for a wiring board according to the seventh embodiment of the present invention has fourstructural pieces 36E separated bylinear slits 39E as shown inFIG. 20 . In the seventh embodiment, theslits 39 are formed in respective corner portions of therectangular stiffener 31E so that thestructural pieces 36E of thestiffener 31E have a trapezoidal shape as viewed from the top in contrast to the first to sixth embodiments in which theslits rectangular stiffener - There is also provided a
stiffener 31F for a wiring board as shown inFIG. 21 according to the seventh embodiment of the present invention. In the seventh embodiment, thestiffener 31F has twostructural pieces 31F of e.g. L-shape in contrast to the first to sixth embodiments in which thestiffener structural pieces - There is further provided a
stiffener 31G for a wiring board as shown inFIG. 22 according to the eighth embodiment of the present invention. In the eighth embodiment, thestiffener 31G has structural pieces 36G1 and 36G2 of different shapes (the same width but different lengths) in contrast to the first to seventh embodiments in which thestructural pieces stiffener - Any of the
stiffeners 31B to 31G can suitably be used in place of thestiffener - As shown in
FIGS. 23 and 24 , asemiconductor package 10H according to the ninth embodiment of the present invention includes awiring board 40H, achip 21 mounted on thewiring board 40H and astiffener 31H fixed as a reinforcing member to thewiring board 40H. The assembly of thewiring board 40H and thestiffener 31H and, occasionally, thechip 21 is referred to as awiring board assembly 11H. The ninth embodiment is structurally similar to the above embodiments, except that thestiffener 31H hasstructural pieces 36H separated byslits 39H and bonded together by a resin material R1; and the clearance between thechip 21 and thetop surface 41 of thewiring board 40H is filled with anunderfill material 25. It is herein noted that thewiring board 40H is not necessarily a coreless wiring board in the ninth embodiment. - The
slits 39H does not necessarily but preferably extend from the innercircumferential surface 37 to the outercircumferential surface 38 of thestiffener 31H so that thestiffener 31H is completely divided by theslits 39H into the separatestructural pieces 36H. More specifically, theslits 39 extend linearly in a radial manner so as to be inclined with respect to and diagonally intersect the respective sides of thestiffener 31H in the ninth embodiment. Thestructural pieces 36H of thestiffener 31H are the same in shape and size. It is possible, by the formation ofsuch slits 39H, to efficiently relieve a thermal stress applied to thestiffener 31H due to a difference in thermal expansion coefficient between thestiffener 31H and thewiring board 40 and to prevent warpage or bending of thewiring board 40H assuredly so that thechip 21 can be mounted on thewiring board 40H properly for improved yield rate and reliability of thesemiconductor package 10H. - As mentioned above, it is assumed that the portions of the
wiring board 40H corresponding to theslits 39H of thestiffener 31H are lower in rigidity and strength and are thus susceptible to warpage or bending. Thechip mounting area 23 of thewiring board 40H may thus fail to secure sufficient flatness to mount thereon thechip 21. This is more pronounced when thewiring board 40H is a coreless wiring board. - As another technique to add rigidity and strength to these slit-corresponding portions of the
wiring board 40H, the resin material R1 is filled in theslits 39H so that thestructural pieces 36H of thestiffener 31H are bonded together by the resin material R1. It is thus possible to reinforce the slit-corresponding portions of thewiring board 40H and secure sufficient flatness in thechip mounting area 23 of thewiring board 40H. - The resin material R1 is not particularly restricted. Any known resin can be used as the resin material R1. In the ninth embodiment, the resin material R1 is a dedicated epoxy resin having a thermal expansion coefficient of about 40 ppm/° C., which is higher than the thermal expansion coefficient (about 30 ppm/° C.) of the resin of the resin insulation layers 43 to 46 of the
wiring board 40H. Although the thermal expansion coefficient of thestructural pieces 36H of thestiffener 31H, the thermal expansion coefficient of thewiring board 40H and the thermal expansion coefficient of the resin material R1 are not particularly limited and can be set as appropriate, it is preferable to satisfy such a relationship that: the thermal expansion coefficient of thestructural pieces 36H of thestiffener 31H is lower than that of thewiring board 40H; and the thermal expansion coefficient of the resin material R1 is higher than that of thewiring board 40H. It is possible to relieve the thermal stress on thestiffener 31H efficiently upon satisfaction of the above thermal expansion coefficient relationship. - Alternatively, the resin material R1 can be the same resin as that used in the resin insulation layers 43 to 46. When the resin material R1 is the same as the material of the resin insulation layers 43 to 46, it is possible to secure compatibility of the resin material R1 with the resin insulation layers 43 to 46 and attain good adhesion between the
stiffener 31H and thewiring board 40H. As there is no need to prepare the dedicated resin material to fill theslits 39H, it is easily possible to avoid complication of the manufacturing process and increase of the manufacturing cost of thewiring board assembly 11H. - The
wiring board assembly 11H can be manufactured by the following procedure in the ninth embodiment. The wiring board production step and the solder bump forming step of the ninth embodiment are the same as those of the first embodiment. - In the stiffener production step, the
structural pieces 36 of thestiffener 31 are cut from a plate material (e.g. copper plate) with any known cutting machine and arranged in a two dimension by e.g. using a positioning mold in such a manner as to form theslits 39 of the same width between thestructural pieces 36. The resin material R1 is prepared in uncured form and filled in theslits 39. At this time, each of theslits 39 can be fully filled with the resin material R1 (i.e. the resin material R1 can be filled to the full depth of the slits 39) or can be partially filled with the resin material R1. The resin material R1 is then cured by heat or ultraviolet radiation. As a result, thestructural pieces 36 are bonded together by the resin material R1 and integrally assembled into thestiffener 31H as shown inFIG. 25 . - The
stiffener 31H is fixed to thetop surface 41 of thewiring board 40H in the fixing step. As shown inFIG. 25 , the adhesive 30 is first applied to thejoint surface 32 of thestiffener 31H. Thestiffener 31H is then placed on thetop surface 41 of thewiring board 40H to bring thejoint surface 32 of thestiffener 31H into contact with thetop surface 41 of thewiring board 40H as shown inFIG. 26 . In this state, the adhesive 30 is cured with heating at e.g. about 150° C. Upon cooling the adhesive 30 to room temperature after the curing, thestiffener 31H is fixed by the adhesive 30 to thetop surface 41 of thewiring board 40H. - After that, the
chip 21 is mounted on thechip mounting area 23 of thewiring board 40H in the chip mounting step. The clearance between thechip 21 and thetop surface 41 of thewiring board 40H is sealed by theunderfill material 25. - In this way, the
structural pieces 36H of thestiffener 31 are bonded together and physically integrated into one by filling the resin material R1 in theslits 39 before fixing thestiffener 31H to thewiring board 40H. It is thus possible to maintain the relative positions of thestructural pieces 36H so that thestiffener 31H can be fixed to thewiring board 40H without misalignment of thestructural pieces 36. This allows easy and assured manufacturing of thewiring board assembly 11H. - It is alternatively conceivable to fix the
structural pieces 36H of thestiffener 31H to thetop surface 41 of thewiring board 40H without the resin material R1 being filled in theslits 39H. In this case, the adhesive 30 is first applied to thejoint surface 32 of each of thestructural pieces 36H of thestiffener 31H as shown inFIG. 27 . Thestructural pieces 36H of thestiffener 31H are then placed on thetop surface 41 of thewiring board 40H to bring thejoint surface 32 of each of thestructural pieces 36H into contact with thetop surface 41 of thewiring board 40H as shown inFIG. 28 . The adhesive 30 is cured with heating at e.g. about 150° C. and cooled to room temperature after the curing. With this, thestructural pieces 36 of thestiffener 31 are fixed by the adhesive 30 to thetop surface 41 of thewiring board 40H. After that, the resin material R1 in uncured form is filled in theslits 39H and cured by heat or ultraviolet radiation so that thestructural pieces 36H are bonded together by the resin material R1 and integrally assembled into thestiffener 31H as shown inFIG. 29 . It is possible to manufacture thewiring board assembly 11H relatively easily and assuredly even by fixing thestructural pieces 36H of thestiffener 31H to thewiring board 40H before filling the resin material R1 in theslits 39H. - A
semiconductor package 10I according to the tenth embodiment of the present invention includes a wiring board 40I, achip 21 mounted on the wiring board 40I and astiffener 31 fixed as a reinforcing member to the wiring board 40I as shown inFIGS. 30 and 31 . The assembly of the wiring board 40I and thestiffener 31 and, occasionally, thechip 21 is referred to as awiring board assembly 11I. Thestiffener 31I has a plurality of structural pieces 36I separated by slits 39I and bonded together by filling a resin material R1 in the slits 39I. The tenth embodiment is structurally similar to the ninth embodiment, except for the resin material R1 of thestiffener 31I. - In the tenth embodiment, the
underfill material 25 is used not only to seal the clearance between thechip 21 and thetop surface 41 of the wiring board 40I but also used as the resin material R1 to fill in the slits 39I and bond the structural pieces 36I of thestiffener 31I together. By forming the slits 39I in thestiffener 31I and filling the resin material R1 in the slits 39I, it is possible to relieve a thermal stress applied to thestiffener 31I due to a difference in thermal expansion coefficient between thestiffener 31I and the wiring board 40I, while providing sufficient rigidity to the wiring board 40I, and thereby possible to prevent warpage or bending of the wiring board 40I assuredly so that thechip 21 can be mounted on the wiring board 40I properly for improved yield rate and reliability of thesemiconductor package 10I. It is further possible to secure compatibility of the resin material R1 with theunderfill material 25 and attain good adhesion between thestiffener 31I and the wiring board 40I by using the same material as the resin material R1 and theunderfill material 25. As there is no need to prepare the dedicated resin material to fill the slits 39I, it is easily possible to avoid complication of the manufacturing process and increase of the manufacturing cost of thewiring board assembly 11I. - The
semiconductor package 10I is completed as follows in the tenth embodiment. The wiring board production step and the solder bump forming step are the same as above. The structural pieces 36I of thestiffener 31I are cut from a plate material and bonded by the adhesive 30 to thetop surface 41 of the wiring board 40I without the resin material R1 (underfill material 25) being filled in the slits 39I between the structural pieces 36I. After thechip 21 is mounted on thechip mounting area 23 of the wiring board 40I, theunderfill material 25 is simultaneously filled in the clearance between thechip 21 and thetop surface 41 of the wiring board 40I and in the slits 39I between the structural pieces 36I of thestiffener 31I. It is possible to manufacture thesemiconductor package 10I relatively easily and assuredly by such a procedure. - A
semiconductor package 10J according to the eleventh embodiment of the present invention includes awiring board 40J, achip 21 mounted on thewiring board 40J and astiffener 31J fixed as a reinforcing member to thewing board 40J as shown inFIGS. 32 and 33 . The assembly of thewiring board 40J and thestiffener 31J and, occasionally, thechip 21 is referred to as awiring board assembly 11J. Thestiffener 31J has a plurality ofstructural pieces 36J separated byslits 39J and bonded together by filling a resin material R1 in theslits 39J. The eleventh embodiment is structurally similar to the ninth and tenth embodiments, except for the resin material R1 of the stiffener 30J. - In the eleventh embodiment, the adhesive 30 is used not only to fix the
stiffener 31J to thetop surface 41 of thewiring board 40J but also used as the resin material R1 to fill in theslits 39J and bond thestructural pieces 36J of thestiffener 31J together. By forming theslits 39J in thestiffener 31J and filling the resin material R1 in theslits 39J, it is possible to relieve a thermal stress applied to thestiffener 31J due to a difference in thermal expansion coefficient between thestiffener 31J and thewiring board 40J, while providing sufficient rigidity to thewiring board 40J, and thereby possible to prevent warpage or bending of thewiring board 40J assuredly so that thechip 21 can be mounted on thewiring board 40J properly for improved yield rate and reliability of thesemiconductor package 10J. As there is no need to prepare the dedicated resin material R1 to fill theslits 39J, it is easily possible to avoid complication of the manufacturing process of thewiring board assembly 11J and increase of the manufacturing cost of thewiring board assembly 11J. - The
semiconductor package 10J is completed as follows in the tenth embodiment. The wiring board production step and the solder bump forming step are the same as above. Thestructural pieces 36J of thestiffener 31J are cut from a plate material. After the adhesive 30 is applied to thejoint surface 32 of each of thestructural pieces 36J of thestiffener 31J, thestructural pieces 36 of thestiffener 31J are placed on thetop surface 41 of thewiring board 40J. The resin material R1 (adhesive 30) is then filled in theslits 39J of thestiffener 31J. The adhesive 30 between thejoint surface 32 of thestiffener 31J and thetop surface 41 of thewiring board 40J is cured simultaneously with the resin material R1 (adhesive 30) in the slits of thestiffener 31J. Namely, the fixing step and the resin material filling step are completed simultaneously by using the same material as the resin material R1 and the adhesive 30. After thechip 21 is mounted on thechip mounting area 23 of thewiring board 40J, theunderfill material 25 is filled in the clearance between thechip 21 and thetop surface 41 of thewiring board 40J. It is possible to manufacture thesemiconductor package 10J relatively easily and assuredly by such a procedure. - The shape and number of the
structural pieces slits stiffener - According to the twelfth embodiment of the present invention, there is provided a
wiring board assembly 11K in which astiffener 31K has fourstructural pieces 36K separated by fourslits 39K and a resin material R1 filled in theslits 39K as shown inFIG. 34 . In the twelfth embodiment, theslits 39J are formed linearly in corner portions of thestiffener 31K. Thestructural pieces 36K of thestiffener 31K are thus formed into a trapezoidal shape as viewed from the top and bonded together by the resin material R1. - According to the thirteenth embodiment of the present invention, there is provided a
wiring board assembly 11L in which astiffener 31L has fourstructural pieces 36L separated by fourslits 39L and a resin material R1 filled in theslits 39L as shown inFIG. 35 . In the thirteenth embodiment, theslits 39L are formed linearly in the centers of the four sides of therectangular stiffener 31L so as to extend perpendicular to the sides of thestiffener 31L, respectively. Thestructural pieces 36L of thestiffener 31L have the same L shape and size and are bonded by the resin material R1. - According to the fourteenth embodiment of the present invention, there is a
wiring board assembly 11M in which astiffener 31M has fourstructural pieces 36M separated by fourslits 39M and a resin material R1 filled in theslits 39M as shown inFIG. 36 . In the fourteenth embodiment, theslits 39M are formed into a non-linear shape (more specifically, crank shape) as viewed from the top and bonded together by the resin material R1. The formation of suchnon-linear slits 39M allows thestructural pieces 36M, even if displaced in position to relieve the thermal stress, to partly overlap each other in the plane direction of thestiffener 31M. The wiring board can be thus protected from warpage or bending assuredly by the overlap of thestructural pieces 36M. - According to the fifteenth embodiment of the present invention, there is provided a
wiring board assembly 11N in which astiffener 31N has twostructural pieces 36N separated byslits 36 and a resin material R1 filled in theslits 36N as shown inFIG. 37 . In the fifteenth embodiment, thestructural pieces 36N of thestiffener 31N have the same L shape and size. There can alternatively be provided a stiffener with three, five or more structural pieces. - According to the sixteenth embodiment of the present invention, there is further provided a wiring board assembly 11O with a wiring board 40O and a stiffener 31O as shown in
FIG. 38 . The stiffener 31O has a plurality of structural pieces 36O separated by slits 39O and a resin material R1 filled in the slits 39O. In the sixteenth embodiment, each of the slits 39O is made smaller in width at thejoint surface 32 than at thenon-joint surface 33 of the stiffener 31O as in the case of the second embodiment. More specifically, the width of the slits 39O gradually decreases from thenon-joint surface 33 to thejoint surface 32 of the stiffener 31O so that the slits 39O are substantially V-shaped in cross section. It is possible to secure a wider area of thejoint surface 32 of the stiffener 31O and fix the stiffener 31O to the wiring board 40O assuredly by decreasing the width of the slits 39O at thejoint surface 32. It is also possible to secure wider openings of the slits 39O and fill the resin material R1 easily from such wide slit openings by increasing the width of the slits 39O at thenon-joint surface 33. Further, the wiring board 40O includes plain conduction layers 51A each arranged between adjacent ones of the resin insulation layers 43 to 46 at positions corresponding to each of the slits 39O in the sixteenth embodiment as in the case of the second embodiment. The plain conduction layers 51A are dummy conductors that do not have no connections to the viaconductors 57 and thus do not perform an electrical function, but perform the function to reinforce the portions of the wiring board 40O corresponding to the slits 39O of the stiffener 31O. It is thus possible to provide the wiring board assembly 11O with sufficient rigidity and strength so that thechip mounting area 23 of the wiring board 40O can secure flatness to mount thereon thechip 21. - The entire contents of Japanese Patent Application No. 2009-033314 (filed on Feb. 16, 2009) and No. 2009-133548 (filed on Jun. 2, 2009) are herein incorporated by reference.
- Although the present invention has been described with reference to the above-specific embodiments of the invention, the invention is not limited to these exemplary embodiments. Various modification and variation of the embodiments described above will occur to those skilled in the art in light of the above teachings.
- For example, the
slits joint surface 32 than at thenon-joint surface 33 of thestiffener - The
plain conductors 51A can also be provided in thewiring board - The resin material R1 can be either any dedicated resin material, the same resin material as that of the resin insulation layers 43 to 46, the
underfill material 25, or the adhesive 30 in the twelfth to sixteenth embodiments. - Moreover, there can be provided according to another aspect of the present invention a wiring board assembly comprising: a rectangular plate-shaped wiring board having a plurality of resin insulation layers and conduction layers alternately laminated together to define opposite first and second surfaces and a plurality of connection terminals arranged on the first main surface for surface contact with terminals of a chip; and a rectangular frame-shaped reinforcing member fixed to the first main surface of the wiring board with the connection terminals exposed through an opening of the reinforcing member, the reinforcing member having a plurality of structural pieces separated by the slits and a resin material filled in the slits to bond the structural pieces together, wherein the structural pieces of the reinforcing member have a lower thermal expansion coefficient than that of the wiring board; and wherein the resin material of the reinforcing material has a higher thermal expansion coefficient than that of the wiring board.
- The scope of the invention is defined with reference to the following claims.
Claims (19)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009-033314 | 2009-02-16 | ||
JP2009033314A JP5289996B2 (en) | 2009-02-16 | 2009-02-16 | Reinforced wiring board |
JP2009-133548 | 2009-06-02 | ||
JP2009133548A JP5129783B2 (en) | 2009-06-02 | 2009-06-02 | Wiring board with reinforcing material and method for manufacturing the same |
Publications (2)
Publication Number | Publication Date |
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US20100208442A1 true US20100208442A1 (en) | 2010-08-19 |
US8362364B2 US8362364B2 (en) | 2013-01-29 |
Family
ID=42559738
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US12/705,776 Expired - Fee Related US8362364B2 (en) | 2009-02-16 | 2010-02-15 | Wiring board assembly and manufacturing method thereof |
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US (1) | US8362364B2 (en) |
JP (1) | JP5289996B2 (en) |
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US8362364B2 (en) | 2013-01-29 |
JP5289996B2 (en) | 2013-09-11 |
JP2010192546A (en) | 2010-09-02 |
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