US20100183896A1 - Tin-silver bonding and method thereof - Google Patents

Tin-silver bonding and method thereof Download PDF

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US20100183896A1
US20100183896A1 US12/430,429 US43042909A US2010183896A1 US 20100183896 A1 US20100183896 A1 US 20100183896A1 US 43042909 A US43042909 A US 43042909A US 2010183896 A1 US2010183896 A1 US 2010183896A1
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bonding
bonding layer
wafer
layer
tin
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Cheng-Yi Liu
Ming-Chung Kuo
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National Central University
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National Central University
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/24Preliminary treatment
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00Articles made by soldering, welding or cutting
    • B23K2101/36Electric or electronic devices
    • B23K2101/40Semiconductor devices
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/12All metal or with adjacent metals
    • Y10T428/12493Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12708Sn-base component
    • Y10T428/12715Next to Group IB metal-base component

Definitions

  • the present invention relates to a bonding structure and a method thereof, especially to a Sn—Ag bonding and a method thereof.
  • heteroepitaxial technique In early days, various materials are integrated by heteroepitaxial technique or ion implant technique used in manufacturing processes of integrated circuit (IC).
  • the biggest problem encountered by heteroepitaxial technique is lattice match. Once the requirement of lattice match is not satisfied, the high quality epitaxial film can't be obtained and functions of the components are further affected.
  • the thickness of the epitaxial film produced by heteroepitaxial technique is no more than 10 ⁇ m. Such way is neither efficient nor cost-effective.
  • the technique is wafer bonding technique that allows the integration of materials with lattice mismatch by means of wafer bonding and removal processes.
  • the main purpose of wafer bonding is in building composite materials by bonding different materials and the composite materials with various properties are applied to different fields broadly.
  • the most common way is direct wafer bonding and adhesive wafer bonding.
  • the direct wafer bonding is a method to join two same or dissimilar materials together while the adhesive wafer bonding is a bonding approach having an intermediate layer for bonding between two wafers.
  • Direct Wafer Bonding has been widely developed and has become very attractive for a lot of applications. It is also called Van der Waals bonding. Chemical bonds (electric dipole) are formed between two mirror wafers or epitaxial layers with very flat surfaces by chemical solutions. The wafers are initially quick bonded via weak Van der Waals bonding force. Then wafer pairs are applied with pressure and are heated. The wafer cleaning, the pressure applied, the heated temperature and time, and other parameters are determined according to the bonding material. Before heating, the direct bonding relies on weak Van der Waals force. The bonding energy obtained after heat processing is from diffusion of atoms at the interface.
  • the adhesive wafer bonding includes an intermediate bonding medium such as metal, wax, epoxy, and SOG (spin-on-glass).
  • an intermediate bonding medium such as metal, wax, epoxy, and SOG (spin-on-glass).
  • wafer bonding technique is broadly applied to photoelectric/electronic industries such as the improvement of performance of photoelectric components, manufacturing and applications of SOI (Silicon-on-insulator) chips, manufacturing and integrations of Si Discrete Power Devices as well as MEMS (Micro Electro Mechanical Systems) devices, and Optoelectronic Integrated Circuits (OEIC) manufactured by integration of photoelectric components and Ultra-Large Scale Integration (ULSI) chips.
  • SOI Silicon-on-insulator
  • MEMS Micro Electro Mechanical Systems
  • OEIC Optoelectronic Integrated Circuits
  • ULSI Ultra-Large Scale Integration
  • the high brightness white light LED has become main point of development in solid state lighting in developed countries. It is estimated the light efficiency of high brightness white light LED will achieve 200 lm/W within 15 years so that it will replace all lighting devices in our daily lives at that time. Thus the electricity consumed by lighting equipments is reduced 50% and the overall electricity is saved up to 10%. Moreover, about two hundred million tons of carbon dioxide emitted is reduced. Thus not only energy is saved but also environmental protection is achieved.
  • GaN based LED dramatically increases possibility of mass production of white light LED and plays a key role on that.
  • sapphire has played an important role in the improvement of internal quantum efficiency of GaN LED along with fast development of epitaxial technique and it also has great effect on the external quantum efficiency.
  • packaging In order to make a breakthrough, begin with packaging.
  • the wafer bonding technique can be used.
  • the GaN LED is bonded with substrates having better thermal conductivity by metal bonding.
  • the common bonding structure includes Au—Si bonding, Au—Sn bonding and Au—Ag bonding.
  • the bonding temperature of the Au—Si bonding as well as the Au—Sn bonding is 363 and 282 degrees respectively while bonding temperature of the Au—Ag bonding is low temperature—150 degrees.
  • the present invention provides a Sn—Ag bonding bonded at low temperature and a method thereof that further improves component performance as compared with Au—Ag bonding.
  • a Sn—Ag bonding of the present invention consists of a first wafer, a first bonding layer, a second bonding layer, and a second wafer.
  • the first bonding layer is disposed on the first wafer and material of the first bonding layer is tin or tin alloy.
  • the second bonding layer is arranged on the second wafer and material of the second bonding layer is silver or silver alloy.
  • a Sn—Ag bonding method of the present invention includes a plurality of steps.
  • a first wafer and a second wafer are provided.
  • a first bonding layer is formed on the first wafer by evaporation and the first bonding layer is made of tin or tin alloy.
  • the first bonding layer on the first wafer is attached with the second bonding layer on the second wafer and send them into a vacuum furnace. At last, the vacuum furnace is heated up to a certain temperature so that bonding occurs between the first bonding layer and the second bonding layer.
  • FIG. 1 is a schematic drawing showing structure of an embodiment according to the present invention
  • FIG. 2 is a flow chart of an embodiment according to the present invention.
  • FIG. 3 is a flow chart of another embodiment according to the present invention.
  • FIG. 4 is a schematic drawing showing structure of another embodiment according to the present invention.
  • FIG. 5 is a schematic drawing showing structure of a further embodiment according to the present invention.
  • FIG. 6 is a flow chart of a further embodiment according to the present invention.
  • FIG. 7 is an electron microscopic image of an embodiment according to the present invention.
  • FIG. 8 is a Raman spectra of an embodiment according to the present invention.
  • FIG. 9 shows released stress of an embodiment according to the present invention.
  • an embodiment of the present invention shows a Sn—Ag bonding structure.
  • the Sn—Ag bonding 1 includes a first wafer 10 , a first bonding layer 12 , a second bonding layer 14 and a second wafer 16 .
  • the first bonding layer 12 is disposed on the first wafer 10 and the first bonding layer 12 is made of tin or tin alloy.
  • the second bonding layer 14 is arranged on the second wafer 16 and the second bonding layer 14 is made of silver or silver alloy.
  • the above first wafer 10 as well as the second wafer 16 is made of compounds, semiconductor or metal.
  • a Sn—Ag bonding method of the present invention is a method to form a Sn—Ag bonding.
  • step S 10 a first wafer 10 and a second wafer 16 .
  • step S 12 a first bonding layer 12 is formed on the first wafer 10 by evaporation.
  • step S 14 evaporate a second bonding layer 14 onto a second wafer 16 .
  • the evaporation of the first bonding layer 12 on the first wafer 10 as well as the evaporation of the second bonding layer 14 onto the second wafer 16 is accomplished in several ways. In this embodiment, it's by electron beam evaporation while some other ways of evaporation can also be used.
  • step S 16 After the first bonding layer 12 coated on the first wafer 10 and the second bonding layer 14 coated on the second wafer 16 , take the step S 16 . Clean the first bonding layer 12 coated on the first wafer 10 as well as the second bonding layer 14 coated on the second wafer 16 .
  • cleaning such as gas cleaning, cleaning by chemical solutions or high energy particles.
  • an ultrasonic cleaner is used to clean surfaces of the first bonding layer 12 and the second bonding layer 14 .
  • the cleaning process further includes the following steps:
  • step S 161 run the step S 161 first. Soak the first bonding layer 12 coated on the first wafer 10 and the second bonding layer 14 coated on the second wafer 16 into an ultrasonic cleaner (vibrator) filled with acetone solution.
  • the acetone solution removes contaminants from surfaces of the first bonding layer 12 as well as the second bonding layer 14 .
  • the contaminants are oxides, dust or other materials attached on surfaces of the e first bonding layer 12 as well as the second bonding layer 14 .
  • the step S 163 after the contaminants being cleaned by acetone solution, the first wafer 10 coated with the first bonding layer 12 and the second wafer 16 coated with the second bonding layer 14 are taken out of the acetone solution to be soaked into an ultrasonic cleaner having isopropyl alcohol solution.
  • the isopropyl alcohol solution dissolves residual acetone on surfaces of the first bonding layer 12 and the second bonding layer 14 .
  • step S 165 after removing residual acetone on surfaces of the first bonding layer 12 and the second bonding layer 14 , take the first bonding layer 12 coated on the first wafer 10 and the second bonding layer 14 coated on the second wafer 16 out of the isopropyl alcohol solution and soak them into an ultrasonic cleaner with deionized water.
  • the residual isopropyl alcohol solution on surfaces of the first bonding layer 12 and the second bonding layer 14 is dissolved in deionized water.
  • the cleaning of the surfaces of the first bonding layer 12 as well as the second bonding layer 14 is finished.
  • the first bonding layer 12 coated on the first wafer 10 and second bonding layer 14 on the second wafer 16 are attached to each other and sent into a vacuum furnace.
  • the vacuum furnace is heated between 100 degrees Celsius and 300 degrees Celsius so as to heat the first bonding layer 12 and the second bonding layer 14 to make them bond with each other.
  • the degree of vacuum in the vacuum furnace keeps between from 10 ⁇ 2 torr to 10 ⁇ 6 torr.
  • the bonding time of the first bonding layer 12 and the second bonding layer 14 ranges from 30 minutes to 4 hours.
  • hydrogen gas and nitrogen gas are further introduced while the ratio of hydrogen gas to nitrogen gas is 19:1.
  • the first bonding layer 12 is made of tin or tin alloy while the second bonding layer 14 is made of silver or silver alloy.
  • the interface layer 18 is formed by diffusion of material of the first bonding layer 12 toward material of the second bonding layer 14 .
  • the interface layer 18 is made of tin silver alloy.
  • a Sn—Ag bonding 1 consists of a first wafer 10 , a first barrier layer 11 , a first bonding layer 12 , a second bonding layer 14 , a second barrier layer 15 and a second wafer 16 .
  • the first barrier layer 11 as well as the second barrier layer 15 is respectively arranged on the first wafer 10 and the second wafer 16 while the first bonding layer 12 and the second bonding layer 14 are disposed on the first barrier layer 11 and the second barrier layer 15 respectively.
  • the material of the first bonding layer 12 is tin or tin alloy while the material of the second bonding layer 14 is silver or silver alloy.
  • the first barrier layer 11 is to prevent diffusion of the two layers—the first bonding layer 12 and the first wafer 10 .
  • the second barrier layer 15 is to prevent diffusion between the second bonding layer 14 and the second wafer 16 .
  • the material of the first barrier layer 11 as well as the second barrier layer 15 is selected from titanium (Ti)/nickel (Ni) or chromium (Cr)/platinum (Pt).
  • the material of the first wafer 10 as well as the second wafer 16 is compound, semiconductor or metal.
  • a Sn—Ag bonding method to form a Sn—Ag bonding of the present invention includes the following steps: firstly, run the step S 10 , provide a first wafer 10 and a second wafer 16 . Then take the step S 12 , evaporate a first barrier layer 11 onto a first wafer 10 . Refer to step S 13 , a first bonding layer 12 is formed on the first barrier layer 11 by evaporation. At the same time, take the step S 14 , evaporate a second barrier layer 15 onto the second wafer 16 . Next take the step S 15 , evaporate a second bonding layer 14 onto the second barrier layer 15 . In the steps S 12 , S 13 , S 14 and S 15 , the evaporation is accomplished in several ways. In this embodiment, it's by electron beam evaporation while some other ways of evaporation can also be used.
  • step S 16 clean surfaces of the first bonding layer 12 and the second bonding layer 14 .
  • cleaning such as gas cleaning, cleaning by chemical solutions or high energy particles, the same with the embodiment in FIG. 2 .
  • step S 18 After finishing cleaning surfaces of the first bonding layer 12 and the second bonding layer 14 , take the step S 18 . Attach the first bonding layer 12 with the second bonding layer 14 and then send them into a vacuum furnace. Refer to step S 19 , introduce hydrogen gas and nitrogen gas into the vacuum furnace and heat up to 100-300 degrees Celsius. The first bonding layer 12 and the second bonding layer 14 are heated so as to make bonding occur. The ratio of hydrogen gas to nitrogen gas is 19:1. And the bonding time of the first bonding layer 12 with the second bonding layer 14 ranges from 30 minutes to 4 hours.
  • the Sn—Ag bonding structure of the present invention mainly includes a first wafer 10 , a copper layer, a tin layer, a silver layer and a second wafer 16 .
  • the copper layer is coated on the first wafer.
  • the tin layer is deposit on the copper layer while the silver layer is coated on the second wafer.
  • the copper layer and the tin layer are equal to the first bonding layer 12 of the above embodiment.
  • the silver layer is equal to the second bonding layer 14 of the above embodiment. Bonding occurs between the tin layer and the silver layer so as to obtain Sn—Ag bonding structure.
  • the Sn—Ag bonding structure is generated after 30 minutes (bonding time). Now the Sn—Ag bonding structure is observed by the electron microscope and a cross sectional view of the Sn—Ag bonding structure is obtained. It is found that a first interface layer 18 a is generated between the tin layer and the silver layer and the first interface layer 18 a is Ag 3 Sn while a second interface layer 18 b is generated between the tin layer and the silver layer and the second interface layer 18 b is Cu 6 Sn 5 .
  • Raman spectra and stress released of an embodiment are revealed.
  • Raman shift of the Sn—Ag bonding structure in FIG. 6 is located on the left side of Raman shift of the Au—Ag bonding. This means the stress released by the Sn—Ag bonding is larger than that released by the Au—Ag bonding.
  • Both the value of Raman shift of the Sn—Ag bonding and the value of Raman shift of the Au—Ag bonding are placed into Kozawa's equation so as to get a value of stress released by the Sn—Ag bonding and a value of stress released by the Au—Ag bonding.

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  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)

Abstract

A Sn—Ag bonding and a method thereof are revealed. By means of a bonding layer formed by tin and silver between wafers, the stress released by diffusion and bonding between tin (Sn) and silver (Ag) is larger than the stress released by diffusion and bonding of conventional gold-silver bonding. Moreover, a Sn—Ag bonding method of the present invention forms Sn—Ag bonding at low temperature and releases more stress so as to reduce thermal stress generated during wafer bonding effectively. And after wafer bonding, the high temperature processes can be performed.

Description

    BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • The present invention relates to a bonding structure and a method thereof, especially to a Sn—Ag bonding and a method thereof.
  • 2. Description of Related Art
  • Along with fast development of technologies, there is a trend in electronic components to be more light, thin and compact. A conventional single material is unable to meet these requirements of component design. Generally, each material has it own properties such as mobility of electron/hole, light absorbance, reflection rate, heat Conductivity, electrical resistance, and mechanical properties etc. However, in practice, there is no single material with optimum effects on various physical properties. Thus in order to achieve best photoelectric/electronic effect of photoelectric/electronic components, the properties of different materials must be integrated.
  • In early days, various materials are integrated by heteroepitaxial technique or ion implant technique used in manufacturing processes of integrated circuit (IC). The biggest problem encountered by heteroepitaxial technique is lattice match. Once the requirement of lattice match is not satisfied, the high quality epitaxial film can't be obtained and functions of the components are further affected. Moreover, the thickness of the epitaxial film produced by heteroepitaxial technique is no more than 10 μm. Such way is neither efficient nor cost-effective.
  • Furthermore, once ion implant is used to integrate various materials, a transition layer with high defect density is formed and the functions of components are affected.
  • Recently, an area of research that integrates various materials has become mature. The technique is wafer bonding technique that allows the integration of materials with lattice mismatch by means of wafer bonding and removal processes. The main purpose of wafer bonding is in building composite materials by bonding different materials and the composite materials with various properties are applied to different fields broadly. There are different types of wafer bonding as listed below (1) direct wafer bonding (2) anodic wafer bonding (3) low temperature wafer bonding (4) intermediate layer wafer bonding (5) adhesive wafer bonding . . . etc. The most common way is direct wafer bonding and adhesive wafer bonding. The direct wafer bonding is a method to join two same or dissimilar materials together while the adhesive wafer bonding is a bonding approach having an intermediate layer for bonding between two wafers.
  • Direct Wafer Bonding has been widely developed and has become very attractive for a lot of applications. It is also called Van der Waals bonding. Chemical bonds (electric dipole) are formed between two mirror wafers or epitaxial layers with very flat surfaces by chemical solutions. The wafers are initially quick bonded via weak Van der Waals bonding force. Then wafer pairs are applied with pressure and are heated. The wafer cleaning, the pressure applied, the heated temperature and time, and other parameters are determined according to the bonding material. Before heating, the direct bonding relies on weak Van der Waals force. The bonding energy obtained after heat processing is from diffusion of atoms at the interface.
  • In addition, the adhesive wafer bonding includes an intermediate bonding medium such as metal, wax, epoxy, and SOG (spin-on-glass). Thus annealing temperature and time of wafer bonding are reduced and the produced components are with better properties.
  • Now wafer bonding technique is broadly applied to photoelectric/electronic industries such as the improvement of performance of photoelectric components, manufacturing and applications of SOI (Silicon-on-insulator) chips, manufacturing and integrations of Si Discrete Power Devices as well as MEMS (Micro Electro Mechanical Systems) devices, and Optoelectronic Integrated Circuits (OEIC) manufactured by integration of photoelectric components and Ultra-Large Scale Integration (ULSI) chips. The above description explains how the wafer bonding technique is applied to optoelectronic components.
  • In order to use energy efficiently, develop high technology and protect the earth, the high brightness white light LED has become main point of development in solid state lighting in developed countries. It is estimated the light efficiency of high brightness white light LED will achieve 200 lm/W within 15 years so that it will replace all lighting devices in our daily lives at that time. Thus the electricity consumed by lighting equipments is reduced 50% and the overall electricity is saved up to 10%. Moreover, about two hundred million tons of carbon dioxide emitted is reduced. Thus not only energy is saved but also environmental protection is achieved.
  • The development of GaN based LED dramatically increases possibility of mass production of white light LED and plays a key role on that. Up to present, sapphire has played an important role in the improvement of internal quantum efficiency of GaN LED along with fast development of epitaxial technique and it also has great effect on the external quantum efficiency. In order to make a breakthrough, begin with packaging.
  • Due to low heat conductivity—40 W/moK, the poor heat dissipation capacity of sapphire severely affects internal quantum efficiency of GaN LED. In recent years, researchers have tried to grow GaN on silicon substrate whose heat dissipation capacity and conductivity are better than those of sapphire.
  • Besides, the wafer bonding technique can be used. The GaN LED is bonded with substrates having better thermal conductivity by metal bonding. The common bonding structure includes Au—Si bonding, Au—Sn bonding and Au—Ag bonding. The bonding temperature of the Au—Si bonding as well as the Au—Sn bonding is 363 and 282 degrees respectively while bonding temperature of the Au—Ag bonding is low temperature—150 degrees. The present invention provides a Sn—Ag bonding bonded at low temperature and a method thereof that further improves component performance as compared with Au—Ag bonding.
  • SUMMARY OF THE INVENTION
  • Therefore it is a primary object of the present invention to provide a Sn—Ag bonding structure without problems of thermal stress caused by different coefficients of thermal expansion of wafers.
  • It is another object of the present invention to provide a Sn—Ag bonding structure that bonds wafers at low temperature, effectively reduce stress generated during wafer bonding, and favors high temperature processes that follow the wafer bonding.
  • In order to achieve above objects, a Sn—Ag bonding of the present invention consists of a first wafer, a first bonding layer, a second bonding layer, and a second wafer. The first bonding layer is disposed on the first wafer and material of the first bonding layer is tin or tin alloy. The second bonding layer is arranged on the second wafer and material of the second bonding layer is silver or silver alloy.
  • A Sn—Ag bonding method of the present invention includes a plurality of steps. A first wafer and a second wafer are provided. Then a first bonding layer is formed on the first wafer by evaporation and the first bonding layer is made of tin or tin alloy. Simultaneously evaporate a second bonding layer onto the second wafer and the second bonding layer is made of silver or silver alloy. Next clean surfaces of the first bonding layer and the second bonding layer. The first bonding layer on the first wafer is attached with the second bonding layer on the second wafer and send them into a vacuum furnace. At last, the vacuum furnace is heated up to a certain temperature so that bonding occurs between the first bonding layer and the second bonding layer.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • The structure and the technical means adopted by the present invention to achieve the above and other objects can be best understood by referring to the following detailed description of the preferred embodiments and the accompanying drawings, wherein
  • FIG. 1 is a schematic drawing showing structure of an embodiment according to the present invention;
  • FIG. 2 is a flow chart of an embodiment according to the present invention;
  • FIG. 3 is a flow chart of another embodiment according to the present invention;
  • FIG. 4 is a schematic drawing showing structure of another embodiment according to the present invention;
  • FIG. 5 is a schematic drawing showing structure of a further embodiment according to the present invention;
  • FIG. 6 is a flow chart of a further embodiment according to the present invention;
  • FIG. 7 is an electron microscopic image of an embodiment according to the present invention;
  • FIG. 8 is a Raman spectra of an embodiment according to the present invention; and
  • FIG. 9 shows released stress of an embodiment according to the present invention.
  • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
  • Refer to FIG. 1, an embodiment of the present invention shows a Sn—Ag bonding structure. The Sn—Ag bonding 1 includes a first wafer 10, a first bonding layer 12, a second bonding layer 14 and a second wafer 16. The first bonding layer 12 is disposed on the first wafer 10 and the first bonding layer 12 is made of tin or tin alloy. The second bonding layer 14 is arranged on the second wafer 16 and the second bonding layer 14 is made of silver or silver alloy. The above first wafer 10 as well as the second wafer 16 is made of compounds, semiconductor or metal.
  • Refer to FIG. 2, a flow chart of an embodiment according to the present invention is revealed. As shown in figure, a Sn—Ag bonding method of the present invention is a method to form a Sn—Ag bonding. Firstly, run the step S10. Provide a first wafer 10 and a second wafer 16. Then take the step S12, a first bonding layer 12 is formed on the first wafer 10 by evaporation. At the same time, run the step S14, evaporate a second bonding layer 14 onto a second wafer 16. In the step S12 and the step S14, the evaporation of the first bonding layer 12 on the first wafer 10 as well as the evaporation of the second bonding layer 14 onto the second wafer 16 is accomplished in several ways. In this embodiment, it's by electron beam evaporation while some other ways of evaporation can also be used.
  • After the first bonding layer 12 coated on the first wafer 10 and the second bonding layer 14 coated on the second wafer 16, take the step S16. Clean the first bonding layer 12 coated on the first wafer 10 as well as the second bonding layer 14 coated on the second wafer 16. There are various ways of cleaning such as gas cleaning, cleaning by chemical solutions or high energy particles. In this embodiment, an ultrasonic cleaner is used to clean surfaces of the first bonding layer 12 and the second bonding layer 14. The cleaning process further includes the following steps:
  • with reference of FIG. 3, run the step S161 first. Soak the first bonding layer 12 coated on the first wafer 10 and the second bonding layer 14 coated on the second wafer 16 into an ultrasonic cleaner (vibrator) filled with acetone solution. The acetone solution removes contaminants from surfaces of the first bonding layer 12 as well as the second bonding layer 14. For example, the contaminants are oxides, dust or other materials attached on surfaces of the e first bonding layer 12 as well as the second bonding layer 14. Next run the step S163, after the contaminants being cleaned by acetone solution, the first wafer 10 coated with the first bonding layer 12 and the second wafer 16 coated with the second bonding layer 14 are taken out of the acetone solution to be soaked into an ultrasonic cleaner having isopropyl alcohol solution. The isopropyl alcohol solution dissolves residual acetone on surfaces of the first bonding layer 12 and the second bonding layer 14. At last, take the step S165, after removing residual acetone on surfaces of the first bonding layer 12 and the second bonding layer 14, take the first bonding layer 12 coated on the first wafer 10 and the second bonding layer 14 coated on the second wafer 16 out of the isopropyl alcohol solution and soak them into an ultrasonic cleaner with deionized water. The residual isopropyl alcohol solution on surfaces of the first bonding layer 12 and the second bonding layer 14 is dissolved in deionized water. After removing residual isopropyl alcohol solution on surfaces of the first bonding layer 12 and the second bonding layer 14, the cleaning of the surfaces of the first bonding layer 12 as well as the second bonding layer 14 is finished.
  • After finishing cleaning of the surfaces of the first bonding layer 12 as well as the second bonding layer 14, run the step S18, back to FIG. 2, the first bonding layer 12 coated on the first wafer 10 and second bonding layer 14 on the second wafer 16 are attached to each other and sent into a vacuum furnace. Then run the step S19, the vacuum furnace is heated between 100 degrees Celsius and 300 degrees Celsius so as to heat the first bonding layer 12 and the second bonding layer 14 to make them bond with each other. The degree of vacuum in the vacuum furnace keeps between from 10−2 torr to 10−6 torr. The bonding time of the first bonding layer 12 and the second bonding layer 14 ranges from 30 minutes to 4 hours. Besides bonding under vacuum conditions, hydrogen gas and nitrogen gas are further introduced while the ratio of hydrogen gas to nitrogen gas is 19:1.
  • Refer to FIG. 4, while the first bonding layer 12 and the second bonding layer 14 are bonding with each other, an interface layer 18 is generated between the first bonding layer 12 and the second bonding layer 14. The first bonding layer 12 is made of tin or tin alloy while the second bonding layer 14 is made of silver or silver alloy. Thus the interface layer 18 is formed by diffusion of material of the first bonding layer 12 toward material of the second bonding layer 14. The interface layer 18 is made of tin silver alloy.
  • Refer to FIG. 5, another embodiment of the present invention is disclosed. As shown in figure, a Sn—Ag bonding 1 consists of a first wafer 10, a first barrier layer 11, a first bonding layer 12, a second bonding layer 14, a second barrier layer 15 and a second wafer 16. The first barrier layer 11 as well as the second barrier layer 15 is respectively arranged on the first wafer 10 and the second wafer 16 while the first bonding layer 12 and the second bonding layer 14 are disposed on the first barrier layer 11 and the second barrier layer 15 respectively. The material of the first bonding layer 12 is tin or tin alloy while the material of the second bonding layer 14 is silver or silver alloy. The first barrier layer 11 is to prevent diffusion of the two layers—the first bonding layer 12 and the first wafer 10. Similarly, the second barrier layer 15 is to prevent diffusion between the second bonding layer 14 and the second wafer 16. The material of the first barrier layer 11 as well as the second barrier layer 15 is selected from titanium (Ti)/nickel (Ni) or chromium (Cr)/platinum (Pt). The material of the first wafer 10 as well as the second wafer 16 is compound, semiconductor or metal.
  • Refer to FIG. 6, a flow chart of a further embodiment is disclosed. A Sn—Ag bonding method to form a Sn—Ag bonding of the present invention includes the following steps: firstly, run the step S10, provide a first wafer 10 and a second wafer 16. Then take the step S12, evaporate a first barrier layer 11 onto a first wafer 10. Refer to step S13, a first bonding layer 12 is formed on the first barrier layer 11 by evaporation. At the same time, take the step S14, evaporate a second barrier layer 15 onto the second wafer 16. Next take the step S15, evaporate a second bonding layer 14 onto the second barrier layer 15. In the steps S12, S13, S14 and S15, the evaporation is accomplished in several ways. In this embodiment, it's by electron beam evaporation while some other ways of evaporation can also be used.
  • After finishing above steps, take the step S16, clean surfaces of the first bonding layer 12 and the second bonding layer 14. There are various ways of cleaning such as gas cleaning, cleaning by chemical solutions or high energy particles, the same with the embodiment in FIG. 2.
  • After finishing cleaning surfaces of the first bonding layer 12 and the second bonding layer 14, take the step S18. Attach the first bonding layer 12 with the second bonding layer 14 and then send them into a vacuum furnace. Refer to step S19, introduce hydrogen gas and nitrogen gas into the vacuum furnace and heat up to 100-300 degrees Celsius. The first bonding layer 12 and the second bonding layer 14 are heated so as to make bonding occur. The ratio of hydrogen gas to nitrogen gas is 19:1. And the bonding time of the first bonding layer 12 with the second bonding layer 14 ranges from 30 minutes to 4 hours.
  • It is learned from the above FIG. 4 that an interface layer 18 is generated between the first bonding layer 12 and the second bonding layer 14 while bonding occurring between the first bonding layer 12 and the second bonding layer 14.
  • Refer to FIG. 7, an image of an embodiment from an electron microscope is revealed. The Sn—Ag bonding structure of the present invention mainly includes a first wafer 10, a copper layer, a tin layer, a silver layer and a second wafer 16. The copper layer is coated on the first wafer. The tin layer is deposit on the copper layer while the silver layer is coated on the second wafer. The copper layer and the tin layer are equal to the first bonding layer 12 of the above embodiment. The silver layer is equal to the second bonding layer 14 of the above embodiment. Bonding occurs between the tin layer and the silver layer so as to obtain Sn—Ag bonding structure. When the tin layer and the silver layer are bonded at 150 degrees Celsius, the Sn—Ag bonding structure is generated after 30 minutes (bonding time). Now the Sn—Ag bonding structure is observed by the electron microscope and a cross sectional view of the Sn—Ag bonding structure is obtained. It is found that a first interface layer 18 a is generated between the tin layer and the silver layer and the first interface layer 18 a is Ag3Sn while a second interface layer 18 b is generated between the tin layer and the silver layer and the second interface layer 18 b is Cu6Sn5.
  • Refer to FIG. 8 & FIG. 9, Raman spectra and stress released of an embodiment are revealed. As shown in figure, Raman shift of the Sn—Ag bonding structure in FIG. 6 is located on the left side of Raman shift of the Au—Ag bonding. This means the stress released by the Sn—Ag bonding is larger than that released by the Au—Ag bonding. Both the value of Raman shift of the Sn—Ag bonding and the value of Raman shift of the Au—Ag bonding are placed into Kozawa's equation so as to get a value of stress released by the Sn—Ag bonding and a value of stress released by the Au—Ag bonding. The result shows that the value of stress released by the Sn—Ag bonding is far more larger than the value of stress released by the Au—Ag bonding. Thus it is learned that a Sn—Ag bonding and a method thereof according to the present invention release stress generated during wafer bonding effectively. The thermal stress caused by large difference in coefficient of thermal expansion between wafers can be avoided and this favors high temperature processes after the wafer bonding.
  • In summary, the present invention provides a Sn/Ag bonding and a method thereof in which a wafer bonding is run at low temperature—100 degrees Celsius. By the bonding layer having tin and solver between wafers, more stress is released so as to reduce problems caused by thermal stress generated during wafer bonding effectively. And this also favors high temperature processes that follow the wafer bonding.
  • Additional advantages and modifications will readily occur to those skilled in the art. Therefore, the invention in its broader aspects is not limited to the specific details, and representative devices shown and described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents.

Claims (21)

1. A Sn—Ag bonding comprising:
a first wafer,
a first bonding layer disposed on the first wafer and made of tin or tin alloy,
a second bonding layer bonded with the first bonding layer and made of silver or silver alloy, and
a second wafer arranged on the second bonding layer.
2. The Sn—Ag bonding as claimed in claim 1, wherein a first barrier layer is disposed between the first wafer and the first bonding layer.
3. The Sn—Ag bonding as claimed in claim 2, wherein the first barrier layer is made of titanium (Ti)/nickel (Ni) or chromium (Cr)/platinum (Pt).
4. The Sn—Ag bonding as claimed in claim 1, wherein a second barrier layer is disposed between the second wafer and the second bonding layer.
5. The Sn—Ag bonding as claimed in claim 4, wherein the second barrier layer is made of titanium (Ti)/nickel (Ni) or chromium (Cr)/platinum (Pt).
6. The Sn—Ag bonding as claimed in claim 1, wherein the first bonding layer and the second bonding layer are further disposed with an interface layer.
7. The Sn—Ag bonding as claimed in claim 6, wherein the interface layer is made of tin silver alloy.
8. A Sn—Ag bonding method comprising the steps of:
providing a first wafer and a second wafer,
evaporating a first bonding layer onto the first wafer while the first bonding layer is made of tin or tin alloy,
evaporating a second bonding layer onto the second wafer while the second bonding layer is made of silver or silver alloy,
cleaning surfaces of the first bonding layer and the second bonding layer,
attaching the first bonding layer on the first wafer with the second bonding layer on the second wafer and being sent to a vacuum furnace, and
heating the vacuum furnace to a certain temperature and bonding occurring between the first bonding layer and the second bonding layer.
9. The method as claimed in claim 8, wherein before the step of heating the vacuum furnace to a certain temperature, the method further comprises a step of introducing hydrogen gas and nitrogen gas.
10. The method as claimed in claim 9, wherein the ratio of hydrogen gas to nitrogen gas is 19:1.
11. The method as claimed in claim 8, wherein the step of evaporating a first bonding layer onto the first wafer is run by electron beam evaporation.
12. The method as claimed in claim 8, wherein the step of evaporating a second bonding layer onto the second wafer is run by electron beam evaporation.
13. The method as claimed in claim 8, wherein the step of cleaning surfaces of the first bonding layer and the second bonding layer is run by ultrasonic cleaning.
14. The method as claimed in claim 8, wherein the step of cleaning surfaces of the first bonding layer and the second bonding layer comprising the steps of:
soaking the first bonding layer and the second bonding layer into acetone solution for removing contaminants on surfaces of the first bonding layer and the second bonding layer;
soaking the first bonding layer and the second bonding layer into isopropyl alcohol solution for removing residual acetone on surfaces of the first bonding layer and the second bonding layer;
soaking the first bonding layer and the second bonding layer into deionized water for removing residual isopropyl alcohol on surfaces of the first bonding layer and the second bonding layer.
15. The method as claimed in claim 8, wherein bonding temperature of the bonding occurring between the first bonding layer and the second bonding layer ranges from 100 degrees Celsius to 300 degrees Celsius.
16. The method as claimed in claim 8, wherein bonding time of the bonding occurring between the first bonding layer and the second bonding layer ranges from 30 minutes to 4 hours.
17. The method as claimed in claim 8, wherein degree of vacuum in the vacuum furnace ranges from 10−2 torr to 10−6 torr while bonding occurring between the first bonding layer and the second bonding layer.
18. The method as claimed in claim 8, wherein before the step of evaporating a first bonding layer onto the first wafer, the method further comprises a step of:
evaporating a first barrier layer onto the first wafer.
19. The method as claimed in claim 18, wherein the first barrier layer is made of titanium (Ti)/nickel (Ni) or chromium (Cr)/platinum (Pt).
20. The method as claimed in claim 8, wherein before the step of evaporating a second bonding layer onto the second wafer, the method further comprises a step of:
evaporating a second barrier layer onto the second wafer.
21. The method as claimed in claim 20, wherein the second barrier layer is made of titanium (Ti)/nickel (Ni) or chromium (Cr)/platinum (Pt).
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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130040437A1 (en) * 2010-04-20 2013-02-14 Sumitomo Electric Industries, Ltd. Method of Manufacturing Composite Substrate
US20130164956A1 (en) * 2011-12-26 2013-06-27 Fujitsu Limited Electronic component and electronic device
US20130285248A1 (en) * 2012-04-26 2013-10-31 Asia Pacific Microsystems, Inc. Package Structure and Substrate Bonding Method
US8803001B2 (en) 2011-06-21 2014-08-12 Toyota Motor Engineering & Manufacturing North America, Inc. Bonding area design for transient liquid phase bonding process
US9044822B2 (en) 2012-04-17 2015-06-02 Toyota Motor Engineering & Manufacturing North America, Inc. Transient liquid phase bonding process for double sided power modules
US20160190417A1 (en) * 2014-12-25 2016-06-30 Nichia Corporation Semiconductor device and manufacturing method for the same
US10058951B2 (en) 2012-04-17 2018-08-28 Toyota Motor Engineering & Manufacturing North America, Inc. Alloy formation control of transient liquid phase bonding
CN109979828A (en) * 2019-04-10 2019-07-05 重庆三峡学院 A kind of silicon carbide power device die bonding method

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5588419B2 (en) 2011-10-26 2014-09-10 株式会社東芝 package
TWI536607B (en) 2013-11-11 2016-06-01 隆達電子股份有限公司 An electrode structure
US10700036B2 (en) 2018-10-19 2020-06-30 Toyota Motor Engineering & Manufacturing North America, Inc. Encapsulated stress mitigation layer and power electronic assemblies incorporating the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5664723A (en) * 1995-10-27 1997-09-09 Sastri; Suri A. Brazing technology
US20040084509A1 (en) * 2002-11-01 2004-05-06 Heinrich Meyer Method of connecting module layers suitable for the production of microstructure modules and a microstructure module
JP2007281105A (en) * 2006-04-05 2007-10-25 Hitachi Ltd Electronic component

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1191894B (en) * 1963-09-11 1965-04-29 Licentia Gmbh Electrical contact piece
US4187599A (en) * 1975-04-14 1980-02-12 Motorola, Inc. Semiconductor device having a tin metallization system and package containing same
US4291815B1 (en) * 1980-02-19 1998-09-29 Semiconductor Packaging Materi Ceramic lid assembly for hermetic sealing of a semiconductor chip
US4756467A (en) * 1986-04-03 1988-07-12 Carlisle Corporation Solderable elements and method for forming same
US5255840A (en) * 1989-12-26 1993-10-26 Praxair Technology, Inc. Fluxless solder coating and joining
US6471115B1 (en) * 1990-02-19 2002-10-29 Hitachi, Ltd. Process for manufacturing electronic circuit devices
US5516031A (en) * 1991-02-19 1996-05-14 Hitachi, Ltd. Soldering method and apparatus for use in connecting electronic circuit devices
US5108026A (en) * 1991-05-14 1992-04-28 Motorola Inc. Eutectic bonding of metal to ceramic
US5390080A (en) * 1993-05-03 1995-02-14 Motorola Tin-zinc solder connection to a printed circuit board of the like
JP3348528B2 (en) * 1994-07-20 2002-11-20 富士通株式会社 Method for manufacturing semiconductor device, method for manufacturing semiconductor device and electronic circuit device, and electronic circuit device
FI98899C (en) * 1994-10-28 1997-09-10 Jorma Kalevi Kivilahti Method for connecting electronic components by soldering
JP3136390B2 (en) * 1994-12-16 2001-02-19 株式会社日立製作所 Solder joining method and power semiconductor device
JPH09275182A (en) * 1996-04-02 1997-10-21 Seiichi Serizawa Lead frame for semiconductor device
US6082610A (en) * 1997-06-23 2000-07-04 Ford Motor Company Method of forming interconnections on electronic modules
US6492251B1 (en) * 1999-03-10 2002-12-10 Tessera, Inc. Microelectronic joining processes with bonding material application
JP2000307228A (en) * 1999-04-22 2000-11-02 Mitsubishi Electric Corp Solder jointing method containing no lead and electronic module manufactured thereby
US6598780B2 (en) * 1999-12-24 2003-07-29 Denso Corporation Method of connecting circuit boards
US6805974B2 (en) * 2002-02-15 2004-10-19 International Business Machines Corporation Lead-free tin-silver-copper alloy solder composition
US7247514B2 (en) * 2003-04-11 2007-07-24 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for producing the same
JP4739734B2 (en) * 2003-11-28 2011-08-03 ヴィーラント ウェルケ アクチーエン ゲゼルシャフト CONTINUOUS LAYER FOR PRODUCING COMPOSITE FOR ELECTRO-Mechanical Components, COMPOSITE MATERIAL AND METHOD OF USE
US20050269385A1 (en) * 2004-06-03 2005-12-08 National Tsing Hua University Soldering method and solder joints formed therein
US7488408B2 (en) * 2004-07-20 2009-02-10 Panasonic Corporation Tin-plated film and method for producing the same
US7390735B2 (en) * 2005-01-07 2008-06-24 Teledyne Licensing, Llc High temperature, stable SiC device interconnects and packages having low thermal resistance
US7624978B2 (en) * 2005-03-16 2009-12-01 Kaiping James C Sheet feeder with feed belts that move toward an away from each other
US7938308B1 (en) * 2009-04-24 2011-05-10 Amkor Technology, Inc. Wire bonder for improved bondability of a conductive wire and method therefor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5664723A (en) * 1995-10-27 1997-09-09 Sastri; Suri A. Brazing technology
US20040084509A1 (en) * 2002-11-01 2004-05-06 Heinrich Meyer Method of connecting module layers suitable for the production of microstructure modules and a microstructure module
JP2007281105A (en) * 2006-04-05 2007-10-25 Hitachi Ltd Electronic component

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Machine Translation, Hata et al., JP 2007-281105, 10-2007. *

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9252207B2 (en) 2010-04-20 2016-02-02 Sumitomo Electric Industries, Ltd. Composite substrate
US8664085B2 (en) * 2010-04-20 2014-03-04 Sumitomo Electric Industries, Ltd. Method of manufacturing composite substrate
US20130040437A1 (en) * 2010-04-20 2013-02-14 Sumitomo Electric Industries, Ltd. Method of Manufacturing Composite Substrate
US8803001B2 (en) 2011-06-21 2014-08-12 Toyota Motor Engineering & Manufacturing North America, Inc. Bonding area design for transient liquid phase bonding process
US20130164956A1 (en) * 2011-12-26 2013-06-27 Fujitsu Limited Electronic component and electronic device
US10062658B2 (en) 2011-12-26 2018-08-28 Fujitsu Limited Electronic component and electronic device
US10056342B2 (en) * 2011-12-26 2018-08-21 Fujitsu Limited Electronic component and electronic device
US9044822B2 (en) 2012-04-17 2015-06-02 Toyota Motor Engineering & Manufacturing North America, Inc. Transient liquid phase bonding process for double sided power modules
US10058951B2 (en) 2012-04-17 2018-08-28 Toyota Motor Engineering & Manufacturing North America, Inc. Alloy formation control of transient liquid phase bonding
US8916449B2 (en) * 2012-04-26 2014-12-23 Asia Pacific Microsystems, Inc. Package structure and substrate bonding method
US20130285248A1 (en) * 2012-04-26 2013-10-31 Asia Pacific Microsystems, Inc. Package Structure and Substrate Bonding Method
US20160190417A1 (en) * 2014-12-25 2016-06-30 Nichia Corporation Semiconductor device and manufacturing method for the same
US9991434B2 (en) * 2014-12-25 2018-06-05 Nichia Corporation Semiconductor device with metal-bonded heat dissipator and manufacturing method for the same
CN109979828A (en) * 2019-04-10 2019-07-05 重庆三峡学院 A kind of silicon carbide power device die bonding method

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