CN109979828A - A kind of silicon carbide power device die bonding method - Google Patents
A kind of silicon carbide power device die bonding method Download PDFInfo
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- CN109979828A CN109979828A CN201910282555.2A CN201910282555A CN109979828A CN 109979828 A CN109979828 A CN 109979828A CN 201910282555 A CN201910282555 A CN 201910282555A CN 109979828 A CN109979828 A CN 109979828A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
- H01L21/603—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation involving the application of pressure, e.g. thermo-compression bonding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83053—Bonding environment
- H01L2224/83095—Temperature settings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/83201—Compression bonding
- H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
Abstract
The invention discloses a kind of silicon carbide power device die bonding methods, belong to microelectronic packaging technology field.Bonding method of the invention includes: to configure in order barrier layer and adhesive layer respectively in the inactive face of silicon carbide power device wafer and substrate panel；Nano mattisolda is respectively printed on the adhesive layer of silicon carbide power device wafer and substrate panel with uniform thickness, pressureless sintering is carried out and forms silver-colored sinter layer；Oxidation processes and polishing treatment are carried out to silver-colored sinter layer；Cutting forms isolated silicon carbide power device chip and substrate；The silver-colored sinter layer on silicon carbide power device chip is configured at face-to-face on the silver-colored sinter layer on substrate using surface mount mode, carries out thermocompression bonding, realizes the connection of silicon carbide power device chip bonding.The invention has the characteristics that simple, high reliability, high yield, high yield.
Description
Technical field
The present invention relates to microelectronic packaging technology especially silicon carbide power device chip encapsulation technologies.
Background technique
The rapid development of aerospace, electric car and new energy power generation technology is so that the performance to power electronic system refers to
Mark requires increasingly to improve, and high power device chip of the development and application in the extreme environments such as high temperature is current power electronic technique neck
The emphasis direction of domain development.Due to based on first generation Semiconducting Silicon Materials (Si) and second generation semiconductor material (GaAs)
Power device chip can not continue working under 200 DEG C or more of hot environment, and grow up later with silicon carbide (SiC)
Material be representative third generation wide band gap semiconductor device chip the limit of working temperature can reach 500 DEG C or so it is even higher
Temperature is more able to satisfy the demand for development of future electrical energy electronic technology.However, under this hot environment, existing chip bonding material
Material-lead-free solder (Pb-free), which can melt, leads to Joint failure, can not be suitable for broad stopbands device chips such as silicon carbide (SiC)
Bonding packaging.In recent years using be sintered nano silver technology as the low-temperature bonding technology of representative be current power device chip towards high temperature,
The main trend of high reliability application development, the basic principle is that utilizing the high surface energy of the silver metal particles of nanoscale, low
Melting point property is bonded to realize that chip is sintered with the low-pressure low-temperature of substrate.The silver-colored sinter layer of formation has excellent electricity, hot property,
Fusing point is high, can bear 710 DEG C of maximum operating temperature, is the ideal structure for realizing silicon carbide power device chip bonding.
Silver sintering natural bed has apparent porous character, and bore hole size is located at sub-micron to micron range.In agglomerant
Skill process needs to apply pressure to form the sinter layer that porosity is low, relatively compact, this causes sintering silver thickness to be difficult to standard
Really control, and silver-colored sinter layer thickness is confined between several microns to tens microns.It is excessively thin to be sintered silver thickness, in hot environment
Under will generate excessive shear strain and stress since the thermal expansion coefficient (CTE) of encapsulating structure material is different and concentrate, cause to burn
Tie the reliability degradation of silver layer.At the same time, the growth of crystal grain and hole can occur under high temperature environment for silver-colored sinter layer, lead
Micro-structure roughening is caused, this structure of silver-colored sinter layer is caused to be degenerated, is easier to that fatigue rupture occurs.In addition, if the chip size of bonding
Excessive, when sintering, will hinder the volatilization of organic solvent in silver paste, form large area gas hole defect in sinter layer, cause to tie
It closes intensity to be remarkably decreased, it is difficult to realize high quality and the sintering of high yield.
Therefore, in order to solve the above-mentioned reliability and yield issues that the sintering silver bonding of silicon carbide power device chip faces,
Urgent need proposes a kind of reasonable die bonding method, is sintered answering for silver-colored bonding technology so that silicon carbide power device chip is effectively reduced
Miscellaneous degree and difficulty, while promoting reliability, yield and the yield of silicon carbide power device chip bonding.
Summary of the invention
The present invention is encapsulated for power device chip, and especially silicon carbide power device chip is sintered silver-colored bonding packaging, is mentioned
A kind of simple, high reliability, high yield, high yield die bonding method is supplied.
To reach above-mentioned purpose, the present invention provides a kind of silicon carbide power device die bonding method, mainly includes following
Step:
Step 1: configuring in order barrier layer and adhesive layer in the inactive face of silicon carbide power device wafer.On substrate panel successively
Configure barrier layer and adhesive layer.The configuration method can be but be not limited to sputtering, vacuum evaporation and chemical plating method, preferably
In sputtering method.The substrate panel can be but to be not limited to ceramic base copper-clad plate, organic substrate and copper base excellent, preferably make pottery
Porcelain base copper-clad plate.The barrier layer can be but be not limited to the metal materials, preferably titanium such as titanium (Ti), tantalum (Ta) and tungsten (W)
(Ti).The adhesive layer can be but be not limited to the metal materials such as silver (Ag), nickel (Ni) and gold (Au), preferably silver (Ag).Institute
The thickness range for stating barrier layer is 0.05 micron -1.0 microns, preferably 0.1 micron.The thickness range of the adhesive layer is 0.1 micro-
- 5.0 microns, preferably 1.0 microns of rice.
Step 2: nano mattisolda is printed on the adhesive layer of silicon carbide power device wafer with uniform thickness.By nanometer
Silver paste is printed on the adhesive layer of substrate panel with uniform thickness.The silicon carbide power device wafer and substrate that will be completed for printing
Panel, which is placed on warm table, be pressureless sintered to type, forms silver-colored sinter layer.Heating platen temperature range is set as 250 DEG C -350
DEG C, preferably 260 DEG C.Sintering time scope is set as -60 minutes 15 minutes, preferably 30 minutes.After the completion of sintering, the silver sintering
The thickness range of layer is 15 microns -50 microns, preferably 25 microns.
Step 3: oxidation processes are carried out to the silver-colored sinter layer on silicon carbide power device wafer.Silver on substrate panel is burnt
It ties layer and carries out oxidation processes.The oxidation treatment method can be but be not limited to steam oxidation and impregnate moisture absorption oxidation, excellent
Select steam oxidation.
Step 4: the silver-colored sinter layer on silicon carbide power device wafer is processed by shot blasting.Silver on substrate panel is burnt
Knot layer is processed by shot blasting.The polishing treatment method can be but be not limited to chemical mechanical polishing.It is described after polishing treatment
The thickness range of silver-colored sinter layer is 10 microns -40 microns, preferably 20 microns.
Step 5: cutting silicon carbide power device wafer forms single silicon carbide power device chip of separation.Cut base
Plate face plate forms the single substrate of separation.The cutting method can be but be not limited to blade cutting, laser cutting and water knife
Cutting method.
Step 6: the silver-colored sinter layer on silicon carbide power device chip is configured at by base using surface mount mode face-to-face
On silver-colored sinter layer on plate, configured silicon carbide power device chip and substrate are placed in together on warm table and carry out hot pressing
The connection of silicon carbide power device chip bonding is realized in bonding.Heating platen temperature range is set as 250 DEG C -350 DEG C, preferably 300
℃.Bonding time range is set as -90 minutes 15 minutes, preferably 45 minutes.Bonding pressure range is set as 0.1MPa-10MPa,
It is preferred that 1MPa.
Detailed description of the invention
Fig. 1 is the section signal that production method implements the silicon carbide power device chip bonding result completed according to the present invention
Figure.
Fig. 2A-Fig. 2 E is production method embodiment according to the present invention, is with silicon carbide power device chip bonding shown in Fig. 1
A kind of manufacturing process schematic diagram of silicon carbide power device die bonding method of example.
In above-mentioned figure, 1 it is silicon carbide power device chip die, 2 is substrate panel, 3 is the first barrier layer, 4 is second
Barrier layer, 5 be the first adhesive layer, 6 be the second adhesive layer, 7 be the first silver medal sinter layer, 8 be the second silver medal sinter layer, 9 be silicon carbide
Power device chip, 10 are substrate.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, with reference to the accompanying drawing to specific reality of the invention
The mode of applying is described in further detail.
The silicon carbide power device chip bonding structure is referring to FIG. 1, according to dimensional orientation from top to bottom in structure
Successively are as follows: silicon carbide power device chip 9, the first barrier layer 3, the first adhesive layer 5, the first silver medal sinter layer 7, the second silver medal sinter layer
8, the second barrier layer 4, the second adhesive layer 6 and substrate 10.The substrate panel 2 can be but be not limited to ceramic base copper-clad plate,
Organic substrate and copper base, preferably ceramic base copper-clad plate.First barrier layer 3 and the second barrier layer 4 can be but not limit to
In the metal materials such as titanium (Ti), tantalum (Ta) and tungsten (W), preferably titanium (Ti).First adhesive layer 5 and the second adhesive layer 6 can be with
For but be not limited to the metal materials, preferably silver (Ag) such as silver-colored (Ag), nickel (Ni) and golden (Au).First barrier layer 3 and second
The thickness range on barrier layer 4 is 0.05 micron -1.0 microns, preferably 0.1 micron.First adhesive layer 5 and the second adhesive layer 6
Thickness range be 0.1 micron -5.0 microns, preferably 1.0 microns.The thickness of the first silver medal sinter layer 7 and the second silver medal sinter layer 8
Spending range is 10 microns -40 microns, preferably 20 microns.
The silicon carbide power device die bonding method the following steps are included:
Step 1: as shown in Figure 2 A, it is viscous to configure in order the first barrier layer 3 and first in the inactive face of silicon carbide power device wafer 1
Connect layer 5.The second barrier layer 4 and the second adhesive layer 6 are configured in order on substrate panel 2.The configuration method can be but not office
It is limited to sputtering, vacuum evaporation and chemical plating method, is preferable over sputtering method.The substrate panel 2 can be but be not limited to make pottery
The copper-clad plate of porcelain base, organic substrate and copper base, preferably ceramic base copper-clad plate.First barrier layer 3 and the second barrier layer 4 can be with
For but be not limited to the metal materials such as titanium (Ti), tantalum (Ta) and tungsten (W), preferably titanium (Ti).First adhesive layer 5 and second is viscous
Connecing layer 6 can be but be not limited to the metal materials such as silver (Ag), nickel (Ni) and gold (Au), preferably silver-colored (Ag).Described first stops
Layer 3 and the thickness range on the second barrier layer 4 are 0.05 micron -1.0 microns, preferably 0.1 micron.First adhesive layer 5 and
The thickness range of two adhesive layers 6 is 0.1 micron -5.0 microns, preferably 1.0 microns.
Step 2: as shown in Figure 2 B, nano mattisolda being printed on the of silicon carbide power device wafer 1 with uniform thickness
On one adhesive layer 5.Nano mattisolda is printed on the second adhesive layer 6 of substrate panel 2 with uniform thickness.By what is be completed for printing
Silicon carbide power device wafer 1 and substrate panel 2, which are respectively placed in, to carry out being pressureless sintered to type in warm table (not shown), is formed
First silver medal sinter layer 7 and the second silver medal sinter layer 8.Heating platen temperature range is set as 250 DEG C -350 DEG C, preferably 260 DEG C.When sintering
Between range be set as -60 minutes 15 minutes, preferably 30 minutes.The first silver medal sinter layer 7 and the sintering of the second silver medal after the completion of sintering
The thickness range of layer 8 is 15 microns -50 microns, preferably 25 microns.After the completion of sintering, the first silver medal sinter layer 7 and the second silver medal
The thickness range of sinter layer 8 is 15 microns -50 microns, preferably 25 microns.
Step 3: oxidation processes are carried out to the first silver medal sinter layer 7 on silicon carbide power device wafer 1.To substrate panel 2
On the second silver medal sinter layer 8 carry out oxidation processes.The oxidation treatment method can be but be not limited to steam oxidation and leaching
Steep moisture absorption oxidation, preferably steam oxidation.By oxidation processes, in 8 inner void of the first silver medal sinter layer 7 and the second silver medal sinter layer
Surface Creation silver oxide film, it is inhibited to micro-structure roughening, it can keep under high temperature environment stable.
Step 4: as shown in Figure 2 C, after oxidation processes, to the first silver medal sinter layer 7 on silicon carbide power device wafer 1 into
Row polishing treatment is processed by shot blasting the second silver medal sinter layer 8 on substrate panel 2.The polishing treatment method can be but
It is not limited to chemical mechanical polishing.The thickness range of the first silver medal sinter layer 7 and the second silver medal sinter layer 8 is 10 after polishing treatment
- 40 microns, preferably 20 microns of micron.Purpose to the first silver medal sinter layer 7 and the second silver medal sinter layer polishing treatment is to be formed
Fine and close, flat and smooth surface promotes subsequent hot pressing bonding quality.
Step 5: as shown in Figure 2 D, cutting silicon carbide power device wafer 1, form single silicon carbide power device of separation
Chip 9.Cutting substrate panel 2 forms the single substrate 10 of separation.The cutting method can be but be not limited to blade and cut
It cuts, be cut by laser and high pressure waterjet method.
Step 6: as shown in Figure 2 E, being sintered the first silver medal on silicon carbide power device chip 9 using surface mount mode
Layer 7 is configured on the second silver medal sinter layer 8 on substrate 10 face-to-face, by configured silicon carbide power device chip 9 and substrate
10 are placed in warm table (not shown) together and carry out thermocompression bonding, realize bonding connection.Heating platen temperature range is set as 250
DEG C -350 DEG C, preferably 300 DEG C.Bonding time range is set as -90 minutes 15 minutes, preferably 45 minutes.Bonding pressure range is set
It is set to 0.1MPa-10MPa, preferably 1MPa.The purpose of thermocompression bonding be by the first silver medal sinter layer 7 and the second silver medal sinter layer 8 it
Between atom diffusion realize bonding connection.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and
Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (9)
1. a kind of silicon carbide power device die bonding method, feature mainly comprise the steps that
Step 1: configuring in order the first barrier layer and the first adhesive layer in the inactive face of silicon carbide power device wafer；In real estate
The second barrier layer and the second adhesive layer are configured in order on plate；
Step 2: nano mattisolda is printed on the first adhesive layer of silicon carbide power device wafer with uniform thickness；By nanometer
Silver paste is printed on the second adhesive layer of substrate panel with uniform thickness；By the silicon carbide power device wafer being completed for printing and
Substrate panel, which is respectively placed on warm table, be pressureless sintered to type, forms the first silver medal sinter layer and the second silver medal sinter layer；
Step 3: oxidation processes are carried out to the first silver medal sinter layer on silicon carbide power device wafer；To second on substrate panel
Silver-colored sinter layer carries out oxidation processes；
Step 4: the first silver medal sinter layer on silicon carbide power device wafer being processed by shot blasting, to second on substrate panel
Silver-colored sinter layer is processed by shot blasting；
Step 5: cutting silicon carbide power device wafer forms single silicon carbide power device chip of separation；Cutting substrate face
Plate forms the single substrate of separation；
Step 6: the first silver medal sinter layer on silicon carbide power device chip is configured at by base using surface mount mode face-to-face
On the second silver medal sinter layer on plate, configured silicon carbide power device chip and substrate are placed in together on warm table and carried out
Bonding connection is realized in thermocompression bonding.
2. a kind of silicon carbide power device die bonding method according to claim 1, which is characterized in that described in step 1
Configuration method using sputtering, vacuum evaporation or chemical plating method.
3. a kind of silicon carbide power device die bonding method according to claim 1, which is characterized in that described in step 1
Substrate panel use ceramic base copper-clad plate, organic substrate or copper base.
4. a kind of silicon carbide power device die bonding method according to claim 1, which is characterized in that described in step 1
First barrier layer and the second barrier layer can choose the metal materials such as titanium (Ti), tantalum (Ta) or tungsten (W)；First adhesive layer and
Second adhesive layer can choose the metal materials such as silver (Ag), nickel (Ni) or gold (Au)；First barrier layer and the second barrier layer
Thickness range be 0.05 micron -1.0 microns；The thickness range of first adhesive layer and the second adhesive layer be 0.1 micron-
5.0 micron.
5. a kind of silicon carbide power device die bonding method according to claim 1, which is characterized in that described in step 2
Sintering range is set as 250 DEG C -350 DEG C；Sintering time scope is set as -60 minutes 15 minutes；First after the completion of sintering
The thickness range of silver-colored sinter layer and the second silver medal sinter layer is 15 microns -50 microns.
6. a kind of silicon carbide power device die bonding method according to claim 1, which is characterized in that described in step 3
Oxidation treatment method is using steam oxidation or impregnates moisture absorption method for oxidation.
7. a kind of silicon carbide power device die bonding method according to claim 1, which is characterized in that described in step 4
Polishing treatment method is used in chemical mechanical polishing；The thickness of the first silver medal sinter layer and the second silver medal sinter layer after polishing treatment
Range is 10 microns -40 microns.
8. a kind of silicon carbide power device die bonding method according to claim 1, which is characterized in that described in step 5
Cutting method is using blade cutting, laser cutting or high pressure waterjet method.
9. a kind of silicon carbide power device die bonding method according to claim 1, which is characterized in that described in step 6
Thermocompression bonding temperature range is set as 250 DEG C -350 DEG C, and bonding time range is set as -90 minutes 15 minutes；It is bonded pressure model
It encloses and is set as 0.1MPa-10MPa.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113206018A (en) * | 2021-04-23 | 2021-08-03 | 天津工业大学 | Low-temperature large-area uniform sintering method for nano-silver soldering paste |
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2019
- 2019-04-10 CN CN201910282555.2A patent/CN109979828A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113206018A (en) * | 2021-04-23 | 2021-08-03 | 天津工业大学 | Low-temperature large-area uniform sintering method for nano-silver soldering paste |
| CN113206018B (en) * | 2021-04-23 | 2022-07-08 | 天津工业大学 | Low-temperature large-area uniform sintering method for nano-silver soldering paste |
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