US20010004944A1 - Double-sided circuit board and multilayer wiring board comprising the same and process for producing double-sided circuit board - Google Patents
Double-sided circuit board and multilayer wiring board comprising the same and process for producing double-sided circuit board Download PDFInfo
- Publication number
- US20010004944A1 US20010004944A1 US09/735,893 US73589300A US2001004944A1 US 20010004944 A1 US20010004944 A1 US 20010004944A1 US 73589300 A US73589300 A US 73589300A US 2001004944 A1 US2001004944 A1 US 2001004944A1
- Authority
- US
- United States
- Prior art keywords
- double
- solder
- sided circuit
- circuit board
- sided
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3485—Applying solder paste, slurry or powder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0206—Materials
- H05K2201/0215—Metallic fillers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0302—Properties and characteristics in general
- H05K2201/0305—Solder used for other purposes than connections between PCB or components, e.g. for filling vias or for programmable patterns
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0355—Metal foils
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/0425—Solder powder or solder coated metal powder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/44—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits
- H05K3/445—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits having insulated holes or insulated via connections through the metal core
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
- H05K3/462—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar double-sided circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4641—Manufacturing multilayer circuits by laminating two or more circuit boards having integrally laminated metal sheets or special power cores
Definitions
- This invention relates to a double-sided printed wiring board (i.e., double-sided circuit board, hereinafter sometimes abbreviated as double-sided PWB) of which the wiring conductors on both sides are electrically connected with solder having a metal powder dispersed therein, a multilayer printed wiring board (i.e., multilayer wiring board, hereinafter sometimes abbreviated as ML-PWB) comprising the same, and a process for producing the double-sided PWB.
- double-sided printed wiring board i.e., double-sided circuit board, hereinafter sometimes abbreviated as double-sided PWB
- ML-PWB multilayer wiring board
- An ML-PWB can be produced by a build up method comprising alternately building up, on one or both sides of a substrate, insulating layers of a photosensitive resin and conductor layers formed by plating or deposition.
- the build up method is disadvantageous in that the production process is complicated and involves many steps, the yield is low, and much time is required.
- a low-expansion double-sided PWB which comprises an insulating layer of an organic high molecular weight resin having a metal core and a wiring conductor provided on each side of the insulating layer, the wiring conductor on both sides being electrically connected via through-holes
- a low-expansion ML-PWB which comprises a plurality of the double-sided PWBs integrally laminated with each other via an adhesive layer interposed between every adjacent PWBs, the adhesive layer having through-holes at prescribed positions in contact with the wiring conductors of the adjacent upper and lower double-sided PWBs, and the through-holes containing a conductor made of solder by which the wiring conductors of the upper and the lower double-sided PWBs are electrically connected (see Japanese patent application No. 9-260201).
- the inventors proposed a low-expansion double-sided PWB having high reliability and high freedom of wiring design, in which the wiring conductors on both sides thereof are electrically connected through via-holes filled with a conductor made of solder (as of yet unpublished Japanese Patent Application No. 9-199690).
- the insulating layer has a large thickness in relation to the diameter of the via-holes, i.e., where the via-holes have a high aspect ratio
- the solder-filled via-holes tend to undergo permanent deformation due to the stress accumulated in a cycling test, which will lead to a failure to connect to the wiring conductors.
- An object of the present invention is to provide a double-sided PWB (double-sided circuit board) and an ML-PWB (multilayer wiring board) comprising the double-sided PWBs in which a conductor made of solder is prevented from deformation in a cycling test so that high connection reliability can be maintained.
- Another object of the present invention is to provide a process for producing the double-sided PWB.
- the present inventors have conducted extensive study seeking a double-sided PWB of which the conductor made of solder is prevented from deformation in a cycling test. As a result, they have found that the above objects are accomplished by the following invention.
- the invention provides, in its first aspect, a double-sided PWB comprising an insulating layer made of an organic high molecular weight resin having on each side thereof a wiring conductor, wherein the wiring conductors on both sides are electrically connected through via-holes filled with a conductor made of solder having a metal powder dispersed therein.
- the invention provides, in its second aspect, an ML-PWB which comprises a plurality of the double-sided PWBs integrally laminateded with each other via an adhesive layer interposed between every adjacent PWBs, the adhesive layer having through-holes at prescribed positions in contact with the wiring conductors of the adjacent upper and lower double-sided PWBs and the through-holes being filled with a conductor made of solder by which the wiring conductors of the upper and the lower double-sided PWBs are electrically connected.
- the invention provides, in its third aspect, a process for producing the double-sided PWB comprising the steps of:
- solder conductor plastic deformation of the solder conductor is prevented by the hard metal powder dispersed in the soft solder thereby to secure sufficient strength while maintaining low connection resistance.
- deformation of the solder conductor in a cycling test can be suppressed, and high connection reliability can be retained.
- the insulating layer contains an Ni—Fe-based alloy foil as a core.
- the presence of one low-expansion Ni—Fe-based alloy layer (core) per two wiring conductor layers brings the thermal expansion coefficient of the double-sided PWB as a whole very close to that of silicon even where the wiring conductors are made of copper.
- the lowered thermal expansion coefficient of the double-sided PWB secures extremely high reliability even in bare chip mount.
- FIG. 1 is a schematic cross section showing an embodiment of the double-sided PWB according to the present invention.
- FIGS. 2 through 5 illustrate the process for producing the double-sided PWB of FIG. 1.
- FIG. 6 is a schematic cross section showing another embodiment of the double-sided PWB according to the present invention.
- FIGS. 7 through 12 illustrate a process for producing the double-sided PWB of FIG. 6.
- FIG. 13 is a schematic cross section of an embodiment of the ML-PWB according to the present invention.
- FIGS. 14 through 17 illustrate a process for producing the ML-PWB of FIG. 13.
- FIGS. 18 through 21 illustrate the process for producing the double-sided PWB of Example 1.
- FIGS. 22 through 24 illustrate the process for producing the low-expansion double-sided PWB of Example 2.
- FIGS. 25 to 29 illustrate the process for producing the six-layered PWB of Example 3.
- FIG. 30 illustrates the process for producing the double-sided PWB of Comparative Example 1.
- FIG. 31 is a schematic cross section of the double-sided PWB of Comparative Example 1.
- FIG. 32 illustrates the process for producing the double-sided PWB of Comparative Example 3.
- FIG. 33 is a schematic cross section of the double-sided PWB of Comparative Example 3.
- FIG. 34 is a schematic illustration of a metal powder and a solder powder injected into a via-hole.
- FIGS. 35 and 36 each schematically illustrate the cross section of the via-hole of FIG. 34 after the solder powder is melted.
- the organic high molecular weight resin which can be used as an insulating layer preferably includes polyimide resins, epoxy resins, and mixtures thereof for their heat resistance and electrical characteristics.
- An adhesive sheet made of such an organic high molecular weight resin is conveniently used.
- the adhesive sheet preferably has a thickness of about 0.01 to 1.0 mm.
- An adhesive sheet with a smaller thickness than about 0.01 mm tends to have poor workability. With the thickness larger than about 1.0 mm, it may be difficult to completely fill the through-holes with the metal/solder mixed powder, resulting in reduced reliability.
- the means for making the through-holes in the insulating layer is appropriately chosen depending on the desired size of the holes. For example, drilling, punching, laser machining and the like can be adopted.
- the composition of solder powder which becomes a solder conductor on melting, includes, but is not limited to, Sn—Pb alloys, Sn—Ag alloys, Sn—Ag—Cu alloys, Sn—Ag—Cu—Bi alloys, Sn—Ag—Bi alloys, Sn—Zn alloys, Sn—Cu alloys, Sn—Sb alloys, and Sn—Au alloys.
- An optimum solder composition for the desired heat resistance is chosen.
- the solder powder usually has a particle size of 50 ⁇ m or smaller, preferably 10 ⁇ m or smaller.
- the solder powder preferably has a melting point of 150 to 350° C.
- the metal powder which is to be dispersed in a solder conductor, preferably includes powder of Ni, Au, Ag, Cu, Fe, Al, Cr, Pd or Co, and powder of alloys comprising at least one of these metals.
- the metal powder usually has a particle size of 50 ⁇ m or smaller, preferably 10 ⁇ m or smaller.
- the metal powder preferably has a melting point of 350° C. or higher.
- the melting point of the metal powder is higher by at least 5° C. than that of the solder powder.
- Via-holes filled with a solder conductor having a metal powder dispersed therein can be formed, for example, as follows.
- the metal powder, the solder powder and an organic solvent are mixed at a predetermined ratio into paste.
- the paste is applied in excess on the openings of through-holes by printing.
- the mixture is injected (pressed) into the through-holes by pressing down. While the mixed powder is being injected, metal particles A and solder particles B rub against themselves as well as mutually (see FIG. 34), whereby the surface oxide film of these particles is destroyed.
- solder powder melts to form a conductor having the metal powder dispersed therein.
- Thoroughly melting the solder generally results in formation of an alloy layer D made from the metal and the solder material on the surface of the metal particles A as schematically depicted in FIG. 35.
- the alloy layer D is formed by the solder material's diffusing and reacting.
- the alloy layer D serves as an affinity between the metal particles A and the solder conductor C to provide improved electrical and mechanical characteristics.
- the growth rate of the alloy layer D depends on the temperature and time.
- the alloy layer D gains in thickness with time until the whole metal particle becomes an alloy D as shown in FIG. 36, which is also included under the scope of the present invention.
- the metal powder is preferably used in an amount of 0.1 to 60% by weight based on the solder powder. In lower amounts, the effect in suppressing deformation of the via-holes in a cycling test is insubstantial. In higher amounts, the proportion of the solder material is insufficient for binding the metal particles, and the resulting conductor is so brittle as to develop cracks.
- the mixing ratio of the organic solvent is decided according to the dispersibility of the mixed powder in the resulting paste and is preferably 1 to 70% by volume based on the mixed powder. Alcohol solvents are suitable.
- the paste may be prepared by previously plating the metal powder with solder and mixing the plated metal powder with the organic solvent into paste.
- the adhesive sheet (insulating layer) having the via-holes is laminated with copper foil as a conductor layer on its both sides, and the laminate is heated under pressure at or above the melting point of the solder conductor to melt the solder conductor thereby to secure the electrical connections between the copper foil and the via-holes.
- the copper foil on each side is etched in a conventional manner according to a desired circuit pattern to produce the double-sided PWB of the present invention.
- the insulating layer can contain a metal foil or a ceramic material as a core so as to have a reduced thermal expansion coefficient.
- the metal which can be used as a core includes Fe, Ni, Cr, Al, Ti, Cu, Co, or an alloy thereof.
- their own thermal expansion coefficient should be sufficiently low.
- a preferred Ni content ranges from 31 to 50% by weight, particularly from 31 to 45% by weight. Out of this range, the alloy tends to have a fairly higher thermal expansion coefficient than silicon chips.
- the metal foil has a thickness of 10 to 300 ⁇ m, preferably 10 to 200 ⁇ m, still preferably 10 to 100 ⁇ m. With a thickness smaller than 10 ⁇ m, the difference in thermal expansion between the double-sided PWB and silicon chips cannot be reduced sufficiently.
- the ML-PWB of the invention can be produced as follows.
- An adhesive sheet having through-holes is stuck to one or both sides of the double-sided PWB of the invention at right positions so that the through-holes may correspond to desired positions of the double-sided PWB.
- a solder paste is applied into the through-holes of the adhesive sheet by printing, followed by heat melting the paste to form solder bumps.
- a plurality of the double-sided PWBs having solder bumps are stacked on each other at right positions, and the laminate is press bonded under heat into an integral body.
- the through-holes of the adhesive sheet may be at positions of the circuit on the via-holes connecting the wiring conductors on both sides of the double-sided PWB.
- the adhesive sheet used in the production of the ML-PWB preferably includes a sheet of polyimide resins, epoxy resins or mixtures thereof for their heat resistance and electrical characteristics.
- the thickness of the adhesive sheet is preferably about 0.01 to 1.0 mm. Too thin an adhesive sheet has poor workability. If the thickness is too large, it is difficult to completely fill the through-holes with the solder paste, resulting in reduced reliability.
- the through-holes can be made in the adhesive sheet by any known techniques selected from drilling, punching, laser machining, and the like according to the size of the openings.
- the adhesive sheet having through-holes can be adhered temporarily on one or both sides of the double-sided PWB by hot pressing.
- the through-holes may be made by laser machining after the adhesive sheet is temporarily stuck to one or both sides of the double-sided PWB.
- Lasers which can be used include a carbonic acid gas laser, an excimer laser, a YAG laser, etc.
- solder paste can be used to form solder bumps.
- the size of solder bumps is 100 ⁇ m or smaller, preferably 50 ⁇ m or smaller, still preferably 10 ⁇ m or smaller.
- the solder composition is not particularly limited and can be selected in accordance with the heat resistance required of the wiring board. After stacking, the solder bumps are bought into contact with an opposite electrode to establish electrical connections. If desired, the laminate may be heated at or above the melting point of the solder either simultaneously with or after the press bonding to form metallic joints.
- FIG. 1 shows an embodiment of the present invention, in which numeral 1 is a double-sided PWB composed of an insulating layer 2 made of a polyimide resin having formed on both sides thereof a circuit (wiring conductor) 3 made of a copper foil.
- the circuits 3 on both sides are electrically connected by a via-hole 5 a of the insulating layer 2 filled with a solder conductor having a metal powder 6 dispersed therein.
- the double-sided PWB 1 is produced, for example, as follows. As shown in FIG. 2, through-holes 5 a are made in a polyimide adhesive sheet 5 , which becomes an insulating layer 2 , at predetermined positions (positions where via-holes filled with a solder conductor 4 are to be formed). As shown in FIG. 3, a mixture comprising a metal powder 6 and a solder powder 7 at a prescribed mixing ratio is pressed into the through-holes 5 a and melted to fill the through-holes 5 a with a solder conductor having the metal powder 6 dispersed therein (FIG. 4).
- a copper foil 8 is adhered to both sides of the adhesive sheet 5 , and the laminate is heated under pressure at or above the melting point of the solder powder to cause the solder to reflow, thereby securing the electrical connections of the copper foils on both sides (FIG. 5).
- Each of the copper foils is etched in a conventional manner to form a circuit layer 3 (FIG. 1).
- the solder conductor 4 is prevented from plastic deformation owing to the metal powder 6 dispersed therein.
- the dispersed metal powder 6 and the solder form an alloy layer, and the via-holes 5 a filled with the solder conductor 4 have low electrical resistance.
- the circuit layers 3 on both sides are electrically and mechanically connected to each other by the metal joints of the solder conductor 4 , extremely high reliability is enjoyed.
- a double-sided PWB 9 shown in FIG. 6, in which an insulating layer 13 has a metal core 10 is produced, for example, as follows.
- through-holes 10 a are made in an Ni—Fe alloy foil 10 at predetermined positions (i.e., positions where via-holes filled with a solder conductor 11 are to be formed).
- the foil having the through-holes 10 a is sandwiched in between a pair of polyimide adhesive sheets (which become an insulating layer 13 together) to prepare a composite 12 (FIG. 8).
- through-holes 13 a are made in the composite 12 at the same positions as the through-holes 10 a of the alloy foil 10 , the former being smaller than the latter.
- a mixture of a metal powder 14 and a solder powder 15 is pressed into the through-holes 13 a (FIG. 10), the solder powder 15 is melted (FIG. 11), and a copper foil 16 is adhered to both sides of the composite 12 .
- the laminate is heated under pressure at or above the melting point of the solder to cause the solder to reflow, thereby to secure the electrical connections of the copper foils 16 on both sides (FIG. 12).
- Each of the copper foils 16 is etched in a conventional manner to form a circuit layer 16 a (FIG. 6).
- the thermal expansion coefficient of the composite 17 is governed by the Ni—Fe alloy of the core and can therefore be adjusted by changing the Ni/Fe alloying ratio or the thickness of the core.
- FIG. 13 shows an example of the ML-PWB according to the invention, which comprises a plurality of double-sided PWBs 18 each having an insulating polyimide resin layer 20 containing an Ni—Fe alloy foil 19 as a core and a circuit layer (wiring conductor) 21 made of a copper foil on each side thereof.
- three double-sided PWBs 18 are stacked to provide six circuit layers.
- Each double-sided PWB 18 has via-holes 18 a filled with a solder conductor 22 having a metal powder 23 dispersed therein, through which the circuit layers 21 on both sides are electrically connected.
- Numeral 24 represents a polyimide adhesive with which adjacent two double-sided PWBs 18 are adhered to each other.
- Numeral 25 is a solder conductor with which the circuit layers 21 of adjacent two double-sided PWBs 18 are electrically connected.
- the ML-PWB of FIG. 13 can be prepared, for example, as follows. Three double-sided PWBs 18 each having a polyimide resin insulating layer 20 and a circuit layer 21 made of a copper foil on each side thereof (shown in FIG. 13) and two adhesive sheets 26 (shown in FIG. 14) made of a polyimide adhesive are prepared. As shown in FIG. 15, the adhesive sheet 26 is stuck to the upper side of two out of three double-sided PWBs 18 in a right position with its openings 26 a mating with prescribed positions of the circuit layer 21 of the PWB 18 (for example, the opening 26 a shown in FIG. 15 is positioned where the solder conductor 22 has been formed).
- a solder paste is applied to the openings 26 a of each adhesive sheet 26 by screen printing and heat-melted to form solder bumps 27 on the circuit layer 21 .
- the two double-sided PWBs 18 having solder bumps 27 and another double-sided PWB 18 are superposed on each other at right positions, and the resulting laminate is heated under pressure to give a six-layered PWB having three double-sided PWBs 18 united into one body shown in FIG. 13, in which the adhesive sheets 24 correspond to the adhesive sheets 26 , and the solder conductors 25 correspond to the solder bumps 27 .
- the via-holes 18 a of the insulating layer 20 have a high aspect ratio because of the Ni—Fe alloy foil 19 as a core, plastic deformation of the via-holes 18 a can be suppressed by the presence of the metal powder 23 in the solder conductor 22 thereby to maintain high connection reliability. While the solder conductors 25 which electrically connect every adjacent double-sided PWBs 18 do not contain metal powder, they are free from the problem of plastic deformation because the via-holes 26 a have a small aspect ratio.
- the solder conductors 25 can be disposed at arbitrary positions without being restricted by the positions of the via-holes 18 a filled with the solder conductor 22 having the metal powder 23 dispersed therein. As a result, the freedom of wiring design is broad, enabling high-density wiring.
- Uniting the three double-sided PWBs 18 into one body and electrically connecting the six circuit layers can be carried out simultaneously in a single operation of heating under pressure.
- One Ni—Fe alloy layer per two circuit layers makes it possible to reduce the thermal expansion coefficient of the six-layered PWB as a whole even where the circuits 21 are made of copper.
- a 100 ⁇ m thick polyimide adhesive sheet 30 was punched at predetermined positions to make through-holes 30 a having a diameter of 100 ⁇ m (FIG. 18).
- a paste prepared by mixing 30% of an Ni powder 31 (average particle size: 10 ⁇ m) and 70% of an Sn/Pb solder powder (average particle size: 10 ⁇ m) and kneading the mixture with the same volume of an alcohol solvent was screen printed on the through-holes 30 a via a metal mask (thickness: 100 ⁇ m; diameter of openings: 100 ⁇ m). After the solvent was evaporated, the printed powder was pressed into the through-holes 30 a by pressing at 30° C. and 10 MPa for 5 minutes.
- the excess powder on the surface was removed by buffing.
- the sheet was heated up to 200° C. under pressure to melt the solder powder to form via-holes filled with a solder conductor 32 having the Ni powder 31 dispersed therein (FIG. 19).
- a 18 ⁇ m thick copper foil 33 was press bonded to each side of the adhesive sheet 30 at 175° C. and 5 MPa for 60 minutes, followed by solder reflow at 200° C. and 5 Ma for 5 minutes (FIG. 20).
- the copper foil 33 on each side was etched in a conventional manner to produce a double-sided PWB 34 having a circuit 33 a on each side thereof (FIG. 21).
- a low-expansion double-sided PWB 39 having via-holes filled with a solder conductor 38 having a metal powder 37 dispersed therein (FIG. 24) was produced by using the resulting foil-cored insulating layer in the same manner as in Example 1.
- numeral 40 is a circuit.
- a paste prepared by mixing 30% of an Ni powder (average particle size: 10 ⁇ m) and 70% of an Sn/Sb solder powder (average particle size: 10 ⁇ m; available from Nihon Genma K.K.) and kneading the mixture with the same volume of an alcohol solvent was screen printed on the through-holes 36 a via a metal mask (thickness: 50 ⁇ m; diameter of openings: 100 ⁇ m). After the solvent was evaporated, the printed powder was pressed into the through-holes 36 a by pressing at 30° C. and 10 MPa for 5 minutes. The excess powder on the surface was removed by buffing. The sheet was heated up to 250° C.
- a 18 ⁇ m thick copper foil was press bonded to each side of the adhesive sheet at 200° C. and 5 MPa for 60 minutes, followed by solder reflow at 250° C. and 5 Ma for 5 minutes.
- the copper foil on each side was etched in a conventional manner to produce a low-expansion double-sided PWB 39 having a circuit 40 on each side thereof (FIG. 24).
- An polyimide adhesive sheet 41 (SPB-035A, available from Nippon Steel Chemical Co., Ltd.) having through-holes 41 a having a diameter of 100 ⁇ m punched (FIG. 25) was correctly positioned on the low-expansion double-sided PWB 39 obtained in Example 3 and press bonded at 175° C. and 2 MPa for 30 minutes (FIG. 26).
- the through-holes 41 a of the adhesive sheet 41 were filled with a solder paste (SQ10-11, available from Tamura Kakensha) by screen printing. The solder was made to reflow at 220° C., and the flux was washed away to provide a double-sided PWB 43 having solder bumps 42 (FIG. 27).
- a polyimide adhesive sheet 41 (SPB-035A, available from Nippon Steel Chemical Co., Ltd.) having through-holes 41 a having a diameter of 100 ⁇ m punched (see FIG. 25) was correctly positioned on the low-expansion double-sided PWB 39 obtained in Example 3 and press bonded at 175° C. and 20 MPa for 30 minutes (FIG. 26).
- the through-holes 41 a of the adhesive sheet 41 were filled with an Sn/Sb solder paste (available from Nippon Genma K.K.) by screen printing. The solder was made to reflow at 260° C., and the flux was washed away to provide a double-sided PWB 43 having solder bumps 42 (FIG. 27).
- the inner wall of the through-holes 49 a was plated with copper to a deposit thickness of 10 ⁇ m, and the copper foil 47 on each side was etched in a conventional manner to prepare a double-sided PWB 51 having a circuit 47 a on each side (FIG. 31).
- a double-sided PWB was prepared in the same manner as in Example 1, except for using a paste prepared by kneading an Sn/Pb solder powder (average particle size: 10 ⁇ m) with the same volume of an alcohol solvent in place of the paste containing the Ni powder.
- Through-holes 52 a having a diameter of 100 ⁇ m were punched in a 100 ⁇ m thick polyimide adhesive sheet 52 at predetermined positions (FIG. 32).
- a conductive paste consisting of 85% of spherical copper particles having an average particle size of 5 ⁇ m as a conductive filler, 12.5% of a thermosetting epoxy resin, and 2.5% of an acid anhydride curing agent was applied into the through-holes 52 a by screen-printing and cured by heating at 175° C. for 60 minutes to form conducting via-holes 53 (FIG. 33).
- a copper foil was adhered to each side of the adhesive sheet 52 in the same manner as in Example 1 and etched in a conventional manner to prepare a double-sided PWB.
- the double-sided PWB of Comparative Example 1 which has a conventional via-hole structure develops a connection failure on the 50th thermal shock cycle.
- the double-sided PWB of Comparative Example 2 in which the electrical connection between the upper and lower circuits is made by a solder conductor containing no metal powder, the solder-filled via-holes undergo deformation with the thermal shock cycles and develop a connection failure on the 100th cycle.
- the double-sided PWBs of Examples 1 to 3 show no deformation of the via-holes until the 1000th cycle, suppressing the resistivity change within ⁇ 10%. It is obvious that these double-sided PWBs having a solder conductor having an Ni powder dispersed therein exhibit high connection reliability between the two circuits.
- the ML-PWB of Examples 4 and 5 prepared by using three double-sided PWBs of Example 3 also have an extremely low thermal expansion coefficient (4 ppm/° C.) . Further, they exhibited extremely high connection reliability at the via-holes, keeping the resistivity change within ⁇ 10% even after 1000 thermal shock cycles when tested under the same conditions as described above. According to Examples 4 and 5, since any adjacent circuit layers can be electrically connected through fine via-holes at arbitrary positions, high freedom of wiring design is enjoyed, enabling high-density wiring. Therefore, the low-expansion ML-PWBs of Examples 4 and 5 are suitable for bare chip mount, promising high reliability in electrical connection.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
A double-sided circuit board of which a solder conductor is prevented from deformation in a cycling test so as to maintain high connection reliability, comprises an insulating layer 2 made of an organic high molecular weight resin and a circuit 3 provided on each side of the insulating layer 2, the circuits 3 on both sides being electrically connected through via-holes filled with a conductor 4 made of solder having a metal powder 6 dispersed therein.
Description
- This invention relates to a double-sided printed wiring board (i.e., double-sided circuit board, hereinafter sometimes abbreviated as double-sided PWB) of which the wiring conductors on both sides are electrically connected with solder having a metal powder dispersed therein, a multilayer printed wiring board (i.e., multilayer wiring board, hereinafter sometimes abbreviated as ML-PWB) comprising the same, and a process for producing the double-sided PWB.
- With the recent tendencies for electronic equipment to have a smaller size and higher performance, it has been demanded for semiconductor devices constituting electronic equipment and ML-PWBs for mounting the devices to have reduced size and thickness, higher performance and higher reliability. To meet these demands, pin insertion mount package is being displaced by surface mount package, and, in recent years, a surface mount technology called bare chip mount has been under study, in which non-packaged (bare) semiconductor elements are directly mounted on a PWB.
- Further, the increasing number of pins of semiconductor elements to be mounted has increased the necessity of stacking a plurality of PWBs. An ML-PWB can be produced by a build up method comprising alternately building up, on one or both sides of a substrate, insulating layers of a photosensitive resin and conductor layers formed by plating or deposition. The build up method is disadvantageous in that the production process is complicated and involves many steps, the yield is low, and much time is required.
- In bare chip mounting, on the other hand, because silicon chips having a thermal expansion coefficient of 3 to 4 ppm/° C. are directly mounted on a PWB having a thermal expansion coefficient of 10 to 20 ppm/° C. with an adhesive, stress develops due to the difference in thermal expansion to impair the reliability. The stress also causes cracks in the adhesive, which results in reduction of moisture resistance. In order to relax the stress, it has been practiced to use an adhesive having a reduced elastic modulus thereby to disperse the stress imposed. However, connection reliability achieved by such conventional techniques is still insufficient. It is indispensable for securing further improved reliability to diminish the thermal expansion coefficient of the PWB itself.
- Under these circumstances, the present inventors previously proposed (1) a low-expansion double-sided PWB which comprises an insulating layer of an organic high molecular weight resin having a metal core and a wiring conductor provided on each side of the insulating layer, the wiring conductor on both sides being electrically connected via through-holes and (2) a low-expansion ML-PWB which comprises a plurality of the double-sided PWBs integrally laminated with each other via an adhesive layer interposed between every adjacent PWBs, the adhesive layer having through-holes at prescribed positions in contact with the wiring conductors of the adjacent upper and lower double-sided PWBs, and the through-holes containing a conductor made of solder by which the wiring conductors of the upper and the lower double-sided PWBs are electrically connected (see Japanese patent application No. 9-260201).
- It has turned out that the above-mentioned double-sided PWB, which has the wiring conductors on both sides thereof electrically connected through via-holes, develops cracks at the corners in a cycling test, which will lead to an electrical connection failure. Further, where a plurality of the above-described double-sided PWBs are superposed on each other to obtain an ML-PWB, the adhesive layer connecting the upper and the lower PWBs is not allowed to have the solder conductors provided at the positions corresponding to the through-holes of the upper and the lower double-sided PWBs, which limits the freedom of wiring design.
- To solve these problems, the inventors proposed a low-expansion double-sided PWB having high reliability and high freedom of wiring design, in which the wiring conductors on both sides thereof are electrically connected through via-holes filled with a conductor made of solder (as of yet unpublished Japanese Patent Application No. 9-199690). According to this technique, however, where the insulating layer has a large thickness in relation to the diameter of the via-holes, i.e., where the via-holes have a high aspect ratio, the solder-filled via-holes tend to undergo permanent deformation due to the stress accumulated in a cycling test, which will lead to a failure to connect to the wiring conductors.
- An object of the present invention is to provide a double-sided PWB (double-sided circuit board) and an ML-PWB (multilayer wiring board) comprising the double-sided PWBs in which a conductor made of solder is prevented from deformation in a cycling test so that high connection reliability can be maintained.
- Another object of the present invention is to provide a process for producing the double-sided PWB.
- The present inventors have conducted extensive study seeking a double-sided PWB of which the conductor made of solder is prevented from deformation in a cycling test. As a result, they have found that the above objects are accomplished by the following invention.
- The invention provides, in its first aspect, a double-sided PWB comprising an insulating layer made of an organic high molecular weight resin having on each side thereof a wiring conductor, wherein the wiring conductors on both sides are electrically connected through via-holes filled with a conductor made of solder having a metal powder dispersed therein.
- The invention provides, in its second aspect, an ML-PWB which comprises a plurality of the double-sided PWBs integrally laminateded with each other via an adhesive layer interposed between every adjacent PWBs, the adhesive layer having through-holes at prescribed positions in contact with the wiring conductors of the adjacent upper and lower double-sided PWBs and the through-holes being filled with a conductor made of solder by which the wiring conductors of the upper and the lower double-sided PWBs are electrically connected.
- The invention provides, in its third aspect, a process for producing the double-sided PWB comprising the steps of:
- (1) providing at least one through-hole in an insulating layer comprising an organic high molecular weight resin;
- (2) pressing a mixture of a metal powder and a solder powder at a predetermined mixing ratio into the through-hole;
- (3) melting the solder powder in the insulating layer into which the metal powder and the solder powder are pressed in the through-hole, under pressure, to fill the through-hole with a conductor of solder having the metal powder dispersed therein; and
- (4) laminating both sides of the insulating layer from step (3) with copper foil and melting the conductor of solder.
- According to the invention, plastic deformation of the solder conductor is prevented by the hard metal powder dispersed in the soft solder thereby to secure sufficient strength while maintaining low connection resistance. Thus, deformation of the solder conductor in a cycling test can be suppressed, and high connection reliability can be retained.
- In a highly preferred embodiment of the invention, the insulating layer contains an Ni—Fe-based alloy foil as a core. According to this embodiment, the presence of one low-expansion Ni—Fe-based alloy layer (core) per two wiring conductor layers brings the thermal expansion coefficient of the double-sided PWB as a whole very close to that of silicon even where the wiring conductors are made of copper. The lowered thermal expansion coefficient of the double-sided PWB secures extremely high reliability even in bare chip mount. BRIEF DESCRIPTION OF THE DRAWINGS
- FIG. 1 is a schematic cross section showing an embodiment of the double-sided PWB according to the present invention.
- FIGS. 2 through 5 illustrate the process for producing the double-sided PWB of FIG. 1.
- FIG. 6 is a schematic cross section showing another embodiment of the double-sided PWB according to the present invention.
- FIGS. 7 through 12 illustrate a process for producing the double-sided PWB of FIG. 6.
- FIG. 13 is a schematic cross section of an embodiment of the ML-PWB according to the present invention.
- FIGS. 14 through 17 illustrate a process for producing the ML-PWB of FIG. 13.
- FIGS. 18 through 21 illustrate the process for producing the double-sided PWB of Example 1.
- FIGS. 22 through 24 illustrate the process for producing the low-expansion double-sided PWB of Example 2.
- FIGS.25 to 29 illustrate the process for producing the six-layered PWB of Example 3.
- FIG. 30 illustrates the process for producing the double-sided PWB of Comparative Example 1.
- FIG. 31 is a schematic cross section of the double-sided PWB of Comparative Example 1.
- FIG. 32 illustrates the process for producing the double-sided PWB of Comparative Example 3.
- FIG. 33 is a schematic cross section of the double-sided PWB of Comparative Example 3.
- FIG. 34 is a schematic illustration of a metal powder and a solder powder injected into a via-hole.
- FIGS. 35 and 36 each schematically illustrate the cross section of the via-hole of FIG. 34 after the solder powder is melted.
- The organic high molecular weight resin which can be used as an insulating layer preferably includes polyimide resins, epoxy resins, and mixtures thereof for their heat resistance and electrical characteristics. An adhesive sheet made of such an organic high molecular weight resin is conveniently used. The adhesive sheet preferably has a thickness of about 0.01 to 1.0 mm. An adhesive sheet with a smaller thickness than about 0.01 mm tends to have poor workability. With the thickness larger than about 1.0 mm, it may be difficult to completely fill the through-holes with the metal/solder mixed powder, resulting in reduced reliability.
- The means for making the through-holes in the insulating layer is appropriately chosen depending on the desired size of the holes. For example, drilling, punching, laser machining and the like can be adopted.
- The composition of solder powder, which becomes a solder conductor on melting, includes, but is not limited to, Sn—Pb alloys, Sn—Ag alloys, Sn—Ag—Cu alloys, Sn—Ag—Cu—Bi alloys, Sn—Ag—Bi alloys, Sn—Zn alloys, Sn—Cu alloys, Sn—Sb alloys, and Sn—Au alloys. An optimum solder composition for the desired heat resistance is chosen. The solder powder usually has a particle size of 50 μm or smaller, preferably 10 μm or smaller. The solder powder preferably has a melting point of 150 to 350° C.
- The metal powder, which is to be dispersed in a solder conductor, preferably includes powder of Ni, Au, Ag, Cu, Fe, Al, Cr, Pd or Co, and powder of alloys comprising at least one of these metals. The metal powder usually has a particle size of 50 μm or smaller, preferably 10 μm or smaller. The metal powder preferably has a melting point of 350° C. or higher.
- It is preferred that the melting point of the metal powder is higher by at least 5° C. than that of the solder powder.
- Via-holes filled with a solder conductor having a metal powder dispersed therein can be formed, for example, as follows. The metal powder, the solder powder and an organic solvent are mixed at a predetermined ratio into paste. The paste is applied in excess on the openings of through-holes by printing. After removing the organic solvent by drying, the mixture is injected (pressed) into the through-holes by pressing down. While the mixed powder is being injected, metal particles A and solder particles B rub against themselves as well as mutually (see FIG. 34), whereby the surface oxide film of these particles is destroyed. Then, excess powder is removed from the surface, and the insulating layer is heated under pressure at or above the melting point of the solder, whereby the solder powder melts to form a conductor having the metal powder dispersed therein. Thoroughly melting the solder generally results in formation of an alloy layer D made from the metal and the solder material on the surface of the metal particles A as schematically depicted in FIG. 35. The alloy layer D is formed by the solder material's diffusing and reacting. The alloy layer D serves as an affinity between the metal particles A and the solder conductor C to provide improved electrical and mechanical characteristics. The growth rate of the alloy layer D depends on the temperature and time. The alloy layer D gains in thickness with time until the whole metal particle becomes an alloy D as shown in FIG. 36, which is also included under the scope of the present invention.
- The metal powder is preferably used in an amount of 0.1 to 60% by weight based on the solder powder. In lower amounts, the effect in suppressing deformation of the via-holes in a cycling test is insubstantial. In higher amounts, the proportion of the solder material is insufficient for binding the metal particles, and the resulting conductor is so brittle as to develop cracks.
- The mixing ratio of the organic solvent is decided according to the dispersibility of the mixed powder in the resulting paste and is preferably 1 to 70% by volume based on the mixed powder. Alcohol solvents are suitable. The paste may be prepared by previously plating the metal powder with solder and mixing the plated metal powder with the organic solvent into paste.
- The adhesive sheet (insulating layer) having the via-holes is laminated with copper foil as a conductor layer on its both sides, and the laminate is heated under pressure at or above the melting point of the solder conductor to melt the solder conductor thereby to secure the electrical connections between the copper foil and the via-holes. The copper foil on each side is etched in a conventional manner according to a desired circuit pattern to produce the double-sided PWB of the present invention.
- The insulating layer can contain a metal foil or a ceramic material as a core so as to have a reduced thermal expansion coefficient. The metal which can be used as a core includes Fe, Ni, Cr, Al, Ti, Cu, Co, or an alloy thereof. In order for the metal foil or the ceramic material to serve to suppress expansion of the conductor layer and the insulating layer, their own thermal expansion coefficient should be sufficiently low. In the case of an Ni—Fe-based alloy foil, for instance, whose thermal expansion coefficient varies with the alloying ratio, a preferred Ni content ranges from 31 to 50% by weight, particularly from 31 to 45% by weight. Out of this range, the alloy tends to have a fairly higher thermal expansion coefficient than silicon chips. The metal foil has a thickness of 10 to 300 μm, preferably 10 to 200 μm, still preferably 10 to 100 μm. With a thickness smaller than 10 μm, the difference in thermal expansion between the double-sided PWB and silicon chips cannot be reduced sufficiently.
- The ML-PWB of the invention can be produced as follows. An adhesive sheet having through-holes is stuck to one or both sides of the double-sided PWB of the invention at right positions so that the through-holes may correspond to desired positions of the double-sided PWB. A solder paste is applied into the through-holes of the adhesive sheet by printing, followed by heat melting the paste to form solder bumps. A plurality of the double-sided PWBs having solder bumps are stacked on each other at right positions, and the laminate is press bonded under heat into an integral body. The through-holes of the adhesive sheet may be at positions of the circuit on the via-holes connecting the wiring conductors on both sides of the double-sided PWB.
- Serving as an insulating layer after stacking, the adhesive sheet used in the production of the ML-PWB preferably includes a sheet of polyimide resins, epoxy resins or mixtures thereof for their heat resistance and electrical characteristics. The thickness of the adhesive sheet is preferably about 0.01 to 1.0 mm. Too thin an adhesive sheet has poor workability. If the thickness is too large, it is difficult to completely fill the through-holes with the solder paste, resulting in reduced reliability.
- The through-holes can be made in the adhesive sheet by any known techniques selected from drilling, punching, laser machining, and the like according to the size of the openings. The adhesive sheet having through-holes can be adhered temporarily on one or both sides of the double-sided PWB by hot pressing. Alternatively, the through-holes may be made by laser machining after the adhesive sheet is temporarily stuck to one or both sides of the double-sided PWB. Lasers which can be used include a carbonic acid gas laser, an excimer laser, a YAG laser, etc.
- Commercially available solder paste can be used to form solder bumps. The size of solder bumps is 100 μm or smaller, preferably 50 μm or smaller, still preferably 10 μm or smaller. The solder composition is not particularly limited and can be selected in accordance with the heat resistance required of the wiring board. After stacking, the solder bumps are bought into contact with an opposite electrode to establish electrical connections. If desired, the laminate may be heated at or above the melting point of the solder either simultaneously with or after the press bonding to form metallic joints.
- The practice of the present invention will be described with reference to the accompanying drawings.
- FIG. 1 shows an embodiment of the present invention, in which
numeral 1 is a double-sided PWB composed of an insulatinglayer 2 made of a polyimide resin having formed on both sides thereof a circuit (wiring conductor) 3 made of a copper foil. Thecircuits 3 on both sides are electrically connected by a via-hole 5 a of the insulatinglayer 2 filled with a solder conductor having ametal powder 6 dispersed therein. - The double-
sided PWB 1 is produced, for example, as follows. As shown in FIG. 2, through-holes 5 a are made in a polyimideadhesive sheet 5, which becomes aninsulating layer 2, at predetermined positions (positions where via-holes filled with a solder conductor 4 are to be formed). As shown in FIG. 3, a mixture comprising ametal powder 6 and asolder powder 7 at a prescribed mixing ratio is pressed into the through-holes 5 a and melted to fill the through-holes 5 a with a solder conductor having themetal powder 6 dispersed therein (FIG. 4). Acopper foil 8 is adhered to both sides of theadhesive sheet 5, and the laminate is heated under pressure at or above the melting point of the solder powder to cause the solder to reflow, thereby securing the electrical connections of the copper foils on both sides (FIG. 5). Each of the copper foils is etched in a conventional manner to form a circuit layer 3 (FIG. 1). - According to this embodiment, the solder conductor4 is prevented from plastic deformation owing to the
metal powder 6 dispersed therein. The dispersedmetal powder 6 and the solder form an alloy layer, and the via-holes 5 a filled with the solder conductor 4 have low electrical resistance. Further, since the circuit layers 3 on both sides are electrically and mechanically connected to each other by the metal joints of the solder conductor 4, extremely high reliability is enjoyed. - A double-
sided PWB 9 shown in FIG. 6, in which an insulatinglayer 13 has ametal core 10, is produced, for example, as follows. As shown in FIG. 7, through-holes 10 a are made in an Ni—Fe alloy foil 10 at predetermined positions (i.e., positions where via-holes filled with a solder conductor 11 are to be formed). The foil having the through-holes 10 a is sandwiched in between a pair of polyimide adhesive sheets (which become an insulatinglayer 13 together) to prepare a composite 12 (FIG. 8). As shown in FIG. 9, through-holes 13 a are made in the composite 12 at the same positions as the through-holes 10 a of thealloy foil 10, the former being smaller than the latter. A mixture of ametal powder 14 and asolder powder 15 is pressed into the through-holes 13 a (FIG. 10), thesolder powder 15 is melted (FIG. 11), and acopper foil 16 is adhered to both sides of the composite 12. The laminate is heated under pressure at or above the melting point of the solder to cause the solder to reflow, thereby to secure the electrical connections of the copper foils 16 on both sides (FIG. 12). Each of the copper foils 16 is etched in a conventional manner to form acircuit layer 16 a (FIG. 6). - In the embodiment shown in FIGS.6 to 12, the thermal expansion coefficient of the composite 17 is governed by the Ni—Fe alloy of the core and can therefore be adjusted by changing the Ni/Fe alloying ratio or the thickness of the core.
- FIG. 13 shows an example of the ML-PWB according to the invention, which comprises a plurality of double-
sided PWBs 18 each having an insulatingpolyimide resin layer 20 containing an Ni—Fe alloy foil 19 as a core and a circuit layer (wiring conductor) 21 made of a copper foil on each side thereof. In this particular example, three double-sided PWBs 18 are stacked to provide six circuit layers. Each double-sided PWB 18 has via-holes 18 a filled with asolder conductor 22 having ametal powder 23 dispersed therein, through which the circuit layers 21 on both sides are electrically connected.Numeral 24 represents a polyimide adhesive with which adjacent two double-sided PWBs 18 are adhered to each other.Numeral 25 is a solder conductor with which the circuit layers 21 of adjacent two double-sided PWBs 18 are electrically connected. - The ML-PWB of FIG. 13 can be prepared, for example, as follows. Three double-
sided PWBs 18 each having a polyimideresin insulating layer 20 and acircuit layer 21 made of a copper foil on each side thereof (shown in FIG. 13) and two adhesive sheets 26 (shown in FIG. 14) made of a polyimide adhesive are prepared. As shown in FIG. 15, theadhesive sheet 26 is stuck to the upper side of two out of three double-sided PWBs 18 in a right position with itsopenings 26 a mating with prescribed positions of thecircuit layer 21 of the PWB 18 (for example, the opening 26 a shown in FIG. 15 is positioned where thesolder conductor 22 has been formed). A solder paste is applied to theopenings 26 a of eachadhesive sheet 26 by screen printing and heat-melted to form solder bumps 27 on thecircuit layer 21. As shown in FIG. 17, the two double-sided PWBs 18 having solder bumps 27 and another double-sided PWB 18 are superposed on each other at right positions, and the resulting laminate is heated under pressure to give a six-layered PWB having three double-sided PWBs 18 united into one body shown in FIG. 13, in which theadhesive sheets 24 correspond to theadhesive sheets 26, and thesolder conductors 25 correspond to the solder bumps 27. - In the embodiment shown in FIGS.13 to 17, although the via-
holes 18 a of the insulatinglayer 20 have a high aspect ratio because of the Ni—Fe alloy foil 19 as a core, plastic deformation of the via-holes 18 a can be suppressed by the presence of themetal powder 23 in thesolder conductor 22 thereby to maintain high connection reliability. While thesolder conductors 25 which electrically connect every adjacent double-sided PWBs 18 do not contain metal powder, they are free from the problem of plastic deformation because the via-holes 26 a have a small aspect ratio. - The
solder conductors 25 can be disposed at arbitrary positions without being restricted by the positions of the via-holes 18 a filled with thesolder conductor 22 having themetal powder 23 dispersed therein. As a result, the freedom of wiring design is broad, enabling high-density wiring. - Uniting the three double-
sided PWBs 18 into one body and electrically connecting the six circuit layers can be carried out simultaneously in a single operation of heating under pressure. One Ni—Fe alloy layer per two circuit layers makes it possible to reduce the thermal expansion coefficient of the six-layered PWB as a whole even where thecircuits 21 are made of copper. - The present invention will now be illustrated in greater detail with reference to Examples, but it should be understood that the invention is not deemed to be limited thereto. Unless otherwise noted, all the percents are by weight.
- A 100 μm thick polyimide
adhesive sheet 30 was punched at predetermined positions to make through-holes 30 a having a diameter of 100 μm (FIG. 18). A paste prepared by mixing 30% of an Ni powder 31 (average particle size: 10 μm) and 70% of an Sn/Pb solder powder (average particle size: 10 μm) and kneading the mixture with the same volume of an alcohol solvent was screen printed on the through-holes 30 a via a metal mask (thickness: 100 μm; diameter of openings: 100 μm). After the solvent was evaporated, the printed powder was pressed into the through-holes 30 a by pressing at 30° C. and 10 MPa for 5 minutes. The excess powder on the surface was removed by buffing. The sheet was heated up to 200° C. under pressure to melt the solder powder to form via-holes filled with asolder conductor 32 having theNi powder 31 dispersed therein (FIG. 19). A 18 μmthick copper foil 33 was press bonded to each side of theadhesive sheet 30 at 175° C. and 5 MPa for 60 minutes, followed by solder reflow at 200° C. and 5 Ma for 5 minutes (FIG. 20). Thecopper foil 33 on each side was etched in a conventional manner to produce a double-sided PWB 34 having a circuit 33 a on each side thereof (FIG. 21). - Holes having a diameter of 150 μm were punched through a 100 μm thick Ni—Fe alloy foil35 (Ni: 36%; Fe: 64%; thermal expansion coefficient: 1.5 ppm/° C.) at predetermined positions at a pitch of 300 μm. A 50 μm thick polyimide adhesive sheet 36 (available from Nippon Steel Chemical Co., Ltd.) was press bonded on each side of the foil at 200° C. and 5 MPa for 60 minuets (FIG. 22). Through-
holes 36 a having a diameter of 100 μm were punched at the same positions as theholes 35 a (FIG. 23). A low-expansion double-sided PWB 39 having via-holes filled with asolder conductor 38 having ametal powder 37 dispersed therein (FIG. 24) was produced by using the resulting foil-cored insulating layer in the same manner as in Example 1. In FIG. 24, numeral 40 is a circuit. - Holes having a diameter of 150 μm were punched through a 100 μm thick Ni—Fe alloy foil35 (Ni: 36%; Fe: 64%; thermal expansion coefficient: 1.5 ppm/° C.) at predetermined positions at a pitch of 300 μm. A 50 μm thick polyimide adhesive sheet 36 (available from Nippon Steel Chemical Co., Ltd.) was press bonded on each side of the foil at 200° C. and 4 MPa for 60 minuets (FIG. 22). Through-
holes 36 a having a diameter of 100 μm were punched at the same positions as theholes 35 a (FIG. 23). A paste prepared by mixing 30% of an Ni powder (average particle size: 10 μm) and 70% of an Sn/Sb solder powder (average particle size: 10 μm; available from Nihon Genma K.K.) and kneading the mixture with the same volume of an alcohol solvent was screen printed on the through-holes 36 a via a metal mask (thickness: 50 μm; diameter of openings: 100 μm). After the solvent was evaporated, the printed powder was pressed into the through-holes 36 a by pressing at 30° C. and 10 MPa for 5 minutes. The excess powder on the surface was removed by buffing. The sheet was heated up to 250° C. under pressure to melt the solder powder to form via-holes filled with asolder conductor 38 having theNi powder 37 dispersed therein (FIG. 24). A 18 μm thick copper foil was press bonded to each side of the adhesive sheet at 200° C. and 5 MPa for 60 minutes, followed by solder reflow at 250° C. and 5 Ma for 5 minutes. The copper foil on each side was etched in a conventional manner to produce a low-expansion double-sided PWB 39 having acircuit 40 on each side thereof (FIG. 24). - An polyimide adhesive sheet41 (SPB-035A, available from Nippon Steel Chemical Co., Ltd.) having through-
holes 41 a having a diameter of 100 μm punched (FIG. 25) was correctly positioned on the low-expansion double-sided PWB 39 obtained in Example 3 and press bonded at 175° C. and 2 MPa for 30 minutes (FIG. 26). The through-holes 41 a of theadhesive sheet 41 were filled with a solder paste (SQ10-11, available from Tamura Kakensha) by screen printing. The solder was made to reflow at 220° C., and the flux was washed away to provide a double-sided PWB 43 having solder bumps 42 (FIG. 27). In the same manner another double-sided PWB 44 having solder bumps 42 was prepared. The two double-sided PWBs sided PWB 45 prepared in the same manner as in Example 3 were superposed in this order at right positions (FIG. 28), and the laminate was press bonded at 175° C. and 5 MPa for 60 minutes to obtain an integral six-layered PWB 46 (FIG. 29), in whichnumeral 47 indicates a solder conductor. - A polyimide adhesive sheet41 (SPB-035A, available from Nippon Steel Chemical Co., Ltd.) having through-
holes 41 a having a diameter of 100 μm punched (see FIG. 25) was correctly positioned on the low-expansion double-sided PWB 39 obtained in Example 3 and press bonded at 175° C. and 20 MPa for 30 minutes (FIG. 26). The through-holes 41 a of theadhesive sheet 41 were filled with an Sn/Sb solder paste (available from Nippon Genma K.K.) by screen printing. The solder was made to reflow at 260° C., and the flux was washed away to provide a double-sided PWB 43 having solder bumps 42 (FIG. 27). In the same manner another double-sided PWB 44 having solder bumps 42 was prepared. The two double-sided PWBs sided PWB 45 prepared in the same manner as in Example 3 were superposed in this order at right positions (FIG. 28), and the laminate was press bonded into an integral body at 200° C. and 5 MPa for 30 minutes, followed by solder reflow under pressure at 250° C. for 5 minutes to obtain an integral six-layered PWB 46 (FIG. 29), in whichnumeral 47 indicates a solder conductor. - A double-sided copper clad
laminate 49 having a total thickness of 50 μm composed of apolyimide resin layer 48 and copper foils 47 each having a thickness of 18 μm (NEOFLEX-231R, available from Mitsui Toatsu Chemicals, Inc.) was punched to make through-holes 49 a having a diameter of 100 μm at predetermined positions at a pitch of 300 μm (FIG. 30). The inner wall of the through-holes 49 a was plated with copper to a deposit thickness of 10 μm, and thecopper foil 47 on each side was etched in a conventional manner to prepare a double-sided PWB 51 having a circuit 47 a on each side (FIG. 31). - A double-sided PWB was prepared in the same manner as in Example 1, except for using a paste prepared by kneading an Sn/Pb solder powder (average particle size: 10 μm) with the same volume of an alcohol solvent in place of the paste containing the Ni powder.
- Through-holes52 a having a diameter of 100 μm were punched in a 100 μm thick polyimide
adhesive sheet 52 at predetermined positions (FIG. 32). A conductive paste consisting of 85% of spherical copper particles having an average particle size of 5 μm as a conductive filler, 12.5% of a thermosetting epoxy resin, and 2.5% of an acid anhydride curing agent was applied into the through-holes 52 a by screen-printing and cured by heating at 175° C. for 60 minutes to form conducting via-holes 53 (FIG. 33). A copper foil was adhered to each side of theadhesive sheet 52 in the same manner as in Example 1 and etched in a conventional manner to prepare a double-sided PWB. - Reliability of electrical connection through the via-holes of the double-sided PWBs obtained in Examples 1 to 3 and Comparative Examples 1 to 3 was evaluated in a thermal shock test (in liquid; −55° C.×5 mins <→125° C.×5 minutes). Table 1 below shows the number of cycles at which a connection failure occurred. A change in resistivity exceeding ±10% was regarded as a connection failure.
TABLE 1 Thermal Shock Test (cycle) Example 1 1000 Example 2 1000 Example 3 1000 Compara. Example 1 50 Compara. Example 2 100 Compara. Example 3 100 - The double-sided PWB of Comparative Example 1 which has a conventional via-hole structure develops a connection failure on the 50th thermal shock cycle. In the double-sided PWB of Comparative Example 2 in which the electrical connection between the upper and lower circuits is made by a solder conductor containing no metal powder, the solder-filled via-holes undergo deformation with the thermal shock cycles and develop a connection failure on the 100th cycle.
- To the contrary, the double-sided PWBs of Examples 1 to 3 show no deformation of the via-holes until the 1000th cycle, suppressing the resistivity change within ±10%. It is obvious that these double-sided PWBs having a solder conductor having an Ni powder dispersed therein exhibit high connection reliability between the two circuits.
- The thermal expansion coefficient of the (multilayer) double-sided PWBs of Examples 2 to 5 having an Ni—Fe alloy foil as a low-expansion core in the insulating layer per two wiring conductor layers and the double-sided PWBs of Comparative Examples 1 to 3 and Example 1 having no metal foil was measured in a temperature range of from room temperature (25° C.) to 200° C. The results are shown in Table 2 below.
TABLE 2 Thermal Expansion Coefficient (ppm/° C.) Example 1 17.0 Example 2 4.0 Example 3 4.0 Example 4 4.0 Example 5 4.0 Compara. Example 1 17.0 Compara. Example 2 17.0 Compara. Example 3 17.0 - It is seen from Table 2 that the double-sided PWBs having an Ni—Fe alloy foil as a core (Examples 2 and 3) have an extremely decreased thermal expansion coefficient.
- The ML-PWB of Examples 4 and 5 prepared by using three double-sided PWBs of Example 3 also have an extremely low thermal expansion coefficient (4 ppm/° C.) . Further, they exhibited extremely high connection reliability at the via-holes, keeping the resistivity change within ±10% even after 1000 thermal shock cycles when tested under the same conditions as described above. According to Examples 4 and 5, since any adjacent circuit layers can be electrically connected through fine via-holes at arbitrary positions, high freedom of wiring design is enjoyed, enabling high-density wiring. Therefore, the low-expansion ML-PWBs of Examples 4 and 5 are suitable for bare chip mount, promising high reliability in electrical connection.
- While the invention has been described in detail and with reference to specific examples thereof, it will be apparent to one skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope thereof.
- The entire disclosure of each and every foreign patent application from which the benefit of foreign priority has been claimed in the present application is incorporated herein by reference, as if fully set forth.
Claims (11)
1. A double-sided circuit board comprising:
an insulating layer comprising an organic high molecular weight resin; and
wiring conductors provided on both sides of the insulating layer,
wherein the wiring conductors are electrically connected through a via-hole, and the via-hole is filled with a conductor made of solder having a metal powder dispersed therein.
2. The double-sided circuit board according to , wherein the metal powder has a melting point of 350° C. or higher.
claim 1
3. The double-sided circuit board according to , wherein the metal powder is powder of Ni, Au, Ag, Cu, Fe, Al, Cr, Pd or Co, or an alloy comprising at least one of these metals.
claim 1
4. The double-sided circuit board according to , wherein the solder comprises at least one of Sn, Pb, Sb, Ag, Cu, Bi and Zn, and has a melting point of 150 to 350° C.
claim 1
5. A double-sided circuit board according to , wherein an alloy layer with the solder is formed at the surface of the metal powder.
claim 1
6. The double-sided circuit board according to , wherein the metal powder is present in an amount of 0.1 to 60% by weight based on the solder.
claim 1
7. The double-sided circuit board according to , wherein the insulating layer further comprises a metal foil as a core.
claim 1
8. The double-sided circuit board according to , wherein the metal foil is an Ni—Fe-based alloy having an Ni content of 31 to 50% by weight and has a thickness of 10 to 100 μm.
claim 7
9. The double-sided circuit board according to , wherein the metal foil is Fe, Ni, Cr, Al, Ti, Cu or Co, or an alloy comprising at least two of them.
claim 7
10. A multilayer wiring board, which comprises a plurality of double-sided circuit boards according to which are integrally laminated via an adhesive layer interposed between every adjacent circuit boards, wherein the adhesive layer has at least one through-hole at a predetermined position in contact with the wiring conductors of the adjacent two double-sided circuit boards, and the through-hole is filled with a conductor made of solder by which the wiring conductors of the adjacent double-sided circuit boards are electrically connected.
claim 1
11. A process for producing a double-sided circuit board according to , which comprises the steps of:
claim 1
(1) providing at least one through-hole in an insulating layer comprising an organic high molecular weight resin;
(2) pressing a mixture of a metal powder and a solder powder at a predetermined mixing ratio into the through-hole;
(3) melting the solder powder in the insulating layer into which the metal powder and the solder powder are pressed in the through-hole, under pressure, to fill the through-hole with a conductor of solder having the metal powder dispersed therein; and
(4) laminating both sides of the insulating layer from step (3) with copper foil and melting the conductor of solder.
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JPP.HEI.11-354963 | 1999-12-14 | ||
JP11-354963 | 1999-12-14 | ||
JP35496399 | 1999-12-14 | ||
JP2000146796A JP2001237512A (en) | 1999-12-14 | 2000-05-18 | Double-sided circuit board, maltilayer interconnection board using it, and manufacturing method of double-sided circuit board |
JPP12-146796 | 2000-05-18 |
Publications (2)
Publication Number | Publication Date |
---|---|
US20010004944A1 true US20010004944A1 (en) | 2001-06-28 |
US6373000B2 US6373000B2 (en) | 2002-04-16 |
Family
ID=26580184
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/735,893 Expired - Fee Related US6373000B2 (en) | 1999-12-14 | 2000-12-14 | Double-sided circuit board and multilayer wiring board comprising the same and process for producing double-sided circuit board |
Country Status (4)
Country | Link |
---|---|
US (1) | US6373000B2 (en) |
EP (1) | EP1109430A3 (en) |
JP (1) | JP2001237512A (en) |
TW (1) | TW522772B (en) |
Cited By (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030102151A1 (en) * | 1998-09-17 | 2003-06-05 | Naohiro Hirose | Multilayer build-up wiring board |
US20050011677A1 (en) * | 2003-07-16 | 2005-01-20 | Matsushita Electric Industrial Co., Ltd. | Multi-layer flexible printed circuit board, and method for fabricating it |
US20070012751A1 (en) * | 2005-07-13 | 2007-01-18 | Waldvogel John M | Electrical circuit apparatus and method for assembling same |
US20070207605A1 (en) * | 2006-03-06 | 2007-09-06 | Shiu Hei M | Method for forming reinforced interconnects on a substrate |
US20070232059A1 (en) * | 2006-03-28 | 2007-10-04 | Fujitsu Limited | Multilayer interconnection substrate and method of manufacturing the same |
US20080197501A1 (en) * | 2007-02-19 | 2008-08-21 | Fujitsu Limited | Interconnection substrate and semiconductor device, manufacturing method of interconnection substrate |
CN102427664A (en) * | 2011-09-16 | 2012-04-25 | 珠海市超赢电子科技有限公司 | Manufacturing method for combining soft board and hard board of circuit board |
US20140182891A1 (en) * | 2012-12-28 | 2014-07-03 | Madhumitha Rengarajan | Geometrics for improving performance of connector footprints |
US20160381794A1 (en) * | 2015-06-29 | 2016-12-29 | Samsung Electro-Mechanics Co., Ltd. | Multilayered substrate and method of manufacturing the same |
US20180354227A1 (en) * | 2017-06-13 | 2018-12-13 | Samsung Display Co., Ltd. | Window for display device and display device including the same |
US20190067240A1 (en) * | 2017-08-23 | 2019-02-28 | Boe Technology Group Co., Ltd | Flexible display panel and preparation method thereof, flexible display device |
US10455708B2 (en) | 2015-06-29 | 2019-10-22 | Samsung Electro-Mechanics Co., Ltd. | Multilayered substrate and method for manufacturing the same |
CN111432576A (en) * | 2019-01-10 | 2020-07-17 | 铜陵睿变电路科技有限公司 | Double-sided circuit board lamp strip with two-sided circuits conducted in two modes and manufacturing method thereof |
US11412622B2 (en) * | 2019-03-12 | 2022-08-09 | At&S Austria Technologie & Systemtechnik Aktiengesellschaft | Component carrier and method of manufacturing the same |
US20230008736A1 (en) * | 2019-12-17 | 2023-01-12 | Nitto Denko Corporation | Manufacturing method for double-sided wiring circuit board and double- sided wiring circuit board |
Families Citing this family (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6871396B2 (en) | 2000-02-09 | 2005-03-29 | Matsushita Electric Industrial Co., Ltd. | Transfer material for wiring substrate |
JP2002290030A (en) * | 2001-03-23 | 2002-10-04 | Ngk Spark Plug Co Ltd | Wiring board |
JP3702860B2 (en) * | 2001-04-16 | 2005-10-05 | セイコーエプソン株式会社 | Electro-optical device, manufacturing method thereof, and electronic apparatus |
JP3461172B2 (en) | 2001-07-05 | 2003-10-27 | 日東電工株式会社 | Method for manufacturing multilayer wiring circuit board |
JP2003023248A (en) | 2001-07-05 | 2003-01-24 | Nitto Denko Corp | Multilayered flexible wiring circuit board and its manufacturing method |
JP3597810B2 (en) * | 2001-10-10 | 2004-12-08 | 富士通株式会社 | Solder paste and connection structure |
JP2003163458A (en) * | 2001-11-29 | 2003-06-06 | Fujitsu Ltd | Multilayer wiring board and its manufacturing method |
JP2003298232A (en) * | 2002-04-02 | 2003-10-17 | Sony Corp | Multilayer wiring board and method of manufacturing the same |
JP2003332752A (en) * | 2002-05-14 | 2003-11-21 | Shinko Electric Ind Co Ltd | Metal core substrate and its manufacturing method |
JP3822549B2 (en) * | 2002-09-26 | 2006-09-20 | 富士通株式会社 | Wiring board |
JP2004158212A (en) * | 2002-11-01 | 2004-06-03 | Sekisui Chem Co Ltd | Conductive particulate for mounting |
AU2003214001B2 (en) * | 2003-01-17 | 2007-08-02 | Microtec Gesellschaft Fur Mikrotechnologie Mbh | Method for producing microsystems |
JP4143609B2 (en) * | 2003-05-23 | 2008-09-03 | 富士通株式会社 | Wiring board manufacturing method |
WO2005069866A2 (en) * | 2004-01-15 | 2005-08-04 | Decopac, Inc. | Printing on comestible produtcs |
JP4634735B2 (en) * | 2004-04-20 | 2011-02-16 | 大日本印刷株式会社 | Manufacturing method of multilayer wiring board |
KR20070015210A (en) * | 2004-05-15 | 2007-02-01 | 씨-코어 테크놀로지즈, 인코포레이티드 | Printed wiring board with conductive constraining core including resin filled channels |
WO2006026566A1 (en) * | 2004-08-27 | 2006-03-09 | Vasoya Kalu K | Printed wiring boards possessing regions with different coefficients of thermal expansion |
JP5491026B2 (en) * | 2005-03-15 | 2014-05-14 | スタブルコー テクノロジー,インコーポレイティド | Manufacturing method for constructing reinforcing core material in printed wiring board |
FR2885480A1 (en) * | 2005-05-04 | 2006-11-10 | Bree Beauce Realisations Et Et | DOUBLE-SIDED PRINTED CIRCUIT WITH THERMAL DISSIPATION |
USRE45637E1 (en) | 2005-08-29 | 2015-07-28 | Stablcor Technology, Inc. | Processes for manufacturing printed wiring boards |
US7730613B2 (en) * | 2005-08-29 | 2010-06-08 | Stablcor, Inc. | Processes for manufacturing printed wiring boards |
JP4920231B2 (en) * | 2005-10-05 | 2012-04-18 | 株式会社フジクラ | WIRING BOARD AND ITS MANUFACTURING METHOD, AND ELECTRONIC COMPONENT PACKAGE AND ITS MANUFACTURING METHOD |
DE102006018731B4 (en) * | 2006-04-20 | 2009-07-23 | Michael Schmid | Method for the production of printed circuit boards with plated-through holes and device for carrying out the method |
JP2009544153A (en) | 2006-07-14 | 2009-12-10 | ステイブルコール,インコーポレイティド | Build-up printed wiring board substrate having a core layer that is part of the circuit |
US7655292B2 (en) * | 2007-04-11 | 2010-02-02 | Kaylu Industrial Corporation | Electrically conductive substrate with high heat conductivity |
US7886437B2 (en) * | 2007-05-25 | 2011-02-15 | Electro Scientific Industries, Inc. | Process for forming an isolated electrically conductive contact through a metal package |
KR20080111316A (en) * | 2007-06-18 | 2008-12-23 | 삼성전기주식회사 | Radiant heat substrate having metal core and method for manufacturing the same |
US7997540B2 (en) * | 2007-09-06 | 2011-08-16 | Universal City Studios Llc | Fast track switch |
CN101426331A (en) * | 2007-10-31 | 2009-05-06 | 富葵精密组件(深圳)有限公司 | Multi-layer circuit board |
DE112009003811B4 (en) * | 2008-12-25 | 2017-04-06 | Mitsubishi Electric Corporation | Method for producing a printed circuit board |
US9930789B2 (en) | 2010-04-12 | 2018-03-27 | Seagate Technology Llc | Flexible printed circuit cable with multi-layer interconnection and method of forming the same |
WO2012077522A1 (en) * | 2010-12-10 | 2012-06-14 | 株式会社村田製作所 | Circuit module |
DE102011013172A1 (en) * | 2011-02-28 | 2012-08-30 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Paste for joining components of electronic power modules, system and method for applying the paste |
US9332632B2 (en) | 2014-08-20 | 2016-05-03 | Stablcor Technology, Inc. | Graphene-based thermal management cores and systems and methods for constructing printed wiring boards |
JP2016096297A (en) * | 2014-11-17 | 2016-05-26 | イビデン株式会社 | Metal block built-in wiring board and method of manufacturing the same |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4383363A (en) * | 1977-09-01 | 1983-05-17 | Sharp Kabushiki Kaisha | Method of making a through-hole connector |
US4290195A (en) * | 1978-09-01 | 1981-09-22 | Rippere Ralph E | Methods and articles for making electrical circuit connections employing composition material |
JPS57107501A (en) * | 1980-12-25 | 1982-07-05 | Sony Corp | Conduction material |
JPS61212096A (en) | 1985-03-18 | 1986-09-20 | 株式会社日立製作所 | Multilayer interconnection board |
JPS63301586A (en) * | 1987-01-12 | 1988-12-08 | Asahi Chem Ind Co Ltd | Through-hole circuit board and manufacture thereof |
JPS63309390A (en) * | 1987-01-12 | 1988-12-16 | Asahi Chem Ind Co Ltd | Soldering paste |
JPH0183331U (en) * | 1987-11-25 | 1989-06-02 | ||
JPH0415987A (en) * | 1990-05-10 | 1992-01-21 | Asahi Chem Ind Co Ltd | Through hole circuit board and manufacture thereof |
JP2739726B2 (en) * | 1990-09-27 | 1998-04-15 | インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン | Multilayer printed circuit board |
JPH05259600A (en) | 1992-03-11 | 1993-10-08 | Hitachi Chem Co Ltd | Wiring board and manufacture thereof |
JPH0697665A (en) | 1992-09-14 | 1994-04-08 | Toshiba Corp | Manufacture of multi-layer printed wiring board |
JPH06268381A (en) | 1993-03-11 | 1994-09-22 | Hitachi Ltd | Multilayer wiring structure and its manufacture |
US6159586A (en) * | 1997-09-25 | 2000-12-12 | Nitto Denko Corporation | Multilayer wiring substrate and method for producing the same |
JPH11163522A (en) * | 1997-09-25 | 1999-06-18 | Nitto Denko Corp | Multilayer wiring boar and its manufacture |
JPH11354684A (en) * | 1998-06-09 | 1999-12-24 | Nitto Denko Corp | Low heat expansion wiring board and multilayer wiring board |
-
2000
- 2000-05-18 JP JP2000146796A patent/JP2001237512A/en active Pending
- 2000-12-13 EP EP00127353A patent/EP1109430A3/en not_active Withdrawn
- 2000-12-14 US US09/735,893 patent/US6373000B2/en not_active Expired - Fee Related
- 2000-12-14 TW TW089126767A patent/TW522772B/en not_active IP Right Cessation
Cited By (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090173523A1 (en) * | 1998-09-17 | 2009-07-09 | Ibiden Co., Ltd | Multilayer build-up wiring board |
US20030102151A1 (en) * | 1998-09-17 | 2003-06-05 | Naohiro Hirose | Multilayer build-up wiring board |
US7847318B2 (en) | 1998-09-17 | 2010-12-07 | Ibiden Co., Ltd. | Multilayer build-up wiring board including a chip mount region |
US7514779B2 (en) * | 1998-09-17 | 2009-04-07 | Ibiden Co., Ltd. | Multilayer build-up wiring board |
US20050011677A1 (en) * | 2003-07-16 | 2005-01-20 | Matsushita Electric Industrial Co., Ltd. | Multi-layer flexible printed circuit board, and method for fabricating it |
US7367116B2 (en) * | 2003-07-16 | 2008-05-06 | Matsushita Electric Industrial Co., Ltd. | Multi-layer printed circuit board, and method for fabricating the same |
US20070012751A1 (en) * | 2005-07-13 | 2007-01-18 | Waldvogel John M | Electrical circuit apparatus and method for assembling same |
US7195145B2 (en) * | 2005-07-13 | 2007-03-27 | Motorola, Inc. | Electrical circuit apparatus and method for assembling same |
US20070119904A1 (en) * | 2005-07-13 | 2007-05-31 | Motorola, Inc. | Electrical circuit apparatus |
US20070207605A1 (en) * | 2006-03-06 | 2007-09-06 | Shiu Hei M | Method for forming reinforced interconnects on a substrate |
US7494924B2 (en) * | 2006-03-06 | 2009-02-24 | Freescale Semiconductor, Inc. | Method for forming reinforced interconnects on a substrate |
US8158503B2 (en) * | 2006-03-28 | 2012-04-17 | Fujitsu Limited | Multilayer interconnection substrate and method of manufacturing the same |
US20070232059A1 (en) * | 2006-03-28 | 2007-10-04 | Fujitsu Limited | Multilayer interconnection substrate and method of manufacturing the same |
US8080875B2 (en) * | 2007-02-19 | 2011-12-20 | Fujitsu Limited | Interconnection substrate and semiconductor device, manufacturing method of interconnection substrate |
US20080197501A1 (en) * | 2007-02-19 | 2008-08-21 | Fujitsu Limited | Interconnection substrate and semiconductor device, manufacturing method of interconnection substrate |
CN102427664A (en) * | 2011-09-16 | 2012-04-25 | 珠海市超赢电子科技有限公司 | Manufacturing method for combining soft board and hard board of circuit board |
US20140182891A1 (en) * | 2012-12-28 | 2014-07-03 | Madhumitha Rengarajan | Geometrics for improving performance of connector footprints |
US9545003B2 (en) * | 2012-12-28 | 2017-01-10 | Fci Americas Technology Llc | Connector footprints in printed circuit board (PCB) |
US10455708B2 (en) | 2015-06-29 | 2019-10-22 | Samsung Electro-Mechanics Co., Ltd. | Multilayered substrate and method for manufacturing the same |
US20160381794A1 (en) * | 2015-06-29 | 2016-12-29 | Samsung Electro-Mechanics Co., Ltd. | Multilayered substrate and method of manufacturing the same |
US9832866B2 (en) * | 2015-06-29 | 2017-11-28 | Samsung Electro-Mechanics Co., Ltd. | Multilayered substrate and method of manufacturing the same |
US20180354227A1 (en) * | 2017-06-13 | 2018-12-13 | Samsung Display Co., Ltd. | Window for display device and display device including the same |
US20190067240A1 (en) * | 2017-08-23 | 2019-02-28 | Boe Technology Group Co., Ltd | Flexible display panel and preparation method thereof, flexible display device |
US10622330B2 (en) * | 2017-08-23 | 2020-04-14 | Boe Technology Group Co., Ltd. | Flexible display panel and preparation method thereof, flexible display device |
CN111432576A (en) * | 2019-01-10 | 2020-07-17 | 铜陵睿变电路科技有限公司 | Double-sided circuit board lamp strip with two-sided circuits conducted in two modes and manufacturing method thereof |
US11412622B2 (en) * | 2019-03-12 | 2022-08-09 | At&S Austria Technologie & Systemtechnik Aktiengesellschaft | Component carrier and method of manufacturing the same |
US20230008736A1 (en) * | 2019-12-17 | 2023-01-12 | Nitto Denko Corporation | Manufacturing method for double-sided wiring circuit board and double- sided wiring circuit board |
US12114438B2 (en) * | 2019-12-17 | 2024-10-08 | Nitto Denko Corporation | Manufacturing method for double-sided wiring circuit board and double-sided wiring circuit board |
Also Published As
Publication number | Publication date |
---|---|
EP1109430A3 (en) | 2003-09-10 |
EP1109430A2 (en) | 2001-06-20 |
TW522772B (en) | 2003-03-01 |
US6373000B2 (en) | 2002-04-16 |
JP2001237512A (en) | 2001-08-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6373000B2 (en) | Double-sided circuit board and multilayer wiring board comprising the same and process for producing double-sided circuit board | |
JP4201436B2 (en) | Manufacturing method of multilayer wiring board | |
US7282787B2 (en) | Laminated multiple substrates | |
US6577490B2 (en) | Wiring board | |
KR940009175B1 (en) | Multi-printed wiring board | |
KR100517009B1 (en) | Multilayer Wiring Substrate and Manufacturing Method Thereof | |
US5442144A (en) | Multilayered circuit board | |
US7576288B2 (en) | Circuit board, multi-layer wiring boards, method of producing circuit boards and method of producing multilayer wiring boards | |
US20090241332A1 (en) | Circuitized substrate and method of making same | |
US20070169960A1 (en) | Multilayer stacked wiring board | |
JP3826731B2 (en) | Multilayer printed wiring board and method for manufacturing multilayer printed wiring board | |
EP0981268A1 (en) | Circuit board with an electronic component mounted thereon and multi-layer board | |
US6851599B2 (en) | Method for producing multilayer wiring circuit board | |
JP2002368043A (en) | Conductive paste, conductive bump using it, its forming method, method for connecting conductive bump, circuit board and its producing method | |
JP2010258019A (en) | Resin multilayered module, and method of manufacturing resin multilayered module | |
JPH11163522A (en) | Multilayer wiring boar and its manufacture | |
WO2004012489A1 (en) | Circuit substrate, multi-layer wiring plate, circuit substrate manufacturing method, and multi-layer wiring plate manufacturing method | |
WO1995013901A1 (en) | Metallurgically bonded polymer vias | |
JP2007173343A (en) | Multilayer board and electronic apparatus | |
JP2002076557A (en) | Circuit wiring board and multilayer circuit wiring board using the same as well as its manufacturing method | |
JP2001028481A (en) | Multi-layer wiring board and manufacture thereof | |
JP2005109188A (en) | Circuit board and multilayer board, and method for manufacturing circuit board and multilayer board | |
JP2003273517A (en) | Multilayer circuit board and method for manufacturing the same | |
JP2002151839A (en) | Manufacturing method of double-sided circuit board, and multilayer interconnection board | |
JP2003051676A (en) | Wiring board used for manufacturing multilayer wiring board, the multilayer wiring board, and method of manufacturing them |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: NITTO DENKO CORPORATION, JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:NAKAMURA, KEI;SUGIMOTO, MASAKAZU;INOUE, YASUSHI;AND OTHERS;REEL/FRAME:011401/0896 Effective date: 20001205 |
|
FPAY | Fee payment |
Year of fee payment: 4 |
|
REMI | Maintenance fee reminder mailed | ||
LAPS | Lapse for failure to pay maintenance fees | ||
STCH | Information on status: patent discontinuation |
Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362 |
|
FP | Lapsed due to failure to pay maintenance fee |
Effective date: 20100416 |