US20010000210A1 - Method of improving parallelism of a die to package using a modified lead frame - Google Patents
Method of improving parallelism of a die to package using a modified lead frame Download PDFInfo
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- US20010000210A1 US20010000210A1 US09/732,218 US73221800A US2001000210A1 US 20010000210 A1 US20010000210 A1 US 20010000210A1 US 73221800 A US73221800 A US 73221800A US 2001000210 A1 US2001000210 A1 US 2001000210A1
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- die
- lead frame
- cavity
- epoxy
- package
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3205—Shape
- H01L2224/32057—Shape in side view
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01039—Yttrium [Y]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01075—Rhenium [Re]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Definitions
- This invention relates to the manufacture of semiconductor devices, and more specifically to the process of assembling an integrated circuit into a package.
- Laser fuses have been used in the electronics industry to repair memory elements, configure logic circuits, and customize integrated circuits such as gate arrays by selectively removing desired fuses in the device. For example, a non-functional device can be repaired by removing desired fuses, e.g., ablation by laser, to isolate defective portions of the circuitry or to substitute functionally redundant circuitry for the defective portions. Fuses can also be used to mark the device for identification of characteristics in a manner that is readable visually or electrically, e.g., serialization of the integrated circuit or how the device has been configured by the laser. An integrated circuit can be customized or configured for specific uses by altering the structure, path or electrical characteristics of the device or elements through selective removal of the fuses. It should be noted that the word “fuse” can refer to an antifuse as well as a fuse.
- the fuses can be removed at various stages of the integrated circuit manufacturing process. By removing the fuses after the wafer has been sawed up into individual integrated circuits and assembled into packages, the lead time to deliver customized or configured integrated circuits, hereinafter referred to as die, can be reduced.
- a typical process for assembling a die into a package and configuring the die in the package includes the following basic steps:
- a major factor limiting the successful application of the laser and configuration of the die in this manner is the difficulty with aligning and focusing the laser if the die does not sit evenly on the lead frame.
- a die 10 typically has alignment and focusing marks or targets 1 - 4 on the die's upper surface, as shown in FIG. 1.
- a typical alignment and focusing sequence for die 10 would begin with a laser scanning targets 1 though 4 one at a time and making x-axis, y-axis, and rotational corrections. The laser then returns to target 1 and makes another series of scans through to target 4 to set the focus level for the entire die 10 .
- Alignment and focusing in this manner is adequate as long as the die is set evenly upon the lead frame so that the laser scanning plane is parallel with the surface of the die. In other words, as long as any non-orthogonality in the plane of the die, relative to the optics of the laser, does not cause the lasered or scanned portion of the die to fall outside of the laser spot's focus range, proper alignment and focusing can be achieved. However, when the die is not properly placed on the lead frame, the laser may be unable to perform an alignment or focus scan or to accurately ablate the fuses for proper circuit customization.
- FIG. 2 shows a die 10 , which has been placed and compressed on some die-attach epoxy 20 .
- Epoxy 20 has been deposited on a lead frame (not shown) within a cavity of a package 21 .
- Several factors can cause die 10 to sit at an angle relative to package 21 , including the presence of air bubbles 22 within epoxy 20 , an uneven distribution of epoxy 20 , or an uneven placement of die 10 on epoxy 20 . This will often result in a portion of die 10 falling out of the focus range of the laser, which can lead to improper configuration of the die.
- the present invention provides a structure and method for accurately adhering a die to a package by modifying the lead frame in the package to allow excess die-attach epoxy to distribute itself into at least one cavity in the lead frame and to reduce the surface area of the lead frame supporting the die. As a result, the amount of epoxy between the die and the lead frame is reduced for less variation in the angle of the die relative to the package, and the die is provided a more rigid and stable setting to minimize the adverse effects of non-uniform epoxy distribution.
- the lead frame contains an array of cavities formed in the lead frame, with the array slightly larger than the size of the die to be packaged.
- the excess epoxy can spread into the cavities.
- the cavities form a grid in the lead frame which permit the die to be well-supported, yet minimizes the surface contact area, which reduces both the chance of bubble formation and the amount of pressure required to seat the die uniformly on the lead frame. As a result, a more level positioning of the die relative to the lead frame and the package is possible.
- a cavity of generally circular or oval shape is formed partially or completely through the lead frame prior to die-attach epoxy deposition.
- One dimension of the cavity would be slightly smaller than the longer dimension of the die to be packaged.
- the die-attach epoxy is deposited in the cavity, and the die pressed onto the top of the epoxy and the lead frame. The excess epoxy is forced into unfilled areas of the cavity, and if necessary, through the gaps formed between the edge of die and cavity.
- the die is well-supported and in direct contact with the lead frame so that the die is positioned parallel with respect to the lead frame and thus the package.
- the die-attach epoxy anchors the die firmly in position without affecting the position of the die relative to the lead frame because excess epoxy is not forced between the upper surface of the lead frame and the die.
- the present invention permits a more consistent placement of the die in a package which results in better yield for applications where the die is laser-coded in the package.
- FIG. 1 is a top view of the upper surface of a die showing conventional alignment and focusing targets;
- FIG. 2 is a side view of a die mispositioned with respect to a package
- FIGS. 3A and 3B are top and side views, respectively, of a lead frame according to one embodiment of the present invention.
- FIGS. 4A and 4B are top and side views, respectively, of a lead frame according to another embodiment of the present invention.
- a structure and method are provided which allow a die to be accurately adhered to a package by creating at least one cavity in the lead frame contained in the package so that the amount of epoxy between the upper surface of the lead frame and the die is reduced, which provides a more rigid and stable setting for the die. Excess die-attach epoxy flows into the cavity or cavities to minimize the effects of non-uniform epoxy distribution along the contact surfaces of the die and epoxy. As a result, the die can be adhered to the package in a manner which allows improved parallelism between the package and die.
- FIG. 3A is a top view of a die 30 set on a lead frame 31 , where lead frame 31 is located within a package 32 and contains an array of rectangular cavities 33 .
- FIG. 3B is a side view of FIG. 3A along sectional line A-A′.
- the array of cavities 33 formed within lead frame 31 is preferably slightly larger than the size of the die 30 to be placed on the lead frame 31 , although not required.
- a larger array allows excess die-attach-epoxy 34 more areas into which to flow.
- a smaller array can also be used with a smaller amount of die-attach epoxy. For example, the epoxy would only be deposited over the array, and not over other areas of the lead frame.
- the cavities 33 are cut or formed prior to depositing die-attach epoxy 34 , such as at the time the lead frame is manufactured. After cavities 33 have been formed, die-attach epoxy 34 is deposited on lead frame 31 . Die 30 is then placed and pressed onto lead frame 31 by any suitable placement mechanism. Excess epoxy 34 spreads into cavities 33 underneath lead frame 31 to allow a more stable placement of die 30 as compared with conventional lead frames that only allow excess epoxy to spread toward the outer edges of the die. Lead frame 31 allows the excess epoxy to spread across less surface area of the die before the die is set, which reduces the likelihood of die mispositioning due to the effects of epoxy spreading.
- Forming the lead frame 31 with cavities 33 also forms a grid to support die 30 . Because die 30 is supported by a grid rather than by a solid planar surface, there is less surface area where the epoxy is forced between die 30 and lead frame 31 . Less epoxy between the supporting surface of the lead frame and the die reduces the effect the epoxy has on stability when the die is pressed against the epoxy. As a result, both the chance of bubble formation and the amount of pressure required to seat the die uniformly on the lead frame are reduced, thereby allowing a more level positioning of the die relative to the lead frame and the package.
- the size and number of cavities should be such that enough surface area exists on the lead frame to adequately secure the die, and the amount of epoxy used should be such that excess epoxy is not squeezed along the sides of the die and onto the face when the die is placed and secured on the lead frame.
- FIG. 4A is a top view of a die 30 set on a lead frame 41 , where lead frame 41 is located within a package 32 and contains a single oval or circular shaped cavity 43 .
- FIG. 4B is a side view of FIG. 4A along sectional line A-A′.
- Cavity 43 formed within lead frame 41 has one dimension slightly smaller than the longer dimension of the die 30 to be placed on the lead frame 41 so that die 30 rests on some portion of lead frame 41 .
- Cavity 43 is shown in FIG. 4B as fully extending through lead frame 41 . However, if desired, cavity 43 can extend only partially into lead frame 41 , as might be the case if too large a cavity would structurally weaken the lead frame.
- Cavity 43 is cut or formed prior to depositing die-attach epoxy 34 , such as at the time the lead frame is manufactured. After cavity 43 has been formed, die-attach epoxy 34 is deposited into cavity 43 within lead frame 41 . The amount of die-attach epoxy 34 deposited should be such that the epoxy protrudes above the plane of the lead frame. Die 30 is then placed on the top of epoxy 34 and pressed onto lead frame 41 by any suitable placement mechanism. Because the epoxy 34 extends above the plane of the lead frame, epoxy 34 contacts the back surface of the die, and excess epoxy 34 is forced into unfilled portions of cavity 43 underneath lead frame 41 . If epoxy 34 has spread and filled cavity 43 , additional excess epoxy 34 can spread out through openings 44 between the edge of die 30 and the edge of cavity 43 .
- die 30 can be pressed and set directly on lead frame 41 , without epoxy between die 30 and the upper surface of lead frame 41 , die 30 remains parallel with lead frame 41 , and thus package 32 . Furthermore, because the size of cavity 43 is slightly smaller than die 30 so that only a small portion of die 30 is in direct contact with lead frame 41 , a large amount of epoxy 43 is available to contact a large area of die 30 , thereby ensuring adequate adhesion. Consequently, dies can be packaged into lead frames with minimal or negligible positioning errors caused by the die-attach epoxy.
Abstract
A structure and method are provided to allow a die to be packaged more uniformly and in parallel with a package by utilizing a lead frame having at least one cavity within the lead frame, thereby allowing excess die-attach epoxy can flow into the cavity or cavities and reducing the amount of contact surface area between the die and lead frame.
Description
- 1. 1. Field of the Invention
- 2. This invention relates to the manufacture of semiconductor devices, and more specifically to the process of assembling an integrated circuit into a package.
- 3. 2. Related Art
- 4. Laser fuses have been used in the electronics industry to repair memory elements, configure logic circuits, and customize integrated circuits such as gate arrays by selectively removing desired fuses in the device. For example, a non-functional device can be repaired by removing desired fuses, e.g., ablation by laser, to isolate defective portions of the circuitry or to substitute functionally redundant circuitry for the defective portions. Fuses can also be used to mark the device for identification of characteristics in a manner that is readable visually or electrically, e.g., serialization of the integrated circuit or how the device has been configured by the laser. An integrated circuit can be customized or configured for specific uses by altering the structure, path or electrical characteristics of the device or elements through selective removal of the fuses. It should be noted that the word “fuse” can refer to an antifuse as well as a fuse.
- 5. The fuses can be removed at various stages of the integrated circuit manufacturing process. By removing the fuses after the wafer has been sawed up into individual integrated circuits and assembled into packages, the lead time to deliver customized or configured integrated circuits, hereinafter referred to as die, can be reduced. A typical process for assembling a die into a package and configuring the die in the package includes the following basic steps:
- 6. 1. deposit die-attach epoxy on a lead frame in the cavity of the package, where the cavity can be formed at the time the package is created or at a later time;
- 7. 2. place the die on the epoxy and compress the die and the package together to distribute the epoxy;
- 8. 3. bake the package and die to cure the epoxy;
- 9. 4. attach bond wires between bonding pads on the die and lead fingers on the package;
- 10. 5. configure the die with the use of a laser; and
- 11. 6. seal off the top of the package, either with a lid or by filling in the cavity with mold compound.
- 12. A major factor limiting the successful application of the laser and configuration of the die in this manner is the difficulty with aligning and focusing the laser if the die does not sit evenly on the lead frame. A die 10 typically has alignment and focusing marks or targets 1-4 on the die's upper surface, as shown in FIG. 1. A typical alignment and focusing sequence for die 10 would begin with a
laser scanning targets 1 though 4 one at a time and making x-axis, y-axis, and rotational corrections. The laser then returns to target 1 and makes another series of scans through to target 4 to set the focus level for theentire die 10. - 13. Alignment and focusing in this manner is adequate as long as the die is set evenly upon the lead frame so that the laser scanning plane is parallel with the surface of the die. In other words, as long as any non-orthogonality in the plane of the die, relative to the optics of the laser, does not cause the lasered or scanned portion of the die to fall outside of the laser spot's focus range, proper alignment and focusing can be achieved. However, when the die is not properly placed on the lead frame, the laser may be unable to perform an alignment or focus scan or to accurately ablate the fuses for proper circuit customization.
- 14.FIG. 2 shows a die 10, which has been placed and compressed on some die-
attach epoxy 20. Epoxy 20 has been deposited on a lead frame (not shown) within a cavity of apackage 21. Several factors can cause die 10 to sit at an angle relative topackage 21, including the presence ofair bubbles 22 withinepoxy 20, an uneven distribution ofepoxy 20, or an uneven placement of die 10 onepoxy 20. This will often result in a portion of die 10 falling out of the focus range of the laser, which can lead to improper configuration of the die. - 15. Although various leveling mechanisms are common in the industry and would be effective in re-leveling the die, these types of mechanisms are not commonly present in commercially-available lasers used for the repair and configuration of semiconductor devices. Therefore, using these mechanisms to re-level the die so that reliable configuration of the die in a package is possible would require costly and time-consuming modifications to the laser. Accordingly, it is desirable to have a method of accurately adhering-a die to a package so that re-leveling the die is unnecessary, which eliminates the additional expenses required to modify the laser for re-leveling.
- 16. The present invention provides a structure and method for accurately adhering a die to a package by modifying the lead frame in the package to allow excess die-attach epoxy to distribute itself into at least one cavity in the lead frame and to reduce the surface area of the lead frame supporting the die. As a result, the amount of epoxy between the die and the lead frame is reduced for less variation in the angle of the die relative to the package, and the die is provided a more rigid and stable setting to minimize the adverse effects of non-uniform epoxy distribution.
- 17. In one embodiment of the present invention, the lead frame contains an array of cavities formed in the lead frame, with the array slightly larger than the size of the die to be packaged. When the die is pressed onto the lead frame and die-attach epoxy, the excess epoxy can spread into the cavities. The cavities form a grid in the lead frame which permit the die to be well-supported, yet minimizes the surface contact area, which reduces both the chance of bubble formation and the amount of pressure required to seat the die uniformly on the lead frame. As a result, a more level positioning of the die relative to the lead frame and the package is possible.
- 18. In another embodiment of the present invention, a cavity of generally circular or oval shape is formed partially or completely through the lead frame prior to die-attach epoxy deposition. One dimension of the cavity would be slightly smaller than the longer dimension of the die to be packaged. The die-attach epoxy is deposited in the cavity, and the die pressed onto the top of the epoxy and the lead frame. The excess epoxy is forced into unfilled areas of the cavity, and if necessary, through the gaps formed between the edge of die and cavity. The die is well-supported and in direct contact with the lead frame so that the die is positioned parallel with respect to the lead frame and thus the package. The die-attach epoxy anchors the die firmly in position without affecting the position of the die relative to the lead frame because excess epoxy is not forced between the upper surface of the lead frame and the die.
- 19. The present invention permits a more consistent placement of the die in a package which results in better yield for applications where the die is laser-coded in the package.
- 20. The present invention will be more fully understood in light of the following detailed description taken together with the accompanying drawings.
- 21.FIG. 1 is a top view of the upper surface of a die showing conventional alignment and focusing targets;
- 22.FIG. 2 is a side view of a die mispositioned with respect to a package;
- 23.FIGS. 3A and 3B are top and side views, respectively, of a lead frame according to one embodiment of the present invention; and
- 24.FIGS. 4A and 4B are top and side views, respectively, of a lead frame according to another embodiment of the present invention.
- 25. Note that use of the same reference numbers in different figures indicates the same or like elements.
- 26. According to the present invention, a structure and method are provided which allow a die to be accurately adhered to a package by creating at least one cavity in the lead frame contained in the package so that the amount of epoxy between the upper surface of the lead frame and the die is reduced, which provides a more rigid and stable setting for the die. Excess die-attach epoxy flows into the cavity or cavities to minimize the effects of non-uniform epoxy distribution along the contact surfaces of the die and epoxy. As a result, the die can be adhered to the package in a manner which allows improved parallelism between the package and die.
- 27.FIGS. 3A and 3B show one embodiment of the present invention, where FIG. 3A is a top view of a die 30 set on a
lead frame 31, wherelead frame 31 is located within apackage 32 and contains an array ofrectangular cavities 33. FIG. 3B is a side view of FIG. 3A along sectional line A-A′. Although shown asrectangular cavities 33, other suitably shaped cavities, such as circular, can also be used with this embodiment. The array ofcavities 33 formed withinlead frame 31 is preferably slightly larger than the size of the die 30 to be placed on thelead frame 31, although not required. A larger array allows excess die-attach-epoxy 34 more areas into which to flow. However, a smaller array can also be used with a smaller amount of die-attach epoxy. For example, the epoxy would only be deposited over the array, and not over other areas of the lead frame. - 28. The
cavities 33 are cut or formed prior to depositing die-attachepoxy 34, such as at the time the lead frame is manufactured. Aftercavities 33 have been formed, die-attachepoxy 34 is deposited onlead frame 31.Die 30 is then placed and pressed ontolead frame 31 by any suitable placement mechanism.Excess epoxy 34 spreads intocavities 33 underneathlead frame 31 to allow a more stable placement ofdie 30 as compared with conventional lead frames that only allow excess epoxy to spread toward the outer edges of the die.Lead frame 31 allows the excess epoxy to spread across less surface area of the die before the die is set, which reduces the likelihood of die mispositioning due to the effects of epoxy spreading. - 29. Forming the
lead frame 31 withcavities 33 also forms a grid to supportdie 30. Because die 30 is supported by a grid rather than by a solid planar surface, there is less surface area where the epoxy is forced between die 30 andlead frame 31. Less epoxy between the supporting surface of the lead frame and the die reduces the effect the epoxy has on stability when the die is pressed against the epoxy. As a result, both the chance of bubble formation and the amount of pressure required to seat the die uniformly on the lead frame are reduced, thereby allowing a more level positioning of the die relative to the lead frame and the package. It should be noted that the size and number of cavities should be such that enough surface area exists on the lead frame to adequately secure the die, and the amount of epoxy used should be such that excess epoxy is not squeezed along the sides of the die and onto the face when the die is placed and secured on the lead frame. - 30.FIGS. 4A and 4B show another embodiment of the present invention, where FIG. 4A is a top view of a die 30 set on a
lead frame 41, wherelead frame 41 is located within apackage 32 and contains a single oval or circular shapedcavity 43. FIG. 4B is a side view of FIG. 4A along sectional line A-A′. Although shown as a general oval or circular shapedcavity 43, other suitably shaped cavities, such as rectangular, can also be used with this embodiment.Cavity 43 formed withinlead frame 41 has one dimension slightly smaller than the longer dimension of the die 30 to be placed on thelead frame 41 so that die 30 rests on some portion oflead frame 41.Cavity 43 is shown in FIG. 4B as fully extending throughlead frame 41. However, if desired,cavity 43 can extend only partially intolead frame 41, as might be the case if too large a cavity would structurally weaken the lead frame. - 31.
Cavity 43 is cut or formed prior to depositing die-attachepoxy 34, such as at the time the lead frame is manufactured. Aftercavity 43 has been formed, die-attachepoxy 34 is deposited intocavity 43 withinlead frame 41. The amount of die-attachepoxy 34 deposited should be such that the epoxy protrudes above the plane of the lead frame.Die 30 is then placed on the top ofepoxy 34 and pressed ontolead frame 41 by any suitable placement mechanism. Because the epoxy 34 extends above the plane of the lead frame, epoxy 34 contacts the back surface of the die, andexcess epoxy 34 is forced into unfilled portions ofcavity 43 underneathlead frame 41. Ifepoxy 34 has spread and filledcavity 43, additionalexcess epoxy 34 can spread out throughopenings 44 between the edge ofdie 30 and the edge ofcavity 43. - 32. Because die 30 can be pressed and set directly on
lead frame 41, without epoxy betweendie 30 and the upper surface oflead frame 41, die 30 remains parallel withlead frame 41, and thuspackage 32. Furthermore, because the size ofcavity 43 is slightly smaller than die 30 so that only a small portion ofdie 30 is in direct contact withlead frame 41, a large amount ofepoxy 43 is available to contact a large area ofdie 30, thereby ensuring adequate adhesion. Consequently, dies can be packaged into lead frames with minimal or negligible positioning errors caused by the die-attach epoxy. - 33. The above-described embodiments of the present invention are merely meant to be illustrative and not limiting. It will thus be obvious to those skilled in the art that various changes and modifications may be made without departing from this invention in its broader aspects. For example, any suitable number and shape of cavities can be formed within a lead frame in accordance with either of the two embodiments discussed above to realize the benefits of the present invention. Therefore, the appended claims encompass all such changes and modifications as fall within the true spirit and scope of this invention.
Claims (23)
1. A structure for packaging a die, comprising:
a lead frame having an upper surface and at least one cavity formed through said upper surface, said at least one cavity underlying a portion of said die for receiving excess die-attach epoxy when said die is adhered to said lead frame.
2. The structure of , wherein said at least one cavity extends completely through said lead frame.
claim 1
3. The structure of , wherein said at least one cavity partially extends into said lead frame.
claim 1
4. The structure of , wherein said lead frame comprises at least two cavities to form an array of said cavities.
claim 1
5. The structure of , wherein a die-attach epoxy is only deposited over said array.
claim 4
6. The structure of , wherein at least one dimension of said array is slightly larger than at least one dimension of said die.
claim 4
7. The structure of , wherein said cavities are rectangular shaped.
claim 4
8. The structure of , wherein said lead frame comprises a single cavity.
claim 1
9. The structure of , wherein said cavity is circular shaped.
claim 8
10. The structure of , wherein said cavity is oval shaped.
claim 8
11. The structure of , wherein at least one dimension of said cavity is slightly smaller than at least one dimension of said die.
claim 8
12. A method for packaging a die, comprising:
forming at least one cavity formed through the upper surface of a lead frame;
depositing epoxy over said at least one cavity; and
placing said die over said epoxy and the upper surface of said lead frame, wherein excess amounts of said epoxy flow into said at least one cavity.
13. The method of , wherein said epoxy is deposited so that a portion of said epoxy is above the upper surface of said lead frame.
claim 12
14. The method of , wherein said at least one cavity extends completely through said lead frame.
claim 12
15. The method of , wherein said at least one cavity partially extends into said lead frame.
claim 12
16. The method of , wherein said forming forms at least two cavities to create an array of said cavities.
claim 12
17. The method of , wherein said die-attach epoxy is only deposited over said array.
claim 16
18. The method of , wherein at least one dimension of said array is slightly larger than at least one dimension of said die.
claim 16
19. The method of , wherein said cavities are rectangular shaped.
claim 16
20. The method of , wherein said forming forms a single cavity.
claim 12
21. The method of , wherein said cavity is circular shaped.
claim 20
22. The method of , wherein said cavity is oval shaped.
claim 20
23. The method of , wherein at least one dimension of said cavity is slightly smaller than at least one dimension of said die.
claim 20
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/732,218 US20010000210A1 (en) | 1998-07-06 | 2000-12-06 | Method of improving parallelism of a die to package using a modified lead frame |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/110,787 US6239480B1 (en) | 1998-07-06 | 1998-07-06 | Modified lead frame for improved parallelism of a die to package |
US09/148,818 US6235556B1 (en) | 1998-07-06 | 1998-09-04 | Method of improving parallelism of a die to package using a modified lead frame |
US09/732,218 US20010000210A1 (en) | 1998-07-06 | 2000-12-06 | Method of improving parallelism of a die to package using a modified lead frame |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/148,818 Continuation US6235556B1 (en) | 1998-07-06 | 1998-09-04 | Method of improving parallelism of a die to package using a modified lead frame |
Publications (1)
Publication Number | Publication Date |
---|---|
US20010000210A1 true US20010000210A1 (en) | 2001-04-12 |
Family
ID=22334931
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/110,787 Expired - Fee Related US6239480B1 (en) | 1998-07-06 | 1998-07-06 | Modified lead frame for improved parallelism of a die to package |
US09/148,818 Expired - Fee Related US6235556B1 (en) | 1998-07-06 | 1998-09-04 | Method of improving parallelism of a die to package using a modified lead frame |
US09/732,218 Abandoned US20010000210A1 (en) | 1998-07-06 | 2000-12-06 | Method of improving parallelism of a die to package using a modified lead frame |
Family Applications Before (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/110,787 Expired - Fee Related US6239480B1 (en) | 1998-07-06 | 1998-07-06 | Modified lead frame for improved parallelism of a die to package |
US09/148,818 Expired - Fee Related US6235556B1 (en) | 1998-07-06 | 1998-09-04 | Method of improving parallelism of a die to package using a modified lead frame |
Country Status (1)
Country | Link |
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US (3) | US6239480B1 (en) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4239352B2 (en) * | 2000-03-28 | 2009-03-18 | 株式会社日立製作所 | Manufacturing method of electronic device |
JP4349541B2 (en) * | 2000-05-09 | 2009-10-21 | 大日本印刷株式会社 | Resin-encapsulated semiconductor device frame |
JP4727850B2 (en) * | 2001-06-21 | 2011-07-20 | ローム株式会社 | Semiconductor electronic parts |
JP3748849B2 (en) * | 2002-12-06 | 2006-02-22 | 三菱電機株式会社 | Resin-sealed semiconductor device |
SG157957A1 (en) * | 2003-01-29 | 2010-01-29 | Interplex Qlp Inc | Package for integrated circuit die |
DE10319782B4 (en) * | 2003-04-30 | 2009-01-02 | Osram Opto Semiconductors Gmbh | Optoelectronic semiconductor component with a chip carrier element |
TWI251939B (en) * | 2005-05-24 | 2006-03-21 | Siliconware Precision Industries Co Ltd | Lead-frame type semiconductor package and lead frame thereof |
US8481420B2 (en) | 2011-03-15 | 2013-07-09 | Stats Chippac Ltd. | Integrated circuit packaging system with lead frame stacking module and method of manufacture thereof |
US9911684B1 (en) * | 2016-08-18 | 2018-03-06 | Semiconductor Components Industries, Llc | Holes and dimples to control solder flow |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3942245A (en) | 1971-11-20 | 1976-03-09 | Ferranti Limited | Related to the manufacture of lead frames and the mounting of semiconductor devices thereon |
US4048438A (en) | 1974-10-23 | 1977-09-13 | Amp Incorporated | Conductor patterned substrate providing stress release during direct attachment of integrated circuit chips |
US4862246A (en) * | 1984-09-26 | 1989-08-29 | Hitachi, Ltd. | Semiconductor device lead frame with etched through holes |
GB2195825B (en) * | 1986-09-22 | 1990-01-10 | Motorola Inc | Integrated circuit package |
US4942452A (en) * | 1987-02-25 | 1990-07-17 | Hitachi, Ltd. | Lead frame and semiconductor device |
JPS63213362A (en) * | 1987-02-27 | 1988-09-06 | Mitsubishi Electric Corp | Resin sealed semiconductor device |
US5187123A (en) | 1988-04-30 | 1993-02-16 | Matsushita Electric Industrial Co., Ltd. | Method for bonding a semiconductor device to a lead frame die pad using plural adhesive spots |
JPH01283840A (en) * | 1988-05-10 | 1989-11-15 | Nec Yamaguchi Ltd | Lead frame for semiconductor device |
KR100552353B1 (en) | 1992-03-27 | 2006-06-20 | 가부시키가이샤 히타치초엘에스아이시스템즈 | Leadframe Semiconductor Integrated Circuit Device Using the Same and Method of and Process for Fabricating the Two |
US5233222A (en) * | 1992-07-27 | 1993-08-03 | Motorola, Inc. | Semiconductor device having window-frame flag with tapered edge in opening |
KR950005269B1 (en) | 1992-07-29 | 1995-05-22 | 삼성전자주식회사 | Semiconductor package structure and manufacturing method thereof |
JP3175979B2 (en) * | 1992-09-14 | 2001-06-11 | 株式会社東芝 | Resin-sealed semiconductor device |
JP2732767B2 (en) * | 1992-12-22 | 1998-03-30 | 株式会社東芝 | Resin-sealed semiconductor device |
JPH0878605A (en) * | 1994-09-01 | 1996-03-22 | Hitachi Ltd | Lead frame and semiconductor integrated circuit device utilizing the same |
JP2611748B2 (en) * | 1995-01-25 | 1997-05-21 | 日本電気株式会社 | Resin-sealed semiconductor device |
US5818103A (en) * | 1997-03-28 | 1998-10-06 | Nec Corporation | Semiconductor device mounted on a grooved head frame |
-
1998
- 1998-07-06 US US09/110,787 patent/US6239480B1/en not_active Expired - Fee Related
- 1998-09-04 US US09/148,818 patent/US6235556B1/en not_active Expired - Fee Related
-
2000
- 2000-12-06 US US09/732,218 patent/US20010000210A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US6239480B1 (en) | 2001-05-29 |
US6235556B1 (en) | 2001-05-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO PAY ISSUE FEE |