DE10319782B4 - Optoelectronic semiconductor component with a chip carrier element - Google Patents

Optoelectronic semiconductor component with a chip carrier element Download PDF

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Publication number
DE10319782B4
DE10319782B4 DE10319782A DE10319782A DE10319782B4 DE 10319782 B4 DE10319782 B4 DE 10319782B4 DE 10319782 A DE10319782 A DE 10319782A DE 10319782 A DE10319782 A DE 10319782A DE 10319782 B4 DE10319782 B4 DE 10319782B4
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Prior art keywords
chip
optoelectronic semiconductor
carrier element
semiconductor component
component according
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DE10319782A
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German (de)
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DE10319782A1 (en
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Matthias Winter
Stefan Gruber
Josef Schmid
Georg Bogner
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Ams Osram International GmbH
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Osram Opto Semiconductors GmbH
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Priority to DE10319782A priority Critical patent/DE10319782B4/en
Priority to DE20313842U priority patent/DE20313842U1/en
Publication of DE10319782A1 publication Critical patent/DE10319782A1/en
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Publication of DE10319782B4 publication Critical patent/DE10319782B4/en
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Abstract

Optoelektronisches Halbleiterbauelement mit einem Chipträgerelement (1) mit einer Chipmontagefläche (2), auf welcher ein Lumineszenz- oder Laserdiodenchip (5) mit Flip-Chipkontakten befestigt ist, dadurch gekennzeichnet, dass benachbart zur Chipmontagefläche (2) ein gegenüber dieser abgesenkter Verbindungsmittel-Auffangbereich (3) in dem Chipträgerelement (1) angeordnet ist.The optoelectronic Semiconductor component having a chip carrier element (1) with a chip mounting surface (2), on which a luminescence or laser diode chip (5) attached with flip-chip contacts characterized in that adjacent to the chip mounting surface (2) one opposite this lowered connection means collecting area (3) in the chip carrier element (1) is arranged.

Figure 00000001
Figure 00000001

Description

Die Erfindung betrifft ein optoelektronisches Halbleiterbauelement mit einem Chipträgerelement gemäß dem Oberbegriff des Patentanspruches 1, wie er aus der JP 05327012 A bekannt ist.The invention relates to an optoelectronic semiconductor component with a chip carrier element according to the preamble of claim 1, as he from JP 05327012 A is known.

Ganz allgemein wird bei der sogenannten Flip-Chip-Montage der betreffende Halbleiterchip derart auf einer Chipmontagefläche eines Chipträgerelements montiert, dass eine funktionelle Epitaxieschichtenfolge, die auf einem Substrat oder einem anderen Trägerelelement aufgebracht sein kann, zur Chipmontagefläche hin gewandt ist. Das heißt der Abstand zwischen den im allgemeinen empfindlichen Seitenflächen der Epitaxieschichtenfolge und dem Chipträgerelement ist im Vergleich zu upside-up-montierten Chips (hier sind des herkömmlich zwischen 100 und 200 μm) um ein vielfaches geringer und beträgt nur wenige μm oder weniger. Die Gefahr eines elektrischen Kurzschlusses von Epitaxieschichten der Epitaxieschichtenfolge durch beispielsweise Lot oder Leitkleber, der zur Befestigung und zum elektrischen Anschließen des Chips auf dem Chipträgerelement dient, ist daher mit herkömmlichen Chipträgerelementen vergleichsweise groß.All In general, in the so-called flip-chip mounting of the relevant Semiconductor chip such on a chip mounting surface of a chip carrier element mounted a functional epitaxial layer on top of that be applied to a substrate or other Trägerelelement can, to the chip mounting surface turned back. This means the distance between the generally sensitive side surfaces of the Epitaxial layer sequence and the chip carrier element is compared to upside-up-mounted chips (here's the conventional between 100 and 200 μm) many times smaller and is only a few microns or less. The risk of an electrical short circuit of epitaxial layers the epitaxial layer sequence by, for example, solder or conductive adhesive, for fastening and electrical connection of the Chips on the chip carrier element serves, is therefore conventional Chip carrier elements comparatively large.

Bei dem Leuchtdiodenbauelement mit in Flip-Chip-Montage auf dem Chipträger befestigten Halbleiterchip gemäß JP 05327012 A sind die Flanken des Chips zur Vermeidung eines Kurzschlusses des pn-Übergangs durch ein elektrisch leitendes Verbindungsmittel mit einer elektrisch isolierenden Schutzschicht versehen.In the light-emitting diode device with in flip-chip mounting on the chip carrier mounted semiconductor chip according to JP 05327012 A the flanks of the chip are provided with an electrically insulating protective layer to avoid a short circuit of the pn junction by an electrically conductive connection means.

Weiterhin ist in der DE 198 07 758 A1 ein Leuchtdiodenchip beschrieben, der üblicherweise in Flip-Chip-Montage auf einem Chipträger montiert wird und bei dem dann die Epitaxieschichten sehr nah an der Chipmontagefläche liegen, so dass die Gefahr eines elektrischen Kurzschlusses vergleichsweise hoch ist.Furthermore, in the DE 198 07 758 A1 describes a light-emitting diode chip, which is usually mounted in a flip-chip mounting on a chip carrier and in which then the epitaxial layers are very close to the chip mounting surface, so that the risk of electrical short circuit is relatively high.

Der vorliegenden Erfindung liegt die Aufgabe zugrunde, eine Maßnahme bei optoelektronischen Bauelementen zur Verfügung zu stellen, mit der es auf technisch einfache Weise möglich ist, bei der Flip-Chip-Montage einen elektrischen Kurzschluß von Epitaxieschichten durch elektrisch leitendes Verbindungsmittel weitestgehend zu vermeiden.Of the present invention is based on the object, a measure at to provide optoelectronic devices, with it on technically simple way possible is, in flip-chip mounting an electrical short of epitaxial layers To be largely avoided by electrically conductive connection means.

Diese Aufgabe wird durch ein optoelektronischen Halbleiterbauelement mit den Merkmalen des Patentanspruches 1 gelöst.These The object is achieved by an optoelectronic semiconductor component the features of claim 1.

Vorteilhafte Weiterbildungen und bevorzugte Ausführungsformen des optoelektronischen Halbleiterbauelements sind in den Ansprüchen 2 bis 13 angegeben.advantageous Further developments and preferred embodiments of the optoelectronic Semiconductor devices are given in claims 2 to 13.

Bei einem optoelektronischen Halbleiterbauelement mit Chipträgerelement gemäß der Erfindung ist benachbart zur Chipmontagefläche ein gegenüber dieser abgesenkter Verbindungsmittel-Auffangbereich vorgesehen. In diesen kann ein auf dessen Montageseite aufgebrachtes oder auf die Chipmontagefläche aufgebrachtes Verbindungsmittel beim Aufsetzen oder, im Falle eines metallischen Lotes, beim Lötschritt seitlich neben den Halbleiterchip gedrücktes Verbindungsmittel abfließen. Die Gefahr, dass das Verbindungsmittel an den Flanken der Epitaxieschichtenfolge hochsteigt und dort alle oder einige Schichten elektrisch kurzschließt kann dadurch deutlich verringert werden.at an optoelectronic semiconductor device with chip carrier element according to the invention adjacent to the chip mounting surface one opposite this one lowered connecting means-collecting area provided. In these can be applied to its mounting side or applied to the chip mounting surface Connecting means when placing or, in the case of a metallic Lotes, during the soldering step drain off side of the semiconductor chip pressed connection means. The Risk that the bonding agent on the flanks of the epitaxial layer sequence rises and there can shunt all or several layers electrically be significantly reduced.

Der Verbindungsmittel-Auffangbereich grenzt zumindest teilweise seitlich an die Chipmontagefläche. Besonders bevorzugt ist die Chipmontagefläche vollständig von dem Verbindungsmittel-Auffangbereich umschlossen ist. Die Ausgestaltung des Chipträgerelements in der Erfindung eignet sich besonders bevorzugt für Chipträgerelemente an metallischen Leiterrahmen (Leadframe). Der Verbindungsmittel-Auffangbereich ist hierbei vorzugsweise mittels Prägen, Kröpfen und oder Tiefziehen hergestellt. Bevorzugt ist das Chipträgerelement einstückig mit weiteren Bestandteilen des Leiterrahmens, wie beispielsweise den externen elektrischen Anschlüssen und überigen Anschlußbereichen ausgebildet. Ebenso denkbar ist aber auch, dass das Chipträgerelement separat hergestellt und mit dem Leiterrahmen verbunden ist.Of the Lanyard catchment area is at least partially adjacent to the side to the chip mounting surface. More preferably, the chip mounting surface is completely off the connector means collecting area is enclosed. The embodiment of the chip carrier element in the invention is particularly preferred for chip carrier elements to metallic Lead frame (leadframe). The connecting agent collecting area is in this case preferably by embossing, goitre and or thermoforming. The chip carrier element is preferred one piece with other components of the lead frame, such as the external electrical connections and over service areas educated. However, it is also conceivable that the chip carrier element made separately and connected to the lead frame.

Bei einer besonders vorteilhaften Ausgestaltung des Verbindungsmittel-Auffangbereichs ist ein um die Chipmontagefläche umlaufender Graben vorgesehen. Denkbar ist aber auch eine Ausgestaltung des Chipmontagebereichs, beider dieser gegenüber der übrigen Oberfläche des Chipträgerelements erhöht ist. Ebenso kann der Chipmontagebereich durch noppen- oder pyramidenartige Erhöhungen an dem Chipmontageelement gebildet sein.at a particularly advantageous embodiment of the connecting means-collecting area is one around the chip mounting surface circumferential trench provided. It is also conceivable, however, an embodiment of Chip mounting area, both of which compared to the other surface of the Chip carrier element elevated is. Likewise, the chip mounting area by nubs or pyramid-like increases be formed on the chip mounting element.

Die Tiefe des Verbindungsmittel-Auffangbereiches liegt vorzugsweise zwischen 2 μm und 8 μm und besonders bevorzugt zwischen 3 μm und 5 μm, wobei die Grenzen jeweils eingeschlossen sind.The Depth of the connecting agent collecting area is preferably between 2 μm and 8 μm and more preferably between 3 μm and 5 microns, wherein the borders are included.

Die Abmessungen der Chipmontagefläche ganz besonders bevorzugt derart gewählt, dass ein zur Montage auf dieser vorgesehener Halbleiterchip über die Chipmontagefläche hinausragt, so dass die Kanten des Halbleiterchips nicht auf der Chipmontagefläche aufliegen.The Dimensions of the chip mounting area completely particularly preferably chosen such that a for mounting on this provided semiconductor chip on the Chip mounting surface protrudes so that the edges of the semiconductor chip is not on the Chip mounting surface rest.

Das Chipträgerelement ist Bestandteil eines elektrischen Leiters zum elektrischen Anschließen des Halbleiterchips. Denkbar ist aber auch, dass ein Teil davon separat hergestellt ist welches keine elektrische Funktion innehat. Beispielsweise kann ein Teil des Chipträgerelements Bestandteil eines Kunststoffgehäuses sein und mit diesem einstückig ausgebildet oder separat hergestellt und in das Kunststoffgehäuse eingesetzt sein. In letzterem Fall kann es ebenfalls aus Kunststoff bestehen oder zur besseren Wärmeableitung vom Halbleiterchip aus einem thermisch gut leitenden Material, beispielsweise aus einem metallischen Material bestehen.The chip carrier element is part of an electrical conductor for the electrical connection of the semiconductor chip. It is also conceivable that a part of it is made separately which has no electrical function. For example, a part the chip carrier element be part of a plastic housing and integrally formed with this or manufactured separately and inserted into the plastic housing. In the latter case, it can also be made of plastic or for better heat dissipation from the semiconductor chip of a thermally highly conductive material, for example, consist of a metallic material.

Ein optoelektronisches Halbleiterbauelement gemäß der Erfindung weist ein Chipträgerelement auf, das gemäß einem der oben geschilderten Ausführungsformen und Weiterbildungen ausgestaltet ist.One Optoelectronic semiconductor component according to the invention has a chip carrier element, that according to one the above-described embodiments and further developments is configured.

Weitere Vorteile, vorteilhafte Ausführungsformen und Weiterbildungen ergeben sich aus den folgenden in Verbindung mit den in 1 bis 7 erläuterten Ausführungsbeispielen. Es zeigen:Further advantages, advantageous embodiments and developments will become apparent from the following in connection with in 1 to 7 explained embodiments. Show it:

1 eine schematische Darstellung einer Draufsicht auf ein erstes Ausführungsbeispiel, 1 a schematic representation of a plan view of a first embodiment,

2 eine schematische Darstellung eines Schnittes durch das erste Ausführungsbeispiel entlang Linie A-A von 1, 2 a schematic representation of a section through the first embodiment along line AA of 1 .

3 eine schematische Darstellung eines Schnittes durch ein zweites Ausführungsbeispiel 3 a schematic representation of a section through a second embodiment

4 eine schematische Darstellung eines Schnittes durch ein drittes Ausführungsbeispiel, 4 a schematic representation of a section through a third embodiment,

5 eine schematische Darstellung eines Schnittes durch ein viertes Ausführungsbeispiel, 5 a schematic representation of a section through a fourth embodiment,

6 eine schematische Darstellung eines Schnittes durch ein fünftes Ausführungsbeispiel und 6 a schematic representation of a section through a fifth embodiment and

7 eine schematische Darstellung eines Schnittes durch das optoelektronisches Halbleiterbauelement mit einem Chipträgerelement gemäß 2. 7 a schematic representation of a section through the optoelectronic semiconductor device with a chip carrier element according to 2 ,

In den verschiedenen Ausführungsbeispielen sind gleiche oder gleichwirkende Bestandteile jeweils gleich bezeichnet und mit den gleichen Bezugszeichen versehen. Die dargestellten Abmessungen der einzelnen Bestandteile sind nicht als maßstabsgerecht anzusehen. Sie sind vielmehr zum besseren Verständnis übertrieben und nicht mit den tatsächlichen Größenverhältnissen zueinander dargestellt.In the various embodiments are the same or equivalent components each referred to the same and provided with the same reference numerals. The illustrated dimensions of individual components are not to be considered as true to scale. she are rather exaggerated for better understanding and not with the actual proportions shown to each other.

Bei dem in den 1 und 2 ausschnittsweise dargestellten Ausführunsbeispiel handelt es sich um ein Chipträgerelement 1 eines metallischen Leiterrahmens 4, der unter anderem einen ersten 6 und einen zweiten elektrischen Anschlußleiter 7 umfaßt. Das Chipträgerelement 1 ist mit dem ersten elektrischen Anschlußleiter 6 einstückig ausgebildet und weist in etwa mittig eine Chip-Montagefläche 2 und einen diese umschließenden geprägten Graben 3 auf, der als Verbindungsmittel-Auffangbereich dient. Die Grenze des Chipträgerelements 1 zum Anschlußleiter 6 hin ist durch eine gestrichelte Linie angedeutet. Der Graben 3 kann alternativ durch Kröpfen oder Tiefziehen hergestellt sein.In the in the 1 and 2 Exactly illustrated Ausführunsbeispiel is a chip carrier element 1 a metallic ladder frame 4 including, inter alia, a first 6 and a second electrical lead 7 includes. The chip carrier element 1 is with the first electrical lead 6 formed in one piece and has approximately in the middle of a chip mounting surface 2 and an embossed moat enclosing them 3 on, which serves as a connecting means collecting area. The boundary of the chip carrier element 1 to the connection conductor 6 towards is indicated by a dashed line. The ditch 3 may alternatively be made by crimping or deep drawing.

Der Chipmontagebereich und damit die Chipmontagefläche ist derart bemessen, dass die Kanten des zu montierenden Chips 5 auf dieser nicht aufliegen, sondern über dem Verbindungsmittel-Auffangbereich zu liegen kommen. Dies gilt auch für sämtliche nachfolgend beschriebenen Ausführungsbeispiele.The chip mounting area and thus the chip mounting area is dimensioned such that the edges of the chip to be mounted 5 do not rest on this, but come to lie on the lanyard-collecting area. This also applies to all embodiments described below.

In 2 ist beispielhaft ein in Flip-Chip-Montage auf der Chipmontagefläche 2 aufgebrachter Leuchtdiodenchip 5 dargestellt, der schräge Flanken aufweist. Für solche Leuchtdiodenchips 5 ist eine Chipträgerelement 1, wie es zur Erfindung gehört, besonders vorteilhaft. Ebenso kann aber auch ein Laserdiodenchip oder ein anderer optoelektronischer Halbleiterchip angeordnet sein.In 2 is exemplary in a flip-chip mounting on the chip mounting surface 2 applied LED chip 5 shown, which has oblique edges. For such LED chips 5 is a chip carrier element 1 , as it belongs to the invention, particularly advantageous. Likewise, however, a laser diode chip or another optoelectronic semiconductor chip may also be arranged.

Das Verbindungsmittel zwischen dem Chipträgerelement 1 und dem Halbleiterchip ist beispielsweise ein metallisches Lot. Der Graben 3 gewährleistet, dass überschüssiges Lot, das beim Aufschmelzen des Lotes seitlich neben den Chip 5 gedrückt wird, in der Regel nicht an den Chipflanken hochsteigt und dort zu elektrischen Kurzschlüssen führen kann.The connecting means between the chip carrier element 1 and the semiconductor chip is, for example, a metallic solder. The ditch 3 Ensures that excess solder is melting when the solder is laterally next to the chip 5 is pressed, usually does not rise on the chip edges and there can lead to electrical short circuits.

Die Tiefe des Grabens liegt beispielsweise zwischen 3 und 5 μm.The Depth of the trench is for example between 3 and 5 microns.

Das Ausführungsbeispiel gemäß 3 unterscheidet sich von dem vorgenannten insbesondere dadurch, dass das Chipträgerelement aus einem elektrisch isolierenden Material, beispielsweise aus Kunststoff, aus glasartigem oder aus einem keramischen Material, besteht, in dem ein Graben 3 um einen Anschlußbereich eines Halbleiterchips 5 ausgebildet ist. Auf dem Chipträgerelement 1 sind zum elektrischen Anschließen des Halbleiterchips 5 Leiterbahnen 9, 10 ausgebildet.The embodiment according to 3 differs from the above, in particular the fact that the chip carrier element of an electrically insulating material, such as plastic, glassy or of a ceramic material, consists, in which a trench 3 around a terminal region of a semiconductor chip 5 is trained. On the chip carrier element 1 are for electrically connecting the semiconductor chip 5 conductor tracks 9 . 10 educated.

Bei dem in 4 dargestellten Ausführungsbeispiel ist im Unterschied zum Ausführungsbeispiel von 1 und 2 an einem Chipträgerelement 1 eines metallischen Leiterrahmens 4 (Leadframe) eine gegenüber dem übrigen Leiterrahmen 4 inselartig erhöhte Chipmontagefläche 2 ausgebildet. Diese kann beispielsweise wiederum durch Prägen, Kröpfen oder Tiefziehen ausgebildet sein.At the in 4 illustrated embodiment is in contrast to the embodiment of 1 and 2 on a chip carrier element 1 a metallic ladder frame 4 (Leadframe) one opposite the other leadframe 4 island-like increased chip mounting surface 2 educated. This can be formed, for example, again by embossing, crimping or deep drawing.

Das Ausführungsbeispiel von 5 unterscheidet sich von dem in Verbindung mit den 1 und 2 beschriebenen insbesondere dadurch, dass ein separat gefertigtes metallisches Chipträgerelement vorgesehen ist, das zudem beispielsweise als Reflektor wirkende Seitenwände 11 aufweist. Ein solches Chipträgerelement 1 kann auf einfache Weise beispielsweise in ein Bauelementgehäuse aus Kunststoff oder in einen Leiterrahmen eingesetzt werden.The embodiment of 5 differs from that in connection with the 1 and 2 described in particular thereby, in that a separately manufactured metallic chip carrier element is provided, which also has, for example, side walls acting as a reflector 11 having. Such a chip carrier element 1 can be used in a simple manner, for example, in a component housing made of plastic or in a lead frame.

In 6 ist beispielhaft ein Teil eines Chipträgerelements 1 veranschaulicht, das als Chipmontagefläche 2 noppenartige oder pyramidenartige Erhöhungen aufweist, zwischen denen sich der demgegenüber abgesenkte Verbindungsmittel-Auffangbereich 3 befindet. Das Teil des Chipträgerelements ist wiederum ein separat hergestelltes Teil, das in ein Kunststoff-Bauelementgehäuse oder in einen Leiterrahmen eingesetzt und mit diesem verbunden werden kann.In 6 is an example of a part of a chip carrier element 1 illustrates this as a chip mounting surface 2 has knob-like or pyramid-like elevations, between which the contrast lowered connector-collecting area 3 located. The part of the chip carrier element is in turn a separately manufactured part which can be inserted into and connected to a plastic component housing or into a leadframe.

In 7 ist ein Beispiel des optoelektronischen Halbleiterbauelements gezeigt, bei dem an einem Leiterrahmen 4 ein Kunststoff-Gehäuse 12 angeformt ist und das Chipträgerelement 1 gemäß dem Ausführungsbeispiel nach den 1 und 2 gestaltet ist. Solche Bauelemente sind dem Fachmann geläufig und werden von daher an dieser Stelle nicht näher erläutert.In 7 an example of the optoelectronic semiconductor device is shown in which on a lead frame 4 a plastic housing 12 is formed and the chip carrier element 1 according to the embodiment of the 1 and 2 is designed. Such components are familiar to the expert and are therefore not explained in detail at this point.

Claims (13)

Optoelektronisches Halbleiterbauelement mit einem Chipträgerelement (1) mit einer Chipmontagefläche (2), auf welcher ein Lumineszenz- oder Laserdiodenchip (5) mit Flip-Chipkontakten befestigt ist, dadurch gekennzeichnet, dass benachbart zur Chipmontagefläche (2) ein gegenüber dieser abgesenkter Verbindungsmittel-Auffangbereich (3) in dem Chipträgerelement (1) angeordnet ist.Optoelectronic semiconductor component with a chip carrier element ( 1 ) with a chip mounting surface ( 2 ) on which a luminescence or laser diode chip ( 5 ) is fastened with flip-chip contacts, characterized in that adjacent to the chip mounting surface ( 2 ) in relation to this lowered connection means catchment area ( 3 ) in the chip carrier element ( 1 ) is arranged. Optoelektronisches Halbleiterbauelement (1) nach Anspruch 1, dadurch gekennzeichnet, dass der Verbindungsmittel-Auffangbereich (3) zumindest teilweise seitlich an die Chipmontagefläche (2) grenzt.Optoelectronic semiconductor device ( 1 ) according to claim 1, characterized in that the connecting means collecting area ( 3 ) at least partially laterally to the chip mounting surface ( 2 ) borders. Optoelektronisches Halbleiterbauelement nach Anspruch 1 oder 2, dadurch gekennzeichnet, dass die Chipmontagefläche (2) vollständig von dem Verbindungsmittel-Auffangbereich (3) umschlossen ist.Optoelectronic semiconductor component according to claim 1 or 2, characterized in that the chip mounting surface ( 2 ) completely from the lanyard containment area ( 3 ) is enclosed. Optoelektronisches Halbleiterbauelement nach mindestens einem der vorangehenden Ansprüche, dadurch gekennzeichnet, dass das Chipträgerelement (1) an einem metallischen Leiterrahmen (4) ausgebildet ist.Optoelectronic semiconductor component according to at least one of the preceding claims, characterized in that the chip carrier element ( 1 ) on a metallic lead frame ( 4 ) is trained. Optoelektronisches Halbleiterbauelement nach Anspruch 4, dadurch gekennzeichnet, dass der Verbindungsmittel-Auffangbereich (3) mittels Prägen, Kröpfen und/oder Tiefziehen des metallischen Leiterrahmens (4) ausgebildet ist.Optoelectronic semiconductor component according to claim 4, characterized in that the connecting means collecting region ( 3 ) by embossing, crimping and / or deep drawing of the metallic lead frame ( 4 ) is trained. Optoelektronisches Halbleiterbauelement nach Anspruch 4 oder 5, dadurch gekennzeichnet, dass das Chipträgerelement (1) einstückig mit weiteren Bestandteilen des Leiterrahmens (4) ausgebildet ist.Optoelectronic semiconductor component according to claim 4 or 5, characterized in that the chip carrier element ( 1 ) in one piece with other components of the lead frame ( 4 ) is trained. Optoelektronisches Halbleiterbauelement nach Anspruch 4 oder 5, dadurch gekennzeichnet, dass das Chipträgerelement (1) separat hergestellt und mit dem Leiterrahmen (4) verbunden ist.Optoelectronic semiconductor component according to claim 4 or 5, characterized in that the chip carrier element ( 1 ) manufactured separately and with the lead frame ( 4 ) connected is. Optoelektronisches Halbleiterbauelement nach mindestens einem der vorangehenden Ansprüche, dadurch gekennzeichnet, dass der Verbindungsmittel-Auffangbereich (3) ein um die Chipmontagefläche (2) umlaufender Graben ist.Optoelectronic semiconductor component according to at least one of the preceding claims, characterized in that the connecting means collecting region ( 3 ) around the chip mounting surface ( 2 ) is a circumferential trench. Optoelektronisches Halbleiterbauelement nach mindestens einem der Ansprüche 1 bis 7, dadurch gekennzeichnet, dass der Chipmontagebereich (2) gegenüber der übrigen Oberfläche des Chipträgerelements (1) erhöht ist.Optoelectronic semiconductor component according to at least one of Claims 1 to 7, characterized in that the chip mounting region ( 2 ) with respect to the remaining surface of the chip carrier element ( 1 ) is increased. Optoelektronisches Halbleiterbauelement nach mindestens einem der Ansprüche 1 bis 7, dadurch gekennzeichnet, dass der Chipmontagebereich (2) von noppen- oder pyramidenartigen Erhöhungen auf dem Chipträgerelement (1) gebildet ist.Optoelectronic semiconductor component according to at least one of Claims 1 to 7, characterized in that the chip mounting region ( 2 ) of nub-like or pyramid-like elevations on the chip carrier element ( 1 ) is formed. Optoelektronisches Halbleiterbauelement nach mindestens einem der vorangehenden Ansprüche, dadurch gekennzeichnet, dass die Tiefe des Verbindungsmittel-Auffangbereiches zwischen 2 μm und 6 μm, insbesondere zwischen 3 μm und 5 μm liegt, wobei die Grenzen jeweils eingeschlossen sind.Optoelectronic semiconductor component according to at least one of the preceding claims, characterized in that the depth of the connecting means collecting area between 2 μm and 6 μm, in particular between 3 μm and 5 μm, the borders are included. Optoelektronisches Halbleiterbauelement nach mindestens einem der vorangehenden Ansprüche, dadurch gekennzeichnet, dass die Abmessungen der Chipmontagefläche (2) derart gewählt sind, dass ein auf dieser Fläche (2) montierter Halbleiterchip (5) über die Chipmontagefläche (2) hinausragt, so dass die Kanten des Halbleiterchips (5) nicht auf der Chipmontagefläche (2) aufliegen.Optoelectronic semiconductor component according to at least one of the preceding claims, characterized in that the dimensions of the chip mounting surface ( 2 ) are selected such that one on this surface ( 2 ) mounted semiconductor chip ( 5 ) over the chip mounting surface ( 2 protrudes, so that the edges of the semiconductor chip ( 5 ) not on the chip mounting surface ( 2 ) rest. Optoelektronisches Halbleiterbauelement nach einem der vorangehenden Ansprüche, dadurch gekennzeichnet, dass das Chipträgerelement (1) Bestandteil eines elektrischen Leiters ist, an dem der Halbleiterchip elektrisch angeschlossen ist.Optoelectronic semiconductor component according to one of the preceding claims, characterized in that the chip carrier element ( 1 ) Is part of an electrical conductor to which the semiconductor chip is electrically connected.
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