DE102020117207A1 - OPTOELECTRONIC COMPONENT HOUSING AND PROCESS - Google Patents

Abstract

The invention relates to a method for producing an optoelectronic component, in which a lead frame (10) is provided with at least a first section and a second section spaced apart therefrom, each with at least 2 support areas (14), the support area (14) each being at least partially are surrounded by a depression (11). A light-emitting semiconductor body (20r, 20b, 20g) is applied to the support area (14) of each section and the sections are separated to form a large number of chip groups (1), in particular chip groups of the same design. A carrier (3) is then provided, which has a multiplicity of areas spaced apart from one another, each of which includes contact elements (33). The chip group is applied and contacted in or on one of the plurality of mutually spaced regions of the carrier. Then the areas are isolated.

Description

The present invention relates to a method for producing an optoelectronic component. The invention also relates to an optoelectronic component.

BACKGROUND

In some applications, light-emitting semiconductor bodies are set very closely so that an overall impression that is as uniform as possible is obtained. An example would be semiconductor bodies, for example for the display area, in which a pixel is made up of 3 light-emitting semiconductor bodies of different colors. The 3 semiconductor bodies should be put together as closely as possible in order to achieve a uniform color combination. More generally, an LED, i.e. a light-emitting diode, can be made up of one or more semiconductor bodies, so that, for example, different colors or a mixed color are emitted, so that such so-called multi-chip LEDs can be used for various applications, e.g. in the field of plant lighting or the simulation of natural light. The same applies to optical sensors in which a semiconductor component serves as a detector and is used close to one or more light-emitting components.

Different technologies are used for the production and in particular for the attachment of chips to or on a carrier, depending on the area of application and requirements. This creates the need to further reduce errors or damage that occur due to tolerances due to manufacturing technology.

SUMMARY

The inventors are aware of the conventional fastening method of fastening the semiconductor body to a - sometimes - metallic carrier using conductive silver adhesive. However, this can lead to various problems, which are determined by the amount and composition of the adhesive. As an alternative to this method, other techniques are used, but these are significantly more complex and more difficult to handle in terms of process management. Examples include what is known as chip soldering, in which the semiconductor body is attached to the lead frame by means of an AuSn solder, and the “anisotropic conductive die attach” process.

The inventors now propose to divide the manufacture of a package with a leadframe into 2 steps. In a first step, the semiconductor bodies are applied to a thin and appropriately structured leadframe in the desired arrangement with respect to one another. This is then separated so that chip groups are created, which in turn are brought into or onto the carrier together with their leadframes.

Thus, a method for producing an optoelectronic component is proposed, in which a lead frame is provided. The lead frame comprises at least a first section and a second section spaced apart therefrom, each with at least 2 support areas. Each support area is also at least partially surrounded by a depression. A semiconductor body is applied to the support area of each section and fastened to it. Each support area thus shows a semiconductor body. This can be designed to be both light-emitting and as a detector.

The at least one first and second sections are then separated from one another, so that the sections with the semiconductor bodies form a multiplicity of chip groups, in particular of chip groups of the same design.

Likewise, according to the proposed principle, a carrier is provided which has a multiplicity of regions which are spaced apart from one another and which each comprise contact elements or contact fingers. In each case one chip group of the plurality of chip groups is brought into or on one of the plurality of spaced-apart regions of the carrier and the semiconductor body is electrically connected to the contact elements. Then the first and second areas of the carrier are singulated.

The 2-step manufacturing process increases flexibility and enables different applications to be covered. In addition, the individual steps can be optimized so that the yield increases and the error rate is reduced. For example, the lead frame can be selected to be very thin, often only in the range of less than 50%, in particular in the range of 10% to 30% of a thickness of the carrier. This enables finer structures that would not be possible with a thicker lead frame. On the other hand, the lead frame is stable and simplifies handling, especially for the further manufacture of the package.

Lead frames and carriers can be optimized for different aspects. For example, the carrier can be designed in such a way that heat is easily transported away, while the lead frame has fine structures that allow semiconductor bodies to be placed as closely as possible. Thickness tolerances of the entire carrier and the package are not significantly impaired by the lead frame.

In one aspect, providing a leadframe includes introducing, in particular etching, the recess. The lead frame can thus be structured by one or more etching steps. In addition to the depressions, further structures can also be etched, which are used, for example, for anchoring, contacting or heat transport. In this respect, the lead frame has structures for anchoring on the carrier or on a potting material. In one aspect, the depressions can additionally have holes, in particular holes at regular intervals. The depressions can also be holes so that the support area is connected to the lead frame via webs. Holes make it possible for an excess adhesive for fastening the semiconductor body to the support area to flow off. The integration of the lead frame on the carrier nevertheless ensures that the excess adhesive remains within the final package, thus avoiding short circuits.

In one aspect, the lead frame has connecting webs which are arranged between the at least one first and second section of the lead frame. In other words, first and second sections are connected to one another by first connecting webs. This means that the ladder frame can be manufactured as an "endless belt". In one aspect, the connecting web between the sections is thinner than the lead frame in the area of the support areas and, in particular, is designed to be flush with the support areas. The connecting web can be thinned by an etching process so that a wide trench is formed on the side opposite the support areas. In some aspects, the length of the connecting webs can be in the range of 1 to 2 times the length of the support area and in particular in the range of 0.5 to 1.2 times the length of the support area. This ensures that there is a sufficient distance between the chip groups for the separation, so that the separation can be carried out mechanically in a simple manner.

Another aspect relates to the application step. Here, in some aspects, it is provided that an adhesive is applied to the support area. The semiconductor body is then arranged on the support area. During this process, excess adhesive is pressed into the recess surrounding the support area. In one aspect, the contact areas of the semiconductor bodies face away from the respective support area. In this configuration, the semiconductor body is thus primarily fastened mechanically and electrically. The adhesive can be designed to be thermally conductive, so that the lead frame can already take on the function of a heat sink for removing heat.

One aspect relates to the design of the carrier. In this case, it can be provided that the carrier comprises a leadframe which has a second connecting web, the thickness of which is less than a thickness of an adjacent part of the carrier. In addition, in one embodiment it is possible for the connecting web to adjoin the contact elements of two adjacent areas.

Another aspect also relates to the design of the carrier. In one aspect, the plurality of areas of the provided carrier each comprise a support area, the thickness of which is selected such that a side of a chip group arranged thereon facing away from the support area is essentially flush with an upper side of the carrier.

The support area can each be equipped with a chip group, the chip group being placed on the support area of the plurality of areas and fastened, for example, by gluing, soldering or other measures. In particular, good heat transfer from the lead frame to the carrier can be provided here.

In some other aspects of the proposed method, the carrier has a film, in particular a polyimide film, on which a metallic lead frame is applied. The leadframe comprises contact areas and is designed in such a way that the contact areas of the carrier or of the leadframe are arranged around a support area on the film. The chip group can be arranged on this support area. The film can be peeled off after the manufacturing process is complete. The thickness tolerances decrease in this embodiment, since the etching depth or other processing steps of the leadframe are small.

In one embodiment, the chip groups are each applied to a support area of the multiplicity of areas in such a way that a light exit area of the semiconductor body faces the film. As a result, casting steps in particular can be carried out easily. After the encapsulation, the film is removed and an electrical connection is established between the semiconductor bodies and the contact areas by means of a planar contact. The planar connection can be vapor-deposited, sputtered or otherwise produced, for example.

For an electrical connection, in addition to a planar interconnect process, a contact area can also be wire-bonded to the contact elements on the side facing the light exit surface of the light-emitting semiconductor body. In some aspects, spaces are filled with a potting material. Gaps can be areas of the carrier or the leadframe, but also sections between the carrier or leadframe and the leadframe. Filling takes place in such a way that a continuous, flat body results, with a light exit surface being essentially free of the potting material.

Another aspect relates to an optoelectronic component housing that is also referred to in particular as an LED package. In some aspects of the principle presented here, the optoelectronic component housing comprises a leadframe which comprises at least a first section and a second section spaced apart therefrom, each with at least 2 support areas. Each support area is at least partially surrounded by a depression or a trench. The component housing furthermore comprises at least one light-emitting semiconductor body which is applied to the support area. According to the proposed principle, this fastening takes place by means of an adhesive or some other material arranged between the support area and the semiconductor body. A part of the adhesive or the material, in particular excess adhesive or material that is pressed out by the application, is at least partially located in the recess.

The optoelectronic component housing furthermore comprises a carrier, in particular a leadframe with a central area in which the leadframe is arranged. The carrier contains a multiplicity of contact fingers which are electrically connected to the at least one light-emitting semiconductor body. A potting material fills a space between the lead frame and elements of the carrier, so that in particular a flat body is formed.

Due to the separate leadframe with the trenches around the chips, the semiconductor bodies can be placed particularly tightly without damage to the bodies or malfunctions being expected from adhesive or subsequent processing. In addition to an optoelectronic semiconductor component, one or more integrated circuits, detectors or other passive and active components as semiconductor bodies can also be part of the component housing. In this respect, the package according to the proposed principle is not limited to the functionality of the semiconductor body that is disclosed and described here.

The recess in the lead frame may, in some aspects, be substantially one-half of a maximum thickness of the lead frame. In some further aspects, the lead frame can include anchor structures. These are embedded in the potting material so that good mechanical fastening is achieved. This aspect can also be beneficial during the manufacturing process. For example, the anchoring structures can also be anchored to structures of the carrier, so that greater stability and additional heat dissipation can be achieved.

In a further aspect, the central area of the carrier comprises a support area on which the lead frame is applied in a thermally connected manner. The connection can be made using an adhesive. Alternatively, the lead frame can also be soldered on. In addition to the thermal coupling, this also enables an electrical connection in some aspects. In some further aspects, the support area of the lead frame is smaller than an area of the at least one light-emitting semiconductor body. As a result, an undesired flow of an adhesive onto the top side of the semiconductor body in interaction with the depressions is avoided. In this context, it is provided in some aspects that the recess is designed with perforations.

In some further aspects, the contact fingers are electrically connected to the at least one light-emitting semiconductor body via a planar interconnect or a bonding wire.

Figure list

• 1 zeigt eine Ausgestaltung eines Leiterrahmens mit darauf angeordneten Halbleiterkörpern nach einigen Aspekten des vorgeschlagenen Prinzips;
• 2 stellt eine Ausgestaltung eines Leiterrahmenbandes mit darauf bestückten Halbleiterkörpern dar, die nach einigen Aspekten des vorgeschlagenen Prinzips erstellt wurde;
• 3 illustriert einige Aspekte zur weiteren Verarbeitung und Bestückung auf einem Substratträger;
• 4 zeigt Ausgestaltungen optoelektronischer Bauelemente nach einigen vorgeschlagenen Prinzipien;
• 5 zeigt einige Aspekte zu einer weiteren Verarbeitung und Bestückung auf einem Substratträger;
• 6 stellt Ausgestaltungen optoelektronischer Bauelemente nach einigen vorgeschlagenen Prinzipien dar;
• 7 illustriert eine alternative Verarbeitung und Bestückung auf einem Substratträger;
• 8 zeigt Ausgestaltungen optoelektronischer Bauelemente nach einigen vorgeschlagenen Prinzipien;
• 9 zeigt eine Ausgestaltung eines Verfahren gemäß einigen hier offenbarten Aspekten.

The invention is explained in more detail below with reference to the drawings.

• 1 shows an embodiment of a lead frame with semiconductor bodies arranged thereon according to some aspects of the proposed principle;
• 2 shows an embodiment of a leadframe strip with semiconductor bodies populated thereon, which was created according to some aspects of the proposed principle;
• 3 illustrates some aspects for further processing and assembly on a substrate carrier;
• 4th shows configurations of optoelectronic components according to some proposed principles;
• 5 shows some aspects of further processing and assembly on a substrate carrier;
• 6th shows configurations of optoelectronic components according to some proposed principles;
• 7th illustrates an alternative processing and assembly on a substrate carrier;
• 8th shows configurations of optoelectronic components according to some proposed principles;
• 9 FIG. 11 shows an embodiment of a method in accordance with some aspects disclosed herein.

The exemplary embodiments that now follow relate to various aspects and their combinations according to the proposed principle. The exemplary embodiments are not always shown true to scale. Various elements can also be enlarged or reduced in order to emphasize individual aspects. It goes without saying, however, for a person skilled in the art that the aspects presented here can be combined with one another in the various embodiments without this being detrimental to the inventive concept. Some aspects show a regular structure or shape. It should be noted here that slight differences and deviations from the ideal shape occur in practice, but this does not contradict the inventive concept.

DETAILED DESCRIPTION

1 shows an embodiment of a chip group, ie an intermediate product according to some aspects of the proposed method. The group 1 includes 3 semiconductor components 20r , 20b and 20g , which in the present case are designed as light-emitting semiconductor bodies. The individual semiconductor bodies 20r , 20b and 20g point on the one ladder frame 10 facing away from a light exit surface 21 on. In addition, the light exit surface includes contact areas (not shown here) for making electrical contact with each semiconductor body. The light-emitting semiconductor bodies are thus 20r , 20b and 20g designed as so-called horizontal light-emitting diodes, in which the contact areas are each on one side of the light-emitting semiconductor body. As an alternative to this, it can be provided in configurations to use so-called vertical semiconductor bodies. In this embodiment, the contact areas are arranged on opposite surfaces of the semiconductor body. In this case, the lead frame 10 be designed to be conductive and is in an electrically conductive connection with contact areas on the side of the semiconductor body facing the support areas. In addition, the lead frame has an anchoring structure at its respective side end, so that its surface area is enlarged there. With this anchoring, an improved mechanical fastening in a potting material can be achieved.

The semiconductor body 20r , 20b and 20g are by means of an adhesive 11a to support areas 14th of the lead frame 10 attached. Every support area 14th is from a ditch or a depression 11th surrounded on all sides. The ditch 11th shows a width r that is many times smaller than the width B of the support areas. The support area 14th again has the width B and an area. In this refinement, the support area is 14th somewhat smaller in width than the width or the area of the individual semiconductor bodies 20r , 20b and 20g executed. In other words, as shown, the lower edge of the respective semiconductor body extends over the support area 14th out.

During the application of the individual semiconductor bodies 20r , 20b and 20g on the support area 14th becomes the glue 11a between the semiconductor bodies and the support area and into the trenches or into the depressions 11th pressed. The trenches or the depressions 11th thus absorb the excess adhesive that was previously applied to the support area. Since, in addition, in this exemplary embodiment the area of the individual semiconductor bodies is somewhat larger than the support area, and these thus extend beyond the edge of the support area, the excess adhesive collects in the trenches or depressions 11th and does not pull along the side walls of the semiconductor body in the direction of the light exit surface due to capillary forces or surface tension.

The width of the trenches of the leadframe 10 as well as their depth can be determined by an upstream process. Thus becomes the lead frame 10 prepared by an etching or other structuring process, and thus the support areas and the trenches surrounding the support areas are formed. In the exemplary embodiment shown, the depth of the trenches corresponds approximately to half the thickness of the leadframe. Depending on the application and configuration, the lead frame can be made very thin. At the same time, the structuring of the lead frame allows 10 Particularly close placement of the individual semiconductor bodies due to the depressions receiving the excess adhesive.

In addition, in addition to the depressions or trenches 11th Holes may also be provided there in part, so that the excess adhesive can flow off onto the underside of the leadframe, ie the side facing away from the semiconductor bodies. Nevertheless, the excess amount of adhesive does not cause any deterioration in the finished component, since it can be encapsulated in further process steps as described below.

2 shows an embodiment of a so-called endless belt, which comprises a plurality of interconnected lead frames, each with light-emitting semiconductor bodies 20r , 20b and 20g are equipped. The light-emitting semiconductor bodies are used in these configurations Emission of light of different colors, for example red, blue and green, is provided. However, according to the proposed principle, it is easily possible to have fewer or more than these three semiconductor bodies shown here on a correspondingly structured leadframe 10 to raise. Likewise, detectors, integrated circuits or other elements can also be applied to the support areas instead of light-emitting semiconductor bodies.

The individual ladder frames 10 are here by means of so-called connecting webs 12th connected with each other. The length L of such a connecting web 12th corresponds essentially to the width B of a support area. In some embodiments, the structuring of the leadframe can thus be carried out in a particularly simple manner. In particular, a leadframe configured in this way can be separated at any point by not populating a support area with a semiconductor body, for example. This allows different assemblies to be made in a lead frame endless belt, so that it is suitable for different applications.

In the embodiment of 2 on the other hand, the rear side of the leadframe in the area of the connecting webs is used for improved isolation 12th additionally half-etched. This results in a depression or a trench 13th on the side facing away from the semiconductor components. Of course, in an alternative configuration, this trench can also be formed on the side facing the semiconductor components by an etching or another structuring process. The result is a connecting web, the thickness of which essentially corresponds to the thickness of the support area. In other words, there is the surface of the trenches 11th and 13th roughly on the same level and are only laterally spaced.

The additional structuring process also creates a predetermined separation point at this position, so that a subsequent separation process is particularly easy. According to the proposed procedure, this can be done in 2 Endless strip of a ladder frame shown at these predetermined breaking points in the area of the connecting webs 12th separated so that the in 1 Chip group shown 1 results.

The group 1 is now further processed in the following and applied to a leadframe, which forms part of the final package. The leadframe 3 can also be part of an endless belt, with the individual leadframes by separable connecting webs 36 are connected to each other. Each lead frame comprises several contact fingers 32 , which are used in the later package to make electrical contact with the individual semiconductor bodies. The contact fingers 32 are in the endless belt at least partially with the connecting webs 36 connected. In addition, each lead frame includes a support area 31 , which is arranged in the middle in the present examples. The support area 31 serves to fix the chip groups 1 that were produced in the previous process steps. The groups 1 are on the support areas 31 applied to the individual leadframes and fastened there. The attachment can for example also take place by means of gluing or soldering. At this point it should also be mentioned that every support area 31 can be designed such that it works, among other things, as a heat sink and can thus dissipate the heat generated during operation of the semiconductor components.

Between the support area 31 and the contact fingers 32 there may be gaps as shown. These are as in 4th shown with a potting material 5 filled, so that a consistently flat body results. In addition, the contact areas 21 on the surface of the respective semiconductor body by means of a planar interconnect 35 electrically conductive with contact areas 33 the contact finger 32 connected. The so-called planar interconnect can be produced, for example, by sputtering, vapor deposition and / or electroplating or metallic line structures produced in some other way. This forms an electrical connection between the contact fingers and the respective semiconductor body.

The potting material 5 is placed in the gaps in such a way that it is flush with the metallic leadframe. In this way a flat package can be created.

After potting, the individual lead frames are separated along the connecting webs and thus separated into packages.

In the exemplary embodiment shown, the surface of each package now includes the light exit surface of the respective light-emitting semiconductor body and the planar interconnects 35 . The elements produced in this way can be cast again in further process steps and converted into finished components. Alternatively, the manufactured package can also be used directly.

Looking back up again 3 is the connecting bridge 36 by means of a trench between 2 contact areas or contact fingers 32 realized. The ditch 38 can be similar to the ladder frame 10 for the chip group 1 by an etching process but also mechanically by milling or otherwise. The ditch or the deepening 38 In this exemplary embodiment, leadframes are on the same side as the groups applied later. The thickness of the connecting webs 36 correspond to the thickness of the part of the contact fingers that lead to the outside in the package. Here, too, the length of the connecting webs is chosen so that mechanical separation is possible without the contact fingers or their contact areas 33 to damage.

5 shows an alternative embodiment for the production of packages by means of a leadframe. In this example, the lead frame is an endless strip on a foil 4th upset. The foil 4th can for example be a polyimide film. For further processing the foil forms 4th thus the support area, so that the chip group 1 with her ladder frame 10 directly on top of the slide 4th is filed. The polyimide film 4th can have an adhesive film with low adhesive force or a slight roughness on the surface, so that the group 1 held in position. Subsequently, the spaces between the respective lead frames are potted by means of a potting material 5 from the top. The potting material is filled so far that it is flush with the top of the semiconductor components and the contact areas 32 concludes. If necessary, the potting material can also be used 5 are removed in an intermediate step, so that the light exit surfaces 21 the semiconductor body are exposed. Electrical contact is in turn made by a planar interconnect 35 so that the contacts 33 on the top of the fingers 32 are electrically conductively connected to the corresponding contact areas of the semiconductor body. The potting material is also in the trench 38 filled in, so that a flat body results. Then the polyimide film 4th can be easily peeled off at an acute angle. A separation or isolation of the individual leadframes to form a package can take place before or after the polyimide film is peeled off 4th respectively.

7th shows an alternative embodiment with regard to the use of a polyimide film. In this version, the chip group 1 not like in the previous example with its lead frame 10 applied to the polyimide film, but with the respective light exit surfaces 21 the semiconductor body. This is the height of the chip group 1 in this embodiment chosen so that it is flush with the top of the contact fingers 32 concludes. In a subsequent step, the potting material is again filled in. This configuration has the advantage that the material over the lead frame 10 the chip group 1 and the top of the contact fingers 32 can flow away without the functionality of the package and the semiconductor body being impaired. This means that different package sizes can be easily implemented, with the thickness being adjustable using additional potting material.

Then, as in 8th shown, turned the endless belt of the leadframe and peeled off the polyimide film. As a result, the light exit surface of the semiconductor body is exposed. Likewise, it can also be done here again by means of a planar interconnect 35 Contact areas of the semiconductor body with the contact areas 33 on the contact finger 32 be connected in an electrically conductive manner. Through the polyimide film 4th In the previous method step, a planar surface of the potting material and a flush finish with the light exit surface and the contact areas of the semiconductor body are also achieved. After separation, the lead frame generated in this way can either be further processed or, depending on the application, used directly.

The individual process steps for producing an optoelectronic component according to the proposed principle are described in 9 shown schematically again. In a first step S1, the lead frame is provided, which is intended to receive the individual light-emitting semiconductor bodies. For this purpose, the lead frame has a first and a second section spaced apart therefrom, each with 2 support areas. The two sections are coupled to one another by a connecting web. In addition, the support areas are at least partially surrounded by a depression. Here, the recess can be produced by a process or some other structuring. This so-called interposer lead frame can be adjusted in its thickness according to the respective application. This flexibility enables fine structures that may not be possible with thicker lead frames.

Then, in step S2, a light-emitting semiconductor body is applied to the support areas of each section. In this case, the base area of the light-emitting semiconductor body can be greater than or equal to or also smaller than the contact area of the respective section. The semiconductor body is attached to the support area by means of an adhesive, for example. Excess chip adhesive can be drained away through the recess running around each support area. In addition, breaks or holes can be provided within the recess so that the chip adhesive can also run onto the back of the interposer lead frame. Nevertheless, it is inside the later final package.

This avoids a possible short circuit caused by conductive materials within the adhesive. At the same time, a different adhesive can be used depending on the application. In particular, adhesives based on silver can be used for better heat dissipation. After the adhesive has cured and the semiconductor body has been fastened, the individual lead frames are separated, so that a large number of groups, in particular groups of the same construction, are formed. The individual groups created in this way can now be further processed in different ways.

In step S4, a carrier is provided for further processing, which carrier has a multiplicity of regions that are spaced apart from one another. These each include contact fingers with contact elements provided for the electrical connection. The large number of spaced-apart areas are also connected to one another in this exemplary embodiment by connecting webs. For example, the connecting webs can each connect contact fingers or elements of different areas to one another and thus create an endless carrier. In one embodiment, the carrier is a leadframe, in particular a QFN leadframe.

The areas of the carrier that are spaced apart from one another each have a further support area on which one of the plurality of chip groups is deposited in step S5. The group of chips is intimately connected to the support area. This ensures that the chip group has sufficient heat dissipation onto the support area and thus onto the carrier. The light-emitting semiconductor bodies are then connected in an electrically conductive manner to the contact elements in step S6. Before the electrical connection, an intermediate space can also be filled with a potting material, so that a flat body results. After a potting material has been applied, the first and second areas can be separated in step S7.

The stack of groups with the interposer leadframe formed by the application of the chip groups on the support area can also be glued or soldered. Since the side of the interposer leadframe used for application to the support area is largely flat, it can be coated with a relatively thick gold or gold-tin layer and then soldered to the support area without major losses. As a result, a good heat spread is also achieved through the support area in the final housing.

By using a film as shown in the preceding examples, production can be simplified. This approach is also used to keep the backside free of potting material. After potting, the polyimide film is removed. One advantage of using a film according to the proposed principle is that the thickness tolerances decrease because the depth of the etching of the leadframe is now reduced 3 has no relevant influence. On the one hand, this makes it easier to keep the chip surface free of potting material and, on the other hand, the component thickness can be reduced.

List of reference symbols

1

Chip group

3

Carrier, leadframe

4th

Foil, polyimide foil

5

Potting material

10

Ladder frame

11th

Digging, deepening

11a

adhesive

12th

Connecting bridge

13th

dig

14th

Support area

20r, 20g, 20b

Semiconductor body

21

Light exit surface

31

Support area

32

Contact finger

33

Contact area

35

planar interconnect

36

Connecting bridge

38

dig

Claims (21)

A method for producing an optoelectronic component, comprising the steps: - providing (S1) a lead frame (10), in which the lead frame comprises at least a first section and a second section spaced apart therefrom, each with at least 2 support areas (14), and the support areas ( 14) are each at least partially surrounded by a recess (11); - Application (S2) of a light-emitting semiconductor body (20r, 20b, 20g) on the support areas (14) of each section; - Separation (S3) of the at least one first and second section to form a plurality of chip groups (1), in particular chip groups of the same construction; - Providing (S4) a carrier (3) which has a plurality of spaced apart regions which each comprise contact fingers (32); Applying (S5) one of the plurality of chip groups (1) in or onto one of the plurality of spaced-apart regions of the carrier; - Contacting (S6) the light-emitting semiconductor bodies (20r, 20b, 20g) with the contact fingers (32); - Separation (S7) of the plurality of spaced apart areas. Procedure according to Claim 1 , in which the provision of a leadframe comprises: introducing, in particular etching, the recess (11), the recess having optional holes, in particular holes at regular intervals. Procedure according to Claim 1 or 2 , in which the lead frame (10) provided has structures for anchoring on the carrier (3) or on a potting material (5). Method according to one of the preceding Claims 1 until 3 , in which the provision of a lead frame (10) comprises a lead frame (10) in which the at least one first and second section of the lead frame are connected to one another by a first connecting web (12) which is thinner than the lead frame (10) in the region of the Support areas (14), and which is in particular flush with the support areas (14). Procedure according to Claim 4 , in which the length (L) of the first connecting web (14) is in the range of 1 to 2 times a length of the support area and in particular in the range of 0.5 to 1.2 times the length of the support areas. Method according to one of the preceding Claims 1 until 5 , in which the step of applying comprises: - applying an adhesive (11a) to the support areas, - attaching the at least 2 light-emitting semiconductor bodies (20r, 20g, 20b) to one of the at least 2 support areas (14), so that excess adhesive ( 11a) is pressed into the recess (11) surrounding the respective support area (14). Method according to one of the preceding Claims 1 until 6th , in which the contact areas of the light-emitting semiconductor bodies face away from the respective support area. Method according to one of the preceding Claims 1 until 7th , in which the provision of a carrier (3) comprises a leadframe which has a second connecting web (36), the thickness of which is less than a thickness of an adjacent part of the carrier, and / or adjoins the contact fingers (32) of two adjacent areas. Method according to one of the preceding Claims 1 until 8th , in which the plurality of areas of the provided carrier each comprise a support area (31), the thickness of which is selected such that a side of a chip group (1) arranged thereon facing away from the support area (31) is essentially flush with an upper side of the carrier (3 ) concludes. Procedure according to Claim 9 , in which the step of applying the chip groups (1) comprises: arranging and fastening one of the plurality of chip groups (1) each on a support area (36) of the plurality of areas, the step of fastening in particular by gluing or soldering he follows. Method according to one of the preceding Claims 1 until 9 , in which the carrier has a film (4), in particular a polyimide film, on which a metallic leadframe (3) is applied, so that contact areas of the carrier at least partially surround a support area on the film. Method according to one of the preceding Claims 1 until 9 , in which the carrier has a film (4), in particular a polyimide film, on which at least one of the plurality of chip groups is deposited. Method according to a Claim 11 or 12th , in which the step of applying the chip groups (1) comprises: arranging the plurality of chip groups (1) each on a support area of the plurality of areas such that a light exit surface (21) of the semiconductor body faces the film (4) . Method according to one of the preceding Claims 1 until 13th , in which the step of making contact comprises: wire bonding of a contact area on the side facing the light exit surface (21) of the light-emitting semiconductor body with the contact fingers (32). Method according to one of the preceding Claims 1 until 14th , further comprising the step of filling gaps with a potting material (5), so that a continuous flat body results, a light exit surface being essentially free of the potting material. Procedure according to Claim 15 , in which the light-emitting semiconductor bodies are contacted by forming a planar interconnect which runs at least partially on the potting material. Optoelectronic component housing, comprising: - a lead frame (10) which has at least a first section and a section spaced therefrom a second section each having at least 2 support areas (14), each support area (14) being at least partially surrounded by a depression (11); At least one light-emitting semiconductor body which is applied to the support area, an adhesive used for fastening the light-emitting semiconductor body to the support area being at least partially in the recess; - A carrier, in particular a leadframe with a central area (31) in which the lead frame is arranged and with a plurality of contact fingers (32) which are electrically connected to at least one light-emitting semiconductor body; - A potting material (5) which fills a space between the lead frame and elements of the carrier, so that in particular a flat body is formed. Optoelectronic component housing according to Claim 17 , in which the central area of the carrier has a support area (36) on which the lead frame (10) is applied in a thermally connected manner. Optoelectronic component housing according to one of the Claims 17 until 18th , in which the support area (14) of the lead frame (10) is smaller than an area of the at least one light-emitting semiconductor body. Optoelectronic component housing according to one of the Claims 17 until 19th , in which the contact fingers (32) are electrically connected to the at least one light-emitting semiconductor body via a planar interconnect (35) or a bonding wire. Optoelectronic component housing according to one of the Claims 17 until 19th , in which the lead frame comprises anchoring structures which are surrounded by potting material.

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