DE10122221A1 - Power electronics module with base plate and substrate soldered to it has base plate recess with at least dimensions of substrate and with wall regions inclined from out to in - Google Patents

Power electronics module with base plate and substrate soldered to it has base plate recess with at least dimensions of substrate and with wall regions inclined from out to in

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Publication number
DE10122221A1
DE10122221A1 DE2001122221 DE10122221A DE10122221A1 DE 10122221 A1 DE10122221 A1 DE 10122221A1 DE 2001122221 DE2001122221 DE 2001122221 DE 10122221 A DE10122221 A DE 10122221A DE 10122221 A1 DE10122221 A1 DE 10122221A1
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Germany
Prior art keywords
substrate
base plate
power electronics
dimensions
modules according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE2001122221
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German (de)
Inventor
Ronald Eisele
Holger Ulrich
Max Hermann Poech
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Danfoss Silicon Power GmbH
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Danfoss Silicon Power GmbH
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Publication date
Application filed by Danfoss Silicon Power GmbH filed Critical Danfoss Silicon Power GmbH
Priority to DE2001122221 priority Critical patent/DE10122221A1/en
Publication of DE10122221A1 publication Critical patent/DE10122221A1/en
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0382—Continuously deformed conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09745—Recess in conductor, e.g. in pad or in metallic substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
    • H05K2203/0108—Male die used for patterning, punching or transferring
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

The power electronics module has a base plate and a substrate soldered to the base plate. The base plate has a recess with at least the dimensions of the substrate and with wall regions inclined from out to in. The recess is formed as a trench in the base plate that follows the outer contours of the solder field. AN Independent claim is also included for the following: a method of soldering a substrate to a power electronics module.

Description

Die Erfindung betrifft ein Leistungselektronikmodul mit einer Bodenplatte und darauf gelötetem Substrat.The invention relates to a power electronics module a base plate and soldered substrate.

Leistungselektronikmodule beinhalten Leistungssubstrate (meist Keramikleiterplatten mit Kupferleitflächen), die auf Wärmesenken oder auch Bodenplatten aufgelötet werden um zunächst die rach ansteigenden Temperaturen im Betrieb durch Wärmeableitung in diese Wärmesenken abführen zu können. Dabei macht man sich das gute Wärmeleitverhalten eines Lotes zu Nutze, das erheblich über dem eines reinen Kontakts liegt, bei dem zwangsläufig Luft selbst zwischen den in diesem Gebiet der Technik schon ebenen Flächen noch eingeschlossen wird.Power electronics modules include power substrates (mostly ceramic circuit boards with copper conductive surfaces), the can be soldered onto heat sinks or floor plates in order to first of all see the rising temperatures during operation  dissipate into these heat sinks by heat dissipation can. You make yourself good thermal conductivity of a solder that is considerably higher than that of a pure one Contact is inevitably between the air itself the surfaces that are already flat in this area of technology is still trapped.

Allerdings bestehen das nicht leitende Substrat und die oft metallische Bodenplatte im allgemeinen aus unter­ schiedlichen Materialien mit thermisch stark unterschied­ lichen Ausdehnungen. So wird sich eine keramische Leiter­ platte aus Aluminiumoxid beispielsweise mit 6 bis 8 ppm/K ausdehnen und eine Bodenplatte aus Kupfer 17 mit ppm/K.However, the non-conductive substrate and the often metallic floor slab generally made from under different materials with strong thermal differences expansion. So there will be a ceramic ladder plate made of aluminum oxide, for example with 6 to 8 ppm / K expand and a base plate made of copper 17 with ppm / K.

Die Lötverbindungen werden bisher durch Beschichten der Bauteile mit Lotpaste oder durch Einfügen einer Zwischen­ lage aus Lotfolie und anschließendes Aufschmelzen er­ stellt. Bei einem Aufschmelzen der Lotlegierung erfolgt dabei eine Benetzung der Lötpartner Substrat und Wärmesenken-Bodenplatte.So far, the solder connections have been made by coating the Components with solder paste or by inserting an intermediate layer of solder foil and subsequent melting provides. When the solder alloy melts thereby wetting the soldering partner substrate and Heat sink base plate.

Dabei stellt sich das Problem, daß während der Zeit, in der das Lot flüssig ist, Die Verbindung schwierig in der gewünschten Position zu halten ist. Vielmehr "schwimmt" das Substrat auf dem erschmolzenen Lot und kann sich aus der gewünschten Position in eine zufällige Position hin­ ein bewegen. Dieser Effekt verstärkt sich mit zunehmender Lotschichtdicke.The problem arises that during the time in the solder is liquid, the connection difficult in the desired position is to be held. Rather, "floats" the substrate on the melted solder and may come off the desired position into a random position a move. This effect increases with increasing Solder layer thickness.

Eine Minimierung der Lotschichtdicke ist jedoch nachtei­ lig, da sich die beim Erkalten des Lotes aber auch bei späteren Temperaturwechselzyklen der Leistungsmodule er­ gebenden thermischen Spannungen insbesondere in Horizon­ talrichtung in einer dünnen Lotschicht stärker auswirken und zur schnellerer Rißbildung führen, als in einer dicken Lotschicht.However, minimizing the solder layer thickness is disadvantageous lig, because when the solder cools, the later temperature change cycles of the power modules giving thermal stresses especially in Horizon impact in a thin layer of solder  and lead to faster crack formation than in one thick layer of solder.

Bisher begegnet man dem Problem des "Verschwimmens" mit dem Auftrag von Lötstopplack, neben der gewünschten Löt- Position. Der Lötstopplack beinhaltet eine Chemikalie, die sich von Lot nicht benetzen läßt, und daher das flüs­ sige Lot seitlich begrenzen hilft. Allerdings kann hier nur eine dünne Schichtdicke an Lot gehalten werden. Wei­ ter geht so wertvolle Fläche neben dem Substrat verloren.So far, one has encountered the problem of "blurring" the application of solder mask, in addition to the desired solder Position. The solder mask contains a chemical which cannot be wetted by Lot, and therefore flows Limiting sige Lot laterally helps. However, here only a thin layer of solder can be kept. Wei The valuable area next to the substrate is lost.

Die Erfindung hat sich daher zur Aufgabe gestellt, bei Vermeidung der Rißbildung das "Verschwimmen" des Substra­ tes in eine nicht gewünschte Position zu verhindern.The invention has therefore set itself the task of Avoiding cracking the "blurring" of the substra to prevent tes in an undesired position.

Erfindungsgemäß wird dies durch die Merkmale des Hauptan­ spruches gelöst. Die Unteransprüche geben vorteilhafte Ausführungsformen der Erfindung wieder.According to the invention this is due to the features of the main solved. The subclaims give advantageous Embodiments of the invention again.

Vorteilhaft ist insbesondere, daß durch die geometrisch vorgegebene, mit Lot ausgefüllte Vertiefung auch größere Schichtdicken an Lot realisiert werden können, ohne Be­ reiche zu schaffen, in denen das Substrat verschwimmt.It is particularly advantageous that the geometric predefined depression filled with solder, even larger ones Layer thicknesses on solder can be realized without loading creating rich in which the substrate blurs.

Statt dessen wird eine Lötung geschaffen, die eine defi­ nerte, nämlich sich unter Verbindung mit einem Vertie­ fungsrand bildende innige, sich auch beim "Kriechen" des Lotes während einer Vielzahl von späteren Temperaturzy­ klen nicht verschiebende Grenze ausbildet. Durch die Vor­ sehung geneigter Wände wenigstens an den Außenrändern an der Vertiefung wird die Außenfläche des Übergang Boden­ platte/Lot vergrößert, so daß beim Ausdehnen der unter­ schiedlichen Partner eine größere Strecke zum Abbau der mechanischen Spannung zur Verfügung steht; also mit weni­ ger Rissbildung zu rechnen ist. Instead, a solder is created that defi nner, namely in connection with a Vertie edge forming intimate, also when "crawling" the Solder during a variety of later temperature cycles forms a non-shifting boundary. By the front see inclined walls at least on the outer edges the depression becomes the outer surface of the transition floor plate / solder enlarged so that when you expand the bottom different partners a greater distance to dismantle the mechanical tension is available; so with little less cracking is to be expected.  

Gleichzeitig wird durch das flache Auslaufen das sich beim Schmelzen ausbreitende flüssige Lot in seiner Bewe­ gung gestoppt und es kann nicht zu "Überschwappeffekten" wie bei Lötstopplack kommen. Dort können große "Tropfen" den Lack auf eine Weise überwinden, wie es jedermann bei Wassertropfen, die an Scheiben ablaufen, bekannt sind.At the same time, this is due to the shallow leakage liquid solder spreading during melting in its motion stopped and there can be no "spillover effects" like come with solder mask. There can be large "drops" overcome the paint in a way that everyone does Water droplets that run off panes are known.

Dadurch, daß die Vertiefung in ihren äußeren Bereichen tiefer als in ihrem mittleren Bereich ist, wird insbeson­ dere an den rißgefährdeten äußeren Bereichen eine größere Schichtdicke des Lotes aufgebaut, die schon in sich die Rißbildung reduziert. Als besonders bevorzugt hat sich eine über die Substratfläche hinaus ausgebildete Vertie­ fung mit einem zusätzlichen Graben am Rand herausge­ stellt, die die verschiednen oben beschriebenen Effekte in sich vereint.The fact that the recess in its outer areas is lower than in its middle range a larger one at the outer areas prone to cracking Layer thickness of the solder built up, which is already in itself Cracking reduced. Has been particularly preferred a recess formed beyond the substrate surface with an additional trench on the edge represents the various effects described above united in itself.

Versuche haben ergeben, daß eine Verdopplung der Löt­ schichtdicke auch einen Faktor von wenigstens zwei in der Verlängerung der Lebensdauer des gesamten Leistungsmoduls erbringt. Die Lebenserwartung eines Leistungsmoduls ist nämlich dann beendet, wenn sich durch Rißbildung die thermische Senke der Bodenplatte von dem Leistungssub­ strat gelöst hat, und dieses daher nicht mehr in der Lage ist, seine Temperatur schnell abzuführen. Es wird sich dann bei Belastung zu schnell zu stark erhitzen.Experiments have shown that doubling the solder layer thickness also a factor of at least two in the Extension of the lifespan of the entire power module he brings. The life expectancy of a performance module is namely ended when the crack formation thermal sink of the bottom plate from the power sub strat has resolved, and is therefore no longer able is to quickly dissipate its temperature. It will then heat up too quickly under load.

Die sich durch die Erfindung ergebende Lötschichtdicke von mehr als 200 µm, bei gleichzeitiger Gewährleistung einer hohen Positioniergenauigkeit des Substrates hat sich als sehr vorteilhaft erwiesen. Die Verminderung der Rißbildung erlaubt es auch, außer den Al2O3 Substraten auch einige Substrate mit noch geringerem thermischen Ausdehnungskoeffizienten, also mit noch größerem Unterschied zum Ausdehnungskoeffizienten der Kupferplatte ein­ zusetzen.The solder layer thickness resulting from the invention of more than 200 μm, while at the same time ensuring a high positioning accuracy of the substrate, has proven to be very advantageous. The reduction in the formation of cracks also allows, in addition to the Al 2 O 3 substrates, also a few substrates with an even lower thermal expansion coefficient, ie with an even greater difference to the expansion coefficient of the copper plate.

Da das E-Modul der Scherdehnungsamplitude des Lotes er­ heblich geringer als diejenigen des Substrates eines DCB (direct copper bonded)-Leistungselektronikmoduls sind, können auch sehr schnelle Temperaturwechsel mit hoher Zu­ verlässigkeit des Bauteils absolviert werden.Because the modulus of elasticity of the shear strain amplitude of the solder he considerably less than that of the substrate of a DCB (direct copper bonded) power electronics module, can also do very fast temperature changes with high temperature reliability of the component.

Dabei können in die meist aus Kupfer bestehende Boden­ platte die Vertiefungen und Gräben einfach durch Fräsen eingebracht werden, was, da meist ohnehin Bohrlöcher zur Befestigung der Wärmesenken-Bodenplatten vorgenommen wer­ den, ohne großen Aufwand erfolgen kann. Es kann aber auch - gerade bei großen Stückzahlen - durch Schmieden, daß heißt Einsenken eines Stempels, eine Vertiefung in genau definierter Tiefe erfolgen, bei der gleichzeitig der Oberfläche des Kupfers hocheben zur innigen Verbindung mit Lot vorbereitet wird. Andere Herstellungsweisen, bei­ spielsweise durch Rollen sind denkbar, jedoch aufwendi­ ger.This can be done in the mostly copper floor simply flatten the depressions and trenches by milling be brought in what, because mostly drill holes anyway Attachment of the heat sink base plates made to who that can be done without much effort. But it can also - especially for large quantities - by forging that means sinking a stamp, a deepening in exactly defined depth, at which the Raise the surface of the copper for an intimate connection is prepared with solder. Other ways of making for example by rolling are conceivable, but expensive ger.

Falls zudem eine vorgewölbte Bodenplatte zum Einsatz kommt, sollte zunächst die Wölbung in der gewünschten Weise eingebracht werden und anschließend die Nut einge­ fräst werden. Lediglich wenn die Nut durch Schmieden er­ folgt, sollte die Reihenfolge umgekehrt werden, da der Schmiedeschritt vorgesehene wesentlich geringere Vorwöl­ bungen ausgleicht.If a bulging base plate is also used comes, the curvature should first be in the desired Be introduced and then inserted the groove be milled. Only if the groove by forging it follows, the order should be reversed because the Forging step provided significantly less bulge balances exercises.

Claims (8)

1. Leistungselektronikmodul mit einer Bodenplatte und darauf gelötetem Substrat, gekennzeichnet durch eine in die Bodenplatte eingebrachte Vertiefung mit wenigstens den Dimensionen des Substrates.1. Power electronics module with a base plate and a substrate soldered thereon, characterized by a recess made in the base plate with at least the dimensions of the substrate. 2. Leistungselektronikmodule nach Anspruch 1, dadurch gekennzeichnet, daß die Vertiefung nach außen hin mit geneigten Wandbereichen flach ausläuft.2. Power electronics modules according to claim 1, characterized characterized in that the depression towards the outside with inclined wall areas runs flat. 3. Leistungselektronikmodule nach einem der voran­ gehenden Ansprüche, dadurch gekennzeichnet, daß die Vertiefung in Form eines den Außenkonturen des Lötfel­ des folgenden Grabens in der Bodenplatte eingebracht ist.3. Power electronics modules according to one of the ahead going claims, characterized in that the Indentation in the form of the outer contours of the solder pad of the following trench in the base plate is. 4. Leistungselektronikmodule nach einem der voran­ gehenden Ansprüche, dadurch gekennzeichnet, daß neben einem im wesentlichen den Dimensionen des Substrates folgenden Graben unterhalb des Substrates eine Vertie­ fung in der Bodenplatte vorgesehen ist.4. Power electronics modules according to one of the ahead outgoing claims, characterized in that in addition one essentially the dimensions of the substrate ditch below the substrate fung is provided in the base plate. 5. Leistungselektronikmodule nach einem der vorange­ henden Ansprüche, dadurch gekennzeichnet, daß die Vertiefung die Dimensionen des Substrates nach außen hin um ein Mehrfaches der Substratdicke überschreitet.5. Power electronics modules according to one of the preceding existing claims, characterized in that the recess  the dimensions of the substrate to the outside by a multiple of the substrate thickness. 6. Leistungselektronikmodule nach einem der vorange­ henden Ansprüche, dadurch gekennzeichnet, daß die Ein­ senkung der Vertiefung die Substratdicke um ein Mehr­ faches überschreitet.6. Power electronics modules according to one of the preceding existing claims, characterized in that the one lowering the indentation the substrate thickness by more times. 7. Leistungselektronikmodule nach einem der vorange­ henden Ansprüche, dadurch gekennzeichnet, daß die Ein­ senkung der Vertiefung in die Bodenplatte zwischen 0,1 und 0,3 mm tief ist.7. Power electronics modules according to one of the preceding existing claims, characterized in that the one lowering the depression in the base plate by 0.1 and is 0.3 mm deep. 8. Verfahren zum Auflöten eines Substrates auf ein Leistungselektronikmodul nach einem der vorangehenden Ansprüche, dadurch gekennzeichnet, daß der Schritt des Einbringens einer Vertiefung durch Prägen mit einem Schmiedestempel durchgeführt wird und anschließend ein Wölben der Bodenplatte bewirkt wird bei dem die Ein­ spannpunkte um einige Mikrometer von der Auflagefläche abgehoben werden.8. Method for soldering a substrate onto a Power electronics module according to one of the preceding Claims, characterized in that the step of Make a depression by embossing with a Forging stamp is performed and then a Arching of the base plate is caused by the one clamping points a few micrometers from the contact surface be lifted off.
DE2001122221 2001-05-08 2001-05-08 Power electronics module with base plate and substrate soldered to it has base plate recess with at least dimensions of substrate and with wall regions inclined from out to in Withdrawn DE10122221A1 (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10319782A1 (en) * 2003-04-30 2004-11-25 Osram Opto Semiconductors Gmbh Chip carrier element especially for luminescent and laser diode chips, has recessed receiving area adjacent to the chip mounting surface to connect the chip
DE102004019568A1 (en) * 2004-04-22 2005-11-17 Semikron Elektronik Gmbh & Co. Kg Substrate for a power semiconductor module has electronic components and connections on metal conductor on an isolation layer and recesses beneath or next to these
DE102004021633A1 (en) * 2004-05-03 2005-12-01 Infineon Technologies Ag Method for connecting a semiconductor chip to a chip carrier and arrangement with a semiconductor chip and a chip carrier
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DE10319782A1 (en) * 2003-04-30 2004-11-25 Osram Opto Semiconductors Gmbh Chip carrier element especially for luminescent and laser diode chips, has recessed receiving area adjacent to the chip mounting surface to connect the chip
DE10319782B4 (en) * 2003-04-30 2009-01-02 Osram Opto Semiconductors Gmbh Optoelectronic semiconductor component with a chip carrier element
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DE102004021633B4 (en) * 2004-05-03 2006-04-06 Infineon Technologies Ag Method for connecting a semiconductor chip to a chip carrier and arrangement with a semiconductor chip and a chip carrier
US7511382B2 (en) 2004-05-03 2009-03-31 Infineon Technologies Ag Semiconductor chip arrangement and method
DE102004055817B3 (en) * 2004-11-18 2006-01-12 Danfoss Silicon Power Gmbh Manufacture procedure for heavy-duty semiconductor modules involves mass of solder to produce solder connection and particles of copper are sprayed into place on solder

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