US11469260B2 - Display substrate, method for preparing the same, and display device - Google Patents

Display substrate, method for preparing the same, and display device Download PDF

Info

Publication number
US11469260B2
US11469260B2 US16/761,231 US201916761231A US11469260B2 US 11469260 B2 US11469260 B2 US 11469260B2 US 201916761231 A US201916761231 A US 201916761231A US 11469260 B2 US11469260 B2 US 11469260B2
Authority
US
United States
Prior art keywords
pattern
photoresist
photoresist pattern
layer
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active, expires
Application number
US16/761,231
Other languages
English (en)
Other versions
US20210313356A1 (en
Inventor
Ning Liu
Bin Zhou
Jun Liu
Yang Zhang
Tongshang Su
Haitao Wang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hefei Xinsheng Optoelectronics Technology Co Ltd
Beijing BOE Technology Development Co Ltd
Original Assignee
Hefei Xinsheng Optoelectronics Technology Co Ltd
Beijing BOE Technology Development Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hefei Xinsheng Optoelectronics Technology Co Ltd, Beijing BOE Technology Development Co Ltd filed Critical Hefei Xinsheng Optoelectronics Technology Co Ltd
Assigned to HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD. reassignment HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: LIU, JUN, LIU, NING, SU, Tongshang, WANG, HAITAO, ZHANG, YANG, ZHOU, BIN
Publication of US20210313356A1 publication Critical patent/US20210313356A1/en
Assigned to Beijing Boe Technology Development Co., Ltd. reassignment Beijing Boe Technology Development Co., Ltd. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: BOE TECHNOLOGY GROUP CO., LTD.
Application granted granted Critical
Publication of US11469260B2 publication Critical patent/US11469260B2/en
Active legal-status Critical Current
Adjusted expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/1288Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0005Production of optical devices or components in so far as characterised by the lithographic processes or materials used therefor
    • G03F7/0007Filters, e.g. additive colour filters; Components for display devices
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/16Coating processes; Apparatus therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/46Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/461Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
US16/761,231 2018-11-27 2019-10-28 Display substrate, method for preparing the same, and display device Active 2040-09-27 US11469260B2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
CN201811424979.XA CN109712930B (zh) 2018-11-27 2018-11-27 显示基板及其制作方法、显示装置
CN201811424979.X 2018-11-27
PCT/CN2019/113588 WO2020108196A1 (zh) 2018-11-27 2019-10-28 显示基板及其制作方法、显示装置

Publications (2)

Publication Number Publication Date
US20210313356A1 US20210313356A1 (en) 2021-10-07
US11469260B2 true US11469260B2 (en) 2022-10-11

Family

ID=66254430

Family Applications (1)

Application Number Title Priority Date Filing Date
US16/761,231 Active 2040-09-27 US11469260B2 (en) 2018-11-27 2019-10-28 Display substrate, method for preparing the same, and display device

Country Status (3)

Country Link
US (1) US11469260B2 (zh)
CN (1) CN109712930B (zh)
WO (1) WO2020108196A1 (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109712930B (zh) 2018-11-27 2020-10-30 合肥鑫晟光电科技有限公司 显示基板及其制作方法、显示装置
CN110828520B (zh) * 2019-11-15 2022-09-09 京东方科技集团股份有限公司 一种阵列基板及其制备方法、显示面板和显示装置
CN113424302A (zh) * 2020-01-02 2021-09-21 京东方科技集团股份有限公司 薄膜晶体管及其制造方法、显示面板和显示装置
CN111312725B (zh) * 2020-02-24 2023-02-03 合肥鑫晟光电科技有限公司 一种阵列基板及其制备方法、显示面板

Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002026332A (ja) 2000-07-10 2002-01-25 Fujitsu Ltd 薄膜トランジスタの製造方法
TW493095B (en) 1994-07-08 2002-07-01 Sanyo Electric Co Liquid-crystal display with inter-line short-circuit preventive function and process for producing same
US20030057518A1 (en) 2001-01-26 2003-03-27 Schaper Leonard W. Rc terminator and production method therefor
US20050142896A1 (en) * 2003-04-25 2005-06-30 Semiconductor Energy Laboratory Co., Ltd. Liquid drop jetting apparatus using charged beam and method for manufacturing a pattern using the apparatus
US20050153483A1 (en) 2002-04-11 2005-07-14 Kononklijke Philips Electronics N.V. A Corporation Carrier, method of manufacturing a carrier and an electronic device
CN1647258A (zh) 2002-04-15 2005-07-27 肖特格拉斯公司 在衬底上形成图案层的方法
CN101136376A (zh) 2007-09-26 2008-03-05 友达光电股份有限公司 像素结构及其制造方法
CN104716092A (zh) 2015-04-02 2015-06-17 京东方科技集团股份有限公司 阵列基板的制造方法及制造装置
US20150187898A1 (en) * 2013-12-26 2015-07-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
CN106057667A (zh) 2016-07-06 2016-10-26 京东方科技集团股份有限公司 膜层图案的制作方法、基板的制作方法及基板、显示装置
CN107895726A (zh) 2017-11-30 2018-04-10 武汉天马微电子有限公司 一种阵列基板及其制作方法和显示装置
CN108231797A (zh) 2018-01-03 2018-06-29 京东方科技集团股份有限公司 一种导电结构图案及其制备方法、阵列基板、显示装置
CN109712930A (zh) 2018-11-27 2019-05-03 合肥鑫晟光电科技有限公司 显示基板及其制作方法、显示装置

Patent Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW493095B (en) 1994-07-08 2002-07-01 Sanyo Electric Co Liquid-crystal display with inter-line short-circuit preventive function and process for producing same
JP2002026332A (ja) 2000-07-10 2002-01-25 Fujitsu Ltd 薄膜トランジスタの製造方法
US20030057518A1 (en) 2001-01-26 2003-03-27 Schaper Leonard W. Rc terminator and production method therefor
US20050153483A1 (en) 2002-04-11 2005-07-14 Kononklijke Philips Electronics N.V. A Corporation Carrier, method of manufacturing a carrier and an electronic device
CN1647258A (zh) 2002-04-15 2005-07-27 肖特格拉斯公司 在衬底上形成图案层的方法
US20050142896A1 (en) * 2003-04-25 2005-06-30 Semiconductor Energy Laboratory Co., Ltd. Liquid drop jetting apparatus using charged beam and method for manufacturing a pattern using the apparatus
CN101136376A (zh) 2007-09-26 2008-03-05 友达光电股份有限公司 像素结构及其制造方法
US20150187898A1 (en) * 2013-12-26 2015-07-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
CN104716092A (zh) 2015-04-02 2015-06-17 京东方科技集团股份有限公司 阵列基板的制造方法及制造装置
US20170125546A1 (en) 2015-04-02 2017-05-04 Boe Technology Group Co., Ltd. Method for manufacturing array substrate and manufacturing device
CN106057667A (zh) 2016-07-06 2016-10-26 京东方科技集团股份有限公司 膜层图案的制作方法、基板的制作方法及基板、显示装置
CN107895726A (zh) 2017-11-30 2018-04-10 武汉天马微电子有限公司 一种阵列基板及其制作方法和显示装置
CN108231797A (zh) 2018-01-03 2018-06-29 京东方科技集团股份有限公司 一种导电结构图案及其制备方法、阵列基板、显示装置
CN109712930A (zh) 2018-11-27 2019-05-03 合肥鑫晟光电科技有限公司 显示基板及其制作方法、显示装置

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
ISA China National Intellectual Property Administration, International Search Report Issued in Application No. PCT/CN2019/113588, dated Jan. 23, 2020, WIPO, 16 pages. (Submitted with Partial Translation).
State Intellectual Property Office of the People's Republic of China, Office Action and Search Report Issued in Application No. 201811424979.X, dated Apr. 29, 2020, 10 pages. (Submitted with Partial Translation).

Also Published As

Publication number Publication date
CN109712930B (zh) 2020-10-30
US20210313356A1 (en) 2021-10-07
WO2020108196A1 (zh) 2020-06-04
CN109712930A (zh) 2019-05-03

Similar Documents

Publication Publication Date Title
US11469260B2 (en) Display substrate, method for preparing the same, and display device
US10340354B2 (en) Manufacturing method of thin-film transistor (TFT) array substrate
US9698178B2 (en) Array substrate, method for manufacturing the same, and display apparatus
US9613986B2 (en) Array substrate and its manufacturing method, display device
US10818732B2 (en) Photosensitive sensor, manufacturing method of the same, and electronic device
US11283039B2 (en) Display substrate with improved carrier mobility of thin film transistors within GOA region
US11348987B2 (en) OLED display substrate having large aperture ratio, method of manufacturing the same, and display device
US10333002B2 (en) Thin film transistor and manufacturing method thereof, array substrate and manufacturing method thereof, and display device
US9893206B2 (en) Thin film transistor, array substrate, their manufacturing methods, and display device
US11961850B2 (en) Display substrate, manufacturing method thereof, and display device
US10192900B2 (en) Methods for fabricating thin film transistor and array substrate, array substrate and display device
WO2019007228A1 (zh) 薄膜晶体管及其制备方法、阵列基板和显示装置
US10566458B2 (en) Array substrate and method for manufacturing the same
US10043831B2 (en) Array substrate and manufacturing method thereof and display panel
US9721974B2 (en) Array substrate and method for manufacturing the same, and display device
US10833107B2 (en) Thin film transistor, manufacturing method therefor, array substrate and display device
US10879278B2 (en) Display substrate, manufacturing method therefor, and display device
US10504975B2 (en) Organic light-emitting diode display substrate, manufacturing method thereof and display device
US20160336359A1 (en) Thin film transistor device, manufacturing method thereof, and display apparatus
US10186527B2 (en) Array substrate, method for manufacturing the array substrate, and display device
EP2983204B1 (en) Display device and method for manufacturing the same
US11177296B2 (en) Array substrate, display device, thin film transistor, and method for manufacturing array substrate
US20200091194A1 (en) Display substrate, method for preparing the same, and display device
WO2020019869A1 (zh) 阵列基板及其制备方法、显示装置
US20220165870A1 (en) Display substrate and manufacturing method thereof, display device

Legal Events

Date Code Title Description
FEPP Fee payment procedure

Free format text: ENTITY STATUS SET TO UNDISCOUNTED (ORIGINAL EVENT CODE: BIG.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

AS Assignment

Owner name: BOE TECHNOLOGY GROUP CO., LTD., CHINA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:LIU, NING;ZHOU, BIN;LIU, JUN;AND OTHERS;REEL/FRAME:057231/0534

Effective date: 20200324

Owner name: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., CHINA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:LIU, NING;ZHOU, BIN;LIU, JUN;AND OTHERS;REEL/FRAME:057231/0534

Effective date: 20200324

STPP Information on status: patent application and granting procedure in general

Free format text: DOCKETED NEW CASE - READY FOR EXAMINATION

STPP Information on status: patent application and granting procedure in general

Free format text: NOTICE OF ALLOWANCE MAILED -- APPLICATION RECEIVED IN OFFICE OF PUBLICATIONS

AS Assignment

Owner name: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD., CHINA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:BOE TECHNOLOGY GROUP CO., LTD.;REEL/FRAME:060688/0887

Effective date: 20220726

STPP Information on status: patent application and granting procedure in general

Free format text: PUBLICATIONS -- ISSUE FEE PAYMENT VERIFIED

STCF Information on status: patent grant

Free format text: PATENTED CASE