US11378849B2 - Array substrate and display panel - Google Patents

Array substrate and display panel Download PDF

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US11378849B2
US11378849B2 US16/626,544 US201916626544A US11378849B2 US 11378849 B2 US11378849 B2 US 11378849B2 US 201916626544 A US201916626544 A US 201916626544A US 11378849 B2 US11378849 B2 US 11378849B2
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electrode
common electrode
base substrate
orthographic projection
pixel
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US20210364869A1 (en
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Xiaowen Lv
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • G02F1/134318Electrodes characterised by their geometrical arrangement having a patterned common electrode
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • G02F1/134363Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136213Storage capacitors associated with the pixel electrode
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/123Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel

Definitions

  • the present application relates to the field of display technologies, and in particular, to an array substrate and a display panel.
  • a liquid crystal display panel generally includes an array substrate, a color filter substrate, and a liquid crystal layer positioned between the array substrate and the color filter substrate.
  • a common electrode is generally provided below the pixel electrode.
  • a storage capacitor formed by the pixel electrode and the common electrode is used to reduce the voltage variations caused by electric leakage and increase the potential retention capability.
  • a method of increasing an area of the common electrode is generally adopted.
  • storage capacitors are generally made of metal sandwiched with an insulating layer, the common electrode is opaque, and an increase in the area of the common electrode will cause a decrease in the aperture ratio.
  • the present application provides an array substrate to solve the technical problem that a common electrode is opaque, and an increase in an area of the common electrode will cause a decrease in the aperture ratio.
  • the present application provides an array substrate.
  • the array substrate includes a base substrate and a plurality of pixel units distributed in an array on the base substrate, wherein each of the pixel units includes:
  • a pixel electrode positioned above the common electrode
  • the pixel electrode includes a main electrode and a branch electrode electrically connected to the main electrode, and an orthographic projection of the common electrode on the base substrate coincides with at least a part of an orthographic projection of the main electrode on the base substrate.
  • the common electrode includes a first common electrode line, and the first common electrode line is disposed corresponding to the main electrode.
  • a shape and a size of the first common electrode line are same as a shape and a size of the main electrode.
  • the orthographic projection of the common electrode on the base substrate does not coincide with an orthographic projection of the branch electrode on the base substrate.
  • each of the pixel units includes a main region and a sub region
  • the pixel electrode includes a first pixel electrode positioned in the main region and a second pixel electrode positioned in the sub region
  • the second pixel electrode includes a second main electrode and a second branch electrode
  • the orthographic projection of the common electrode on the base substrate coincides with at least a part of an orthographic projection of the second main electrode on the base substrate.
  • the second main electrode includes a first split and a second split crossing each other, the first split is arranged along a lateral direction, the second split is arranged along a longitudinal direction, the second branch electrode is arranged obliquely, and an edge line of the second branch electrode forms included angles with edge lines of the first split and the second split.
  • the orthographic projection of the common electrode on the base substrate coincides with at least a part of an orthographic projection of the first split on the base substrate.
  • the array substrate further including
  • the common electrode is disposed in a same layer as the first metal layer.
  • the first metal layer includes scan lines arranged in a lateral direction, one of the scan lines is arranged corresponding to one row of the pixel units;
  • the second metal layer includes data lines arranged in a longitudinal direction, one of the data lines is arranged corresponding to one column of pixel units;
  • the common electrode further includes a second common electrode line arranged close to the data lines and parallel to the data lines.
  • the present application further provides a display panel, the display panel including a color filter substrate and an array substrate, and a liquid crystal layer disposed between the color filter substrate and the array substrate; wherein the array substrate includes a base substrate and a plurality of pixel units are distributed in an array on the base substrate, wherein each of the pixel units includes:
  • a pixel electrode positioned above the common electrode
  • the pixel electrode includes a main electrode and a branch electrode electrically connected to the main electrode, and an orthographic projection of the common electrode on the base substrate coincides with at least a part of an orthographic projection of the main electrode on the base substrate.
  • the common electrode includes a first common electrode line, and the first common electrode line is disposed corresponding to the main electrode.
  • a shape and a size of the first common electrode line are same as a shape and a size of the main electrode.
  • the orthographic projection of the common electrode on the base substrate does not coincide with an orthographic projection of the branch electrode on the base substrate.
  • each of the pixel units includes a main region and a sub region
  • the pixel electrode includes a first pixel electrode positioned in the main region and a second pixel electrode positioned in the sub region
  • the second pixel electrode includes a second main electrode and a second branch electrode
  • the orthographic projection of the common electrode on the base substrate coincides with at least a part of an orthographic projection of the second main electrode on the base substrate.
  • the second main electrode includes a first split and a second split crossing each other, the first split is arranged along a lateral direction, the second split is arranged along a longitudinal direction, the second branch electrode is arranged obliquely, and an edge line of the second branch electrode forms included angles with edge lines of the first split and the second split.
  • the orthographic projection of the common electrode on the base substrate coincides with at least a part of an orthographic projection of the first split on the base substrate.
  • the display panel further including
  • the common electrode is disposed in a same layer as the first metal layer.
  • the first metal layer includes scan lines arranged in a lateral direction, one of the scan lines is arranged corresponding to one row of the pixel units;
  • the second metal layer includes data lines arranged in a longitudinal direction, one of the data lines is arranged corresponding to one column of pixel units;
  • the common electrode further includes a second common electrode line arranged close to the data lines and parallel to the data lines.
  • the capacitance of the storage capacitor is increased without affecting the aperture ratio of the array substrate, thereby reducing the voltage variations caused by electric leakage and increasing potential retention capability.
  • FIG. 1 is a schematic diagram of a first structure of an array substrate in a first embodiment of the present application.
  • FIG. 2 is a schematic diagram of removing the pixel electrode from FIG. 1 .
  • FIG. 3 is a schematic diagram of a second structure of the array substrate in the first embodiment of the present application.
  • FIG. 4 is a schematic diagram of a first structure of an array substrate in a second embodiment of the present application.
  • FIG. 5 is a schematic diagram of removing the pixel electrode from FIG. 4 .
  • FIG. 6 is a schematic diagram of a second structure of the array substrate in the second embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of a display panel in the present application.
  • the present application is directed to the conventional array substrate.
  • storage capacitors are generally made of metal sandwiched with an insulating layer, and an increase in an area of a common electrode will cause a technical problem that the aperture ratio decreases.
  • the present application can solve the above-mentioned problems.
  • FIG. 1 and FIG. 2 An array substrate, as shown in FIG. 1 and FIG. 2 , where the array substrate 10 includes a base substrate 11 and a plurality of pixel units distributed in an array on the base substrate 11 .
  • the pixel unit includes a common electrode 13 and a pixel electrode 12 positioned above the common electrode 13 .
  • the pixel electrode 12 includes a main electrode 121 and a branch electrode 122 electrically connected to the main electrode 121 .
  • the array substrate 10 is a four-domain region array substrate 10 , as shown in FIG. 1 to FIG. 2 , that is, the main electrode 121 divides a sub-pixel region into four domain regions.
  • an orthographic projection of the common electrode 13 on the base substrate 11 coincides with at least a part of an orthographic projection of the main electrode 121 on the base substrate 11 .
  • a region in which the main electrode 121 is disposed on the array substrate 10 is a dark region where the liquid crystal is disordered, and the aperture ratio is not contributed here.
  • the capacitance of the storage capacitor is increased without affecting the aperture ratio of the array substrate 10 , thereby reducing the voltage variations caused by electric leakage and increasing potential retention capability.
  • the common electrode 13 includes a first common electrode line 131 , and the first common electrode line 131 is disposed corresponding to the main electrode 121 .
  • a shape and a size of the first common electrode line 131 are same as a shape and a size of the main electrode 121 . Therefore, the first common electrode line 131 and the main electrode 121 are used to form a storage capacitor, meanwhile, the first common electrode line 131 is prevented from reducing the aperture ratio of the array substrate 10 .
  • an overall shape of the main electrode 121 is in a cross shape
  • the first common electrode line 131 is in a cross shape and matched with the main electrode 121 .
  • the branch electrode 122 is arranged obliquely, and an edge line of the branch electrode 122 forms an included angle with an edge line of the main electrode 121 .
  • the array substrate 10 further includes a first metal layer disposed on the base substrate 11 and a second metal layer positioned between the first metal layer and the pixel electrode 12 .
  • the first metal layer includes a plurality of scan lines 14 arranged along a lateral direction and spaced apart from each other, and each scan line 14 is disposed corresponding to a row of the pixel units to provide scan signals for the pixel units.
  • the common electrode 13 is disposed in a same layer as the first metal layer, and the common electrode 13 and the first metal layer can be formed by same material and same process, or can be formed by different materials and processes.
  • the second metal layer includes source-drain electrodes 15 and a plurality of data lines 16 arranged along a longitudinal direction and spaced apart from each other.
  • One of the data lines 16 is arranged corresponding to one column of the pixel units.
  • the data lines 16 and the source-drain electrodes 15 are electrically connected to provide data signals to the source-drain electrodes 15
  • the pixel electrode 12 is electrically connected to the source-drain electrodes 15 to receive the data signals.
  • the common electrode 13 further includes a second common electrode line 132 arranged close to the data lines 16 and parallel to the data lines 16 .
  • the setting of the second common electrode line 132 can be used to shield voltage variations caused by the coupling capacitance formed between the data line 16 and the pixel electrode 12 , thereby reducing risks such as crosstalk.
  • the array substrate 10 is an eight-domain region array substrate 10 .
  • each of the pixel units includes a main region 18 and a sub region 19
  • the pixel electrode 12 includes a first pixel electrode in the main region 18 and a second pixel electrode in the sub region 19 .
  • the first pixel electrode includes a first main electrode 123 and a first branch electrode 124
  • the second pixel electrode includes a second main electrode 125 and a second branch electrode 126 .
  • the first main electrode 123 divides the main region 18 into four domain regions
  • the second main electrode 125 divides the sub region 19 into four domain regions.
  • first pixel electrode and the second pixel electrode are inconsistent, resulting in different driving voltage differences between the main region 18 and the sub region 19 , and a certain voltage difference is set by utilization of a spatial domain region to increase the diversity of liquid crystal molecules, which can improve the characteristic of wide viewing angle color shift.
  • the first main electrode 123 and the second main electrode 125 are both in a cross shape.
  • the orthographic projection of the common electrode 13 on the base substrate 11 coincides with at least a part of an orthographic projection of the second main electrode 125 on the base substrate 11 .
  • the parasitic capacitance of the sub region 19 is larger, so the sub region 19 also needs a storage capacitor with a larger capacitance.
  • the capacitance of the storage capacitor in the sub region 19 is increased on the premise that the aperture ratio of the sub region 19 is not affected.
  • the second main electrode 125 includes a first split 1251 and a second split 1252 which are disposed crossing each other, the first split 1251 is arranged along the lateral direction, and the second split 1252 is arranged along the longitudinal direction.
  • the second branch electrode 126 is arranged obliquely, and an edge line of the second branch electrode 126 forms included angles with edge lines of the first split 1251 and the second split 1252 .
  • the second metal layer further includes a high-potential power line 17 .
  • An orthographic projection of the high-potential power line 17 on the base substrate 11 coincides with at least a part of an orthographic projection of the second split 1252 on the base substrate 11 .
  • the orthographic projection of the common electrode 13 on the base substrate 11 coincides with at least a part of an orthographic projection of the first split 1251 on the base substrate 11 .
  • the common electrode 13 includes a first common electrode 133 positioned in the main region 18 and a second common electrode 134 positioned in the sub region 19 .
  • An orthographic projection of second common electrode 134 on the base substrate 11 coincides with at least a part of an orthographic projection of the second main electrode 125 on the base substrate 11 .
  • FIG. 5 merely illustrates the case where the first split 1251 completely coincides with the common electrode 13 .
  • FIG. 5 and FIG. 6 merely show the case where only the second pixel electrode 12 coincides with the common electrode 13 . In actual implementation, it can also be to set a part of the common electrode 13 to coincide with the first pixel electrode 12 .
  • the present application also provides a display panel. As shown in FIG. 7 , where the display panel includes a color filter substrate 20 and the array substrate 10 according to any one of the above-mentioned embodiments, and a liquid crystal layer 30 disposed between the color filter substrate 20 and the array substrate 10 .
  • the beneficial effect of the present application is: by arranging a part of the common electrode 13 corresponding to the main electrode 121 and forming a storage capacitor by using the main electrode 121 and the common electrode 13 , the capacitance of the storage capacitor is increased without affecting the aperture ratio of the array substrate 10 , thereby reducing the voltage variations caused by electric leakage and increasing potential retention capability.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Geometry (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Liquid Crystal (AREA)
US16/626,544 2019-12-09 2019-12-19 Array substrate and display panel Active 2040-11-06 US11378849B2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
CN201911249088.X 2019-12-09
CN201911249088.XA CN111025801A (zh) 2019-12-09 2019-12-09 一种阵列基板及显示面板
PCT/CN2019/126476 WO2021114342A1 (zh) 2019-12-09 2019-12-19 一种阵列基板及显示面板

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US11378849B2 true US11378849B2 (en) 2022-07-05

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Publication number Priority date Publication date Assignee Title
CN113741108B (zh) * 2021-08-31 2022-07-22 惠科股份有限公司 阵列基板、显示面板及显示装置
CN113885261A (zh) * 2021-09-30 2022-01-04 Tcl华星光电技术有限公司 显示面板的像素单元、显示面板的下基板、及显示面板
CN114690496B (zh) * 2022-03-25 2023-08-22 Tcl华星光电技术有限公司 显示面板、阵列基板及其制造方法
US12019342B2 (en) * 2022-05-07 2024-06-25 Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Array substrate and display panel
CN114823735A (zh) * 2022-05-07 2022-07-29 深圳市华星光电半导体显示技术有限公司 阵列基板及显示面板

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130083263A1 (en) 2011-09-29 2013-04-04 Samsung Display Co., Ltd. Liquid crystal display
US20160195788A1 (en) 2015-01-06 2016-07-07 Samsung Display Co., Ltd. Liquid crystal display device
US20160320672A1 (en) * 2015-04-28 2016-11-03 Samsung Display Co., Ltd. Liquid crystal display device
US20170038655A1 (en) * 2015-03-06 2017-02-09 Boe Technology Group Co., Ltd. Array Substrate and Display Panel
CN106707596A (zh) 2016-12-22 2017-05-24 深圳市华星光电技术有限公司 显示面板及显示装置
CN109064909A (zh) 2018-08-15 2018-12-21 友达光电股份有限公司 像素结构
CN109634015A (zh) 2018-12-29 2019-04-16 惠科股份有限公司 阵列基板与其显示面板
WO2020087663A1 (zh) * 2018-10-29 2020-05-07 惠科股份有限公司 阵列基板以及显示面板

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN206002819U (zh) * 2016-09-18 2017-03-08 京东方科技集团股份有限公司 阵列基板及显示器件

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130083263A1 (en) 2011-09-29 2013-04-04 Samsung Display Co., Ltd. Liquid crystal display
US20160195788A1 (en) 2015-01-06 2016-07-07 Samsung Display Co., Ltd. Liquid crystal display device
CN105759518A (zh) 2015-01-06 2016-07-13 三星显示有限公司 液晶显示装置
US20170038655A1 (en) * 2015-03-06 2017-02-09 Boe Technology Group Co., Ltd. Array Substrate and Display Panel
US20160320672A1 (en) * 2015-04-28 2016-11-03 Samsung Display Co., Ltd. Liquid crystal display device
CN106707596A (zh) 2016-12-22 2017-05-24 深圳市华星光电技术有限公司 显示面板及显示装置
CN109064909A (zh) 2018-08-15 2018-12-21 友达光电股份有限公司 像素结构
US20200058679A1 (en) 2018-08-15 2020-02-20 Au Optronics Corporation Pixel structure
WO2020087663A1 (zh) * 2018-10-29 2020-05-07 惠科股份有限公司 阵列基板以及显示面板
CN109634015A (zh) 2018-12-29 2019-04-16 惠科股份有限公司 阵列基板与其显示面板

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WO2021114342A1 (zh) 2021-06-17
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