US10014100B2 - Coil substrate, method of manufacturing coil substrate and inductor - Google Patents

Coil substrate, method of manufacturing coil substrate and inductor Download PDF

Info

Publication number
US10014100B2
US10014100B2 US15/180,421 US201615180421A US10014100B2 US 10014100 B2 US10014100 B2 US 10014100B2 US 201615180421 A US201615180421 A US 201615180421A US 10014100 B2 US10014100 B2 US 10014100B2
Authority
US
United States
Prior art keywords
wiring
insulating layer
coil
substrate
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active, expires
Application number
US15/180,421
Other versions
US20160284458A1 (en
Inventor
Atsushi Nakamura
Tsukasa NAKANISHI
Yoichi SASADA
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to US15/180,421 priority Critical patent/US10014100B2/en
Assigned to SHINKO ELECTRIC INDUSTRIES CO., LTD. reassignment SHINKO ELECTRIC INDUSTRIES CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: NAKAMURA, ATSUSHI, Nakanishi, Tsukasa, SASADA, YOICHI
Publication of US20160284458A1 publication Critical patent/US20160284458A1/en
Application granted granted Critical
Publication of US10014100B2 publication Critical patent/US10014100B2/en
Active legal-status Critical Current
Adjusted expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00Details of transformers or inductances, in general
    • H01F27/28Coils; Windings; Conductive connections
    • H01F27/2804Printed windings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/0006Printed inductances
    • H01F17/0013Printed inductances with stacked layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/04Fixed inductances of the signal type  with magnetic core
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00Details of transformers or inductances, in general
    • H01F27/28Coils; Windings; Conductive connections
    • H01F27/32Insulating of coils, windings, or parts thereof
    • H01F27/323Insulation between winding turns, between winding layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F41/00Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
    • H01F41/02Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
    • H01F41/04Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F41/00Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
    • H01F41/02Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
    • H01F41/04Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
    • H01F41/041Printed circuit coils
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F41/00Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
    • H01F41/02Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
    • H01F41/04Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
    • H01F41/041Printed circuit coils
    • H01F41/042Printed circuit coils by thin film techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F41/00Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
    • H01F41/02Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
    • H01F41/04Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
    • H01F41/041Printed circuit coils
    • H01F41/043Printed circuit coils by thick film techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F41/00Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
    • H01F41/02Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
    • H01F41/04Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
    • H01F41/041Printed circuit coils
    • H01F41/045Trimming
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F5/00Coils
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/04Fixed inductances of the signal type  with magnetic core
    • H01F2017/048Fixed inductances of the signal type  with magnetic core with encapsulating core, e.g. made of resin and magnetic powder
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00Details of transformers or inductances, in general
    • H01F27/28Coils; Windings; Conductive connections
    • H01F27/2804Printed windings
    • H01F2027/2809Printed windings on stacked layers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10Methods of surface bonding and/or assembly therefor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/4902Electromagnet, transformer or inductor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/4902Electromagnet, transformer or inductor
    • Y10T29/49069Data storage inductor or core
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/4902Electromagnet, transformer or inductor
    • Y10T29/49071Electromagnet, transformer or inductor by winding or coiling
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/4902Electromagnet, transformer or inductor
    • Y10T29/49073Electromagnet, transformer or inductor by assembling coil and core

Definitions

  • the present invention relates to a coil substrate, a method of manufacturing a coil substrate and an inductor including a coil substrate.
  • an electronic device such as a game device, a smartphone or the like has been becoming smaller and smaller.
  • various elements such as an inductor or the like that is mounted on the electronic device to be smaller.
  • an inductor that is mounted on the electronic device one that uses a wire winding coil is known, for example.
  • An inductor using a wire winding coil is used as a power supply circuit or the like of an electronic device, for example (see Patent Document 1, for example).
  • the ratio of the area occupied by the wire winding with respect to the entire area of the inductor becomes large if the size of the inductor is to be made smaller. In such a case, it is difficult to form a closed magnetic circuit. Therefore, there is a limitation in downsizing the size of the inductor using the wire winding coil while maintaining sufficient inductance and it is considered that the size of the plan shape of such an inductor is about 1.6 mm ⁇ 1.6 mm at minimum.
  • Patent Document 1 Japanese Laid-open Patent Publication No. 2003-168610
  • the present invention is made in light of the above problems, and provides a smaller coil substrate or the like.
  • a coil substrate including a stacked structure in which a plurality of structures are stacked, each of the structures including a first insulating layer and a wiring formed on the first insulating layer, which becomes a part of a spiral-shaped coil; and an insulating film that covers a surface of the stacked structure, the spiral-shaped coil being formed by connecting the wirings of the adjacent structures in series.
  • FIG. 1A to FIG. 1C are views illustrating an example of a coil substrate of an embodiment
  • FIG. 2 is a perspective view schematically illustrating a shape of a wiring of each structure constituting the coil substrate of the embodiment
  • FIG. 3 is a cross-sectional view illustrating an example of an inductor of the embodiment
  • FIG. 4A and FIG. 4B are views illustrating an example of a manufacturing method of the coil substrate of the embodiment
  • FIG. 5A and FIG. 5B are views illustrating an example of the manufacturing method of the coil substrate of the embodiment
  • FIG. 6A and FIG. 6B are views illustrating an example of the manufacturing method of the coil substrate of the embodiment
  • FIG. 7A to FIG. 7C are views illustrating an example of the manufacturing method of the coil substrate of the embodiment.
  • FIG. 8A to FIG. 8C are views illustrating an example of the manufacturing method of the coil substrate of the embodiment.
  • FIG. 9A to FIG. 9C are views illustrating an example of the manufacturing method of the coil substrate of the embodiment.
  • FIG. 10A and FIG. 10B are views illustrating an example of the manufacturing method of the coil substrate of the embodiment
  • FIG. 11A to FIG. 11C are views illustrating an example of the manufacturing method of the coil substrate of the embodiment.
  • FIG. 12A to FIG. 12C are views illustrating an example of the manufacturing method of the coil substrate of the embodiment.
  • FIG. 13A to FIG. 13C are views illustrating an example of the manufacturing method of the coil substrate of the embodiment.
  • FIG. 14A to FIG. 14C are views illustrating an example of the manufacturing method of the coil substrate of the embodiment.
  • FIG. 15A and FIG. 15B are views illustrating an example of the manufacturing method of the coil substrate of the embodiment.
  • FIG. 16A to FIG. 16C are views illustrating an example of the manufacturing method of the coil substrate of the embodiment.
  • FIG. 17A and FIG. 17B are views illustrating an example of the manufacturing method of the coil substrate of the embodiment.
  • FIG. 18 is a view illustrating an example of the manufacturing method of the coil substrate of the embodiment.
  • FIG. 19 is a view illustrating an example of the manufacturing method of the coil substrate of the embodiment.
  • FIG. 20 is a view illustrating an example of the manufacturing method of the coil substrate of the embodiment.
  • FIG. 21A to FIG. 21C are views illustrating an example of the manufacturing method of the coil substrate of the embodiment.
  • FIG. 22A to FIG. 22C are view illustrating an example of a manufacturing method of an inductor of the embodiment.
  • FIG. 1A to FIG. 1C are views illustrating an example of a coil substrate 1 of the embodiment.
  • FIG. 1C is a plan view
  • FIG. 1A is a cross-sectional view of FIG. 1C taken along an A-A line
  • FIG. 1B is a cross-sectional view of FIG. 1C taken along a B-B line.
  • FIG. 2 is a perspective view schematically illustrating a shape of a wiring of each structure constituting the coil substrate 1 of the embodiment.
  • the coil substrate 1 mainly includes a first structure 1 A, a second structure 1 B, a third structure 1 C, a fourth structure 1 D, a fifth structure 1 E, a sixth structure 1 F, a seventh structure 1 G, adhesion layers 50 1 to 50 7 and an insulating film 70 .
  • the insulating layer 20 7 , the adhesion layer 50 7 and the insulating film 70 formed on the adhesion layer 50 7 are not illustrated.
  • a portion is illustrated in a dot pattern for explanation purposes.
  • FIG. 1A to FIG. 1C numerals of open portions are not illustrated, and numerals that are illustrated in the drawings illustrating the method of manufacturing the coil substrate 1 are referred to.
  • an adhesion layer 50 7 side is referred to as an upper side or one side
  • an insulating layer 20 1 side is referred to as a lower side or the other side
  • a surface of each component at the adhesion layer 50 7 side is referred to as an upper surface or one surface
  • a surface at the insulating layer 20 1 side is referred to as a lower surface or the other surface.
  • the coil substrate 1 may be used in an opposite direction or may be used at an arbitrary angle.
  • a plan view means that an object is seen in a direction that is normal to one surface of the insulating layer 20 1
  • a “plan shape” means a shape of an object seen in the direction that is normal to the one surface of the insulating layer 20 1 .
  • the coil substrate 1 is formed into an inductor 100 (see FIG. 3 ).
  • the plan shape of the coil substrate 1 may have about a size such that the plan shape of the inductor 100 has substantially a rectangular shape of about 1.6 mm ⁇ 0.8 mm, for example, when manufacturing the inductor 100 using the coil substrate 1 .
  • the thickness of the coil substrate 1 may be about 0.5 mm, for example.
  • the plan shape (outer edge) of the coil substrate 1 is not a simple rectangular shape but is similar to the plan shape of an outer edge of each wiring (a seventh wiring 30 7 or the like) that constitute the coil substrate 1 . This is in order to form a large amount of sealing resin 110 around the coil substrate 1 when manufacturing the inductor 100 (see FIG. 3 ) using the coil substrate 1 . Further, the coil substrate 1 is provided with a through hole 1 x at the substantially center portion of the coil substrate 1 . Similarly, this is in order to form a larger amount of the sealing resin 110 around the coil substrate 1 when manufacturing the inductor 100 (see FIG. 3 ) using the coil substrate 1 .
  • the inductance of the inductor 100 can be made larger.
  • the first structure 1 A includes an insulating layer 20 1 , a first wiring 30 1 , a connecting portion 35 and an insulating layer 40 1 .
  • the insulating layer 20 1 is formed as an outermost layer (undermost layer in FIG. 1A ) of the coil substrate 1 .
  • epoxy based insulating resin or the like may be used, for example.
  • the thickness of the insulating layer 20 1 may be about 8 to 12 ⁇ m, for example.
  • the first wiring 30 1 and the connecting portion 35 are formed on the insulating layer 20 1 .
  • the material of the first wiring 30 1 and the connecting portion 35 may be copper (Cu), copper alloy or the like, for example.
  • the thickness of the first wiring 30 1 and the connecting portion 35 may be about 12 to 50 ⁇ m, for example.
  • the width of the first wiring 30 1 may be about 50 to 130 ⁇ m, for example.
  • the first wiring 30 1 is a first layer wiring that is a part (about a roll) of a coil, and is patterned in substantially an elliptical shape in a direction illustrated in FIG. 2 .
  • a direction along the coil (Y direction) is referred to as a longer direction and a width direction that is perpendicular to the longer direction is referred so as a shorter direction (X direction).
  • the cross-sectional shape of the first wiring 30 1 in the shorter direction is substantially a rectangular shape.
  • the connecting portion 35 is formed at one end portion of the first wiring 30 1 .
  • a side surface of the connecting portion 35 is exposed from one side surface 1 y of the coil substrate 1 and the exposed portion is connected to an electrode of the inductor 100 .
  • the connecting portion 35 is integrally formed with the first wiring 30 1 .
  • the insulating layer 40 1 is formed on the insulating layer 20 1 such as to cover the first wiring 30 1 and the connecting portion 35 .
  • the first structure 1 A includes the insulating layer 20 1 , the first wiring 30 1 and the connecting portion 35 that are formed on the insulating layer 20 1 and become a part of the coil, and the insulating layer 40 1 formed on the insulating layer 20 1 such as to cover the first wiring 30 1 and the connecting portion 35 .
  • one portion of the connecting portion 35 at the side surface is exposed from the insulating layer 40 1 .
  • the insulating layer 40 1 is provided with an open portion (open portion 40 11 in FIG.
  • the insulating layer 40 1 that exposes an upper surface of the first wiring 30 1 , and a part of a via wiring 60 1 is filled in the open portion to be electrically connected with the first wiring 30 1 .
  • the material of the insulating layer 40 1 photosensitive epoxy based insulating resin or the like may be used, for example.
  • the thickness of the insulating layer 40 1 may be about 5 to 30 ⁇ m (the thickness from the upper surface of the first wiring 30 1 ), for example.
  • the second structure 1 B is stacked on the first structure 1 A through the adhesion layer 50 1 .
  • the second structure 1 B includes an insulating layer 20 2 , a second wiring 30 2 and an insulating layer 40 2 .
  • a heat resistance adhesive made of insulating resin such as epoxy based adhesive, polyimide based adhesive or the like may be used, for example.
  • the thickness of the adhesion layer 50 1 may be about 10 to 40 ⁇ m, for example.
  • an insulating layer 20 n an insulating layer 40 n and an adhesion layer 50 n (here, “n” is a natural number more than or equal to 2) are the same as those of the insulating layer 20 1 , insulating layer 40 1 and the adhesion layer 50 1 unless otherwise explained.
  • the insulating layer 20 n may be referred to as a first insulating layer and the insulating layer 40 n may be referred to as a second insulating layer.
  • the insulating layer 20 n and the insulating layer 40 n are added different numerals for explanation purposes, both function as insulating layers that cover the respective wiring.
  • the insulating layer 20 n and the insulating layer 40 n in total may referred to as an insulating layer.
  • the coil substrate 1 may not include the insulating layer 40 n when the wirings of the structures can be surely insulated from each other by the adhesion layer 50 n.
  • the insulating layer 40 2 is stacked on the adhesion layer 50 1 .
  • a bottom surface and a side surface of the second wiring 30 2 are covered by the insulating layer 40 2 and an upper surface of the second wiring 30 2 is exposed from the insulating layer 40 2 .
  • the material, the thickness and the like of the second wiring 30 2 may be the same as those of the first wiring 30 1 .
  • the second wiring 30 2 is a second layer wiring that is a part (about 3 ⁇ 4 roll) of the coil, and is patterned in substantially a semi-elliptical shape in the direction illustrated in FIG. 2 .
  • the cross-sectional shape of the second wiring 30 2 in the shorter direction is substantially a rectangular shape.
  • the insulating layer 20 2 is stacked on the second wiring 30 2 and the insulating layer 40 2 .
  • the second structure 1 B has a vertically inversed structure of a structure including the insulating layer 20 2 , the second wiring 30 2 that is formed on the insulating layer 20 2 and is a part of the coil, and the insulating layer 40 2 formed on the insulating layer 20 2 such as to cover the second wiring 30 2 .
  • the second structure 1 B is provided with an open portion that penetrates the insulating layer 20 2 , the second wiring 30 2 and the insulating layer 40 2 whose lower side is in communication with an open portion of the adhesion layer 50 1 and the open portion of the insulating layer 40 1 .
  • a via wiring 60 1 is filled in these open portions (an open portion 10 23 illustrated in FIG. 7A ).
  • the second wiring 30 2 is electrically connected in series with the first wiring 30 1 through the via wiring 60 1 .
  • the second structure 1 B is provided with an open portion (an open portion 10 21 illustrated in FIG. 7A ) that penetrates the insulating layer 20 2 and exposes an upper surface of the second wiring 30 2 , and a via wiring 60 2 is filled in the open portion.
  • the second wiring 30 2 is electrically connected to the via wiring 60 2 .
  • the third structure 1 C is stacked on the second structure 1 B through the adhesion layer 50 2 .
  • the third structure 1 C includes an insulating layer 20 3 , a third wiring 30 3 and an insulating layer 40 3 .
  • the insulating layer 40 3 is stacked on the adhesion layer 50 2 .
  • a bottom surface and a side surface of the third wiring 30 3 are covered by the insulating layer 40 3 and an upper surface of the third wiring 30 3 is exposed from the insulating layer 40 3 .
  • the material, the thickness and the like of the third wiring 30 3 may be the same as those of the first wiring 30 1 .
  • the third wiring 30 3 is a third layer wiring that is a part (about a roll) of the coil, and is patterned in substantially a semi-elliptical shape in the direction illustrated in FIG. 2 .
  • the cross-sectional shape of the third wiring 30 3 in the shorter direction is substantially a rectangular shape.
  • the insulating layer 20 3 is stacked on the third wiring 30 3 and the insulating layer 40 3 .
  • the third structure 1 C has a vertically inversed structure of a structure including the insulating layer 20 3 , the third wiring 30 3 that is formed on the insulating layer 20 3 and is a part of the coil, and the insulating layer 40 3 formed on the insulating layer 20 3 such as to cover the third wiring 30 3 .
  • the third structure 1 C is provided with an open portion that penetrates the insulating layer 20 3 , the third wiring 30 3 and the insulating layer 40 3 whose lower side is in communication with an open portion of the adhesion layer 50 2 .
  • the via wiring 60 3 is filled in these open portions (an open portion 10 33 in FIG. 9A ).
  • the via wiring 60 3 is electrically connected to a via wiring 60 2 that is filled in the open portion of the insulating layer 20 2 of the second structure 1 B.
  • the third wiring 30 3 is electrically connected in series with the second wiring 30 2 through the via wirings 60 2 and 60 3 .
  • the third structure 1 C is provided with an open portion (an open portion 10 31 in FIG. 85 ) that penetrates the insulating layer 20 3 and exposes an upper surface of the third wiring 30 3 .
  • a via wiring 60 4 is filled in the open portion.
  • the third wiring 30 3 is electrically connected to the via wiring 60 4 .
  • the fourth structure 1 D is stacked on the third structure 1 C through the adhesion layer 50 3 .
  • the fourth structure 1 D includes an insulating layer 20 4 , a fourth wiring 30 4 and an insulating layer 40 4 .
  • the insulating layer 40 4 is stacked on the adhesion layer 50 3 .
  • a bottom surface and a side surface of the fourth wiring 30 4 are covered by the insulating layer 40 4 and an upper surface is exposed from the insulating layer 40 4 .
  • the material, the thickness and the like of the fourth wiring 30 4 are the same as those of the first wiring 30 1 .
  • the fourth wiring 30 4 is a fourth layer wiring that is a part (about 3 ⁇ 4 roll) of the coil, and is patterned in substantially a semi-elliptical shape in the direction illustrated in FIG. 2 .
  • the insulating layer 20 4 is stacked on the fourth wiring 30 4 and the insulating layer 40 4 .
  • the fourth structure 1 D has a vertically inversed structure of a structure including the insulating layer 20 4 , the fourth wiring 30 4 that is formed on the insulating layer 20 4 and is a part of the coil, and the insulating layer 40 4 formed on the insulating layer 20 4 such as to cover the fourth wiring 30 4 .
  • the fourth structure 1 D is provided with an open portion that penetrates the insulating layer 20 4 , the fourth wiring 30 4 and the insulating layer 40 4 whose lower side is in communication with an open portion of the adhesion layer 50 3 .
  • the via wiring 60 5 is filled in these open portions.
  • the via wiring 60 5 is electrically connected to the via wiring 60 4 formed in the open portion of the insulating layer 20 3 of the third structure 1 C.
  • the fourth wiring 30 4 is electrically connected in series with the third wiring 30 3 through the via wirings 60 4 and 60 5 .
  • the fourth structure 1 D is provided with an open portion that penetrates the insulating layer 20 4 and exposes an upper surface of the fourth wiring 30 4 .
  • a via wiring 60 6 is filled in the open portion.
  • the fourth wiring 30 4 is electrically connected to the via wiring 60 6 .
  • the fourth structure 1 D has the same structure as the second structure 1 B and corresponds to a structure obtained by rotating the second structure 1 B 180° around an axis of normal of an X-Y plane.
  • the open portions 10 41 and 10 42 respectively correspond to the open portions 10 21 and 10 22 .
  • the fifth structure 1 E is stacked on the fourth structure 1 D through the adhesion layer 50 4 .
  • the fifth structure 1 E includes an insulating layer 20 5 , a fifth wiring 30 5 and an insulating layer 40 5 .
  • the insulating layer 40 5 is stacked on the adhesion layer 50 4 .
  • a bottom surface and a side surface of the fifth wiring 30 5 are covered by the insulating layer 40 5 and an upper surface of the fifth wiring 30 5 is exposed from the insulating layer 40 5 .
  • the material, the thickness and the like of the fifth wiring 30 5 may be the same as those of the first wiring 30 1 .
  • the fifth wiring 30 5 is a fifth layer wiring that is a part (about a roll) of the coil, and is patterned in substantially a semi-elliptical shape in the direction illustrated in FIG. 2 .
  • the cross-sectional shape of the fifth wiring 30 5 in the shorter direction is substantially a rectangular shape.
  • the insulating layer 20 5 is stacked on the fifth wiring 30 5 and the insulating layer 40 5 .
  • the fifth structure 1 E has a vertically inversed structure of a structure including the insulating layer 20 5 , the fifth wiring 30 5 that is formed on the insulating layer 20 5 and is a part of the coil, and the insulating layer 40 5 formed on the insulating layer 20 5 such as to cover the fifth wiring 30 5 .
  • the fifth structure 1 E is provided with an open portion that penetrates the insulating layer 20 5 , the fifth wiring 30 5 and the insulating layer 40 5 whose lower side is in communication with an open portion of the adhesion layer 50 4 .
  • the via wiring 60 7 is filled in the open portion (an open portion 10 53 illustrated in FIG. 13A and FIG. 13B ).
  • the via wiring 60 7 is electrically connected to a via wiring 60 6 that is filled in the open portion of the insulating layer 20 4 of the fourth structure 1 D.
  • the fifth wiring 30 5 is electrically connected in series with the fourth wiring 30 4 through the via wirings 60 6 and 60 7 .
  • the fifth structure 1 E is provided with an open portion (an open portion 10 51 illustrated in FIG. 123 ) that penetrates the insulating layer 20 5 and exposes an upper surface of the fifth wiring 30 5 .
  • a via wiring 60 8 is filled in the open portion.
  • the fifth wiring 30 5 is electrically connected to the via wiring 60 8 .
  • the fifth structure 1 E has the same structure as the third structure 1 C and corresponds to a structure obtained by rotating the third structure 1 C 180° around the normal axis of the X-Y plane.
  • the open portions 10 51 and 10 52 respectively correspond to the open portions 10 31 and 10 32 .
  • the sixth structure 1 F is stacked on the fifth structure 1 E through the adhesion layer 50 5 .
  • the sixth structure 1 F includes an insulating layer 20 6 , a sixth wiring 30 6 and an insulating layer 40 6 .
  • the insulating layer 40 6 is stacked on the adhesion layer 50 5 .
  • a bottom surface and a side surface of the sixth wiring 30 6 are covered by the insulating layer 40 6 and an upper surface of the sixth wiring 30 6 is exposed from the insulating layer 40 6 .
  • the material, the thickness and the like of the sixth wiring 30 6 may be the same as those of the first wiring 30 1 .
  • the sixth wiring 30 6 is a sixth layer wiring that is a part (about 3 ⁇ 4 roll) of the coil, and is patterned in substantially a semi-elliptical shape in the direction illustrated in FIG. 2 .
  • the cross-sectional shape of the sixth wiring 30 6 in the shorter direction is substantially a rectangular shape.
  • the insulating layer 20 6 is stacked on the sixth wiring 30 6 and the insulating layer 40 6 .
  • the sixth structure 1 F has a vertically inversed structure of a structure including the insulating layer 20 6 , the sixth wiring 30 6 that is formed on the insulating layer 20 6 and is a part of the coil, and the insulating layer 40 6 formed on the insulating layer 20 6 such as to cover the sixth wiring 30 6 .
  • the sixth structure 1 F is provided with an open portion that penetrates the insulating layer 20 6 , the sixth wiring 30 6 and the insulating layer 40 6 whose lower side is in communication with an open portion of the adhesion layer 50 5 .
  • the via wiring 60 9 is filled in the open portion (an open portion 10 63 illustrated in FIG. 14A and FIG. 14B ).
  • the via wiring 60 9 is electrically connected to a via wiring 60 8 formed in the open portion of the insulating layer 20 5 of the fifth structure 1 E.
  • the sixth wiring 30 6 is electrically connected in series with the fifth wiring 30 5 through the via wirings 60 8 and 60 9 .
  • the sixth structure 1 F is provided with an open portion (open portion 10 61 illustrated in FIG. 14A ) that penetrates the insulating layer 20 6 and exposes an upper surface of the sixth wiring 30 6 .
  • a via wiring 60 10 is filled in the open portion.
  • the sixth wiring 30 6 is electrically connected to the via wiring 60 10 .
  • the sixth structure 1 F has the same structure as the second structure 1 B and the open portions 10 61 and 10 62 respectively correspond to the open portions 10 21 and 10 22 .
  • the seventh structure 1 G is stacked on the sixth structure 1 F through the adhesion layer 50 6 .
  • the seventh structure 1 G includes an insulating layer 20 7 , a seventh wiring 30 7 , a connecting portion 37 and an insulating layer 40 7 .
  • the insulating layer 40 7 is stacked on the adhesion layer 50 6 .
  • a bottom surface and a side surface of each of the seventh wiring 30 7 and the connecting portion 37 are covered by the insulating layer 40 7 and an upper surface of each of the seventh wiring 30 7 and the connecting portion 37 is exposed from the insulating layer 40 7 .
  • the material, the thickness and the like of the seventh wiring 30 7 and the connecting portion 37 are the same as those of the first wiring 30 1 .
  • the seventh wiring 30 7 is an uppermost wiring layer, and is patterned in substantially a semi-elliptical shape in the direction illustrated in FIG. 2 .
  • the connecting portion 37 is formed at one end portion of the seventh wiring 30 7 .
  • a side surface of the connecting portion 37 is exposed from another side surface 1 z of the coil substrate 1 and the exposed portion is connected to an electrode of the inductor 100 .
  • the connecting portion 37 is integrally formed with the seventh wiring 30 7 .
  • the insulating layer 20 7 is stacked on the seventh wiring 30 7 , the connecting portion 37 and the insulating layer 40 7 .
  • the seventh structure 1 G has a vertically inversed structure of a structure including the insulating layer 20 7 , the seventh wiring 30 7 and the connecting portion 37 formed on the insulating layer 20 7 , and the insulating layer 40 7 formed on the insulating layer 20 7 such as to cover the seventh wiring 30 7 and the connecting portion 37 .
  • the seventh structure 1 G is provided with an open portion that penetrates the insulating layer 20 7 , the seventh wiring 30 7 and the insulating layer 40 7 whose lower side is in communication with an open portion of the adhesion layer 50 6 .
  • the via wiring 60 11 is filled in these open portions (an open portion 10 72 illustrated in FIG. 16A ).
  • the via wiring 60 11 is electrically connected to a via wiring 60 10 formed in the open portion of the insulating layer 20 6 of the sixth structure 1 F.
  • the seventh wiring 30 7 is electrically connected in series with the sixth wiring 30 6 through the via wirings 60 10 and 60 11 .
  • the spiral-shaped coil from the connecting portion 35 to the connecting portion 37 , is formed by connecting the wirings of the adjacent structures in series.
  • the adhesion layer 50 7 is stacked on the seventh structure 1 G.
  • the adhesion layer 50 7 is not provided with an open portion. This means that an upper side of the stacked structure in which the first structure 1 A to the seventh structure 1 G are stacked is covered by the adhesion layer 50 7 , which is an insulating layer, and any conductive materials are not exposed.
  • the insulating film 70 In the stacked structure in which the first structure 1 A to the seventh structure 1 G are stacked, surfaces except the bottom surface and the side surfaces 1 y and 1 z are covered by the insulating film 70 .
  • the inner wall surface of the through hole 1 x is also covered by the insulating film 70 .
  • the insulating film 70 is provided to prevent a short between the end surfaces of the wirings that are exposed from the stacked structure and conductive materials (magnetic filler or the like) that may be included in the sealing resin 110 when manufacturing the inductor 100 (see FIG. 3 ).
  • conductive materials magnetic filler or the like
  • the insulating film 70 may include filler such as silica or the like.
  • the thickness of the insulating film 70 may be about 20 to 50 ⁇ m, for example.
  • FIG. 3 is a cross-sectional view illustrating an example of the inductor 1 of the embodiment.
  • the inductor 100 is a chip inductor in which the coil substrate 1 is sealed by the sealing resin 110 and electrodes 120 and 130 are formed.
  • the plan shape of the inductor 100 may be substantially a rectangular shape having a size of about 1.6 mm ⁇ 0.8 mm.
  • the thickness of the inductor 100 may be about 1.0 mm, for example.
  • the inductor 100 may be used as a voltage conversion circuit or the like of a small-size electronic device, for example.
  • the sealing resin 110 seals the coil substrate 1 except portions at the one side surface 1 y and the other side surface 1 z . This means that the sealing resin 110 covers the coil substrate 1 except the portions of the side surfaces where the connecting portions 35 and 37 are exposed.
  • the sealing resin 110 is also formed in the through hole 1 x .
  • insulating resin epoxy based insulating resin or the like, for example
  • magnetic filler such as ferrite or the like
  • the magnetic material has a function to increase the inductance of the inductor 100 .
  • the inductance can be improved.
  • a core made of a magnetic material such as ferrite or the like may be provided in the through hole 1 x and the core may be also sealed by the sealing resin 110 .
  • the shape of the core may be a column shape, a rectangular parallelepiped shape or the like, for example.
  • the electrode 120 is formed outside the sealing resin 110 and is electrically connected to a part of the connecting portion 35 . Specifically, the electrode 120 is continuously formed at the one side surface of the sealing resin 110 and parts of the upper surface and the lower surface of the sealing resin 110 . An inner wall surface of the electrode 120 contacts a side surface of the connecting portion 35 that is exposed at the one side surface 1 y of the coil substrate 1 and the electrode 120 and the connecting portion 35 are electrically connected with each other.
  • the electrode 130 is formed outside the sealing resin 110 and is electrically connected to a part of the connecting portion 37 . Specifically, the electrode 130 is continuously formed at the side surface of the sealing resin 110 and parts of the upper surface and the lower surface of the sealing resin 110 . An inner wall surface of the electrode 130 contacts a side surface of the connecting portion 37 that is exposed at the other side surface 1 z of the coil substrate 1 and the electrode 130 and the connecting portion 37 are electrically connected with each other.
  • copper (Cu), copper alloy or the like may be used, for example.
  • the electrodes 120 and 130 may be formed by coating copper paste, sputtering of copper, electroless plating or the like, for example.
  • the electrodes 120 and 130 may be a stacked structure of a plurality of metal layers.
  • FIG. 4A to FIG. 21C are views illustrating an example of the method of manufacturing the coil substrate of the embodiment.
  • FIG. 4A and FIG. 4B are views illustrating an example of the method of manufacturing the coil substrate of the embodiment.
  • FIG. 4A is a plan view
  • FIG. 4B is a cross-sectional view of FIG. 4A taken along a direction parallel to a Y-Z plane in FIG. 4A in the vicinity of one of individual areas C (which will be explained below).
  • a flexible reel (tape) insulating resin film is prepared as the substrate 10 1 (first substrate).
  • sprocket holes 10 z are continuously formed at both end positions of the substrate 10 1 in a shorter direction (Y direction in FIG. 4A and FIG. 4B ) along a longer direction (X direction in FIG. 4A and FIG. 4B ) with substantially a same interval, by press working or the like.
  • the insulating layer 20 1 and the metal film 300 1 are formed on one surface of the substrate 10 1 in this order at an area except the both end portions of the substrate 10 1 where the sprocket holes 10 z are formed.
  • the semi-cured insulating layer 20 1 and the metal film 300 1 are stacked on the one surface of the substrate 10 1 in this order and are heated so that the semi-cured insulating layer 20 1 is cured.
  • Each area C (referred to as the “individual areas C”) expressed by a dashed line inside the both end portions of the substrate 10 1 where the sprocket holes 10 z are formed becomes the coil substrate 1 after finally being cut and individualized along the dashed lines.
  • the plurality of individual areas C is aligned in columns and rows, for example. At this time, the plurality of individual areas C may be aligned with a predetermined space therebetween as illustrated in FIG. 4A , or may be aligned to contact with each other. Further, the number of individual areas C and the number of sprocket holes 10 z may be arbitrarily determined.
  • a line expressed by “D” (hereinafter, referred to as cut position D) indicates a cut position along which the reel (tape) substrate 10 1 or the like is cut in the following step.
  • the substrate 10 1 polyphenylenesulfide film, polyimide film, polyethylenenaphthalate film or the like may be used, for example.
  • the thickness of the substrate 10 1 may be about 50 to 75 ⁇ m, for example.
  • the insulating layer 20 1 film epoxy based insulating resin or the like may be used, for example. Alternatively, for the insulating layer 20 1 , liquid or paste epoxy based insulating resin or the like may be used.
  • the thickness of the insulating layer 20 1 may be about 8 to 12 ⁇ m, for example.
  • the metal film 300 1 becomes the metal layer 301 1 and the connecting portion 35 after being patterned, and may be made of a copper film, for example.
  • the thickness of the metal film 300 1 may be about 12 to 50 ⁇ m, for example.
  • the sprocket holes 10 z are used for pitch feeding the substrate 10 1 by being engaged with pins of a sprocket that is driven by a motor or the like when the substrate 10 1 is mounted on a manufacturing apparatus or the like in the course of manufacturing the coil substrate 1 .
  • the width (in a direction perpendicular to the alignment direction of the sprocket holes 10 z (Y direction)) of the substrate 10 1 is determined to correspond to the manufacturing apparatus on which the substrate 10 1 is mounted.
  • the width of the substrate 10 1 may be about 40 to 90 mm, for example.
  • the length of the substrate 10 1 (in an alignment direction of the sprocket holes 10 z (X direction)) may be arbitrarily determined.
  • the substrate 10 1 may be made longer and the individual areas C of about few hundreds columns may be provided, for example.
  • the first structure 1 A is formed in which metal layer 301 1 is formed on the substrate 10 1 .
  • the metal layer 301 1 becomes the first wiring 30 1 that is the first layer wiring and is a part (about a roll) of the coil after finally shaped (by die cutting or the like).
  • the metal layer 301 1 is formed on the insulating layer 20 1 by patterning the metal film 300 1 illustrated in FIG. 4B . Further, at this time, the connecting portion 35 is formed at the one end portion of the metal layer 301 1 . Further, at this time, a bus line 36 connected to the connecting portion 35 is formed.
  • the bus line 36 is used for power supply in electroplating in the following steps and is electrically connected to the metal layer 301 1 and the connecting portion 35 of each of the individual areas C. If the electroplating is not performed in the following steps, the bus line 36 may not be formed.
  • the metal layer 301 1 is provided with a slit portion 301 x .
  • the slit portion 301 x is provided to facilitate forming a spiral shape of the coil when shaping (die cutting or the like) the coil substrate 1 .
  • the metal film 300 1 may be patterned by photolithography, for example. This means that the metal film 300 1 may be patterned by forming photosensitive resist on the metal film 300 1 , forming an open portion in the photosensitive resist by exposing and developing a predetermined area, and removing the metal film 300 1 that is exposed in the open portion by etching.
  • the metal layer 301 1 , the connecting portion 35 and the bus line 36 are integrally formed.
  • the insulating layer 40 1 may be formed by laminating a film photosensitive epoxy based insulating resin or the like. Alternatively, the insulating layer 40 1 may be formed by coating liquid or paste photosensitive epoxy based insulating resin or the like.
  • the thickness of the insulating layer 40 1 (the thickness from the upper surface of the metal layer 301 1 ) may be about 5 to 30 ⁇ m, for example.
  • the open portion 40 11 is formed in the insulating layer 40 1 of the first structure 1 A that exposes the upper surface of the metal layer 301 1 .
  • the plan shape of the open portion 40 11 may be a circular shape whose diameter is about 150 ⁇ m.
  • the open portion 40 11 may be formed by press working, laser processing or the like, for example.
  • the open portion 40 11 may be formed by exposing and developing the photosensitive insulating layer 40 1 .
  • the insulating layer 40 1 is not illustrated.
  • an area of the metal layer 301 1 corresponding to the open portion 40 11 is illustrated by a dashed line.
  • the second structure 1 B is formed in which the metal layer 301 2 is formed on the substrate 10 2 (second substrate).
  • the metal layer 301 2 becomes the second wiring 30 2 that is the second layer wiring and is a part (about 3 ⁇ 4 roll) of the coil after finally shaped (by die cutting or the like).
  • the insulating layer 20 2 and the metal film 300 2 are formed on the substrate 10 2 in this order at an area except the both end portions of the substrate 10 2 where the sprocket holes 10 z are formed.
  • the metal film 300 2 is patterned and the metal layer 301 2 patterned as illustrated in FIG. 6B is formed on the insulating layer 20 2 . Thereafter, the metal layer 301 2 is covered by the insulating layer 40 2 . Then, the open portion 10 21 is formed in the substrate 10 2 and the insulating layer 20 2 of the second structure 1 B that exposes the lower surface of the metal layer 301 2 . Further, the open portion 10 22 (through hole) is formed that penetrates the substrate 10 2 , and the insulating layer 20 2 , the metal layer 301 2 and the insulating layer 40 2 of the second structure 1 B.
  • each of the open portions 10 21 and 10 22 may be a circular shape whose diameter is about 150 ⁇ m.
  • the open portions 10 21 and 10 22 may be formed by press working, laser processing or the like.
  • the open portion 10 22 is formed at a position that overlaps the open portion 40 11 in a plan view when the first structure 1 A and the second structure 1 B are stacked with each other in a predetermined direction.
  • the insulating layer 40 2 is not illustrated.
  • an area of the metal layer 301 2 corresponding to the open portion 10 21 is illustrated by a dashed line.
  • n is a natural number more than or equal to 2
  • n is a natural number more than or equal to 2
  • FIG. 7A to FIG. 7C are cross-sectional views corresponding to FIG. 5A and FIG. 6A .
  • the adhesion layer 50 1 is prepared and the open portion 50 11 (through hole) that penetrates the adhesion layer 50 1 is formed.
  • the open portion 50 11 may be formed at a position that overlaps the open portions 40 11 and 10 22 in a plan view when the first structure 1 A and the second structure 1 B are stacked with each other through the adhesion layer 50 1 in the predetermined direction.
  • heat resistance adhesive made of insulating resin such as epoxy based adhesive, polyimide based adhesive or the like may be used, for example.
  • the thickness of the adhesion layer 50 1 may be about 10 to 40 ⁇ m, for example.
  • the substrate 10 2 and the second structure 1 B are reversed from the state illustrated in FIG. 6A , and are stacked on the first structure 1 A through the adhesion layer 50 1 .
  • the adhesion layer 50 1 is cured.
  • the open portion 40 11 , the open portion 50 11 and the open portion 10 22 are in communication with each other, a single open portion 10 23 is formed and the upper surface of the metal layer 301 1 is exposed at a bottom portion.
  • the second structure 1 B may be stacked on the first structure 1 A through the adhesion layer 50 1 before forming the open portions, and thereafter, the open portions 10 21 , 10 22 and 50 11 may be provided.
  • the substrate 10 2 is removed (peeled) from the insulating layer 20 2 of the second structure 1 B.
  • the substrate 10 2 may be mechanically removed from the insulating layer 20 2 of the second structure 1 B.
  • the via wiring 60 1 made of copper (Cu) or the like is formed on the metal layer 301 1 that is exposed at the bottom portion of the open portion 10 23 .
  • the metal layer 301 1 and the metal layer 301 2 are electrically connected in series through the via wiring 60 1 .
  • the via wiring 60 2 made of copper (Cu) or the like is formed on the metal layer 301 2 that is exposed at a bottom portion of the open portion 10 21 .
  • the metal layer 301 2 and the via wiring 60 2 are electrically connected with each other.
  • the via wirings 60 1 and 60 2 may be formed by depositing copper (Cu) or the like from the metal layers 301 1 and 301 2 sides by electroplating in which the bus line 36 is used for supplying power, for example. Further, the via wirings 60 1 and 60 2 may be formed by filling metal paste of copper (Cu) or the like on the metal layer 301 1 that is exposed at the bottom portion of the open portion 10 23 and also filling the metal paste of copper (Cu) or the like on the metal layer 301 2 that is exposed at the bottom portion of the open portion 10 21 . The upper surfaces of the via wirings 60 1 and 60 2 may be flush with the upper surface of the insulating layer 20 2 .
  • the metal layer 301 1 , the via wiring 60 1 and the metal layer 301 2 are electrically connected in series. Those connected parts become the coil of about one and 3 ⁇ 4 rolls after finally shaped (by die cutting or the like).
  • FIG. 8C is a plan view
  • FIG. 8A is a cross-sectional view of FIG. 8C taken along an A-A line in FIG. 8C
  • FIG. 8B is a cross-sectional view of FIG. 8C taken along an E-E line in FIG. 8C
  • the metal layer 301 3 becomes the third wiring 30 3 that is the third layer wiring and is a part (about a roll) of the coil after finally shaped (by die cutting or the like).
  • the metal layer 301 3 is provided with a slit portion 301 y .
  • the slit portion 301 y is provided to facilitate forming the spiral shape of the coil when shaping (die cutting or the like) the coil substrate 1 in the following step.
  • the open portion 10 31 is formed in the substrate 10 3 and the insulating layer 20 3 of the third structure 1 C that exposes the lower surface of the metal layer 301 3 . Further, the open portion 10 32 (through hole) is formed that penetrates the substrate 10 3 , and the insulating layer 20 3 , the metal layer 301 3 and the insulating layer 40 3 of the third structure 1 C.
  • the plan shape and the method of forming the open portions 10 31 and 10 32 may be the same as those of the open portion 10 21 or the like, for example.
  • the open portion 10 32 is formed at a position that overlaps the open portion 10 21 in a plan view when the second structure 12 and the third structure 1 C are stacked with each other in the predetermined direction.
  • the insulating layer 40 3 is not illustrated in FIG. 8C . Further, in FIG. 8C , an area of the metal layer 301 3 corresponding to the open portion 10 31 is illustrated by a dashed line.
  • FIG. 9A to FIG. 9C are cross-sectional views corresponding to FIG. 7C .
  • the adhesion layer 50 2 is prepared and the open portion 50 21 (through hole) that penetrates the adhesion layer 50 2 is formed.
  • the open portion 50 21 is formed at a position that overlaps the via wiring 60 2 in a plan view when the second structure 1 B and the third structure 1 C are stacked with each other through the adhesion layer 50 2 in the predetermined direction.
  • the shape, the thickness, the material and the like of an adhesion layer 50 n (here, “n” is a natural number more than or equal to 2) are the same as those of the adhesion layer 50 1 unless otherwise explained.
  • the substrate 10 3 and the third structure 1 C are reversed from the state illustrated in FIG. 8A , and are stacked on the second structure 1 B through the adhesion layer 50 2 .
  • the adhesion layer 50 2 is cured.
  • the open portion 50 21 and the open portion 10 32 are in communication with each other, a single open portion 10 33 is formed and the upper surface of the via wiring 60 2 is exposed at a bottom portion.
  • the third structure 1 C may be stacked on the second structure 1 B through the adhesion layer 50 2 before forming the open portions, and thereafter, the open portions 10 31 , 10 32 and 50 21 may be provided.
  • the substrate 10 3 is removed (peeled) from the insulating layer 20 3 of the third structure 1 C.
  • the via wiring 60 3 is formed on the via wiring 60 2 that is exposed at the bottom portion of the open portion 10 33 .
  • the metal layer 301 2 and the metal layer 301 3 are electrically connected in series through the via wirings 60 2 and 60 3 .
  • the via wiring 60 4 (not illustrated in the drawings) is formed on the metal layer 301 3 that is exposed at the bottom portion of the open portion 10 31 (not illustrated in the drawings).
  • the metal layer 301 3 and the via wiring 60 4 are electrically connected with each other.
  • the via wirings 60 3 and 60 4 may be formed by electroplating in which the bus line 36 is used for supplying power or by filling metal paste, similar to the via wiring 60 1 .
  • the material of the via wirings 60 3 and 60 4 copper (Cu) or the like may be used, for example.
  • the upper surfaces of the via wirings 60 3 and 60 4 may be flush with the upper surface of the insulating layer 20 3 .
  • the fourth structure 1 D is formed in which the metal layer 301 4 is formed on the substrate 10 4 .
  • the metal layer 301 4 becomes the fourth wiring 30 4 that is the fourth layer wiring and is a part (about 3 ⁇ 4 roll) of the coil after finally shaped (by die cutting or the like).
  • the open portion 10 41 is formed in the substrate 10 4 and the insulating layer 20 4 of the fourth structure 1 D that exposes the lower surface of the metal layer 301 4 . Further, the open portion 10 42 (through hole) is formed that penetrates the substrate 10 4 , and the insulating layer 20 4 , the metal layer 301 4 and the insulating layer 40 4 of the fourth structure 1 D.
  • the plan shape and the method of forming the open portions 10 41 and 10 42 may be the same as those of the open portion 10 21 or the like.
  • the open portion 10 42 is formed at a position that overlaps the via wiring 60 4 in a plan view when the third structure 1 C and the fourth structure 1 D are stacked with each other in the predetermined direction.
  • the insulating layer 40 4 is not illustrated in FIG. 10B .
  • an area corresponding to the open portion 10 41 of the metal layer 301 4 are illustrated by a dashed line.
  • FIG. 11A to FIG. 11C are cross-sectional views corresponding to FIG. 9C and FIG. 10A .
  • the adhesion layer 50 3 is prepared, and the open portion 50 31 (through hole) that penetrates the adhesion layer 50 3 is formed.
  • the open portion 50 31 is formed at a position that overlaps the via wiring 60 4 in a plan view when the third structure 1 C and the fourth structure 1 D are stacked with each other through the adhesion layer 50 3 in the predetermined direction.
  • the substrate 10 4 and the fourth structure 1 D are reversed from the state illustrated in FIG. 10A , and are stacked on the third structure 10 through the adhesion layer 50 3 .
  • the adhesion layer 50 3 is cured.
  • the open portion 50 31 and the open portion 10 42 are in communication with each other, a single open portion 10 43 is formed and the upper surface of the via wiring 60 4 is exposed at a bottom portion.
  • the fourth structure 1 D may be stacked on the third structure 1 C through the adhesion layer 50 3 before forming the open portions, and thereafter, the open portions 10 41 , 10 42 and 50 31 may be formed.
  • the substrate 10 4 is removed (peeled) from the insulating layer 20 4 of the fourth structure 1 D.
  • the via wiring 60 5 is formed on the via wiring 60 4 that is exposed at the bottom portion of the open portion 10 43 .
  • the metal layer 301 3 and the metal layer 301 4 are electrically connected in series through the via wirings 60 4 and 60 5 .
  • the via wiring 60 6 is formed on the metal layer 301 4 that is exposed at the bottom portion of the open portion 10 41 .
  • the metal layer 301 4 and the via wiring 60 6 are electrically connected with each other.
  • the via wirings 60 5 and 60 6 may be formed by electroplating in which the bus line 36 is used for supplying power or by filling metal paste, similar to the via wiring 60 1 or the like.
  • the material of the via wirings 60 5 and 60 5 copper (Cu) or the like may be used, for example.
  • the upper surfaces of the via wirings 60 5 and 60 6 may be flush with the upper surface of the insulating layer 20 4 .
  • FIG. 12C is a plan view
  • FIG. 12A is a cross-sectional view of FIG. 12C taken along an F-F line in FIG. 12C
  • FIG. 12B is a cross-sectional view of FIG. 12C taken along a G-G line in FIG. 12C
  • the metal layer 301 5 becomes the fifth wiring 30 5 that is the fifth layer wiring and a part (about a roll) of the coil after finally shaped (by die cutting or the like).
  • the metal layer 301 5 is provided with a slit portion 301 y .
  • the slit portion 301 y is provided to facilitate forming the spiral shape of the coil when shaping (die cutting or the like) the coil substrate 1 in the following step.
  • the open portion 10 51 is formed in the substrate 10 5 and the insulating layer 20 5 of the fifth structure 1 E that exposes the lower surface of the metal layer 301 5 . Further, the open portion 10 52 (through hole) is formed that penetrates the substrate 10 5 , and the insulating layer 20 5 , the metal layer 301 5 and the insulating layer 40 5 of the fifth structure 1 E.
  • the plan shape and the method of forming the open portions 10 51 and 10 52 may be the same as those of the open portion 10 21 or the like, for example.
  • the open portion 10 52 is formed at a position that overlaps the open portion 50 41 in a plan view when the fourth structure 1 D and the fifth structure 1 E are stacked with each other in the predetermined direction.
  • the insulating layer 40 5 is not illustrated in FIG. 12C . Further, in FIG. 12C , an area corresponding to the open portion 10 51 of the metal layer 301 5 is illustrated by a dashed line.
  • FIG. 13A to FIG. 13C are cross-sectional views corresponding to FIG. 11C and FIG. 12A .
  • the adhesion layer 50 4 is prepared and the open portion 50 41 (through hole) that penetrates the adhesion layer 50 4 is formed.
  • the open portion 50 41 is formed at a position that overlaps the via wiring 60 6 in a plan view when the fourth structure 1 C and the fifth structure 1 E are stacked with each other through the adhesion layer 50 4 in the predetermined direction.
  • the substrate 10 5 and the fifth structure 1 E are reversed from the state illustrated in FIG. 12A , and are stacked on the fourth structure 1 D vie the adhesion layer 50 4 .
  • the adhesion layer 50 4 is cured.
  • the open portion 50 41 and the open portion 10 52 are in communication with each other, a single open portion 10 53 is formed and the upper surface of the via wiring 60 6 is exposed at a bottom portion.
  • the fifth structure 1 E may be stacked on the fourth structure 1 D through the adhesion layer 50 4 before forming the open portions, and thereafter, the open portions 10 51 , 10 52 and 50 41 may be formed.
  • the substrate 10 5 is removed (peeled) from the insulating layer 20 5 of the fifth structure 1 E.
  • the via wiring 60 7 is formed on the via wiring 60 6 that is exposed at the bottom portion of the open portion 10 53 .
  • the metal layer 301 5 and the metal layer 301 4 are electrically connected in series through the via wirings 60 6 and 60 7 .
  • the via wiring 60 8 (not illustrated in the drawings) is formed on the metal layer 301 5 that is exposed at the bottom portion of the open portion 10 51 (not illustrated in the drawings).
  • the metal layer 301 5 and the via wiring 60 8 are electrically connected with each other.
  • the via wirings 60 7 and 60 8 may be formed by electroplating in which the bus line 36 is used for supplying power or by filling metal paste, similar to the via wiring 60 1 or the like.
  • the material of the via wirings 60 7 and 60 8 copper (Cu) or the like may be used, for example.
  • the upper surfaces of the via wirings 60 7 and 60 8 may be flush with the upper surface of the insulating layer 20 5 .
  • FIG. 14A to FIG. 14C are cross-sectional views corresponding to FIG. 13C .
  • the sixth structure 1 F is formed in which the metal layer 301 6 is formed on the substrate 10 6 .
  • the metal layer 301 6 becomes the sixth wiring 30 6 that is the sixth layer wiring and is a part (about 3 ⁇ 4 roll) of the coil after finally shaped (by die cutting or the like).
  • the open portion 10 61 is formed in the substrate 10 6 and the insulating layer 20 6 of the sixth structure 1 F that exposes the lower surface of the metal layer 301 6 .
  • the open portion 10 62 (through hole) is formed that penetrates the substrate 10 6 , and the insulating layer 20 6 , the metal layer 301 6 and the insulating layer 40 6 of the sixth structure 1 F.
  • the sixth structure 1 F has the same structure as the second structure 1 B and the open portions 10 61 and 10 62 respectively correspond to the open portions 10 21 and 10 22 .
  • the adhesion layer 50 5 is prepared and the open portion 50 51 (through hole) is formed that penetrates the adhesion layer 50 5 .
  • the open portion 50 51 is formed at a position that overlaps the via wiring 60 8 in a plan view when the sixth structure 1 F and the fifth structure 1 E are stacked with each other through the adhesion layer 50 5 in the predetermined direction.
  • the substrate 10 6 and the sixth structure 1 F are reversed from the state illustrated in FIG. 6A , and are stacked on the fifth structure 1 E through the adhesion layer 50 5 .
  • the fifth structure 1 E and the sixth structure 1 F are faced to be stacked while interposing the adhesion layer 50 5 such that the substrate 10 1 and the substrate 10 6 are positioned outside. Thereafter, the adhesion layer 50 5 is cured. At this time, as the open portion 50 51 and the open portion 10 62 are in communication with each other, a single open portion 10 63 is formed and the upper surface of the via wiring 60 8 is exposed at a bottom portion.
  • the sixth structure 1 F may be stacked on the fifth structure 1 E through the adhesion layer 50 5 before forming the open portions, and thereafter, the open portions 10 61 , 10 62 and 50 51 may be formed.
  • the substrate 10 6 is removed (peeled) from the insulating layer 20 6 of the sixth structure 1 F.
  • the via wiring 60 9 is formed on the via wiring 60 8 that is exposed at the bottom portion of the open portion 10 63 .
  • the metal layer 301 5 and the metal layer 301 6 are electrically connected in series through the via wirings 60 8 and 60 9 .
  • the via wiring 60 10 is formed on the metal layer 301 6 that is exposed at the bottom portion of the open portion 10 61 .
  • the metal layer 301 6 and the via wiring 60 10 are electrically connected with each other.
  • the via wirings 60 9 and 60 10 may be formed by electroplating in which the bus line 36 is used for supplying power or by filling metal paste, similar to the via wiring 60 1 or the like.
  • the material of the via wirings 60 9 and 60 10 copper (Cu) or the like may be used, for example.
  • the upper surfaces of the via wirings 60 9 and 60 10 may be flush with the upper surface of the insulating layer 20 6 .
  • the seventh structure 1 G is formed in which the metal layer 301 7 is formed on the substrate 10 7 .
  • the metal layer 301 7 becomes the seventh wiring 30 7 that is the seventh layer wiring and is a part (about a roll) of the coil after finally shaped (by die cutting or the like).
  • the metal layer 301 7 is formed on the insulating layer 20 7 .
  • the connecting portion 37 is formed at one end portion of the metal layer 301 7 .
  • the metal layer 301 7 and the connecting portion 37 are integrally formed.
  • the metal layer 301 7 is provided with a slit portion 301 x .
  • the slit portion 301 x is provided to facilitate forming the spiral shape of the coil when shaping (die cutting or the like) the coil substrate 1 in the following step.
  • FIG. 15B is a plan view and FIG. 15A is a cross-sectional view of FIG. 15B taken along an A-A line of FIG. 15B .
  • the plan shape and the method of forming the open portion 10 72 may be the same as those of the open portion 10 21 or the like, for example.
  • the open portion 10 72 is formed at a position that overlaps the via wiring 60 10 in a plan view when the sixth structure 1 E and the seventh structure 1 G are stacked with each other in the predetermined direction.
  • the insulating layer 40 7 is not illustrated in FIG. 15B .
  • FIG. 16A to FIG. 16C are cross-sectional views corresponding to FIG. 14C and FIG. 15A .
  • the adhesion layer 50 6 is prepared and the open portion 50 61 (through hole) that penetrates the adhesion layer 50 6 is formed.
  • the open portion 50 61 is formed at a position that overlaps the via wiring 60 10 in a plan view when the sixth structure 1 F and the seventh structure 1 G are stacked with each other through the adhesion layer 50 6 in the predetermined direction.
  • the substrate 10 7 and the seventh structure 1 G are reversed from the state illustrated in FIG. 15A , and are stacked on the sixth structure 1 F through the adhesion layer 50 6 .
  • the adhesion layer 50 6 is cured.
  • the open portion 50 61 and the open portion 10 72 are in communication with each other, a single open portion 10 73 is formed and the upper surface of the via wiring 60 10 is exposed at a bottom portion.
  • the seventh structure 1 G may be stacked on the sixth structure 1 F through the adhesion layer 50 6 before forming the open portions, and thereafter, the open portions 10 72 and 50 61 may be formed.
  • the substrate 10 7 is removed (peeled) from the insulating layer 20 7 of the seventh structure 1 G.
  • the via wiring 60 11 is formed on the via wiring 60 10 that is exposed at the bottom portion of the open portion 10 73 .
  • the metal layer 301 6 and the metal layer 301 7 are electrically connected in series through the via wirings 60 10 and 60 11 .
  • the via wiring 60 11 may be formed by electroplating in which the bus line 36 is used for supplying power or by filling metal paste, similar to the via wiring 60 1 or the like.
  • the material of the via wiring 60 11 copper (Cu) or the like may be used, for example.
  • the upper surface of the via wiring 60 11 may be flush with the upper surface of the insulating layer 20 7 .
  • the adhesion layer 50 7 is stacked on the seventh structure 1 G in which an open portion is not provided.
  • the structure illustrated in FIG. 17A is individualized by being cut along the cut position D illustrated in FIG. 4A and FIG. 43 to form a substrates 1 M.
  • each of the substrates 1 M includes 50 individual areas C.
  • the step illustrated in FIG. 17B may not be performed and the reel (tape) structure for which the steps illustrated in FIG. 21A to FIG. 21C are performed may be shipped as a product.
  • FIG. 18 is a plan view illustrating an example of the metal layer 301 7 before die cutting or the like the substrate 1 M (layers position upper than the metal layer 301 7 are not illustrated).
  • FIG. 19 is a perspective view schematically illustrating each metal layer formed in each of the layers before die cutting or the like the substrate 1 M.
  • FIG. 18 is a plan view illustrating an example of the metal layer 301 7 before die cutting or the like the substrate 1 M (layers position upper than the metal layer 301 7 are not illustrated).
  • FIG. 19 is a perspective view schematically illustrating each metal layer formed in each of the layers before die cutting or the like the substrate 1 M.
  • FIG. 20 is a plan view corresponding to FIG. 18 and FIG. 21A is a cross-sectional view of FIG. 20 taken along an A-A line in FIG. 20 .
  • the shape of the wiring of each of the layers of the structure illustrated in FIG. 20 and FIG. 21A becomes such as illustrated in FIG. 2 .
  • the substrate 1 M may be formed by laser processing or the like instead of press working using a die or the like.
  • the metal layer 301 1 is shaped to become the first wiring 30 1 .
  • the metal layers 301 2 , 301 3 , 301 4 , 301 5 , 301 6 and 301 7 are shaped to become the second wiring 30 2 , the third wiring 30 3 , the fourth wiring 30 4 , the fifth wiring 30 5 , sixth wiring 30 6 and the seventh wiring 30 7 , respectively.
  • the first wiring 30 1 , the second wiring 30 2 , the third wiring 30 3 , the fourth wiring 30 4 , the fifth wiring 30 5 , the sixth wiring 30 6 and the seventh wiring 30 7 are electrically connected in series through the via wirings to constitute the spiral-shaped coil of about 5 and 1 ⁇ 2 rolls.
  • the stacked structured in each of which the first structure 1 A to the seventh structure 1 G are stacked are formed in the individual areas C, respectively, and are connected (not electrically connected) through linking portions 80 including the insulating layer 40 7 or the like formed between the adjacent individual areas C.
  • the insulating layer 40 7 or the like that constitutes the stacked structure of each of the individual areas C also has the substantially the same shape as the wiring and the through hole 1 x that penetrates the layers is formed at a substantially center portion of each of the stacked structures.
  • the insulating film 70 is formed so as to cover the surfaces of the stacked structure in which the first structure 1 A to the seventh structure 1 G are stacked except the bottom surface. This means that the insulating film 70 is formed that continuously covers the outer wall surface (sidewall) of the stacked structure formed at each of the individual areas C, the upper surface of the adhesion layer 50 7 and the inner wall surface of the through hole 1 x (see FIG. 1C far plan shape).
  • the end surfaces of the wirings are exposed at the outer wall surface (sidewall) of the stacked structure or at the inner wall surface of the through hole 1 x , there is a possibility that short between the wirings and the conductive material (magnetic filler or the like) that may be included in the sealing resin 110 may occur when the inductor 100 (see FIG. 3 ) is manufactured.
  • the insulating film 70 at surfaces of the stacked structure, the short between the wirings and the conductive material (magnetic filler or the like) that may be included in the sealing resin 110 is prevented.
  • the insulating film 70 epoxy based insulating resin, acrylic based insulating resin or the like may be used, for example.
  • the insulating film 70 may include filler such as silica or the like, for example.
  • the insulating film 70 may be formed by spin coating, spray coating or the like, for example.
  • Electrodepositing resist may be used as the insulating film 70 . In this case, the electrodepositing resist is deposited only on the end surfaces of the wirings that are exposed at the outer wall surface (sidewall) of the stacked structure or the inner wall surface of the through hole 1 x by electrodeposition coating.
  • the thickness of the insulating film 70 may be about 20 to 50 ⁇ m, for example.
  • the substrate 10 1 is removed from the insulating layer 20 1 .
  • the coil substrate 1 (see FIG. 1A to FIG. 1C ) is formed in each of the individual areas C.
  • the coil substrates 1 at the adjacent individual areas C are connected (not electrically connected) with each other through the linking portion 80 that is formed between those adjacent individual areas C.
  • the coil substrates 1 illustrated in FIG. 21C are cut for each of the individual areas C, for example.
  • the linking portions 80 are removed and the individualized plurality of coil substrates 1 are formed.
  • the side surface of the connecting portion 35 is exposed at the one side surface 1 y and the side surface of the connecting portion 37 is exposed at the other side surface 1 z , of each of the coil substrates 1 .
  • the sealing resin 110 is formed to seal the coil substrate 1 except the one side surface 1 y and the side surface 1 z by transfer mold or the like, for example.
  • insulating resin such as epoxy based insulating resin or the like including magnetic filler such as ferrite or the like may be used, for example.
  • the sealing resin 110 may be formed for the entirety of the individual areas C where the coil substrates 1 which are connected with each other through the linking portions 80 are formed as illustrated in FIG. 21C , and then, the coil substrates 1 may be cut to with the sealing resin 110 for each of the individual areas C to form the structure illustrated in FIG. 22B .
  • the electrode 120 composed of copper (Cu) or the like that continuously covers the one side surface and parts of the upper surface and the lower surface of the sealing resin 110 is formed by plating or paste coating.
  • the inner wall surface of the electrode 120 contacts the side surface of the connecting portion 35 that is exposed from the one side surface 1 y of the coil substrate 1 so that the electrode 120 and the connecting portion 35 are electrically connected.
  • the electrode 130 composed of copper (Cu) or the like that continuously covers the other side surface and parts of the upper surface and the lower surface of the sealing resin 110 is formed by plating or paste coating.
  • the inner wall surface of the electrode 130 contacts the side surface of the connecting portion 37 that is exposed from the other side surface 1 z of the coil substrate 1 so that the electrode 130 and the connecting portion 37 are electrically connected.
  • a method may be considered in which a wiring that constitutes a part of a coil is previously patterned in each structure, and then the structures are stacked.
  • a part of the wirings, which may be shifted with each other may be removed.
  • This kind of problem may be resolved by making the width of each of the wirings, which is previously formed in the respective structure, smaller in order to ensure areas where the wirings are not formed.
  • direct current resistance of the coil may be increased.
  • a metal layer having a plan shape larger than that of a wiring of a final product is formed in each structure, a stacked structure is formed by stacking the structures, and the stacked structure is shaped in the thickness direction such as to form the metal layers into the shape of wirings each having a shape to constitute the spiral-shaped coil at the same time.
  • the wirings are not shifted in the leftward/rightward direction, and the spiral-shaped coil can be obtained by the wirings that are stacked to high accurately overlap with each other in a plan view.
  • direct current resistance can be decreased. This means that each of the wirings can be made wider so that the direct current resistance can be decreased as there is no need to worry about the shifts of the wirings in the leftward/rightward direction.
  • a width of a wiring that is formed in each structure (one layer) can be made wider because the number of rolls of the wiring that is formed in each of the structures (one layer) is less than or equal to one of the coil.
  • the flexible insulating resin film polyphenylenesulfide film or the like, for example
  • the substrate 10 n is removed and does not remain in a final product.
  • the coil substrate 1 can be made thinner.
  • the coil substrate 1 can be formed on the substrate 10 n in a reel to reel process. With this, the cost for manufacturing the coil substrate 1 can be reduced due to mass production.
  • a smaller coil substrate or the like can be provided.
  • a combination of the number of rolls that each wiring (one layer) of each of a plurality of structures has, may be arbitrarily determined.
  • a combination of the wirings of about one roll and the wirings of about 3 ⁇ 4 roll may be used as the above explained embodiment, or alternatively, a combination of wirings of about one roll and wirings of about 1 ⁇ 2 roll may be used.
  • the wirings of about 3 ⁇ 4 roll are used, 4 kinds of pattern of wirings (the second wiring 30 2 , the third wiring 30 3 , the fourth wiring 30 4 and the fifth wiring 30 5 , for example) are necessary.
  • the wirings of about 1 ⁇ 2 roll are used, only two kinds of pattern of wirings are necessary.
  • “electrically connected in series” means that each of the wirings is connected to a first wiring that is included in an adjacent lower structure, for example, at one end, and is connected to a second wiring that is included in an adjacent upper structure, for example, at another end.
  • one end (where the open portion 10 22 is formed) of the second wiring 30 2 is connected to the first wiring 30 1 while another end (where the via wirings 60 2 and 60 3 are formed) of the second wiring 30 2 is connected to the third wiring 30 3 .

Abstract

A coil substrate includes a stacked structure in which a plurality of structures are stacked, each of the structures including a first insulating layer and a wiring formed on the first insulating layer, which becomes a part of a spiral-shaped coil; and an insulating film that covers a surface of the stacked structure, the spiral-shaped coil being formed by connecting the wirings of the adjacent structures in series.

Description

CROSS-REFERENCE TO RELATED APPLICATION
This application is a divisional application of U.S. patent application Ser. No. 14/488,400 filed on Sep. 17, 2014, which claims the benefit of priority of Japanese Patent Application No. 2013-214129 filed on Oct. 11, 2013, where the entire contents of all of these applications are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a coil substrate, a method of manufacturing a coil substrate and an inductor including a coil substrate.
2. Description of the Related Art
Recently, the size of an electronic device such as a game device, a smartphone or the like has been becoming smaller and smaller. In accordance with this, it is required for various elements such as an inductor or the like that is mounted on the electronic device to be smaller. As such an inductor that is mounted on the electronic device, one that uses a wire winding coil is known, for example. An inductor using a wire winding coil is used as a power supply circuit or the like of an electronic device, for example (see Patent Document 1, for example).
However, as there is a limitation in reducing the width of the wire winding, the ratio of the area occupied by the wire winding with respect to the entire area of the inductor becomes large if the size of the inductor is to be made smaller. In such a case, it is difficult to form a closed magnetic circuit. Therefore, there is a limitation in downsizing the size of the inductor using the wire winding coil while maintaining sufficient inductance and it is considered that the size of the plan shape of such an inductor is about 1.6 mm×1.6 mm at minimum.
Patent Document
[Patent Document 1] Japanese Laid-open Patent Publication No. 2003-168610
SUMMARY OF THE INVENTION
The present invention is made in light of the above problems, and provides a smaller coil substrate or the like.
According to an embodiment, there is provided a coil substrate including a stacked structure in which a plurality of structures are stacked, each of the structures including a first insulating layer and a wiring formed on the first insulating layer, which becomes a part of a spiral-shaped coil; and an insulating film that covers a surface of the stacked structure, the spiral-shaped coil being formed by connecting the wirings of the adjacent structures in series.
Note that also arbitrary combinations of the above-described elements, and any changes of expressions in the present invention, made among methods, devices, systems and so forth, are valid as embodiments of the present invention.
BRIEF DESCRIPTION OF THE DRAWINGS
Other objects, features and advantages of the present invention will become more apparent from the following detailed description when read in conjunction with the accompanying drawings.
FIG. 1A to FIG. 1C are views illustrating an example of a coil substrate of an embodiment;
FIG. 2 is a perspective view schematically illustrating a shape of a wiring of each structure constituting the coil substrate of the embodiment;
FIG. 3 is a cross-sectional view illustrating an example of an inductor of the embodiment;
FIG. 4A and FIG. 4B are views illustrating an example of a manufacturing method of the coil substrate of the embodiment;
FIG. 5A and FIG. 5B are views illustrating an example of the manufacturing method of the coil substrate of the embodiment;
FIG. 6A and FIG. 6B are views illustrating an example of the manufacturing method of the coil substrate of the embodiment;
FIG. 7A to FIG. 7C are views illustrating an example of the manufacturing method of the coil substrate of the embodiment;
FIG. 8A to FIG. 8C are views illustrating an example of the manufacturing method of the coil substrate of the embodiment;
FIG. 9A to FIG. 9C are views illustrating an example of the manufacturing method of the coil substrate of the embodiment;
FIG. 10A and FIG. 10B are views illustrating an example of the manufacturing method of the coil substrate of the embodiment;
FIG. 11A to FIG. 11C are views illustrating an example of the manufacturing method of the coil substrate of the embodiment;
FIG. 12A to FIG. 12C are views illustrating an example of the manufacturing method of the coil substrate of the embodiment;
FIG. 13A to FIG. 13C are views illustrating an example of the manufacturing method of the coil substrate of the embodiment;
FIG. 14A to FIG. 14C are views illustrating an example of the manufacturing method of the coil substrate of the embodiment;
FIG. 15A and FIG. 15B are views illustrating an example of the manufacturing method of the coil substrate of the embodiment;
FIG. 16A to FIG. 16C are views illustrating an example of the manufacturing method of the coil substrate of the embodiment;
FIG. 17A and FIG. 17B are views illustrating an example of the manufacturing method of the coil substrate of the embodiment;
FIG. 18 is a view illustrating an example of the manufacturing method of the coil substrate of the embodiment;
FIG. 19 is a view illustrating an example of the manufacturing method of the coil substrate of the embodiment;
FIG. 20 is a view illustrating an example of the manufacturing method of the coil substrate of the embodiment;
FIG. 21A to FIG. 21C are views illustrating an example of the manufacturing method of the coil substrate of the embodiment; and
FIG. 22A to FIG. 22C are view illustrating an example of a manufacturing method of an inductor of the embodiment.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
The invention will be described herein with reference to illustrative embodiments. Those skilled in the art will recognize that many alternative embodiments can be accomplished using the teachings of the present invention and that the invention is not limited to the embodiments illustrated for explanatory purposes. It is to be noted that, in the explanation of the drawings, the same components are given the same reference numerals, and explanations are not repeated.
(Structure of Coil Substrate)
The structure of a coil substrate of the embodiment is explained. FIG. 1A to FIG. 1C are views illustrating an example of a coil substrate 1 of the embodiment. FIG. 1C is a plan view, FIG. 1A is a cross-sectional view of FIG. 1C taken along an A-A line, and FIG. 1B is a cross-sectional view of FIG. 1C taken along a B-B line. FIG. 2 is a perspective view schematically illustrating a shape of a wiring of each structure constituting the coil substrate 1 of the embodiment.
With reference to FIG. 1A to FIG. 2, the coil substrate 1 mainly includes a first structure 1A, a second structure 1B, a third structure 1C, a fourth structure 1D, a fifth structure 1E, a sixth structure 1F, a seventh structure 1G, adhesion layers 50 1 to 50 7 and an insulating film 70. In FIG. 1C, the insulating layer 20 7, the adhesion layer 50 7 and the insulating film 70 formed on the adhesion layer 50 7 are not illustrated. In FIG. 1C, a portion is illustrated in a dot pattern for explanation purposes.
Further, in the following explanation, the drawings illustrating a method of manufacturing the coil substrate 1 are appropriately referred to. Further, in FIG. 1A to FIG. 1C, numerals of open portions are not illustrated, and numerals that are illustrated in the drawings illustrating the method of manufacturing the coil substrate 1 are referred to.
In this embodiment, an adhesion layer 50 7 side is referred to as an upper side or one side, and an insulating layer 20 1 side is referred to as a lower side or the other side. Further, a surface of each component at the adhesion layer 50 7 side is referred to as an upper surface or one surface, and a surface at the insulating layer 20 1 side is referred to as a lower surface or the other surface. However, the coil substrate 1 may be used in an opposite direction or may be used at an arbitrary angle. Further, in this embodiment, “in a plan view” means that an object is seen in a direction that is normal to one surface of the insulating layer 20 1, and a “plan shape” means a shape of an object seen in the direction that is normal to the one surface of the insulating layer 20 1.
As will be explained below, the coil substrate 1 is formed into an inductor 100 (see FIG. 3). Thus, the plan shape of the coil substrate 1 may have about a size such that the plan shape of the inductor 100 has substantially a rectangular shape of about 1.6 mm×0.8 mm, for example, when manufacturing the inductor 100 using the coil substrate 1. The thickness of the coil substrate 1 may be about 0.5 mm, for example.
The plan shape (outer edge) of the coil substrate 1 is not a simple rectangular shape but is similar to the plan shape of an outer edge of each wiring (a seventh wiring 30 7 or the like) that constitute the coil substrate 1. This is in order to form a large amount of sealing resin 110 around the coil substrate 1 when manufacturing the inductor 100 (see FIG. 3) using the coil substrate 1. Further, the coil substrate 1 is provided with a through hole 1 x at the substantially center portion of the coil substrate 1. Similarly, this is in order to form a larger amount of the sealing resin 110 around the coil substrate 1 when manufacturing the inductor 100 (see FIG. 3) using the coil substrate 1. By using insulating resin (epoxy based insulating resin or the like, for example) including magnetic filler such as ferrite or the like as sealing resin 110, and sealing the large amount of the part around the coil substrate 1 including the inside of the through hole 1 x, for example, the inductance of the inductor 100 can be made larger.
The first structure 1A includes an insulating layer 20 1, a first wiring 30 1, a connecting portion 35 and an insulating layer 40 1. The insulating layer 20 1 is formed as an outermost layer (undermost layer in FIG. 1A) of the coil substrate 1. For the material of the insulating layer 20 1, epoxy based insulating resin or the like may be used, for example. The thickness of the insulating layer 20 1 may be about 8 to 12 μm, for example.
The first wiring 30 1 and the connecting portion 35 are formed on the insulating layer 20 1. The material of the first wiring 30 1 and the connecting portion 35 may be copper (Cu), copper alloy or the like, for example. The thickness of the first wiring 30 1 and the connecting portion 35 may be about 12 to 50 μm, for example. The width of the first wiring 30 1 may be about 50 to 130 μm, for example. The first wiring 30 1 is a first layer wiring that is a part (about a roll) of a coil, and is patterned in substantially an elliptical shape in a direction illustrated in FIG. 2. Here, a direction along the coil (Y direction) is referred to as a longer direction and a width direction that is perpendicular to the longer direction is referred so as a shorter direction (X direction). The cross-sectional shape of the first wiring 30 1 in the shorter direction is substantially a rectangular shape.
The connecting portion 35 is formed at one end portion of the first wiring 30 1. A side surface of the connecting portion 35 is exposed from one side surface 1 y of the coil substrate 1 and the exposed portion is connected to an electrode of the inductor 100. The connecting portion 35 is integrally formed with the first wiring 30 1.
The insulating layer 40 1 is formed on the insulating layer 20 1 such as to cover the first wiring 30 1 and the connecting portion 35. In other words, the first structure 1A includes the insulating layer 20 1, the first wiring 30 1 and the connecting portion 35 that are formed on the insulating layer 20 1 and become a part of the coil, and the insulating layer 40 1 formed on the insulating layer 20 1 such as to cover the first wiring 30 1 and the connecting portion 35. Here, one portion of the connecting portion 35 at the side surface is exposed from the insulating layer 40 1. The insulating layer 40 1 is provided with an open portion (open portion 40 11 in FIG. 5A) that exposes an upper surface of the first wiring 30 1, and a part of a via wiring 60 1 is filled in the open portion to be electrically connected with the first wiring 30 1. For the material of the insulating layer 40 1, photosensitive epoxy based insulating resin or the like may be used, for example. The thickness of the insulating layer 40 1 may be about 5 to 30 μm (the thickness from the upper surface of the first wiring 30 1), for example.
The second structure 1B is stacked on the first structure 1A through the adhesion layer 50 1. The second structure 1B includes an insulating layer 20 2, a second wiring 30 2 and an insulating layer 40 2. As the adhesion layer 50 1, a heat resistance adhesive made of insulating resin such as epoxy based adhesive, polyimide based adhesive or the like may be used, for example. The thickness of the adhesion layer 50 1 may be about 10 to 40 μm, for example.
Here, in the following, the shape, the thickness, the material and the like of an insulating layer 20 n, an insulating layer 40 n and an adhesion layer 50 n (here, “n” is a natural number more than or equal to 2) are the same as those of the insulating layer 20 1, insulating layer 40 1 and the adhesion layer 50 1 unless otherwise explained.
Further, the insulating layer 20 n may be referred to as a first insulating layer and the insulating layer 40 n may be referred to as a second insulating layer. Although the insulating layer 20 n and the insulating layer 40 n are added different numerals for explanation purposes, both function as insulating layers that cover the respective wiring. Thus, the insulating layer 20 n and the insulating layer 40 n in total may referred to as an insulating layer. Here, the coil substrate 1 may not include the insulating layer 40 n when the wirings of the structures can be surely insulated from each other by the adhesion layer 50 n.
The insulating layer 40 2 is stacked on the adhesion layer 50 1. A bottom surface and a side surface of the second wiring 30 2 are covered by the insulating layer 40 2 and an upper surface of the second wiring 30 2 is exposed from the insulating layer 40 2. The material, the thickness and the like of the second wiring 30 2 may be the same as those of the first wiring 30 1. The second wiring 30 2 is a second layer wiring that is a part (about ¾ roll) of the coil, and is patterned in substantially a semi-elliptical shape in the direction illustrated in FIG. 2. The cross-sectional shape of the second wiring 30 2 in the shorter direction is substantially a rectangular shape.
The insulating layer 20 2 is stacked on the second wiring 30 2 and the insulating layer 40 2. In other words, the second structure 1B has a vertically inversed structure of a structure including the insulating layer 20 2, the second wiring 30 2 that is formed on the insulating layer 20 2 and is a part of the coil, and the insulating layer 40 2 formed on the insulating layer 20 2 such as to cover the second wiring 30 2.
The second structure 1B is provided with an open portion that penetrates the insulating layer 20 2, the second wiring 30 2 and the insulating layer 40 2 whose lower side is in communication with an open portion of the adhesion layer 50 1 and the open portion of the insulating layer 40 1. A via wiring 60 1 is filled in these open portions (an open portion 10 23 illustrated in FIG. 7A). The second wiring 30 2 is electrically connected in series with the first wiring 30 1 through the via wiring 60 1. Further, the second structure 1B is provided with an open portion (an open portion 10 21 illustrated in FIG. 7A) that penetrates the insulating layer 20 2 and exposes an upper surface of the second wiring 30 2, and a via wiring 60 2 is filled in the open portion. The second wiring 30 2 is electrically connected to the via wiring 60 2.
The third structure 1C is stacked on the second structure 1B through the adhesion layer 50 2. The third structure 1C includes an insulating layer 20 3, a third wiring 30 3 and an insulating layer 40 3.
The insulating layer 40 3 is stacked on the adhesion layer 50 2. A bottom surface and a side surface of the third wiring 30 3 are covered by the insulating layer 40 3 and an upper surface of the third wiring 30 3 is exposed from the insulating layer 40 3. The material, the thickness and the like of the third wiring 30 3 may be the same as those of the first wiring 30 1. The third wiring 30 3 is a third layer wiring that is a part (about a roll) of the coil, and is patterned in substantially a semi-elliptical shape in the direction illustrated in FIG. 2. The cross-sectional shape of the third wiring 30 3 in the shorter direction is substantially a rectangular shape.
The insulating layer 20 3 is stacked on the third wiring 30 3 and the insulating layer 40 3. In other words, the third structure 1C has a vertically inversed structure of a structure including the insulating layer 20 3, the third wiring 30 3 that is formed on the insulating layer 20 3 and is a part of the coil, and the insulating layer 40 3 formed on the insulating layer 20 3 such as to cover the third wiring 30 3.
The third structure 1C is provided with an open portion that penetrates the insulating layer 20 3, the third wiring 30 3 and the insulating layer 40 3 whose lower side is in communication with an open portion of the adhesion layer 50 2. The via wiring 60 3 is filled in these open portions (an open portion 10 33 in FIG. 9A). The via wiring 60 3 is electrically connected to a via wiring 60 2 that is filled in the open portion of the insulating layer 20 2 of the second structure 1B. The third wiring 30 3 is electrically connected in series with the second wiring 30 2 through the via wirings 60 2 and 60 3. Further, the third structure 1C is provided with an open portion (an open portion 10 31 in FIG. 85) that penetrates the insulating layer 20 3 and exposes an upper surface of the third wiring 30 3. A via wiring 60 4 is filled in the open portion. The third wiring 30 3 is electrically connected to the via wiring 60 4.
The fourth structure 1D is stacked on the third structure 1C through the adhesion layer 50 3. The fourth structure 1D includes an insulating layer 20 4, a fourth wiring 30 4 and an insulating layer 40 4.
The insulating layer 40 4 is stacked on the adhesion layer 50 3. A bottom surface and a side surface of the fourth wiring 30 4 are covered by the insulating layer 40 4 and an upper surface is exposed from the insulating layer 40 4. The material, the thickness and the like of the fourth wiring 30 4 are the same as those of the first wiring 30 1. The fourth wiring 30 4 is a fourth layer wiring that is a part (about ¾ roll) of the coil, and is patterned in substantially a semi-elliptical shape in the direction illustrated in FIG. 2.
The insulating layer 20 4 is stacked on the fourth wiring 30 4 and the insulating layer 40 4. In other words, the fourth structure 1D has a vertically inversed structure of a structure including the insulating layer 20 4, the fourth wiring 30 4 that is formed on the insulating layer 20 4 and is a part of the coil, and the insulating layer 40 4 formed on the insulating layer 20 4 such as to cover the fourth wiring 30 4.
The fourth structure 1D is provided with an open portion that penetrates the insulating layer 20 4, the fourth wiring 30 4 and the insulating layer 40 4 whose lower side is in communication with an open portion of the adhesion layer 50 3. The via wiring 60 5 is filled in these open portions. The via wiring 60 5 is electrically connected to the via wiring 60 4 formed in the open portion of the insulating layer 20 3 of the third structure 1C. The fourth wiring 30 4 is electrically connected in series with the third wiring 30 3 through the via wirings 60 4 and 60 5. Further, the fourth structure 1D is provided with an open portion that penetrates the insulating layer 20 4 and exposes an upper surface of the fourth wiring 30 4. A via wiring 60 6 is filled in the open portion. The fourth wiring 30 4 is electrically connected to the via wiring 60 6.
The fourth structure 1D has the same structure as the second structure 1B and corresponds to a structure obtained by rotating the second structure 1B 180° around an axis of normal of an X-Y plane. The open portions 10 41 and 10 42 respectively correspond to the open portions 10 21 and 10 22.
The fifth structure 1E is stacked on the fourth structure 1D through the adhesion layer 50 4. The fifth structure 1E includes an insulating layer 20 5, a fifth wiring 30 5 and an insulating layer 40 5.
The insulating layer 40 5 is stacked on the adhesion layer 50 4. A bottom surface and a side surface of the fifth wiring 30 5 are covered by the insulating layer 40 5 and an upper surface of the fifth wiring 30 5 is exposed from the insulating layer 40 5. The material, the thickness and the like of the fifth wiring 30 5 may be the same as those of the first wiring 30 1. The fifth wiring 30 5 is a fifth layer wiring that is a part (about a roll) of the coil, and is patterned in substantially a semi-elliptical shape in the direction illustrated in FIG. 2. The cross-sectional shape of the fifth wiring 30 5 in the shorter direction is substantially a rectangular shape.
The insulating layer 20 5 is stacked on the fifth wiring 30 5 and the insulating layer 40 5. In other words, the fifth structure 1E has a vertically inversed structure of a structure including the insulating layer 20 5, the fifth wiring 30 5 that is formed on the insulating layer 20 5 and is a part of the coil, and the insulating layer 40 5 formed on the insulating layer 20 5 such as to cover the fifth wiring 30 5.
The fifth structure 1E is provided with an open portion that penetrates the insulating layer 20 5, the fifth wiring 30 5 and the insulating layer 40 5 whose lower side is in communication with an open portion of the adhesion layer 50 4. The via wiring 60 7 is filled in the open portion (an open portion 10 53 illustrated in FIG. 13A and FIG. 13B). The via wiring 60 7 is electrically connected to a via wiring 60 6 that is filled in the open portion of the insulating layer 20 4 of the fourth structure 1D. The fifth wiring 30 5 is electrically connected in series with the fourth wiring 30 4 through the via wirings 60 6 and 60 7. The fifth structure 1E is provided with an open portion (an open portion 10 51 illustrated in FIG. 123) that penetrates the insulating layer 20 5 and exposes an upper surface of the fifth wiring 30 5. A via wiring 60 8 is filled in the open portion. The fifth wiring 30 5 is electrically connected to the via wiring 60 8.
The fifth structure 1E has the same structure as the third structure 1C and corresponds to a structure obtained by rotating the third structure 1C 180° around the normal axis of the X-Y plane. The open portions 10 51 and 10 52 respectively correspond to the open portions 10 31 and 10 32.
The sixth structure 1F is stacked on the fifth structure 1E through the adhesion layer 50 5. The sixth structure 1F includes an insulating layer 20 6, a sixth wiring 30 6 and an insulating layer 40 6.
The insulating layer 40 6 is stacked on the adhesion layer 50 5. A bottom surface and a side surface of the sixth wiring 30 6 are covered by the insulating layer 40 6 and an upper surface of the sixth wiring 30 6 is exposed from the insulating layer 40 6. The material, the thickness and the like of the sixth wiring 30 6 may be the same as those of the first wiring 30 1. The sixth wiring 30 6 is a sixth layer wiring that is a part (about ¾ roll) of the coil, and is patterned in substantially a semi-elliptical shape in the direction illustrated in FIG. 2. The cross-sectional shape of the sixth wiring 30 6 in the shorter direction is substantially a rectangular shape.
The insulating layer 20 6 is stacked on the sixth wiring 30 6 and the insulating layer 40 6. In other words, the sixth structure 1F has a vertically inversed structure of a structure including the insulating layer 20 6, the sixth wiring 30 6 that is formed on the insulating layer 20 6 and is a part of the coil, and the insulating layer 40 6 formed on the insulating layer 20 6 such as to cover the sixth wiring 30 6.
The sixth structure 1F is provided with an open portion that penetrates the insulating layer 20 6, the sixth wiring 30 6 and the insulating layer 40 6 whose lower side is in communication with an open portion of the adhesion layer 50 5. The via wiring 60 9 is filled in the open portion (an open portion 10 63 illustrated in FIG. 14A and FIG. 14B). The via wiring 60 9 is electrically connected to a via wiring 60 8 formed in the open portion of the insulating layer 20 5 of the fifth structure 1E. The sixth wiring 30 6 is electrically connected in series with the fifth wiring 30 5 through the via wirings 60 8 and 60 9. The sixth structure 1F is provided with an open portion (open portion 10 61 illustrated in FIG. 14A) that penetrates the insulating layer 20 6 and exposes an upper surface of the sixth wiring 30 6. A via wiring 60 10 is filled in the open portion. The sixth wiring 30 6 is electrically connected to the via wiring 60 10.
Although the reference numerals are different in the sixth structure 1F and the second structure 1B, the sixth structure 1F has the same structure as the second structure 1B and the open portions 10 61 and 10 62 respectively correspond to the open portions 10 21 and 10 22.
The seventh structure 1G is stacked on the sixth structure 1F through the adhesion layer 50 6. The seventh structure 1G includes an insulating layer 20 7, a seventh wiring 30 7, a connecting portion 37 and an insulating layer 40 7.
The insulating layer 40 7 is stacked on the adhesion layer 50 6. A bottom surface and a side surface of each of the seventh wiring 30 7 and the connecting portion 37 are covered by the insulating layer 40 7 and an upper surface of each of the seventh wiring 30 7 and the connecting portion 37 is exposed from the insulating layer 40 7. The material, the thickness and the like of the seventh wiring 30 7 and the connecting portion 37 are the same as those of the first wiring 30 1. The seventh wiring 30 7 is an uppermost wiring layer, and is patterned in substantially a semi-elliptical shape in the direction illustrated in FIG. 2.
The connecting portion 37 is formed at one end portion of the seventh wiring 30 7. A side surface of the connecting portion 37 is exposed from another side surface 1 z of the coil substrate 1 and the exposed portion is connected to an electrode of the inductor 100. The connecting portion 37 is integrally formed with the seventh wiring 30 7. The insulating layer 20 7 is stacked on the seventh wiring 30 7, the connecting portion 37 and the insulating layer 40 7. In other words, the seventh structure 1G has a vertically inversed structure of a structure including the insulating layer 20 7, the seventh wiring 30 7 and the connecting portion 37 formed on the insulating layer 20 7, and the insulating layer 40 7 formed on the insulating layer 20 7 such as to cover the seventh wiring 30 7 and the connecting portion 37.
The seventh structure 1G is provided with an open portion that penetrates the insulating layer 20 7, the seventh wiring 30 7 and the insulating layer 40 7 whose lower side is in communication with an open portion of the adhesion layer 50 6. The via wiring 60 11 is filled in these open portions (an open portion 10 72 illustrated in FIG. 16A). The via wiring 60 11 is electrically connected to a via wiring 60 10 formed in the open portion of the insulating layer 20 6 of the sixth structure 1F. The seventh wiring 30 7 is electrically connected in series with the sixth wiring 30 6 through the via wirings 60 10 and 60 11. As such, in the coil substrate 1, the spiral-shaped coil, from the connecting portion 35 to the connecting portion 37, is formed by connecting the wirings of the adjacent structures in series.
The adhesion layer 50 7 is stacked on the seventh structure 1G. The adhesion layer 50 7 is not provided with an open portion. This means that an upper side of the stacked structure in which the first structure 1A to the seventh structure 1G are stacked is covered by the adhesion layer 50 7, which is an insulating layer, and any conductive materials are not exposed.
In the stacked structure in which the first structure 1A to the seventh structure 1G are stacked, surfaces except the bottom surface and the side surfaces 1 y and 1 z are covered by the insulating film 70. The inner wall surface of the through hole 1 x is also covered by the insulating film 70. The insulating film 70 is provided to prevent a short between the end surfaces of the wirings that are exposed from the stacked structure and conductive materials (magnetic filler or the like) that may be included in the sealing resin 110 when manufacturing the inductor 100 (see FIG. 3). For the insulating film 70, epoxy based insulating resin, acrylic based insulating resin or the like may be used, for example. The insulating film 70 may include filler such as silica or the like. The thickness of the insulating film 70 may be about 20 to 50 μm, for example.
FIG. 3 is a cross-sectional view illustrating an example of the inductor 1 of the embodiment. With reference to FIG. 3, the inductor 100 is a chip inductor in which the coil substrate 1 is sealed by the sealing resin 110 and electrodes 120 and 130 are formed. The plan shape of the inductor 100 may be substantially a rectangular shape having a size of about 1.6 mm×0.8 mm. The thickness of the inductor 100 may be about 1.0 mm, for example. The inductor 100 may be used as a voltage conversion circuit or the like of a small-size electronic device, for example.
In the inductor 100, the sealing resin 110 seals the coil substrate 1 except portions at the one side surface 1 y and the other side surface 1 z. This means that the sealing resin 110 covers the coil substrate 1 except the portions of the side surfaces where the connecting portions 35 and 37 are exposed. The sealing resin 110 is also formed in the through hole 1 x. For the sealing resin 110, insulating resin (epoxy based insulating resin or the like, for example) including magnetic filler such as ferrite or the like may be used, for example. The magnetic material has a function to increase the inductance of the inductor 100.
As such, according to the coil substrate 1, as the through hole 1 x is provided and the through hole 1 x is also filled with the insulating resin such as the epoxy based insulating resin or the like including the magnetic material, the inductance can be improved. Further, a core made of a magnetic material such as ferrite or the like may be provided in the through hole 1 x and the core may be also sealed by the sealing resin 110. The shape of the core may be a column shape, a rectangular parallelepiped shape or the like, for example.
The electrode 120 is formed outside the sealing resin 110 and is electrically connected to a part of the connecting portion 35. Specifically, the electrode 120 is continuously formed at the one side surface of the sealing resin 110 and parts of the upper surface and the lower surface of the sealing resin 110. An inner wall surface of the electrode 120 contacts a side surface of the connecting portion 35 that is exposed at the one side surface 1 y of the coil substrate 1 and the electrode 120 and the connecting portion 35 are electrically connected with each other.
The electrode 130 is formed outside the sealing resin 110 and is electrically connected to a part of the connecting portion 37. Specifically, the electrode 130 is continuously formed at the side surface of the sealing resin 110 and parts of the upper surface and the lower surface of the sealing resin 110. An inner wall surface of the electrode 130 contacts a side surface of the connecting portion 37 that is exposed at the other side surface 1 z of the coil substrate 1 and the electrode 130 and the connecting portion 37 are electrically connected with each other. For the material of the electrodes 120 and 130, copper (Cu), copper alloy or the like may be used, for example. The electrodes 120 and 130 may be formed by coating copper paste, sputtering of copper, electroless plating or the like, for example. The electrodes 120 and 130 may be a stacked structure of a plurality of metal layers.
(Method of Manufacturing Coil Substrate)
Next, a method of manufacturing the coil substrate of the embodiment is explained. FIG. 4A to FIG. 21C are views illustrating an example of the method of manufacturing the coil substrate of the embodiment. First, steps illustrated in FIG. 4A and FIG. 4B are explained. FIG. 4A is a plan view, and FIG. 4B is a cross-sectional view of FIG. 4A taken along a direction parallel to a Y-Z plane in FIG. 4A in the vicinity of one of individual areas C (which will be explained below). In the steps illustrated in FIG. 4A and FIG. 4B, first, a flexible reel (tape) insulating resin film is prepared as the substrate 10 1 (first substrate).
Then, sprocket holes 10 z are continuously formed at both end positions of the substrate 10 1 in a shorter direction (Y direction in FIG. 4A and FIG. 4B) along a longer direction (X direction in FIG. 4A and FIG. 4B) with substantially a same interval, by press working or the like. Thereafter, the insulating layer 20 1 and the metal film 300 1 are formed on one surface of the substrate 10 1 in this order at an area except the both end portions of the substrate 10 1 where the sprocket holes 10 z are formed. Specifically, the semi-cured insulating layer 20 1 and the metal film 300 1 are stacked on the one surface of the substrate 10 1 in this order and are heated so that the semi-cured insulating layer 20 1 is cured.
Each area C (referred to as the “individual areas C”) expressed by a dashed line inside the both end portions of the substrate 10 1 where the sprocket holes 10 z are formed becomes the coil substrate 1 after finally being cut and individualized along the dashed lines. The plurality of individual areas C is aligned in columns and rows, for example. At this time, the plurality of individual areas C may be aligned with a predetermined space therebetween as illustrated in FIG. 4A, or may be aligned to contact with each other. Further, the number of individual areas C and the number of sprocket holes 10 z may be arbitrarily determined. Here, a line expressed by “D” (hereinafter, referred to as cut position D) indicates a cut position along which the reel (tape) substrate 10 1 or the like is cut in the following step.
For the substrate 10 1, polyphenylenesulfide film, polyimide film, polyethylenenaphthalate film or the like may be used, for example. The thickness of the substrate 10 1 may be about 50 to 75 μm, for example.
For the insulating layer 20 1, film epoxy based insulating resin or the like may be used, for example. Alternatively, for the insulating layer 20 1, liquid or paste epoxy based insulating resin or the like may be used. The thickness of the insulating layer 20 1 may be about 8 to 12 μm, for example. The metal film 300 1 becomes the metal layer 301 1 and the connecting portion 35 after being patterned, and may be made of a copper film, for example. The thickness of the metal film 300 1 may be about 12 to 50 μm, for example.
The sprocket holes 10 z are used for pitch feeding the substrate 10 1 by being engaged with pins of a sprocket that is driven by a motor or the like when the substrate 10 1 is mounted on a manufacturing apparatus or the like in the course of manufacturing the coil substrate 1. The width (in a direction perpendicular to the alignment direction of the sprocket holes 10 z (Y direction)) of the substrate 10 1 is determined to correspond to the manufacturing apparatus on which the substrate 10 1 is mounted.
The width of the substrate 10 1 may be about 40 to 90 mm, for example. On the other hand, the length of the substrate 10 1 (in an alignment direction of the sprocket holes 10 z (X direction)) may be arbitrarily determined. For the example illustrated in FIG. 4A, there are individual areas C of 5 rows and 10 columns. However, the substrate 10 1 may be made longer and the individual areas C of about few hundreds columns may be provided, for example.
Next, in steps illustrated in FIG. 5A and FIG. 5B (FIG. 5B is a plan view and FIG. 5A is a cross-sectional view of FIG. 5B taken along an A-A line in FIG. 5B), the first structure 1A is formed in which metal layer 301 1 is formed on the substrate 10 1. The metal layer 301 1 becomes the first wiring 30 1 that is the first layer wiring and is a part (about a roll) of the coil after finally shaped (by die cutting or the like).
Specifically, the metal layer 301 1 is formed on the insulating layer 20 1 by patterning the metal film 300 1 illustrated in FIG. 4B. Further, at this time, the connecting portion 35 is formed at the one end portion of the metal layer 301 1. Further, at this time, a bus line 36 connected to the connecting portion 35 is formed. The bus line 36 is used for power supply in electroplating in the following steps and is electrically connected to the metal layer 301 1 and the connecting portion 35 of each of the individual areas C. If the electroplating is not performed in the following steps, the bus line 36 may not be formed. The metal layer 301 1 is provided with a slit portion 301 x. The slit portion 301 x is provided to facilitate forming a spiral shape of the coil when shaping (die cutting or the like) the coil substrate 1.
The metal film 300 1 may be patterned by photolithography, for example. This means that the metal film 300 1 may be patterned by forming photosensitive resist on the metal film 300 1, forming an open portion in the photosensitive resist by exposing and developing a predetermined area, and removing the metal film 300 1 that is exposed in the open portion by etching. The metal layer 301 1, the connecting portion 35 and the bus line 36 are integrally formed.
Thereafter, the metal layer 301 1, the connecting portion 35 and the bus line 36 are covered by the insulating layer 40 1. The insulating layer 40 1 may be formed by laminating a film photosensitive epoxy based insulating resin or the like. Alternatively, the insulating layer 40 1 may be formed by coating liquid or paste photosensitive epoxy based insulating resin or the like. The thickness of the insulating layer 40 1 (the thickness from the upper surface of the metal layer 301 1) may be about 5 to 30 μm, for example.
Thereafter, the open portion 40 11 is formed in the insulating layer 40 1 of the first structure 1A that exposes the upper surface of the metal layer 301 1. The plan shape of the open portion 40 11 may be a circular shape whose diameter is about 150 μm. The open portion 40 11 may be formed by press working, laser processing or the like, for example. The open portion 40 11 may be formed by exposing and developing the photosensitive insulating layer 40 1. In FIG. 5B, the insulating layer 40 1 is not illustrated. In FIG. 5B, an area of the metal layer 301 1 corresponding to the open portion 40 11 is illustrated by a dashed line.
Next, in steps illustrated in FIG. 6A and FIG. 6B (FIG. 6B is a plan view and FIG. 6A is a cross-sectional view of FIG. 6B taken along an A-A line in FIG. 6B), the second structure 1B is formed in which the metal layer 301 2 is formed on the substrate 10 2 (second substrate). The metal layer 301 2 becomes the second wiring 30 2 that is the second layer wiring and is a part (about ¾ roll) of the coil after finally shaped (by die cutting or the like). Specifically, after forming the sprocket holes 10 z, similar to the step illustrated in FIG. 4A and FIG. 4B, the insulating layer 20 2 and the metal film 300 2 (not illustrated in the drawings) are formed on the substrate 10 2 in this order at an area except the both end portions of the substrate 10 2 where the sprocket holes 10 z are formed.
Then, similar to the steps illustrated in FIG. 5A and FIG. 5B, the metal film 300 2 is patterned and the metal layer 301 2 patterned as illustrated in FIG. 6B is formed on the insulating layer 20 2. Thereafter, the metal layer 301 2 is covered by the insulating layer 40 2. Then, the open portion 10 21 is formed in the substrate 10 2 and the insulating layer 20 2 of the second structure 1B that exposes the lower surface of the metal layer 301 2. Further, the open portion 10 22 (through hole) is formed that penetrates the substrate 10 2, and the insulating layer 20 2, the metal layer 301 2 and the insulating layer 40 2 of the second structure 1B.
The plan shape of each of the open portions 10 21 and 10 22 may be a circular shape whose diameter is about 150 μm. The open portions 10 21 and 10 22 may be formed by press working, laser processing or the like. The open portion 10 22 is formed at a position that overlaps the open portion 40 11 in a plan view when the first structure 1A and the second structure 1B are stacked with each other in a predetermined direction. Further, in FIG. 6B, the insulating layer 40 2 is not illustrated. Further, in FIG. 6B, an area of the metal layer 301 2 corresponding to the open portion 10 21 is illustrated by a dashed line.
The shape, the thickness, the material and the like of the substrate 10 n and the metal film 300 n (here, “n” is a natural number more than or equal to 2) are the same as those of the substrate 10 1 and the metal film 300 1 unless otherwise explained.
Next, steps illustrated in FIG. 7A to FIG. 7C are explained. FIG. 7A to FIG. 7C are cross-sectional views corresponding to FIG. 5A and FIG. 6A. First, in a step illustrated in FIG. 7A, the adhesion layer 50 1 is prepared and the open portion 50 11 (through hole) that penetrates the adhesion layer 50 1 is formed. The open portion 50 11 may be formed at a position that overlaps the open portions 40 11 and 10 22 in a plan view when the first structure 1A and the second structure 1B are stacked with each other through the adhesion layer 50 1 in the predetermined direction. For the adhesion layer 50 1, heat resistance adhesive (thermosetting) made of insulating resin such as epoxy based adhesive, polyimide based adhesive or the like may be used, for example. The thickness of the adhesion layer 50 1 may be about 10 to 40 μm, for example.
Next, the substrate 10 2 and the second structure 1B are reversed from the state illustrated in FIG. 6A, and are stacked on the first structure 1A through the adhesion layer 50 1. This means that the first structure 1A and the second structure 1B are faced to be stacked while interposing the adhesion layer 50 1 such that the substrate 10 1 and the substrate 10 2 are positioned, outside. Thereafter, the adhesion layer 50 1 is cured. At this time, as the open portion 40 11, the open portion 50 11 and the open portion 10 22 are in communication with each other, a single open portion 10 23 is formed and the upper surface of the metal layer 301 1 is exposed at a bottom portion.
Alternatively, in the steps illustrated in FIG. 6A to FIG. 7A, the second structure 1B may be stacked on the first structure 1A through the adhesion layer 50 1 before forming the open portions, and thereafter, the open portions 10 21, 10 22 and 50 11 may be provided.
Next, in a step illustrated in FIG. 7B, the substrate 10 2 is removed (peeled) from the insulating layer 20 2 of the second structure 1B. The substrate 10 2 may be mechanically removed from the insulating layer 20 2 of the second structure 1B.
Next, in a step illustrated in FIG. 7C, the via wiring 60 1 made of copper (Cu) or the like, for example, is formed on the metal layer 301 1 that is exposed at the bottom portion of the open portion 10 23. The metal layer 301 1 and the metal layer 301 2 are electrically connected in series through the via wiring 60 1. Further, the via wiring 60 2 made of copper (Cu) or the like, for example, is formed on the metal layer 301 2 that is exposed at a bottom portion of the open portion 10 21. The metal layer 301 2 and the via wiring 60 2 are electrically connected with each other.
The via wirings 60 1 and 60 2 may be formed by depositing copper (Cu) or the like from the metal layers 301 1 and 301 2 sides by electroplating in which the bus line 36 is used for supplying power, for example. Further, the via wirings 60 1 and 60 2 may be formed by filling metal paste of copper (Cu) or the like on the metal layer 301 1 that is exposed at the bottom portion of the open portion 10 23 and also filling the metal paste of copper (Cu) or the like on the metal layer 301 2 that is exposed at the bottom portion of the open portion 10 21. The upper surfaces of the via wirings 60 1 and 60 2 may be flush with the upper surface of the insulating layer 20 2. With this process, in the stacked structure in which the second structure 1B is stacked on the first structure 1A, the metal layer 301 1, the via wiring 60 1 and the metal layer 301 2 are electrically connected in series. Those connected parts become the coil of about one and ¾ rolls after finally shaped (by die cutting or the like).
Next, in steps illustrated in FIG. 8A to FIG. 8C, similar to the steps illustrated in FIG. 6A and FIG. 6B, the third structure 1C is formed in which the metal layer 301 3 is formed on the substrate 10 3. FIG. 8C is a plan view, FIG. 8A is a cross-sectional view of FIG. 8C taken along an A-A line in FIG. 8C and FIG. 8B is a cross-sectional view of FIG. 8C taken along an E-E line in FIG. 8C. The metal layer 301 3 becomes the third wiring 30 3 that is the third layer wiring and is a part (about a roll) of the coil after finally shaped (by die cutting or the like). The metal layer 301 3 is provided with a slit portion 301 y. The slit portion 301 y is provided to facilitate forming the spiral shape of the coil when shaping (die cutting or the like) the coil substrate 1 in the following step.
Next, the open portion 10 31 is formed in the substrate 10 3 and the insulating layer 20 3 of the third structure 1C that exposes the lower surface of the metal layer 301 3. Further, the open portion 10 32 (through hole) is formed that penetrates the substrate 10 3, and the insulating layer 20 3, the metal layer 301 3 and the insulating layer 40 3 of the third structure 1C.
The plan shape and the method of forming the open portions 10 31 and 10 32 may be the same as those of the open portion 10 21 or the like, for example. The open portion 10 32 is formed at a position that overlaps the open portion 10 21 in a plan view when the second structure 12 and the third structure 1C are stacked with each other in the predetermined direction. The insulating layer 40 3 is not illustrated in FIG. 8C. Further, in FIG. 8C, an area of the metal layer 301 3 corresponding to the open portion 10 31 is illustrated by a dashed line.
Next, steps illustrated in FIG. 9A to FIG. 9C are explained. FIG. 9A to FIG. 9C are cross-sectional views corresponding to FIG. 7C. First, in a step illustrated in FIG. 9A, the adhesion layer 50 2 is prepared and the open portion 50 21 (through hole) that penetrates the adhesion layer 50 2 is formed. The open portion 50 21 is formed at a position that overlaps the via wiring 60 2 in a plan view when the second structure 1B and the third structure 1C are stacked with each other through the adhesion layer 50 2 in the predetermined direction. The shape, the thickness, the material and the like of an adhesion layer 50 n (here, “n” is a natural number more than or equal to 2) are the same as those of the adhesion layer 50 1 unless otherwise explained.
Next, the substrate 10 3 and the third structure 1C are reversed from the state illustrated in FIG. 8A, and are stacked on the second structure 1B through the adhesion layer 50 2. This means that the second structure 1B and the third structure 1C are faced to be stacked while interposing the adhesion layer 50 2 such that the substrate 10 1 and the substrate 10 3 are positioned outside. Thereafter, the adhesion layer 50 2 is cured. At this time, as the open portion 50 21 and the open portion 10 32 are in communication with each other, a single open portion 10 33 is formed and the upper surface of the via wiring 60 2 is exposed at a bottom portion.
Alternatively, in the steps illustrated in FIG. 8A to FIG. 9A, the third structure 1C may be stacked on the second structure 1B through the adhesion layer 50 2 before forming the open portions, and thereafter, the open portions 10 31, 10 32 and 50 21 may be provided.
Next, in a step illustrated in FIG. 9B, the substrate 10 3 is removed (peeled) from the insulating layer 20 3 of the third structure 1C.
Next, in a step illustrated in FIG. 9C, the via wiring 60 3 is formed on the via wiring 60 2 that is exposed at the bottom portion of the open portion 10 33. The metal layer 301 2 and the metal layer 301 3 are electrically connected in series through the via wirings 60 2 and 60 3. Further, the via wiring 60 4 (not illustrated in the drawings) is formed on the metal layer 301 3 that is exposed at the bottom portion of the open portion 10 31 (not illustrated in the drawings). The metal layer 301 3 and the via wiring 60 4 are electrically connected with each other.
The via wirings 60 3 and 60 4 may be formed by electroplating in which the bus line 36 is used for supplying power or by filling metal paste, similar to the via wiring 60 1. For the material of the via wirings 60 3 and 60 4, copper (Cu) or the like may be used, for example. The upper surfaces of the via wirings 60 3 and 60 4 may be flush with the upper surface of the insulating layer 20 3. With this process, in the stacked structure in which the first structure 1A to the third structure 1C are stacked, the metal layers 301 1, 301 2 and 301 3 are electrically connected in series through the via wirings. Those connected parts become the coil of about two and ¾ rolls after finally shaped (by die cutting or the like).
Next, in steps illustrated in FIG. 10A and FIG. 10B (FIG. 10B is a plan view and FIG. 10A is a cross-sectional view of FIG. 10B taken along an F-F line in FIG. 10B), similar to the steps illustrated in FIG. 6A and FIG. 6B, the fourth structure 1D is formed in which the metal layer 301 4 is formed on the substrate 10 4. The metal layer 301 4 becomes the fourth wiring 30 4 that is the fourth layer wiring and is a part (about ¾ roll) of the coil after finally shaped (by die cutting or the like).
Next, the open portion 10 41 is formed in the substrate 10 4 and the insulating layer 20 4 of the fourth structure 1D that exposes the lower surface of the metal layer 301 4. Further, the open portion 10 42 (through hole) is formed that penetrates the substrate 10 4, and the insulating layer 20 4, the metal layer 301 4 and the insulating layer 40 4 of the fourth structure 1D.
The plan shape and the method of forming the open portions 10 41 and 10 42 may be the same as those of the open portion 10 21 or the like. The open portion 10 42 is formed at a position that overlaps the via wiring 60 4 in a plan view when the third structure 1C and the fourth structure 1D are stacked with each other in the predetermined direction. Here, the insulating layer 40 4 is not illustrated in FIG. 10B. Further, in FIG. 10B, an area corresponding to the open portion 10 41 of the metal layer 301 4 are illustrated by a dashed line.
Next, steps illustrated in FIG. 11A to FIG. 11C are explained. FIG. 11A to FIG. 11C are cross-sectional views corresponding to FIG. 9C and FIG. 10A. First, in a step illustrated in FIG. 11A, the adhesion layer 50 3 is prepared, and the open portion 50 31 (through hole) that penetrates the adhesion layer 50 3 is formed. The open portion 50 31 is formed at a position that overlaps the via wiring 60 4 in a plan view when the third structure 1C and the fourth structure 1D are stacked with each other through the adhesion layer 50 3 in the predetermined direction.
Next, the substrate 10 4 and the fourth structure 1D are reversed from the state illustrated in FIG. 10A, and are stacked on the third structure 10 through the adhesion layer 50 3. This means that the third structure 1C and the fourth structure 1D are faced to be stacked while interposing the adhesion layer 50 3 such that the substrate 10 1 and the substrate 10 4 are positioned outside. Thereafter, the adhesion layer 50 3 is cured. At this time, as the open portion 50 31 and the open portion 10 42 are in communication with each other, a single open portion 10 43 is formed and the upper surface of the via wiring 60 4 is exposed at a bottom portion.
Alternatively, in the steps illustrated FIG. 10A to FIG. 11A, the fourth structure 1D may be stacked on the third structure 1C through the adhesion layer 50 3 before forming the open portions, and thereafter, the open portions 10 41, 10 42 and 50 31 may be formed.
Next, in a step illustrated in FIG. 11B, the substrate 10 4 is removed (peeled) from the insulating layer 20 4 of the fourth structure 1D.
Next, in a step illustrated in FIG. 11C, the via wiring 60 5 is formed on the via wiring 60 4 that is exposed at the bottom portion of the open portion 10 43. The metal layer 301 3 and the metal layer 301 4 are electrically connected in series through the via wirings 60 4 and 60 5. Further, the via wiring 60 6 is formed on the metal layer 301 4 that is exposed at the bottom portion of the open portion 10 41. The metal layer 301 4 and the via wiring 60 6 are electrically connected with each other.
The via wirings 60 5 and 60 6 may be formed by electroplating in which the bus line 36 is used for supplying power or by filling metal paste, similar to the via wiring 60 1 or the like. For the material of the via wirings 60 5 and 60 5, copper (Cu) or the like may be used, for example. The upper surfaces of the via wirings 60 5 and 60 6 may be flush with the upper surface of the insulating layer 20 4. With this process, in the stacked structure in which the first structure 1A to the fourth structure 1D are stacked, the metal layers 301 1, 301 2, 301 3 and 301 4 are electrically connected in series through the via wirings. Those connected parts become the coil of about three rolls after finally shaped (by die cutting or the like).
Next, in steps illustrated in FIG. 12A to FIG. 12C, similar to the steps illustrated in FIG. 6A and FIG. 6B, the fifth structure 1E is formed in which the metal layer 301 5 is formed on the substrate 10 5. FIG. 12C is a plan view, FIG. 12A is a cross-sectional view of FIG. 12C taken along an F-F line in FIG. 12C, and FIG. 12B is a cross-sectional view of FIG. 12C taken along a G-G line in FIG. 12C. The metal layer 301 5 becomes the fifth wiring 30 5 that is the fifth layer wiring and a part (about a roll) of the coil after finally shaped (by die cutting or the like). The metal layer 301 5 is provided with a slit portion 301 y. The slit portion 301 y is provided to facilitate forming the spiral shape of the coil when shaping (die cutting or the like) the coil substrate 1 in the following step.
Next, the open portion 10 51 is formed in the substrate 10 5 and the insulating layer 20 5 of the fifth structure 1E that exposes the lower surface of the metal layer 301 5. Further, the open portion 10 52 (through hole) is formed that penetrates the substrate 10 5, and the insulating layer 20 5, the metal layer 301 5 and the insulating layer 40 5 of the fifth structure 1E.
The plan shape and the method of forming the open portions 10 51 and 10 52 may be the same as those of the open portion 10 21 or the like, for example. The open portion 10 52 is formed at a position that overlaps the open portion 50 41 in a plan view when the fourth structure 1D and the fifth structure 1E are stacked with each other in the predetermined direction. The insulating layer 40 5 is not illustrated in FIG. 12C. Further, in FIG. 12C, an area corresponding to the open portion 10 51 of the metal layer 301 5 is illustrated by a dashed line.
Next, steps illustrated in FIG. 13A to FIG. 13C are explained. FIG. 13A to FIG. 13C are cross-sectional views corresponding to FIG. 11C and FIG. 12A. First, in a step illustrated in FIG. 13A, the adhesion layer 50 4 is prepared and the open portion 50 41 (through hole) that penetrates the adhesion layer 50 4 is formed. The open portion 50 41 is formed at a position that overlaps the via wiring 60 6 in a plan view when the fourth structure 1C and the fifth structure 1E are stacked with each other through the adhesion layer 50 4 in the predetermined direction.
Next, the substrate 10 5 and the fifth structure 1E are reversed from the state illustrated in FIG. 12A, and are stacked on the fourth structure 1D vie the adhesion layer 50 4. This means that the fourth structure 1D and the fifth structure 1E are faced to be staked while interposing the adhesion layer 50 4 such that the substrate 10 1 and the substrate 10 5 are positioned outside. Thereafter, the adhesion layer 50 4 is cured. At this time, as the open portion 50 41 and the open portion 10 52 are in communication with each other, a single open portion 10 53 is formed and the upper surface of the via wiring 60 6 is exposed at a bottom portion.
Alternatively, in the steps illustrated in FIG. 12A to FIG. 13A, the fifth structure 1E may be stacked on the fourth structure 1D through the adhesion layer 50 4 before forming the open portions, and thereafter, the open portions 10 51, 10 52 and 50 41 may be formed.
Next, in a step illustrated in FIG. 13B, the substrate 10 5 is removed (peeled) from the insulating layer 20 5 of the fifth structure 1E.
Next, in a step illustrated in FIG. 13C, the via wiring 60 7 is formed on the via wiring 60 6 that is exposed at the bottom portion of the open portion 10 53. The metal layer 301 5 and the metal layer 301 4 are electrically connected in series through the via wirings 60 6 and 60 7. Further, the via wiring 60 8 (not illustrated in the drawings) is formed on the metal layer 301 5 that is exposed at the bottom portion of the open portion 10 51 (not illustrated in the drawings). The metal layer 301 5 and the via wiring 60 8 are electrically connected with each other.
The via wirings 60 7 and 60 8 may be formed by electroplating in which the bus line 36 is used for supplying power or by filling metal paste, similar to the via wiring 60 1 or the like. For the material of the via wirings 60 7 and 60 8, copper (Cu) or the like may be used, for example. The upper surfaces of the via wirings 60 7 and 60 8 may be flush with the upper surface of the insulating layer 20 5. With this process, in the stacked structure in which the first structure 1A to the fifth structure 1E are stacked, the metal layers 301 1, 301 2, 301 3, 301 4 and 301 5 are electrically connected in series through the via wirings. Those connected parts become the coil of about four rolls after finally shaped (by die cutting or the like).
Next, steps illustrated in FIG. 14A to FIG. 14C are explained. FIG. 14A to FIG. 14C are cross-sectional views corresponding to FIG. 13C. First, in a step illustrated in FIG. 14A, the sixth structure 1F is formed in which the metal layer 301 6 is formed on the substrate 10 6. The metal layer 301 6 becomes the sixth wiring 30 6 that is the sixth layer wiring and is a part (about ¾ roll) of the coil after finally shaped (by die cutting or the like). Then, the open portion 10 61 is formed in the substrate 10 6 and the insulating layer 20 6 of the sixth structure 1F that exposes the lower surface of the metal layer 301 6. Further, the open portion 10 62 (through hole) is formed that penetrates the substrate 10 6, and the insulating layer 20 6, the metal layer 301 6 and the insulating layer 40 6 of the sixth structure 1F. Although the reference numerals are different in the sixth structure 1F and the second structure 1B, the sixth structure 1F has the same structure as the second structure 1B and the open portions 10 61 and 10 62 respectively correspond to the open portions 10 21 and 10 22.
Next, the adhesion layer 50 5 is prepared and the open portion 50 51 (through hole) is formed that penetrates the adhesion layer 50 5. The open portion 50 51 is formed at a position that overlaps the via wiring 60 8 in a plan view when the sixth structure 1F and the fifth structure 1E are stacked with each other through the adhesion layer 50 5 in the predetermined direction. Then, similar to FIG. 7A, the substrate 10 6 and the sixth structure 1F are reversed from the state illustrated in FIG. 6A, and are stacked on the fifth structure 1E through the adhesion layer 50 5. This means that the fifth structure 1E and the sixth structure 1F are faced to be stacked while interposing the adhesion layer 50 5 such that the substrate 10 1 and the substrate 10 6 are positioned outside. Thereafter, the adhesion layer 50 5 is cured. At this time, as the open portion 50 51 and the open portion 10 62 are in communication with each other, a single open portion 10 63 is formed and the upper surface of the via wiring 60 8 is exposed at a bottom portion.
Alternatively, in the steps illustrated in FIG. 6A, FIG. 6B and FIG. 14A, the sixth structure 1F may be stacked on the fifth structure 1E through the adhesion layer 50 5 before forming the open portions, and thereafter, the open portions 10 61, 10 62 and 50 51 may be formed.
Next, in a step illustrated in FIG. 14B, the substrate 10 6 is removed (peeled) from the insulating layer 20 6 of the sixth structure 1F.
Next, in a step illustrated in FIG. 14C, the via wiring 60 9 is formed on the via wiring 60 8 that is exposed at the bottom portion of the open portion 10 63. The metal layer 301 5 and the metal layer 301 6 are electrically connected in series through the via wirings 60 8 and 60 9. Further, the via wiring 60 10 is formed on the metal layer 301 6 that is exposed at the bottom portion of the open portion 10 61. The metal layer 301 6 and the via wiring 60 10 are electrically connected with each other.
The via wirings 60 9 and 60 10 may be formed by electroplating in which the bus line 36 is used for supplying power or by filling metal paste, similar to the via wiring 60 1 or the like. For the material of the via wirings 60 9 and 60 10, copper (Cu) or the like may be used, for example. The upper surfaces of the via wirings 60 9 and 60 10 may be flush with the upper surface of the insulating layer 20 6. With this process, in the stacked structure in which the first structure 1A to the sixth structure 1F are stacked, the metal layers 301 1, 301 2, 301 3, 301 4, 301 5 and 301 6 are electrically connected in series through the via wirings. Those connected parts become the coil of about four and ¾ rolls after finally shaped (by die cutting or the like).
Next, in steps illustrated in FIG. 15A and FIG. 15B, similar to the steps illustrated in FIG. 6A and FIG. 6B, the seventh structure 1G is formed in which the metal layer 301 7 is formed on the substrate 10 7. The metal layer 301 7 becomes the seventh wiring 30 7 that is the seventh layer wiring and is a part (about a roll) of the coil after finally shaped (by die cutting or the like). Specifically, the metal layer 301 7 is formed on the insulating layer 20 7. Further, the connecting portion 37 is formed at one end portion of the metal layer 301 7. The metal layer 301 7 and the connecting portion 37 are integrally formed. The metal layer 301 7 is provided with a slit portion 301 x. The slit portion 301 x is provided to facilitate forming the spiral shape of the coil when shaping (die cutting or the like) the coil substrate 1 in the following step.
Next, the open portion 10 72 (through hole) is formed that penetrates the substrate 10 7, and the insulating layer 20 7, the metal layer 301 7 and the insulating layer 40 7 of the seventh structure 1G. FIG. 15B is a plan view and FIG. 15A is a cross-sectional view of FIG. 15B taken along an A-A line of FIG. 15B. The plan shape and the method of forming the open portion 10 72 may be the same as those of the open portion 10 21 or the like, for example. The open portion 10 72 is formed at a position that overlaps the via wiring 60 10 in a plan view when the sixth structure 1E and the seventh structure 1G are stacked with each other in the predetermined direction. The insulating layer 40 7 is not illustrated in FIG. 15B.
Next, steps illustrated in FIG. 16A to FIG. 16C are explained. FIG. 16A to FIG. 16C are cross-sectional views corresponding to FIG. 14C and FIG. 15A. First, in a step illustrated in FIG. 16A, the adhesion layer 50 6 is prepared and the open portion 50 61 (through hole) that penetrates the adhesion layer 50 6 is formed. The open portion 50 61 is formed at a position that overlaps the via wiring 60 10 in a plan view when the sixth structure 1F and the seventh structure 1G are stacked with each other through the adhesion layer 50 6 in the predetermined direction.
Next, the substrate 10 7 and the seventh structure 1G are reversed from the state illustrated in FIG. 15A, and are stacked on the sixth structure 1F through the adhesion layer 50 6. This means that the sixth structure 1F and the seventh structure 1G are faced to be staked while interposing the adhesion layer 50 6 such that the substrate 10 1 and the substrate 10 7 are positioned outside. Thereafter, the adhesion layer 50 6 is cured. At this time, as the open portion 50 61 and the open portion 10 72 are in communication with each other, a single open portion 10 73 is formed and the upper surface of the via wiring 60 10 is exposed at a bottom portion.
Alternatively, in the steps illustrated in FIG. 15A to FIG. 16A, the seventh structure 1G may be stacked on the sixth structure 1F through the adhesion layer 50 6 before forming the open portions, and thereafter, the open portions 10 72 and 50 61 may be formed.
Next, in a step illustrated in FIG. 162, the substrate 10 7 is removed (peeled) from the insulating layer 20 7 of the seventh structure 1G.
Next, in a step illustrated in FIG. 16C, the via wiring 60 11 is formed on the via wiring 60 10 that is exposed at the bottom portion of the open portion 10 73. The metal layer 301 6 and the metal layer 301 7 are electrically connected in series through the via wirings 60 10 and 60 11.
The via wiring 60 11 may be formed by electroplating in which the bus line 36 is used for supplying power or by filling metal paste, similar to the via wiring 60 1 or the like. For the material of the via wiring 60 11, copper (Cu) or the like may be used, for example. The upper surface of the via wiring 60 11 may be flush with the upper surface of the insulating layer 20 7. With this process, in the stacked structure in which the first structure 1A to the seventh structure 1G are stacked, the metal layers 301 1, 301 2, 301 3, 301 4, 301 5, 301 6 and 301 7 are connected in series through the via wirings. Those connected parts become the coil of about five and ½ rolls after finally shaped (by die cutting or the like).
Next, in a step illustrated in FIG. 17A, the adhesion layer 50 7 is stacked on the seventh structure 1G in which an open portion is not provided. Next, in a step illustrated in FIG. 17B, the structure illustrated in FIG. 17A is individualized by being cut along the cut position D illustrated in FIG. 4A and FIG. 43 to form a substrates 1M. For the example illustrated in FIG. 17A and FIG. 173, each of the substrates 1M includes 50 individual areas C. Alternatively, the step illustrated in FIG. 17B may not be performed and the reel (tape) structure for which the steps illustrated in FIG. 21A to FIG. 21C are performed may be shipped as a product.
Next, in steps illustrated in FIG. 18 to FIG. 21A, the substrate 1M is shaped (by die cutting or the like) to form the metal layer formed in each of the layers into the wiring that constitutes a part of the spiral-shaped coil by removing unnecessary parts. FIG. 18 is a plan view illustrating an example of the metal layer 301 7 before die cutting or the like the substrate 1M (layers position upper than the metal layer 301 7 are not illustrated). FIG. 19 is a perspective view schematically illustrating each metal layer formed in each of the layers before die cutting or the like the substrate 1M. The substrate 1M in which the metal layers as illustrated in FIG. 18 and FIG. 19 are shaped by press working using a die or the like to be in a form illustrated in FIG. 20 and FIG. 21A. FIG. 20 is a plan view corresponding to FIG. 18 and FIG. 21A is a cross-sectional view of FIG. 20 taken along an A-A line in FIG. 20. The shape of the wiring of each of the layers of the structure illustrated in FIG. 20 and FIG. 21A becomes such as illustrated in FIG. 2. The substrate 1M may be formed by laser processing or the like instead of press working using a die or the like.
With this process, in the stacked structure in which the first structure 1A to the seventh structure 1G are stacked, the metal layer 301 1 is shaped to become the first wiring 30 1. Similarly, the metal layers 301 2, 301 3, 301 4, 301 5, 301 6 and 301 7 are shaped to become the second wiring 30 2, the third wiring 30 3, the fourth wiring 30 4, the fifth wiring 30 5, sixth wiring 30 6 and the seventh wiring 30 7, respectively. The first wiring 30 1, the second wiring 30 2, the third wiring 30 3, the fourth wiring 30 4, the fifth wiring 30 5, the sixth wiring 30 6 and the seventh wiring 30 7 are electrically connected in series through the via wirings to constitute the spiral-shaped coil of about 5 and ½ rolls.
The stacked structured in each of which the first structure 1A to the seventh structure 1G are stacked are formed in the individual areas C, respectively, and are connected (not electrically connected) through linking portions 80 including the insulating layer 40 7 or the like formed between the adjacent individual areas C. The insulating layer 40 7 or the like that constitutes the stacked structure of each of the individual areas C also has the substantially the same shape as the wiring and the through hole 1 x that penetrates the layers is formed at a substantially center portion of each of the stacked structures.
Next, in steps illustrated in FIG. 215, the insulating film 70 is formed so as to cover the surfaces of the stacked structure in which the first structure 1A to the seventh structure 1G are stacked except the bottom surface. This means that the insulating film 70 is formed that continuously covers the outer wall surface (sidewall) of the stacked structure formed at each of the individual areas C, the upper surface of the adhesion layer 50 7 and the inner wall surface of the through hole 1 x (see FIG. 1C far plan shape). As the end surfaces of the wirings are exposed at the outer wall surface (sidewall) of the stacked structure or at the inner wall surface of the through hole 1 x, there is a possibility that short between the wirings and the conductive material (magnetic filler or the like) that may be included in the sealing resin 110 may occur when the inductor 100 (see FIG. 3) is manufactured. Thus, by forming the insulating film 70 at surfaces of the stacked structure, the short between the wirings and the conductive material (magnetic filler or the like) that may be included in the sealing resin 110 is prevented.
For the insulating film 70, epoxy based insulating resin, acrylic based insulating resin or the like may be used, for example. The insulating film 70 may include filler such as silica or the like, for example. The insulating film 70 may be formed by spin coating, spray coating or the like, for example. Electrodepositing resist may be used as the insulating film 70. In this case, the electrodepositing resist is deposited only on the end surfaces of the wirings that are exposed at the outer wall surface (sidewall) of the stacked structure or the inner wall surface of the through hole 1 x by electrodeposition coating. The thickness of the insulating film 70 may be about 20 to 50 μm, for example.
Next, in a step illustrated in FIG. 21C, the substrate 10 1 is removed from the insulating layer 20 1. With this, the coil substrate 1 (see FIG. 1A to FIG. 1C) is formed in each of the individual areas C. The coil substrates 1 at the adjacent individual areas C are connected (not electrically connected) with each other through the linking portion 80 that is formed between those adjacent individual areas C.
In order to manufacture the inductor 100 (see FIG. 3), as illustrated in FIG. 22A, the coil substrates 1 illustrated in FIG. 21C are cut for each of the individual areas C, for example. With this, the linking portions 80 are removed and the individualized plurality of coil substrates 1 are formed. At this time, the side surface of the connecting portion 35 is exposed at the one side surface 1 y and the side surface of the connecting portion 37 is exposed at the other side surface 1 z, of each of the coil substrates 1.
Next, as illustrated in FIG. 22B, the sealing resin 110 is formed to seal the coil substrate 1 except the one side surface 1 y and the side surface 1 z by transfer mold or the like, for example. For the sealing resin 110, insulating resin such as epoxy based insulating resin or the like including magnetic filler such as ferrite or the like may be used, for example. Alternatively, the sealing resin 110 may be formed for the entirety of the individual areas C where the coil substrates 1 which are connected with each other through the linking portions 80 are formed as illustrated in FIG. 21C, and then, the coil substrates 1 may be cut to with the sealing resin 110 for each of the individual areas C to form the structure illustrated in FIG. 22B.
Next, as illustrated in FIG. 22C, the electrode 120 composed of copper (Cu) or the like that continuously covers the one side surface and parts of the upper surface and the lower surface of the sealing resin 110 is formed by plating or paste coating. The inner wall surface of the electrode 120 contacts the side surface of the connecting portion 35 that is exposed from the one side surface 1 y of the coil substrate 1 so that the electrode 120 and the connecting portion 35 are electrically connected. Similarly, the electrode 130 composed of copper (Cu) or the like that continuously covers the other side surface and parts of the upper surface and the lower surface of the sealing resin 110 is formed by plating or paste coating. The inner wall surface of the electrode 130 contacts the side surface of the connecting portion 37 that is exposed from the other side surface 1 z of the coil substrate 1 so that the electrode 130 and the connecting portion 37 are electrically connected. With this, the inductor 100 is completed.
As such, according to the coil substrate 1 of the embodiment, a single spiral-shaped coil is formed by manufacturing a plurality of structures in each of which a wiring that becomes a part of the spiral-shaped coil is covered by an insulating film, and stacking the structures through adhesion layers, respectively, such that the wirings of the structures are connected in series through via wirings, respectively. With this, by increasing the stacking number of the structures, a coil with the desired number of rolls can be obtained without changing the plan shape. This means that the number of rolls (the number of turns) of the coil can be increased with a size smaller (the plan shape of about 1.6 mm×0.8 mm, for example) than conventional coils.
Further, for example, a method may be considered in which a wiring that constitutes a part of a coil is previously patterned in each structure, and then the structures are stacked. However, in such a method, there may be shifts between the wirings of the structures in a leftward/rightward direction so that the wirings may not be stacked to completely overlap with each other in a plan view. Then, when a through hole or the like is formed in the stacked structure, a part of the wirings, which may be shifted with each other, may be removed. This kind of problem may be resolved by making the width of each of the wirings, which is previously formed in the respective structure, smaller in order to ensure areas where the wirings are not formed. However, in such a case, direct current resistance of the coil may be increased.
On the other hand, according to the method of manufacturing the coil substrate of the embodiment, a metal layer having a plan shape larger than that of a wiring of a final product is formed in each structure, a stacked structure is formed by stacking the structures, and the stacked structure is shaped in the thickness direction such as to form the metal layers into the shape of wirings each having a shape to constitute the spiral-shaped coil at the same time. Thus, the wirings are not shifted in the leftward/rightward direction, and the spiral-shaped coil can be obtained by the wirings that are stacked to high accurately overlap with each other in a plan view. As a result, direct current resistance can be decreased. This means that each of the wirings can be made wider so that the direct current resistance can be decreased as there is no need to worry about the shifts of the wirings in the leftward/rightward direction.
Further, as the number of rolls of the coil can be increased by increasing the stacking number of the structures without changing the plan shape, a small-size coil substrate with larger inductance can be easily obtained.
Further, a width of a wiring that is formed in each structure (one layer) can be made wider because the number of rolls of the wiring that is formed in each of the structures (one layer) is less than or equal to one of the coil. Thus, it is possible to increase the cross section of the wiring in the width direction, and winding resistance that influences performance of the inductor can be decreased.
Further, although the flexible insulating resin film (polyphenylenesulfide film or the like, for example) is used as the substrate 10 n when manufacturing the coil substrate 1, the substrate 10 n is removed and does not remain in a final product. Thus, the coil substrate 1 can be made thinner.
Further, by using a reel (tape) flexible insulating resin film (polyphenylenesulfide film or the like, for example) as the substrate 10 n, the coil substrate 1 can be formed on the substrate 10 n in a reel to reel process. With this, the cost for manufacturing the coil substrate 1 can be reduced due to mass production.
According to the embodiment, a smaller coil substrate or the like can be provided.
Although a preferred embodiment of the coil substrate, the method of manufacturing the coil substrate and the inductor has been specifically illustrated and described, it is to be understood that minor modifications may be made therein without departing from the spirit and scope of the invention as defined by the claims.
The present invention is not limited to the specifically disclosed embodiments, and numerous variations and modifications may be made without departing from the spirit and scope of the present invention.
For example, a combination of the number of rolls that each wiring (one layer) of each of a plurality of structures has, may be arbitrarily determined. For example, a combination of the wirings of about one roll and the wirings of about ¾ roll may be used as the above explained embodiment, or alternatively, a combination of wirings of about one roll and wirings of about ½ roll may be used. When the wirings of about ¾ roll are used, 4 kinds of pattern of wirings (the second wiring 30 2, the third wiring 30 3, the fourth wiring 30 4 and the fifth wiring 30 5, for example) are necessary. However, when the wirings of about ½ roll are used, only two kinds of pattern of wirings are necessary.
Further, in the above embodiment, “electrically connected in series” means that each of the wirings is connected to a first wiring that is included in an adjacent lower structure, for example, at one end, and is connected to a second wiring that is included in an adjacent upper structure, for example, at another end. Specifically, with reference to FIG. 2, one end (where the open portion 10 22 is formed) of the second wiring 30 2 is connected to the first wiring 30 1 while another end (where the via wirings 60 2 and 60 3 are formed) of the second wiring 30 2 is connected to the third wiring 30 3.

Claims (13)

What is claimed is:
1. A coil substrate comprising:
a stacked structure in which a plurality of structures are stacked, each of the structures including a first insulating layer and a wiring formed on the first insulating layer, which becomes a part of a spiral-shaped coil; and
an insulating film that covers a surface of the stacked structure, the spiral-shaped coil being formed by connecting the wirings of the adjacent structures in series,
wherein the stacked structure is provided with a through hole that penetrates the stacked structure such that a part of an end surface of the wiring and a part of an end surface of the first insulating layer of each of the structures is exposed at an inner wall surface of the through hole,
wherein the end surface of the wiring and the end surface of the first insulating layer are flush with each other at the inner wall surface of the through hole, and
wherein the end surface of the wiring and the end surface of the first insulating layer of each of the structures exposed at the inner wall surface are covered by the insulating film.
2. The coil substrate according to claim 1, wherein each of the structures further includes a second insulating layer formed on the first insulating layer such as to cover the wiring,
wherein a part of an end surface of the second insulating layer of each of the structures is exposed at the inner wall surface of the through hole,
wherein the end surface of the second insulating layer is flush with the end surface of the wiring and the end surface of the first insulating layer at the inner wall surface of the through hole, and
wherein the end surface of the second insulating layer of each of the structures exposed at the inner wall surface is also covered by the insulating film.
3. The coil substrate according to claim 1,
wherein a part of an end surface of the wiring of each of the structures is exposed at an outer wall surface of the stacked structure, and
wherein the end surface of the wiring of each of the structures exposed at the outer wall surface is covered by the insulating film.
4. The coil substrate according to claim 1, wherein the wiring of each of the structures is less than or equal to one turn of the spiral-shaped coil.
5. The coil substrate according to claim 1,
wherein in at least one of the structures, a connecting portion is provided at an end portion of the respective wiring that is integrally formed with the wiring, and
wherein a part of the connecting portion is exposed from the insulating film.
6. The coil substrate according to claim 1, further comprising a plurality of a combination of the stacked structure and the insulating film, the combinations being aligned while being connected with each other through a linking portion.
7. The coil substrate according to claim 1, wherein the first insulating layer is made of insulating resin.
8. The coil substrate according to claim 1, wherein the insulating film is made of insulating resin.
9. The coil substrate according to claim 2, wherein the second insulating layer is made of insulating resin.
10. An inductor comprising:
the coil substrate according to claim 5;
a resin including a magnetic material that covers the coil substrate while exposing the part of the connecting portion; and
an electrode formed on the resin and electrically connected to the part of the connecting portion.
11. The inductor according to claim 10, wherein the resin is filled in the through hole that penetrates the coil substrate.
12. The inductor according to claim 10, wherein the magnetic material is magnetic filler.
13. An inductor comprising:
the coil substrate according to claim 5 provided with the through hole that penetrates the coil substrate; and
a magnetic material filled in the through hole.
US15/180,421 2013-10-11 2016-06-13 Coil substrate, method of manufacturing coil substrate and inductor Active 2034-11-10 US10014100B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US15/180,421 US10014100B2 (en) 2013-10-11 2016-06-13 Coil substrate, method of manufacturing coil substrate and inductor

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2013214129A JP6425375B2 (en) 2013-10-11 2013-10-11 Coil substrate and method of manufacturing the same, inductor
JP2013-214129 2013-10-11
US14/488,400 US9396874B2 (en) 2013-10-11 2014-09-17 Method of manufacturing coil substrate and inductor
US15/180,421 US10014100B2 (en) 2013-10-11 2016-06-13 Coil substrate, method of manufacturing coil substrate and inductor

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US14/488,400 Division US9396874B2 (en) 2013-10-11 2014-09-17 Method of manufacturing coil substrate and inductor

Publications (2)

Publication Number Publication Date
US20160284458A1 US20160284458A1 (en) 2016-09-29
US10014100B2 true US10014100B2 (en) 2018-07-03

Family

ID=52809193

Family Applications (2)

Application Number Title Priority Date Filing Date
US14/488,400 Active US9396874B2 (en) 2013-10-11 2014-09-17 Method of manufacturing coil substrate and inductor
US15/180,421 Active 2034-11-10 US10014100B2 (en) 2013-10-11 2016-06-13 Coil substrate, method of manufacturing coil substrate and inductor

Family Applications Before (1)

Application Number Title Priority Date Filing Date
US14/488,400 Active US9396874B2 (en) 2013-10-11 2014-09-17 Method of manufacturing coil substrate and inductor

Country Status (4)

Country Link
US (2) US9396874B2 (en)
JP (1) JP6425375B2 (en)
KR (1) KR102142375B1 (en)
CN (1) CN104575987B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20180114619A1 (en) * 2016-10-25 2018-04-26 Samsung Electro-Mechanics Co., Ltd. Inductor

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10269489B2 (en) * 2013-03-15 2019-04-23 Taiwan Semiconductor Manufacturing Company, Ltd. Programmable inductor
WO2016006542A1 (en) * 2014-07-08 2016-01-14 株式会社村田製作所 Electronic component
US20180005756A1 (en) * 2015-01-22 2018-01-04 Otis Elevator Company Plate cut linear motor coil for elevator system
JP6507027B2 (en) 2015-05-19 2019-04-24 新光電気工業株式会社 Inductor and method of manufacturing the same
JP6825189B2 (en) * 2015-07-29 2021-02-03 サムソン エレクトロ−メカニックス カンパニーリミテッド. Coil parts and their manufacturing methods
JP6589446B2 (en) * 2015-08-05 2019-10-16 Tdk株式会社 Multilayer coil parts
JP6623028B2 (en) 2015-10-27 2019-12-18 新光電気工業株式会社 Inductor device and manufacturing method thereof
KR101883046B1 (en) * 2016-04-15 2018-08-24 삼성전기주식회사 Coil Electronic Component
CN107492436B (en) * 2016-06-11 2019-11-22 宁波微鹅电子科技有限公司 A kind of induction coil structure and radio energy transmission system
KR102559973B1 (en) * 2016-07-27 2023-07-26 삼성전기주식회사 Inductor
US10763031B2 (en) 2016-08-30 2020-09-01 Samsung Electro-Mechanics Co., Ltd. Method of manufacturing an inductor
JP6296407B1 (en) * 2017-02-02 2018-03-20 株式会社伸光製作所 Multi-row printed circuit board and manufacturing method thereof
JP6261104B1 (en) * 2017-03-30 2018-01-17 株式会社伸光製作所 Method for manufacturing printed circuit board
JP6915451B2 (en) * 2017-08-23 2021-08-04 スミダコーポレーション株式会社 Coil parts
KR102064044B1 (en) * 2017-12-26 2020-01-08 삼성전기주식회사 Coil component
JP7411590B2 (en) * 2018-02-02 2024-01-11 株式会社村田製作所 Inductor parts and their manufacturing method
JP6935343B2 (en) * 2018-02-02 2021-09-15 株式会社村田製作所 Inductor parts and their manufacturing methods
JP2021510457A (en) * 2018-10-17 2021-04-22 安徽安努奇科技有限公司Anhui Anuki Technologies Co., Ltd. Chip inductor and its manufacturing method
CN111145996A (en) 2018-11-02 2020-05-12 台达电子企业管理(上海)有限公司 Method for manufacturing magnetic element and magnetic element
KR102172639B1 (en) * 2019-07-24 2020-11-03 삼성전기주식회사 Coil electronic component

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0254205U (en) 1988-10-13 1990-04-19
JPH05347232A (en) 1992-06-12 1993-12-27 Murata Mfg Co Ltd Component with built-in coil
JPH06231996A (en) 1992-12-10 1994-08-19 Taiyo Yuden Co Ltd Method of manufacturings lamination ceramic electronic part
JPH0817653A (en) 1994-06-27 1996-01-19 Murata Mfg Co Ltd Laminated coil and manufacturing method thereof
US5922514A (en) 1997-09-17 1999-07-13 Dale Electronics, Inc. Thick film low value high frequency inductor, and method of making the same
US6000128A (en) 1994-06-21 1999-12-14 Sumitomo Special Metals Co., Ltd. Process of producing a multi-layered printed-coil substrate
JP2001313212A (en) 2000-04-28 2001-11-09 Murata Mfg Co Ltd Laminated coil and its manufacturing method
US6568054B1 (en) 1996-11-21 2003-05-27 Tkd Corporation Method of producing a multilayer electronic part
JP2003168610A (en) 2001-11-29 2003-06-13 Toko Inc Inductance element
JP2008053368A (en) 2006-08-23 2008-03-06 Tdk Corp Stacked inductor and inductance adjusting method of stacked inductor
US20090243781A1 (en) 2008-03-28 2009-10-01 Ibiden Co., Ltd Method of manufacturing a conductor circuit, and a coil sheet and laminated coil
CN103180919A (en) 2010-10-21 2013-06-26 Tdk株式会社 Coil component and method for producing same

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5750813U (en) * 1980-09-09 1982-03-24
IT1256248B (en) * 1992-12-24 1995-11-29 Bracco Spa WATER INJECTABLE FORMULATIONS FOR RADIODIAGNOSTICS INCLUDING MIXTURES OF IODURATED AROMATIC COMPOUNDS USEFUL AS X-RAY MATTING AGENTS
JP2001167930A (en) * 1999-12-08 2001-06-22 Fuji Electric Co Ltd Coil for inductor and its manufacturing method
JP2005224069A (en) * 2004-02-09 2005-08-18 Matsushita Electric Ind Co Ltd Switching power supply unit and electronic apparatus using the same
WO2011121828A1 (en) * 2010-03-31 2011-10-06 株式会社村田製作所 Electronic component and method for manufacturing same

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0254205U (en) 1988-10-13 1990-04-19
JPH05347232A (en) 1992-06-12 1993-12-27 Murata Mfg Co Ltd Component with built-in coil
JPH06231996A (en) 1992-12-10 1994-08-19 Taiyo Yuden Co Ltd Method of manufacturings lamination ceramic electronic part
US6000128A (en) 1994-06-21 1999-12-14 Sumitomo Special Metals Co., Ltd. Process of producing a multi-layered printed-coil substrate
JPH0817653A (en) 1994-06-27 1996-01-19 Murata Mfg Co Ltd Laminated coil and manufacturing method thereof
US6568054B1 (en) 1996-11-21 2003-05-27 Tkd Corporation Method of producing a multilayer electronic part
US5922514A (en) 1997-09-17 1999-07-13 Dale Electronics, Inc. Thick film low value high frequency inductor, and method of making the same
JP2001313212A (en) 2000-04-28 2001-11-09 Murata Mfg Co Ltd Laminated coil and its manufacturing method
JP2003168610A (en) 2001-11-29 2003-06-13 Toko Inc Inductance element
JP2008053368A (en) 2006-08-23 2008-03-06 Tdk Corp Stacked inductor and inductance adjusting method of stacked inductor
US20090243781A1 (en) 2008-03-28 2009-10-01 Ibiden Co., Ltd Method of manufacturing a conductor circuit, and a coil sheet and laminated coil
CN103180919A (en) 2010-10-21 2013-06-26 Tdk株式会社 Coil component and method for producing same
US20130222101A1 (en) 2010-10-21 2013-08-29 Tdk Corporation Coil component and method for producing same

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
Office Action dated Aug. 8, 2017 issued with respect to the basic Japanese Patent Application No. 2013-214129.
Office Action dated Jun. 5, 2017 issued with respect to the corresponding Chinese Patent Application No. 201410493906.1.
Office Action dated Mar. 6, 2018 issued with respect to the basic Japanese Patent Application No. 2013-214129.

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20180114619A1 (en) * 2016-10-25 2018-04-26 Samsung Electro-Mechanics Co., Ltd. Inductor
US10650948B2 (en) * 2016-10-25 2020-05-12 Samsung Electro-Mechanics Co., Ltd. Inductor
US10991496B2 (en) 2016-10-25 2021-04-27 Samsung Electro-Mechanics Co., Ltd. Inductor

Also Published As

Publication number Publication date
US20150102890A1 (en) 2015-04-16
JP6425375B2 (en) 2018-11-21
US20160284458A1 (en) 2016-09-29
US9396874B2 (en) 2016-07-19
KR102142375B1 (en) 2020-08-07
CN104575987A (en) 2015-04-29
JP2015076597A (en) 2015-04-20
KR20150042722A (en) 2015-04-21
CN104575987B (en) 2018-11-20

Similar Documents

Publication Publication Date Title
US10014100B2 (en) Coil substrate, method of manufacturing coil substrate and inductor
US11437174B2 (en) Inductor and method of manufacturing same
JP6312997B2 (en) Coil substrate, manufacturing method thereof, and inductor
JP6381432B2 (en) Inductor, coil substrate, and method of manufacturing coil substrate
JP6393457B2 (en) Coil substrate, manufacturing method thereof, and inductor
US9147518B1 (en) Inductor and coil substrate
US10854373B2 (en) Inductor device
US10395810B2 (en) Inductor
JP6564614B2 (en) Inductor and method of manufacturing inductor
CN112908611B (en) Coil component
JP7435528B2 (en) inductor parts
US20240114632A1 (en) Circuit board structure and method for forming the same

Legal Events

Date Code Title Description
AS Assignment

Owner name: SHINKO ELECTRIC INDUSTRIES CO., LTD., JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:NAKAMURA, ATSUSHI;NAKANISHI, TSUKASA;SASADA, YOICHI;REEL/FRAME:038896/0531

Effective date: 20140912

STCF Information on status: patent grant

Free format text: PATENTED CASE

MAFP Maintenance fee payment

Free format text: PAYMENT OF MAINTENANCE FEE, 4TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1551); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

Year of fee payment: 4