Інститут Кібернетики Імені В.М.Глушкова Академії Наук України
Институт кибернетики имени В.М.Глушкова Академии наук Украины
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Priority to UA4213207ApriorityCriticalpatent/UA14067A1/en
Publication of UA14067A1publicationCriticalpatent/UA14067A1/en
Synchronisation In Digital Transmission Systems
(AREA)
Compression, Expansion, Code Conversion, And Decoders
(AREA)
Abstract
A communication device comprises a clock generator on the receiving side, the output being connected to clock inputs of the comparator unit and the delta-modulation encoder. The information input of the delta-modulation encoder is united with the first information input of the comparator unit and is an information device input. The device has on the receiving side an impulse separator, which input is connected to a communication channel. The first, the second and the third impulse separator outputs are connected correspondingly to the clock, the first and the second control inputs of the forward-backward counter. With the purpose of device speeding on the receiving side there are a pulse shaper, a saw-tooth generator and a frequency divider. The delta-modulation encoder outputs are connected correspondingly to the information and control inputs of the pulse shaper.
Polyphase MOSFET circuit for pulse duration variations - uses ring counters with decoders connected to RS flip flop controlled by digital signal applied to AND gates