JPS56119545A - Data transmission device - Google Patents
Data transmission deviceInfo
- Publication number
- JPS56119545A JPS56119545A JP2246680A JP2246680A JPS56119545A JP S56119545 A JPS56119545 A JP S56119545A JP 2246680 A JP2246680 A JP 2246680A JP 2246680 A JP2246680 A JP 2246680A JP S56119545 A JPS56119545 A JP S56119545A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- analogue signal
- converted
- frequency
- converting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/02—Channels characterised by the type of signal
- H04L5/06—Channels characterised by the type of signal the signals being represented by different frequencies
- H04L5/08—Channels characterised by the type of signal the signals being represented by different frequencies each combination of signals in different channels being represented by a fixed frequency
Abstract
PURPOSE:To make the device small-sized and lightweight and reduce the cost, without necessary synchronization by converting the input data signal to an analogue signal and by converting this analogue signal to the FM modulation wave of a frequency corresponding to this analogue signal, in the multiplex data transmission device. CONSTITUTION:The 6-channel input data signal is converted to an analogue signal corresponding to the arrangement of respective parallel input data signals by D/A converting circuit 7 of transmission part 50 and the frequency is converted to the FM modulation wave of a sine wave or a square wave corresponding to the analogue signal level by voltage-frequency converting circuit 8 and is transmitted. After this FM modulation wave is converted to an analogue signal by frequency- voltage converting circuit 9 in receiving part 60, it is converted to a 6-channel parallel data signal in A/D converting circuit 10 by the clock signal from clock signal generating circuit 11. Consequently, synchronization between the transmission part and the receiving part is unnecessary.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2246680A JPS56119545A (en) | 1980-02-25 | 1980-02-25 | Data transmission device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2246680A JPS56119545A (en) | 1980-02-25 | 1980-02-25 | Data transmission device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56119545A true JPS56119545A (en) | 1981-09-19 |
Family
ID=12083475
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2246680A Pending JPS56119545A (en) | 1980-02-25 | 1980-02-25 | Data transmission device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56119545A (en) |
-
1980
- 1980-02-25 JP JP2246680A patent/JPS56119545A/en active Pending
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