JPS55124348A - Fsk demodulator circuit - Google Patents

Fsk demodulator circuit

Info

Publication number
JPS55124348A
JPS55124348A JP3153079A JP3153079A JPS55124348A JP S55124348 A JPS55124348 A JP S55124348A JP 3153079 A JP3153079 A JP 3153079A JP 3153079 A JP3153079 A JP 3153079A JP S55124348 A JPS55124348 A JP S55124348A
Authority
JP
Japan
Prior art keywords
signal
divider
output
circuit
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3153079A
Other languages
Japanese (ja)
Inventor
Sakae Horyu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP3153079A priority Critical patent/JPS55124348A/en
Publication of JPS55124348A publication Critical patent/JPS55124348A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/10Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14Demodulator circuits; Receiver circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To omit the frequency control by delivering the control signals according to intervals of the synchronous pulses synchronized with the modulation signals and then delivering the demodulation signals via the control signals. CONSTITUTION:With push of a certain key, transmission signal RS and signal SD received the pulse modulation based on the key input are transmitted through control circuit 1. Signal SD varies the division ratio of divider 3. The output of divider 3 is supplied to terminal CK of FF4 to deliver the rectangular waveform groups of different cycles according to signal SD. The output of FF4 is converted into the sine wave through waveform shaping circuit 5 via AND gate 13 to obtain FSK modulation signal FS which is then delivered through speaker SP. At the same time, this output signal FS is transmitted to be supplied to mike MIC. Waveform shaping circuit 9 generates pulse signal AP which is synchronized with signal FS. Reception signal generating circuit 11 influences divider 3 to give division to the frequency of circuit 2. On the other hand, output pulse SP of synchronous pulse generating circuit 10 resets divider 3 and FF4 to be then supplied to terminal CK of FF12. Then demodulation signal RD is obtained through FF12.
JP3153079A 1979-03-16 1979-03-16 Fsk demodulator circuit Pending JPS55124348A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3153079A JPS55124348A (en) 1979-03-16 1979-03-16 Fsk demodulator circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3153079A JPS55124348A (en) 1979-03-16 1979-03-16 Fsk demodulator circuit

Publications (1)

Publication Number Publication Date
JPS55124348A true JPS55124348A (en) 1980-09-25

Family

ID=12333745

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3153079A Pending JPS55124348A (en) 1979-03-16 1979-03-16 Fsk demodulator circuit

Country Status (1)

Country Link
JP (1) JPS55124348A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59133760A (en) * 1983-01-20 1984-08-01 Clarion Co Ltd Fsk demodulation circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5221758A (en) * 1975-08-11 1977-02-18 Sanyo Electric Co Ltd Fs signal demodulation circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5221758A (en) * 1975-08-11 1977-02-18 Sanyo Electric Co Ltd Fs signal demodulation circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59133760A (en) * 1983-01-20 1984-08-01 Clarion Co Ltd Fsk demodulation circuit

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