TWM606555U - 反射式顯示器的畫素結構 - Google Patents
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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Abstract
本申請涉及一種反射式顯示器的畫素結構,其包含基板、遮蔽層、低反射層以及反射層。遮蔽層設置於基板上。低反射層設置於遮蔽層上。反射層設置於低反射層上,反射層包含複數個反射區,複數個反射區間隔排列,複數個反射區之間暴露低反射層的一部份。本申請藉由低反射層避免光線在畫素之間的間隙中反射,以減少人眼對於液晶擾動的感知,實現具有良好顯示效果的低功耗之反射式顯示器。
Description
本申請關於一種顯示面板的技術領域,特別是一種反射式顯示器的畫素結構。
隨著科技的進步,電子產品被廣泛應用於生活之中,導致人們對於電子產品的依賴度上升。為了能夠隨時隨地使用電子產品,這些電子產品逐漸朝向輕、薄、短、小的趨勢發展,以便於使用者隨身攜帶。
對於輕薄的可攜式電子產品而言,提供訊息顯示功能的顯示器除了要能夠有良好的顯示功能以外,也需要盡可能地減少耗電量以延長使用時間。因此,顯示面板使用低於60Hz的30Hz或1Hz的刷新頻率來驅動畫素電晶體,以實現降低耗電量的目的。然而,這樣的驅動方式會讓顯示面板的一些特性缺陷被人眼所感知。舉例而言,當光線在畫素與畫素的間隙中反射,液晶會受兩旁電力線擾動而產生掃描紋或是刷紋。由於人眼的感受能力會受刷新頻率影響,在高刷新頻率的情況下,掃描紋或刷紋不容易被人眼察覺。但在低刷新頻率的情況下,掃描紋或刷紋會變得明顯而被人眼察覺。
目前來說,常見的解決方式是設置黑色矩陣,以避免光線在畫素與畫素的間隙反射使液晶擾動。然而,對於反射式顯示面板而言,黑色矩陣也會使得整個面板的反射率大幅降低,導致顯示的亮度下降。
本申請實施例提供一種反射式顯示器的畫素結構,解決目前反射式顯示器的畫素結構中使用黑色矩陣導致顯示的亮度下降的問題。
為了解決上述技術問題,本申請是這樣實現的:
提供一種反射式顯示器的畫素結構,其包含基板、遮蔽層、低反射層以及反射層。遮蔽層設置於基板上。低反射層設置於遮蔽層上。反射層設置於低反射層上,反射層包含複數個反射區,複數個反射區間隔排列,複數個反射區之間暴露低反射層的一部份。
在本申請實施例中,反射式顯示器的畫素結構藉由遮蔽層阻擋來自資料線或是閘極線對電性的干擾,並藉由設置於遮蔽層上的低反射層降低畫素之間的反射光線的亮度,以減少人眼對於液晶擾動的感知,實現具有良好顯示效果的低功耗之反射式顯示器。
為利瞭解本申請之技術特徵、內容與優點及其所能達成之功效,茲將本申請配合附圖,並以實施例之表達形式詳細說明如下,而其中所使用之圖式,其主旨僅為示意及輔助說明書之用,未必為本申請實施後之真實比例與精確配置,故不應就所附之圖式的比例與配置關係解讀、侷限本申請於實際實施上的權利範圍,合先敘明。
在附圖中,為了淸楚起見,放大元件的厚度或寬度。在整個說明書中,相同的附圖標記表示相同的元件。應當理解,當元件被稱為在另一元件「上」或「連接到」或「設置於」另一元件時,其可以直接在另一元件上或與另一元件連接,或者中間元件可以也存在。相反地,當元件被稱為「直接在另一元件上」或「直接連接到」另一元件時,不存在中間元件。如本文所使用的「連接」或「設置」,其可以指物理及/或電性的連接或設置。此外,若使用術語「第一」、「第二」、「第三」僅用於描述目的,而不能理解為指示或暗示相對重要性或者其順序關係。
除非另有定義,本文所使用的所有術語(包括技術和科學術語)具有與本申請所屬技術領域的通常知識者通常理解的含義。將進一步理解的是,諸如在通常使用的字典中定義的那些術語應當被解釋為具有與它們在相關技術和本申請的上下文中的含義一致的含義,並且將不被解釋為理想化的或過度正式的意義,除非本文中明確地如此定義。
請參閱圖1,其是本申請一實施例的反射式顯示器的畫素結構的示意圖。如圖所示,畫素結構1包含基板10、遮蔽層11、低反射層12以及反射層13。遮蔽層11設置於基板10上。低反射層12設置於遮蔽層11上。反射層13設置於低反射層12上。更具體地,反射層13包含複數個反射區130,複數個反射區130彼此間隔排列。也就是說,複數個反射區130之間具有空隙,且複數個反射區130之間的空隙會暴露低反射層12的一部份。如此一來,複數個反射區130之間的空隙會被低反射層12所遮蔽,當光線由間隙進入到畫素結構1時,暴露出來的低反射層12可以降低光線的反射,以減少人眼對間隙區液晶擾動的感知,改善目視掃描紋程度。下文中將更詳細解釋上述提到的各個元件。
基板10可以包含具有可撓性的透光材料,舉例而言,基板10可以包含聚合物,像是丙烯酸類樹脂(acryl-based resin)、甲基丙烯酸類樹脂(methacryl-based resin)、聚異戊二烯(polyisoprene)、乙烯基類樹脂(polyisoprene)、環氧類樹脂(epoxy-based resin)、胺甲酸酯類樹脂(urethane-based resin)、矽氧烷類樹脂樹脂(siloxane-based resin)、聚醯亞胺類樹脂(polyimide-based resin)、聚醯胺類樹脂(polyamide-based)以及/或其任意組合,但不限於此。在其他實施例中,基板10也可以包含具有剛性的透光材料,舉例而言,基板10可以是玻璃基板或是石英基板。
遮蔽層11設置於基板10上,並用於減少來自資料線或是閘極線對電性的干擾。在一些實施例中,遮蔽層11可以包含純金屬、金屬合金、金屬氮化物、金屬氧化物、金屬氮氧化物以及/或其組合,但不限於此。舉例而言,遮蔽層11可以包含鉬、鉈、鈮的金屬或是合金。除此之外,在一些實施例中,遮蔽層11的厚度可以在2000 Å至4000 Å之間,其厚度取決於資料線或是閘極線中的訊號強度或是頻率。具體而言,畫素結構1中的反射層13會受到資料線或是閘極線中的訊號影響,影響的程度與訊號的強度、變化頻率有關。因此,當訊號的強度、變化頻率較高時,遮蔽層11可以具有較厚的厚度,例如4000 Å,以避免反射層13的電性不良。反之,當訊號的強度、變化頻率較較低時,遮蔽層11可以具有較薄的厚度,例如2000 Å,以減少畫素結構1的整體厚度。
低反射層12設置於遮蔽層11上,並用於減少反射光線的亮度。低反射層12可以不透光,或者部分透光。在一些實施例中,低反射層12可以包含氧化鉬,且氧化鉬是藉由物理氣象沉積法(Physical Vapor Deposition, PVD)形成於遮蔽層11上。更進一步地,在製造過程中,低反射層12可以與遮蔽層11共用相同的遮罩(Mask),因此,由相同遮罩製作出來的遮蔽層11與低反射層12可以完全重疊,以減少製程的複雜度,詳細的製程將在下文中進一步討論。
請參閱圖2,其是本申請一實施例的低反射層的反射率與厚度的曲線圖。如圖所示,低反射層12在可見光下的反射率與厚度有關,且在特定的厚度下反射率達到最低值,反射率的最低值為2 %。在一些實施例中,低反射層的反射率與厚度的對照可以由表1表示。當低反射層12的厚度在150 Å至1000 Å之間時,其具有大約4 %至60 %的反射率。較佳地,當低反射層12的厚度在500 Å至800 Å之間時,其具有大約4 %至15 %的反射率。更佳地,當低反射層12的厚度為550 Å時,其具有最低的反射率4 %。
表1
厚度(Å) | 反射率(%) |
150 | 59.7 |
350 | 16.9 |
550 | 4.2 |
750 | 12.9 |
1000 | 50.08 |
反射層13設置於低反射層12上,反射層13用於反射來自外部環境的光線。舉例而言,反射層13可以包含一層或多層高反射率的薄膜,薄膜可以由金屬或是金屬的氮化物組成。或者,薄膜可以由環氧樹脂組成,並藉由塗覆方式形成在反射層13上。更具體地,反射層13的厚度可以在1000 Å至3000 Å之間。
請複參閱圖1。如圖所示,在一些實施例中,畫素結構1還可以包含資料線14。資料線14設置在基板10上,且位於基板10以及遮蔽層11之間。資料線14可以包含純金屬、金屬合金、金屬氮化物、金屬氧化物、金屬氮氧化物以及/或其組合,但不限於此。更具體地,資料線14的厚度可以在2000 Å至4000 Å之間。
在一些實施例中,畫素結構1還可以包含閘極線。閘極線設置在基板10上,且位於基板10以及遮蔽層11之間。閘極線可以與資料線14藉由同一層圖案化導電層所形成。然而,本申請不限於此,在其他實施例中,閘極線也可以設置在與資料線14不同的層上。閘極線可以包含純金屬、金屬合金、金屬氮化物、金屬氧化物、金屬氮氧化物以及/或其組合,但不限於此。更具體地,閘極線的厚度可以在2000 Å至4000 Å之間。
在一些實施例中,畫素結構1還可以包含薄膜電晶體。薄膜電晶體設置於基板10上,並用於控制畫素。具體而言,薄膜電晶體可以包含閘極、汲極、源極、通道層以及絕緣層。閘極可以與閘極線電性連接。閘極可以由同一層圖案化導電層所形成,例如:金屬層或合金層。具體地,閘極可以包含鋁、鉑、銀、鈦、鉬、鋅、錫及/或其組合,但不限於此。汲極與源極可以由同一層圖案化導電層所形成,且其可以包含與上述閘極相同或不同的材料。通道層可以由同一層圖案化半導體所形成,且其可為單層或多層結構。通道層可以包含矽(例如:非晶矽、多晶矽、單晶矽)、氧化物半導體 (例如:氧化銦、氧化鎵、氧化鋅、氧化銦鎵、氧化銦鋅、氧化銦錫或氧化銦鎵鋅)、有機半導體、或是其它半導體材料。絕緣層可以是單層或多層結構,且絕緣層可以包含無機材料(例如:氮化矽、氧化矽、氮氧化矽)、有機材料(例如:聚醯亞胺、聚酯、聚甲基丙烯酸甲酯(polymethylmethacrylate,PMMA)、聚乙烯苯酚(poly(4-vinylphenol),PVP)、聚乙烯醇(polyvinyl alcohol,PVA)、聚四氟乙烯(polytetrafluoroethene,PTFE)),但不限於此。
在一些實施例中,畫素結構1還可以包含第一保護層15。第一保護層15設置於基板10上,且第一保護層15可以包含氮化矽、氧化鋁、氧化鈦、氧化矽、氮化矽、氮氧化矽、氧化鋯、氧化鉿、或其任意組合、或其他所屬技術領域的具有通常知識者所認知的材料。更具體地,第一保護層15的厚度可以在2000 Å至6000 Å之間。
在一些實施例中,畫素結構1還可以包含第二保護層16。第二保護層16設置於低反射層12上。第二保護層16可以包含相同或相似於第一保護層15的材料,因此不再贅述。除此之外,第二保護層16的厚度可以在2000 Å至6000 Å之間。
在一些實施例中,畫素結構1還可以包含有機層17。有機層17設置於第二保護層16上。有機層17可以包含聚醯亞胺類樹脂、環氧類樹脂、壓克力類樹脂或其他所屬技術領域的具有通常知識者所認知的材料。更具體地,有機層17的厚度可以在10000 Å至40000 Å之間。
在一些實施例中,畫素結構1還可以包含透明導電層18。透明導電層18設置於有機層17上。透明導電層18包含複數個導電區180,複數個導電區180彼此間隔排列。也就是說,複數個導電區180之間具有空隙,且複數個導電區180之間的空隙會暴露低反射層12的一部份。當光線由複數個導電區180之間的空隙進入到畫素結構1中時,光線會被低反射層12給吸收,以減少反射的光線在畫素結構1中移動造成液晶擾動,進一步被人眼所感知。在一些實施例中,透明導電層18可以包含氧化銦錫。或者,透明導電層18可以包含氧化銦鋅。更具體地,透明導電層18的厚度可以在500 Å至2000 Å之間。
請參閱圖3至圖7,其是本申請一實施例的畫素結構的形成方法的製程示意圖。應當注意的是,下文僅將製程中有使用遮罩的相關步驟作例示性描述,以助於瞭解本申請。因此,在實際製程中還會包含其他步驟,不應以此為限。
如圖3所示,在設置基板10之後,藉由第一遮罩在基板10上形成第一圖案化導電層,第一圖案化導電層中可以包含閘極線19。接著,藉由第二遮罩在基板10上形成第二圖案化導電層,第二圖案化導電層中可以包含資料線14。
如圖4所示,藉由第三遮罩形成遮蔽層11於基板10上。遮蔽層11覆蓋住資料線14以及閘極線19的至少一部分,以減少資料線14以及閘極線19對於之後形成的反射層13的干擾。在一些實施例中,遮蔽層11可以不覆蓋薄膜電晶體,而僅覆蓋住資料線14以及閘極線19的至少一部分,以避免遮蔽層11與薄膜電晶體產生過大的電容。
如圖5所示,藉由第三遮罩形成低反射層12於遮蔽層11上,由於低反射層12與遮蔽層11均使用第三遮罩,在不需要額外製作對應於低反射層12的遮罩的情況下,可以減低畫素結構1的製造成本。除此之外,藉由第三遮罩形成的反射層12與遮蔽層11會完全重疊。在本實施例中,低反射層12是藉由物理氣相沉積法將氧化鉬靶材上的氧化鉬沉積至遮蔽層11上,並藉由控制氧化鉬的厚度控制低反射層12的反射率。
如圖6所示,在依序形成第二保護層16以及有基層17於低反射層12上之後,藉由第四遮罩形成透明導電層18於有機層17上。透明導電層18包含複數個導電區180,複數個導電區180間隔排列,複數個導電區180之間暴露低反射層12的一部份。
如圖7所示,藉由第五遮罩形成反射層13於透明導電層18上。反射層13包含複數個反射區130,複數個反射區130間隔排列,複數個反射區130之間暴露低反射層12的一部份。如此一來,當光線從非反射區130的位置進入到畫素結構1中時,低反射層12能夠避免光線的反射,進而減少液晶擾動。
綜上所述,在本申請實施例中,反射式顯示器的畫素結構藉由遮蔽層阻擋來自資料線或是閘極線對電性的干擾,並藉由設置於遮蔽層上的低反射層降低畫素之間的反射光線的亮度,以減少人眼對於液晶擾動的感知,實現具有良好顯示效果的低功耗顯示器。
惟以上所述者,僅為本申請之實施例而已,並非用來限定本申請實施之範圍,舉凡依本申請之申請專利範圍所述之形狀、構造、特徵及精神所為之均等變化與修飾,均應包括於本申請之申請專利範圍內。
1:畫素結構
10:基板
11:遮蔽層
12:低反射層
13:反射層
130:反射區
14:資料線
15:第一保護層
16:第二保護層
17:有機層
18:透明導電層
180:導電區
19:閘極線
圖1是本申請一實施例的反射式顯示器的畫素結構的示意圖;
圖2是本申請一實施例的低反射層的反射率與厚度的曲線圖;以及
圖3至圖7是本申請一實施例的反射式顯示器的畫素結構的製程示意圖。
1:畫素結構
10:基板
11:遮蔽層
12:低反射層
13:反射層
130:反射區
14:資料線
15:第一保護層
16:第二保護層
17:有機層
18:透明導電層
180:導電區
Claims (10)
- 一種反射式顯示器的畫素結構,其包含: 一基板; 一遮蔽層,設置於該基板上; 一低反射層,設置於該遮蔽層上;以及 一反射層,設置於低反射層上,該反射層包含複數個反射區,該複數個反射區間隔排列,該複數個反射區之間暴露該低反射層的一部份。
- 如請求項1所述之反射式顯示器的畫素結構,其中該遮蔽層與該低反射層完全重疊。
- 如請求項1所述之反射式顯示器的畫素結構,其中該低反射層的厚度在150 Å至1000 Å之間。
- 如請求項3所述之反射式顯示器的畫素結構,其中該低反射層的厚度在500 Å至800 Å之間。
- 如請求項3所述之反射式顯示器的畫素結構,其中該低反射層在可見光下的反射率在4 %至60 %之間。
- 如請求項1所述之反射式顯示器的畫素結構,其中該低反射層為氧化鉬。
- 如請求項1所述之反射式顯示器的畫素結構,其中該低反射層不透光。
- 如請求項1所述之反射式顯示器的畫素結構,其中該遮蔽層的厚度在2000 Å至4000 Å之間。
- 如請求項1所述之反射式顯示器的畫素結構,其中該遮蔽層為金屬。
- 如請求項1所述之反射式顯示器的畫素結構,進一步包含設置在該基板與該遮蔽層之間的閘極線、資料線、汲極、源極以及閘極。
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