WO2022160476A1 - 阵列基板及显示装置 - Google Patents

阵列基板及显示装置 Download PDF

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Publication number
WO2022160476A1
WO2022160476A1 PCT/CN2021/088089 CN2021088089W WO2022160476A1 WO 2022160476 A1 WO2022160476 A1 WO 2022160476A1 CN 2021088089 W CN2021088089 W CN 2021088089W WO 2022160476 A1 WO2022160476 A1 WO 2022160476A1
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substrate
metal layer
layer
conductive layer
functional conductive
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PCT/CN2021/088089
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English (en)
French (fr)
Inventor
于晓平
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Tcl华星光电技术有限公司
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Publication of WO2022160476A1 publication Critical patent/WO2022160476A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device

Definitions

  • the present application relates to the field of display technology, and in particular, to an array substrate and a display device.
  • FIG. 1a is a schematic diagram of the phenomenon of rainbow moiré on the side of a conventional color filter substrate
  • FIG. 1b is a schematic diagram of the phenomenon of rainbow moiré on the side of a conventional array substrate.
  • the external light source includes natural light such as sunlight, fluorescent lamp, desk lamp, flashlight, mobile phone light and the like. When the external light source includes light of multiple wavelengths, iridescent moiré will be caused. If the external light source is light of a single wavelength, a single color moire will be generated on the side of the array substrate.
  • the generation of rainbow moiré is related to the interference effect of light, and the thickness of the film required for the interference effect of light of different wavelengths is different.
  • n the refractive index
  • k the light absorption coefficient.
  • Light emitted by a point light source through the translucent film at different angles of incidence provides suitable film thicknesses for light of different wavelengths, thus appearing as iridescent moiré.
  • the iridescent moiré of the array substrate toward the outside is relatively more dispersed. After analysis, this is related to a metal layer of the array substrate, such as the source and drain electrodes.
  • FIG. 2 is the IdVd curve when the conventional metal darkening layer is used for the metal layer with too large thickness, wherein 100 represents the IdVd curve when the metal layer has a metal darkening layer, and 200 represents the metal layer is not IdVd curve with metallic darkening layer. If a common metal darkening layer is used to de-reflect the metal layer, it will affect the electrical properties of the TFT.
  • Embodiments of the present application provide an array substrate and a display device.
  • a functional conductive layer By disposing a functional conductive layer on at least one of a first metal layer and a second metal layer, the orthographic projection of the functional conductive layer on the substrate is covered.
  • the orthographic projection of the second metal layer on the substrate, and the orthographic projection of the functional conductive layer on the substrate covers the orthographic projection of the first metal layer on the substrate.
  • the present application provides an array substrate, wherein the array substrate includes: a first metal layer and a second metal layer which are disposed on a substrate and insulated from each other, and the second metal layer arranged on the side of the first metal layer away from the substrate; at least one functional conductive layer, the functional conductive layer is arranged on at least one of the first metal layer and the second metal layer close to the on one side of the substrate; wherein, the orthographic projection of the functional conductive layer on the substrate covers the orthographic projection of the second metal layer on the substrate; and the functional conductive layer is on the substrate The orthographic projection on the substrate covers the orthographic projection of the first metal layer on the substrate.
  • the present application provides an array substrate, wherein the array substrate includes: a first metal layer and a second metal layer which are disposed on a substrate and insulated from each other, and the second metal layer arranged on the side of the first metal layer away from the substrate; a first functional conductive layer and a second functional conductive layer, the first functional conductive layer is arranged on the first metal layer close to the substrate On one side of the bottom, the second functional conductive layer is disposed on the side of the second metal layer close to the substrate; wherein, the orthographic projection of the second functional conductive layer on the substrate covers the orthographic projection of the second metal layer on the substrate; and the orthographic projection of the first functional conductive layer on the substrate covers the orthographic projection of the first metal layer on the substrate .
  • the orthographic projection of the first functional conductive layer on the substrate covers the orthographic projection of the first metal layer on the substrate.
  • the present application provides an array substrate, wherein the array substrate includes: a first metal layer and a second metal layer which are disposed on a substrate and are insulated from each other, and the second metal layer is disposed on the side of the first metal layer away from the substrate; at least one functional conductive layer is disposed on the side of the first metal layer close to the substrate; wherein the The orthographic projection of the functional conductive layer on the substrate covers the orthographic projection of the second metal layer on the substrate; and the orthographic projection of the functional conductive layer on the substrate covers the first Orthographic projection of the metal layer on the substrate.
  • the orthographic projection of the first metal layer on the substrate overlaps the orthographic projection of the second metal layer on the substrate.
  • the present application provides an array substrate, wherein the array substrate includes: a first metal layer and a second metal layer that are disposed on a substrate and insulated from each other, and the second metal layer disposed on the side of the first metal layer away from the substrate; at least one functional conductive layer, the functional conductive layer is disposed on the side of the first metal layer close to the substrate; and at least one a metal conductive layer, the metal conductive layer is disposed on the side of the functional conductive layer close to the first metal layer; wherein, the orthographic projection of the functional conductive layer on the substrate covers the second metal The orthographic projection of the layer on the substrate; and the orthographic projection of the functional conductive layer on the substrate covers the orthographic projection of the first metal layer on the substrate.
  • the metal conductive layer is insulated from the first metal layer.
  • the orthographic projection of the functional conductive layer on the substrate covers the orthographic projection of the first metal layer on the substrate and the orthographic projection of the second metal layer on the substrate The sum of the orthographic projections on .
  • the present applicant provides an array substrate, wherein the array substrate comprises: a first metal layer and a second metal layer which are disposed on a substrate and insulated from each other, and the second metal layer The layer is arranged on the side of the first metal layer away from the substrate; a functional conductive layer is arranged on the side of the second metal layer close to the substrate; wherein, the The orthographic projection of the functional conductive layer on the substrate covers the orthographic projection of the second metal layer on the substrate. 10.
  • the array substrate of claim 9 wherein the array substrate further comprises a gate insulating layer, the gate insulating layer is disposed on the first metal layer, and the gate insulating layer covers The first metal layer and the substrate, the second metal layer is disposed on the side of the gate insulating layer away from the first metal layer.
  • the present application provides an array substrate, the array substrate includes: a first metal layer and a second metal layer disposed on a substrate and insulated from each other, and the second metal layer is disposed on a side of the first metal layer away from the substrate; at least one functional conductive layer, the functional conductive layer is disposed on at least one of the first metal layer and the second metal layer close to the substrate On one side of the bottom; wherein, the orthographic projection of the functional conductive layer on the substrate covers the orthographic projection of the second metal layer on the substrate.
  • the orthographic projection of the functional conductive layer on the substrate overlaps the orthographic projection of the first metal layer on the substrate.
  • the functional conductive layer includes a first functional conductive layer and a second functional conductive layer, the first functional conductive layer is disposed on a side of the first metal layer close to the substrate , and the first functional conductive layer covers the first metal layer, the second functional conductive layer is disposed on the side of the second metal layer close to the substrate, and the second functional conductive layer covering the second metal layer.
  • the functional conductive layer is disposed on a side of the first metal layer close to the substrate, and the functional conductive layer covers the first metal layer.
  • the orthographic projection of the first metal layer on the substrate overlaps the orthographic projection of the second metal layer on the substrate.
  • the thin film transistor further includes at least one metal conductive layer, the functional conductive layer is disposed on a side of the first metal layer close to the substrate, and the metal conductive layer is disposed on the The functional conductive layer is on a side close to the first metal layer, and the metal conductive layer is insulated from the first metal layer.
  • the orthographic projection of the functional conductive layer on the substrate covers the orthographic projection of the first metal layer on the substrate and the orthographic projection of the second metal layer on the substrate The sum of orthographic projections.
  • the functional conductive layer is disposed on a side of the second metal layer close to the substrate, and the functional conductive layer covers the second metal layer.
  • the thin film transistor further includes a gate insulating layer, the gate insulating layer is disposed on the first metal layer, and the gate insulating layer covers the first metal layer and the the substrate, the second metal layer is disposed on a side of the gate insulating layer away from the first metal layer.
  • the present application also provides a display device, the display device includes an array substrate, a color filter substrate disposed opposite to the array substrate, and a liquid crystal layer disposed between the array substrate and the color filter substrate, the
  • the array substrate includes: a first metal layer and a second metal layer disposed on a substrate and insulated from each other, wherein the second metal layer is disposed on a side of the first metal layer away from the substrate ; At least one functional conductive layer, the functional conductive layer is disposed on the side of at least one of the first metal layer and the second metal layer close to the substrate; wherein, the functional conductive layer is in The orthographic projection on the substrate covers the orthographic projection of the second metal layer on the substrate.
  • the array substrate includes a first metal layer and a second metal layer which are insulated from each other.
  • a functional conductive layer is disposed on at least one of the second metal layers, and the orthographic projection of the functional conductive layer on the substrate covers the orthographic projection of the first metal layer on the substrate,
  • To make the orthographic projection of the functional conductive layer on a substrate cover the orthographic projection of the second metal layer on the substrate by adjusting the film thicknesses of the functional conductive layer and the first metal layer, using The interference effect of light reduces the reflectivity of the second metal layer to the external light source, so as to improve the problem of iridescent moiré on the side of the array substrate facing outward, and improve the quality of the display panel.
  • the work functions of the functional conductive layer and the semiconductor layer are close, so that the contact resistance between the functional conductive layer and the semiconductor layer can be kept within a normal range, so as not to affect the electrical properties of the array substrate
  • FIG. 1a is a schematic diagram of the phenomenon of conventional rainbow moiré on the side of the color filter substrate.
  • FIG. 1b is a schematic diagram of the phenomenon of conventional rainbow moiré on the side of the array substrate.
  • FIG. 2 is the IdVd curve when the thickness of the conventional metal darkening layer is too large when the second metal layer is used.
  • FIG. 3 is a schematic diagram illustrating the phenomenon of rainbow moiré on the side of the array substrate after improvement.
  • Figure 4 shows the reflectance spectra before and after improvement.
  • FIG. 5 is a schematic structural diagram of an array substrate in a preferred embodiment of the present application.
  • FIG. 6 is a schematic structural diagram of an array substrate in another preferred embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of an array substrate in another preferred embodiment of the present application.
  • FIG. 8 is a schematic structural diagram of an array substrate in another embodiment of the present application.
  • the present application provides an array substrate and a display device.
  • the present application will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present application, but not to limit the present application.
  • an array substrate includes a substrate 1 , a first metal layer 3 disposed on the substrate 1 , and a second metal layer 5 disposed on the side of the first metal layer 3 away from the substrate 1 . , and a semiconductor layer (not shown in the figure).
  • the array substrate further includes at least one functional conductive layer 2 .
  • the functional conductive layer 2 is disposed on the side of at least one of the first metal layer 3 and the second metal layer 5 close to the substrate 1;
  • the orthographic projection of the functional conductive layer 2 on the substrate 1 covers the orthographic projection of the second metal layer 5 on the substrate 1 .
  • the semiconductor layer is disposed between the first metal layer 3 and the second metal layer 5 . More preferably, the power functions of the functional conductive layer 2 and the semiconductor layer are the same, so as to reduce the contact resistance between the functional conductive layer 2 and the semiconductor layer.
  • the orthographic projection of the first metal layer 3 on the substrate 1 falls within the orthographic projection of the functional conductive layer 2 on the substrate 1 .
  • the functional conductive layer 2 includes a first functional conductive layer 21 and a second functional conductive layer 22 , and the first functional conductive layer 21 is disposed adjacent to the first metal layer 3 .
  • the first functional conductive layer 21 covers the first metal layer 3
  • the second functional conductive layer 22 is disposed on the second metal layer 5 close to the substrate 1 side
  • the second functional conductive layer 22 covers the second metal layer 5 .
  • the orthographic projection of the first functional conductive layer 21 on the substrate 1 completely coincides with the orthographic projection of the first metal layer 3 on the substrate 1
  • the second functional conductive layer 21 is completely coincident with the orthographic projection of the first metal layer 3 on the substrate 1
  • the orthographic projection of the conductive layer 22 on the substrate 1 completely coincides with the orthographic projection of the second metal layer 5 on the substrate 1 .
  • the functional conductive layer 2 is a transparent conductive layer, and the material of the functional conductive layer 2 is indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO) and Indium Gallium Zinc Titanium Oxide (IGZTO).
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • IGZO indium gallium zinc oxide
  • IGZTO Indium Gallium Zinc Titanium Oxide
  • the material of the first metal layer 3 is copper (Cu), molybdenum (Mo), titanium (Ti), aluminum (Al), nickel (Ni), niobium (Nb), tantalum ( At least one of Ta) and chromium (Cr).
  • the material of the second metal layer 5 is copper (Cu), molybdenum (Mo), titanium (Ti), aluminum (Al), nickel (Ni), niobium (Nb), tantalum ( At least one of Ta) and chromium (Cr).
  • the functional conductive layer 2 is selected as a material consistent with the work function of the semiconductor layer, so as to reduce the contact resistance between the functional conductive layer 2 and the semiconductor layer. Since the functional conductive layer 2 (ie the first functional conductive layer 21 and the second functional conductive layer 22 ) and the semiconductor layer do not have the problem of excessively high contact resistance, it will not affect the performance of the array substrate. The electrical property will not affect the display effect.
  • the first metal layer 3 is selected to be a material with good adhesion with the functional conductive layer 2 and the second metal layer 5
  • the second metal layer 5 is selected to have a low resistivity , materials with good electrical conductivity and low cost.
  • the array substrate further includes a gate insulating layer 4, the gate insulating layer 4 is disposed on the first metal layer 3, and the gate insulating layer 4 covers the first metal Layer 3 and the substrate 1 , the second metal layer 5 is disposed on the side of the gate insulating layer 4 away from the first metal layer 3 .
  • the material of the gate insulating layer 4 is silicon nitride (SiNx) or silicon oxide (SiOx), and silicon oxynitride (SiNxOy) can also be selected to achieve the purpose of reducing reflection in the display area.
  • the thickness of the first metal layer 3 is less than the skin depth of the first metal layer 3 to ensure that light can penetrate the first metal layer 3, and the second metal layer 5 is reflected from the surface.
  • the skin depth d ⁇ /(4 ⁇ nk) of the first metal layer 3
  • ⁇ represents the wavelength
  • n and k represent the n value and k value of the first metal layer 3 respectively
  • n represents the refractive index
  • k represents the light absorption coefficient.
  • the materials of the first metal layer 3 and the second metal layer 5 are different.
  • the first metal layer 3 is the gate
  • the second metal layer 5 is the source and drain.
  • the material of the functional conductive layer 2 is preferably indium tin oxide (ITO), the material of the first metal layer 3 is preferably molybdenum (Mo), and the material of the second metal layer 5 is preferably Copper (Cu).
  • the thickness of the functional conductive layer 2 ranges from 40 nm to 65 nm, and the thickness of the first metal layer 3 ranges from 5 nm to 20 nm.
  • the thickness of the functional conductive layer 2 can be any value from 40 nm to 65 nm, such as but not limited to 44 nm, 45 nm, 50 nm, 52 nm, and 55 nm.
  • the thickness of the first metal layer 3 can be any value from 5nm to 20nm, such as but not limited to 5nm, 6nm, 10nm, 11nm, 15nm. Preferably, the thickness of the first metal layer 3 is 11 nm to ensure the stability of the process.
  • Fig. 4 shows the reflection spectrum of the array substrate before and after improvement, wherein 100' represents the reflection spectrum before improvement, and 200' represents the reflection spectrum after improvement.
  • the reflectivity of the composite electrode structure of the array substrate that is, the ITO/Mo/Cu structure
  • the reflectivity is about 45%, and the reflectivity is reduced. To a greater extent.
  • the array substrate further includes: a protective layer 6, the protective layer 6 is disposed on the second metal layer 5, and the protective layer 6 covers the second metal layer 5 and the gate insulating layer 4; a plurality of color resist blocks 7.
  • a plurality of color resist blocks 7 are arranged on the protective layer 6 at intervals, and the color resist blocks 7 are arranged alternately with the thin film transistors of the array substrate; the conductive layer 8, the conductive layer 8 is a disconnected structure, and the conductive layer 8 is correspondingly arranged on the color block 7.
  • the material of the protective layer 6 is SiNx, and the protective layer 6 is to protect the second metal layer 5 from being corroded by the photoresist in the process.
  • the present application also provides a display device.
  • the display device includes the array substrate, a color filter substrate 10 disposed on one side of the array substrate, and a color filter substrate 10 disposed on the array substrate and the color filter.
  • the liquid crystal layer 9 between the film substrates 10 includes a plurality of liquid crystals.
  • the display device may be, but not limited to, a liquid crystal display device and an organic light-emitting display device, and the display device may be a transparent display.
  • the display device is a liquid crystal display device.
  • the side of the array substrate faces outward, that is, the backlight side of the display device is located on the side of the color filter substrate 10 away from the array substrate, and the light-emitting side is located on the side of the array substrate away from the color filter substrate 10
  • the light emitting direction points from the backlight side to the light emitting side, that is, the light emitting side of the display panel is the side of the array substrate.
  • the functional conductive layer 2 is used to shield the first metal layer 3 and the second metal layer 5 at the same time.
  • the thickness of a metal layer 3 uses the interference effect of light to reduce the reflectivity of the second metal layer 5 to ambient light to improve the problem of iridescent moiré when the array substrate faces outwards, thereby improving the quality of the display panel.
  • FIG. 3 is a schematic diagram of an improved phenomenon of rainbow moiré on the side of the array substrate. It can be seen that, after the improvement, the performance of the iridescent moiré on the side of the array substrate facing outward is equivalent to the performance on the side of the conventional color filter substrate.
  • a more preferred embodiment is also provided, which is different from the embodiment shown in FIG. 7 in that the functional conductive layer 2 is disposed on the first metal layer 3 close to the substrate 1 .
  • the orthographic projection of the first metal layer 3 on the substrate 1 covers the orthographic projection of the second metal layer 5 on the substrate 1 .
  • the orthographic projection of the functional conductive layer 2 on the substrate 1 completely coincides with the orthographic projection of the first metal layer 3 on the substrate 1 .
  • the functional conductive layer 2 is used for antireflection at the bottom of the first metal layer 3 , and the bottom of the second metal layer 5 is formed by the stacking structure of the first metal layer 3 and the functional conductive layer 2 . achieve the purpose of deduction.
  • the functional conductive layer 2 is disposed on the side of the first metal layer 3 close to the substrate 1, and the array substrate further includes at least one metal conductive layer 20.
  • the metal conductive layer 20 is disposed on the side of the functional conductive layer 2 close to the first metal layer 3 and is insulated from the first metal layer 3, and the metal conductive layer 20 covers the functional conductive layer 3.
  • Layer 2 that is, the orthographic projection of the metal conductive layer 20 on the substrate 1 completely coincides with the orthographic projection of the functional conductive layer 2 on the substrate 1 . As shown in FIG.
  • an interlayer insulating layer 201 is provided on the side of the metal conductive layer 20 away from the functional conductive layer 2 , and the interlayer insulating layer 201 covers the metal conductive layer 20 and the lining Bottom 1.
  • the material of the metal conductive layer 20 is the same as the material of the first metal layer 3 or the second metal layer 5 .
  • the sum of the orthographic projection of the first metal layer 3 on the substrate 1 and the orthographic projection of the second metal layer 5 on the substrate 1 falls into the functional conductive layer 2 in the area of the orthographic projection on the substrate 1 .
  • a composite film is formed by using the functional conductive layer 2 and at least one layer of the metal conductive layer 20 that are stacked on the substrate 1 to form a composite film.
  • the metal conductive layer 20 is used to shield the first metal layer 3 and the second metal layer 5 to reduce the metal film layers of the array substrate, namely the first metal layer 3 and the second metal layer 5 reflectivity.
  • This embodiment also provides an embodiment, which is different from the above embodiment in that, as shown in FIG. 5 , the functional conductive layer 2 is disposed on the second metal layer 5 close to the substrate 1 . On one side and covering the second metal layer 5, as shown in FIG. 5, the orthographic projection of the functional conductive layer 2 on the substrate 1 and the second metal layer 5 on the substrate 1 The orthographic projections are completely coincident. Wherein, the functional conductive layer 2 is used to reduce the reflectivity of the bottom of the second metal layer 5 .
  • the anti-reflection effect on the second metal layer 5 of the array substrate shown in FIG. 6 in this embodiment is poorer than that shown in FIG. 7 .
  • This embodiment is shown in FIG. 8 .
  • the anti-reflection effect on the metal film layer of the array substrate shown in FIG. 6 is poorer than the reduction effect on the metal film layer of the array substrate shown in FIG.
  • the antireflection effect of the metal film layer of the substrate is inferior to the reduction effect of the metal film layer of the array substrate shown in FIG. 8 .
  • the solution shown in FIG. 7 is to use the first functional conductive layer 21 to dereflect the first metal layer 3 , and use the second functional conductive layer 22 to dereflect the second metal layer 5 for anti-reflection; the solution shown in FIG.
  • the solution shown in FIG. 8 is that the function conducts electricity Layer 2 and the metal conductive layer 20 are used as light-shielding layers, and the thickness is not high, resulting in a slightly poor anti-reflection effect; while the solution shown in FIG. 5 only performs anti-reflection treatment on the second metal layer 5, and the effect is the worst .
  • a film formation process such as physical vapor deposition (Physical Vapor Deposition) needs to be considered.
  • Vapour Deposition, PVD Physical Vapor Deposition
  • the film-forming temperature for preparing the semiconductor layer is generally maintained at about 360°C, which will cause some of the functional conductive layers.
  • the transformation of the crystal form of the conductive layer 2 affects the antireflection effect on the first metal layer 3, so the film forming process parameters need to be carefully selected.
  • the array substrate includes a first metal layer 3 and a second metal layer 5 which are insulated from each other.
  • a functional conductive layer 2 is disposed on at least one of 5, and the orthographic projection of the functional conductive layer 2 on the substrate 1 covers the orthographic projection of the first metal layer 3 on the substrate 1,
  • the film thickness of 3 using the interference effect of light, reduces the reflectivity of the second metal layer 5 to the external light source, so as to improve the problem of rainbow moiré on the side of the array substrate facing outward, and improve the quality of the display panel.
  • the contact resistance between the functional conductive layer 2 and the semiconductor layer can be kept within a normal range, so as not to affect the electrical properties of the array substrate.

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Abstract

一种阵列基板，包括：设置于衬底（1）上且相互绝缘的第一金属层（3）及第二金属层（5），第二金属层（5）设置于第一金属层（3）远离衬底（1）的一侧；至少一功能导电层（2），功能导电层（2）设置于第一金属层（3）、第二金属层（5）中的至少一者靠近衬底（1）的一侧上；功能导电层（2）在衬底（1）上的正投影覆盖第二金属层（5）在衬底（1）上的正投影；功能导电层（2）在衬底（1）上的正投影覆盖第一金属层（3）在衬底（1）上的正投影；或者，功能导电层（2）设置于第二金属层（5）靠近衬底（1）的一侧上，且功能导电层（2）覆盖第二金属层（5）。还公开一种显示装置。

Description

阵列基板及显示装置 技术领域
本申请涉及显示技术领域，尤其涉及一种阵列基板及显示装置。
 背景技术
近年来，随着人们对显示器的追求逐渐提升，高色域、高对比、薄型化、窄边框等需求逐渐成为各显示器厂家的卖点，四边无边框产品是其中的发展趋势之一，无论在商用显示屏还是电视机用显示屏领域都有广阔的前景。四边无边框产品目前有两大类方案：彩膜（CF）基板侧朝外和阵列（TFT）基板侧朝外，其中阵列基板侧朝外的外观一体性效果更佳。但是阵列基板侧朝外有一个比较大的问题：在外部光源的照射下有比较严重的彩虹云纹（mura），较正常的彩膜基板侧朝外的彩虹云纹会更加严重，影响产品的性能。请参见图1a和图1b，图1a为常规的彩膜基板侧彩虹云纹的现象示意图；图1b为常规的阵列基板侧彩虹云纹的现象示意图。其中，所述外部光源包括自然光如阳光、日光灯、台灯、手电筒、手机灯光等。所述外部光源包含多种波长的光时才会导致彩虹云纹，如果所述外部光源是单波长的光时，会导致阵列基板侧产生单一颜色的云纹。
彩虹云纹的产生与光的干涉效应相关，而不同波长的光产生干涉效应所需要的膜层厚度是不同的，其中干涉强度极大值的薄膜厚度的计算公式为：h=kλ/（2ncosi），其中n代表折射率，k代表光吸收系数。点光源发射的光线以不同的入射角穿过半透明膜层时为不同波长的光提供了合适的薄膜厚度，因此表现为彩虹云纹。阵列基板朝外侧的彩虹云纹相对表现更分散，经分析这与所述阵列基板的一金属层例如源漏极相关，当所述金属层下方设置有一透明绝缘薄膜，为不同波长的光线产生彩虹云纹创造了条件。如图2所示，图2为常规的金属暗化层用于所述金属层时厚度过大时的IdVd曲线，其中100代表金属层具有金属暗化层时的IdVd曲线，200代表金属层不具有金属暗化层时的IdVd曲线。如果采用普通的金属暗化层进行金属层减反，会对TFT电性造成影响。
因此，为了降低所述金属层的反射率以改善阵列基板侧朝外的彩虹云纹，亟需提供一种新的阵列基板及显示装置。
 技术问题
本申请实施例提供一种阵列基板及显示装置，通过在一第一金属层、一第二金属层中的至少一者上设置一功能导电层，使得功能导电层在衬底上的正投影覆盖第二金属层在衬底上的正投影，且功能导电层在衬底上的正投影覆盖第一金属层在衬底上的正投影，通过调整功能导电层及第一金属层的膜厚，利用光的干涉效果，降低第二金属层对外部光源的反射率，以改善阵列基板侧朝外的彩虹云纹问题，提升显示面板的品质。
 技术解决方案
第一方面，本申请提供一种阵列基板，其中，所述阵列基板包括：设置于一衬底上且相互绝缘的一第一金属层及一第二金属层，并且，所述第二金属层设置于所述第一金属层远离所述衬底的一侧；至少一功能导电层，所述功能导电层设置于所述第一金属层、所述第二金属层中的至少一者靠近所述衬底的一侧上；其中，所述功能导电层在所述衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影；并且，所述功能导电层在所述衬底上的正投影覆盖所述第一金属层在所述衬底上的正投影。
第二方面，本申请提供一种阵列基板，其中，所述阵列基板包括：设置于一衬底上且相互绝缘的一第一金属层及一第二金属层，并且，所述第二金属层设置于所述第一金属层远离所述衬底的一侧；一第一功能导电层和一第二功能导电层，所述第一功能导电层设置于所述第一金属层靠近所述衬底的一侧上，所述第二功能导电层设置于所述第二金属层靠近所述衬底的一侧上；其中，所述第二功能导电层在所述衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影；并且，所述第一功能导电层在所述衬底上的正投影覆盖所述第一金属层在所述衬底上的正投影。
在一些实施例中，其中，所述第一功能导电层在所述衬底上的正投影覆盖所述第一金属层在所述衬底上的正投影。
第三方面，本申请提供一种阵列基板，其中，所述阵列基板包括：设置于一衬底上且相互绝缘的一第一金属层及一第二金属层，并且，所述第二金属层设置于所述第一金属层远离所述衬底的一侧；至少一功能导电层，所述功能导电层设置于所述第一金属层靠近所述衬底的一侧上；其中，所述功能导电层在所述衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影；并且，所述功能导电层在所述衬底上的正投影覆盖所述第一金属层在所述衬底上的正投影。
在一些实施例中，其中，所述第一金属层在所述衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影。
第四方面，本申请提供一种阵列基板，其中，所述阵列基板包括：设置于一衬底上且相互绝缘的一第一金属层及一第二金属层，并且，所述第二金属层设置于所述第一金属层远离所述衬底的一侧；至少一功能导电层，所述功能导电层设置于所述第一金属层靠近所述衬底的一侧上；以及，至少一金属导电层，所述金属导电层设置于所述功能导电层靠近所述第一金属层的一侧上；其中，所述功能导电层在所述衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影；并且，所述功能导电层在所述衬底上的正投影覆盖所述第一金属层在所述衬底上的正投影。
在一些实施例中，其中，所述金属导电层与所述第一金属层绝缘。
在一些实施例中，其中，所述功能导电层在所述衬底上的正投影覆盖所述第一金属层在所述衬底上的正投影与所述第二金属层在所述衬底上的正投影之和。
第五方面，本申请体提供一种阵列基板，其中，所述阵列基板包括：设置于一衬底上且相互绝缘的一第一金属层及一第二金属层，并且，所述第二金属层设置于所述第一金属层远离所述衬底的一侧；一功能导电层，所述功能导电层设置于所述第二金属层靠近所述衬底的一侧上；其中，所述功能导电层在所述衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影。10.根据权利要求9所述的阵列基板，其中，所述阵列基板还包括一栅极绝缘层，所述栅极绝缘层设置于所述第一金属层上，且所述栅极绝缘层覆盖所述第一金属层及所述衬底，所述第二金属层设置于所述栅极绝缘层背离所述第一金属层的一侧上。第六方面，本申请提供一种阵列基板，所述阵列基板包括：设置于一衬底上且相互绝缘的一第一金属层及一第二金属层，并且，所述第二金属层设置于所述第一金属层远离所述衬底的一侧；至少一功能导电层，所述功能导电层设置于所述第一金属层、所述第二金属层中的至少一者靠近所述衬底的一侧上；其中，所述功能导电层在所述衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影。
在一些实施例中，所述功能导电层在所述衬底上的正投影覆盖所述第一金属层在所述衬底上的正投影。
在一些实施例中，所述功能导电层包括一第一功能导电层和一第二功能导电层，所述第一功能导电层设置于所述第一金属层靠近所述衬底的一侧上，且所述第一功能导电层覆盖所述第一金属层，所述第二功能导电层设置于所述第二金属层靠近所述衬底的一侧上，且所述第二功能导电层覆盖所述第二金属层。
在一些实施例中，所述功能导电层设置于所述第一金属层靠近所述衬底的一侧上，且所述功能导电层覆盖所述第一金属层。
在一些实施例中，所述第一金属层在所述衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影。
在一些实施例中，所述薄膜晶体管还包括至少一金属导电层，所述功能导电层设置于所述第一金属层靠近所述衬底的一侧上，所述金属导电层设置于所述功能导电层靠近所述第一金属层的一侧上，且所述金属导电层与所述第一金属层绝缘。
在一些实施例中，所述功能导电层在所述衬底上的正投影覆盖所述第一金属层在所述衬底上的正投影与所述第二金属层在所述衬底上的正投影之和。
在一些实施例中，所述功能导电层设置于所述第二金属层靠近所述衬底的一侧上，且所述功能导电层覆盖所述第二金属层。
在一些实施例中，所述薄膜晶体管还包括一栅极绝缘层，所述栅极绝缘层设置于所述第一金属层上，且所述栅极绝缘层覆盖所述第一金属层及所述衬底，所述第二金属层设置于所述栅极绝缘层背离所述第一金属层的一侧上。
本申请还提供一种显示装置，所述显示装置包括阵列基板、与所述阵列基板相对设置的彩膜基板，以及设置于所述阵列基板与所述彩膜基板之间的液晶层，所述阵列基板包括：设置于一衬底上且相互绝缘的一第一金属层及一第二金属层，其中，所述第二金属层设置于所述第一金属层远离所述衬底的一侧；至少一功能导电层，所述功能导电层设置于所述第一金属层、所述第二金属层中的至少一者靠近所述衬底的一侧上；其中，所述功能导电层在所述衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影。
 有益效果
相较于现有技术，本申请实施例所述的阵列基板及显示装置，所述阵列基板包括相互绝缘设置的一第一金属层及一第二金属层，通过在所述第一金属层、所述第二金属层中的至少一者上设置一功能导电层，且所述功能导电层在所述衬底上的正投影覆盖所述第一金属层在所述衬底上的正投影，使得所述功能导电层在一衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影，通过调整所述功能导电层及所述第一金属层的膜厚，利用光的干涉效果，降低所述第二金属层对外部光源的反射率，以改善阵列基板侧朝外的彩虹云纹问题，提升显示面板的品质。并且，所述功能导电层与所述半导体层的功函数接近，使得所述功能导电层与所述半导体层之间的接触阻抗可以保持在正常范围内，从而不影响所述阵列基板的电性。
 附图说明
图1a为常规的彩膜基板侧彩虹云纹的现象示意图。
图1b为常规的阵列基板侧彩虹云纹的现象示意图。
图2为常规的金属暗化层用于第二金属层时厚度过大时的IdVd曲线。
图3为改善后的阵列基板侧彩虹云纹的现象示意图。
图4为改善前后的反射光谱。
图5为本申请优选实施例中阵列基板的结构示意图。
图6为本申请另一优选实施例中阵列基板的结构示意图。
图7为本申请另一优选实施例中阵列基板的结构示意图。
图8为本申请其他实施例中阵列基板的结构示意图。
 本发明的实施方式
本申请提供一种阵列基板及显示装置，为使本申请的目的、技术方案及效果更加清楚、明确，以下参照附图并举实施例对本申请进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不用于限定本申请。
请参见图5至图8，在本申请实施例中，提供一种阵列基板。所述阵列基板包括一衬底1，设置于所述衬底1上的一第一金属层3，设置于所述第一金属层3背离所述衬底1一侧的一第二金属层5，以及一半导体层（图中未示意）。所阵列基板还包括至少一功能导电层2。在本申请具体实施例中，所述功能导电层2设置于所述第一金属层3、所述第二金属层5中的至少一者靠近所述衬底1的一侧上；其中，所述功能导电层2在所述衬底1上的正投影覆盖所述第二金属层5在所述衬底1上的正投影。需要进行说明的，在本申请中，优选地，所述半导体层设置于所述第一金属层3与所述第二金属层5之间。更为优选地，所述功能导电层2与所述半导体层的功率函数相同，以降低所述功能导电层2与所述半导体层的接触阻抗。
在本申请中，所述第一金属层3在所述衬底1上的正投影落入所述功能导电层2在所述衬底1上的正投影内。
请续见图7。在一种最优选实施例中，所述功能导电层2包括一第一功能导电层21和一第二功能导电层22，所述第一功能导电层21设置于所述第一金属层3靠近所述衬底1的一侧上，且所述第一功能导电层21覆盖所述第一金属层3，所述第二功能导电层22设置于所述第二金属层5靠近所述衬底1的一侧上，且所述第二功能导电层22覆盖所述第二金属层5。如图7所示，所述第一功能导电层21在所述衬底1上的正投影与所述第一金属层3在所述衬底1上的正投影完全重合，所述第二功能导电层22在所述衬底1上的正投影与所述第二金属层5在所述衬底1上的正投影完全重合。
在本申请优选实施例中，所述功能导电层2为透明导电层，所述功能导电层2的材料为氧化铟锡（ITO）、氧化铟锌（IZO）、铟镓锌氧化物（IGZO）及铟镓锌钛氧化物（IGZTO）中的任一种。
在本申请优选实施例中，所述第一金属层3的材料为铜（Cu）、钼（Mo）、钛（Ti）、铝（Al）、镍（Ni）、铌（Nb）、钽（Ta）、铬（Cr）中的至少一种。
在本申请优选实施例中，所述第二金属层5的材料为铜（Cu）、钼（Mo）、钛（Ti）、铝（Al）、镍（Ni）、铌（Nb）、钽（Ta）、铬（Cr）中的至少一种。
在本实施例中，所述功能导电层2选取为与所述半导体层的功函数相一致的材料，以降低所述功能导电层2与所述半导体层的接触电阻。由于所述功能导电层2（即所述第一功能导电层21与所述第二功能导电层22）与所述半导体层不存在接触阻抗过高的问题，从而不会影响所述阵列基板的电性进而也不会影响显示效果。优选地，所述第一金属层3选取为与所述功能导电层2及所述第二金属层5的附着力表现好的材料，并且，所述第二金属层5选取为具有电阻率低、导电性好、成本低等特点的材料。
续见图7，所述阵列基板还包括一栅极绝缘层4，所述栅极绝缘层4设置于所述第一金属层3上，且所述栅极绝缘层4覆盖所述第一金属层3及所述衬底1，所述第二金属层5设置于所述栅极绝缘层4背离所述第一金属层3的一侧上。其中，所述栅极绝缘层4的材料为氮化硅（SiNx）或者氧化硅（SiOx），也可以选择氮氧化硅（SiNxOy），同时达到对显示区进行减反的目的。
需要特别强调的是，所述第一金属层3的厚度小于所述第一金属层3的趋肤深度，以保证光线可以穿透所述第一金属层3，并在所述第二金属层5的表面发生反射。其中，所述第一金属层3的所述趋肤深度d=λ/（4πnk），λ表示波长，n和k分别代表第一金属层3的n值和k值，n代表折射率，k代表光吸收系数。
需要进行说明的是，所述第一金属层3与所述第二金属层5的材料不相同。
在本申请中，所述第一金属层3为栅极，所述第二金属层5为源漏极。
作为一优选实施方式，所述功能导电层2的材料优选为氧化铟锡（ITO），所述第一金属层3的材料优选为钼（Mo），所述第二金属层5的材料优选为铜（Cu）。其中，所述功能导电层2的厚度范围为40nm~65nm，所述第一金属层3的厚度范围为5nm~20nm。所述功能导电层2的厚度可以是40nm~65nm的任意数值，例如但不限于44nm，45nm,50nm,52nm，55nm。所述第一金属层3的厚度可以是5nm~20nm的任意数值，例如但不限于5nm,6nm,10nm,11nm, 15nm。优选地，所述第一金属层3的厚度为11nm，以保证制程的稳定性。在本实施例中，如图4所示，图4为改善前后的阵列基板的反射光谱，其中100’代表改善前的反射谱，200’代表改善后的反射谱。经过改善，所述阵列基板的复合电极结构即ITO/Mo/Cu的结构的反射率最低为13%左右，相较于改善前的Mo/Cu的结构的反射率在45%左右，反射率减少程度较大。
如图7所示，阵列基板还包括：一保护层6，保护层6设置于第二金属层5上，且保护层6覆盖第二金属层5及栅极绝缘层4；多个色阻块7，多个色阻块7间隔设置于保护层6上，且色阻块7与所述阵列基板的薄膜晶体管交错设置；导电层8，导电层8为断开的结构，导电层8对应设置于色阻块7上。保护层6的材料为SiNx，保护层6是为了保护第二金属层5不被工艺过程中的光刻胶腐蚀。
本申请还提供一种显示装置，如图7所示，所述显示装置包括所述阵列基板、设置于所述阵列基板一侧的彩膜基板10、以及设置于所述阵列基板与所述彩膜基板10之间的液晶层9，所述液晶层9包括多个液晶。显示装置可以为但不限于为液晶显示装置及有机发光显示装置，所述显示装置可以为透明显示器中。在本申请中，所述显示装置为液晶显示装置。
在本申请中，如图7所示，所述阵列基板侧朝外，即，所述显示装置的背光侧位于彩膜基板10背离阵列基板的一侧，出光侧位于阵列基板背离彩膜基板10的一侧，出光方向由背光侧指向出光侧，即显示面板的出光侧为阵列基板侧。
在如图7所示的具体实施例中，所述功能导电层2用于同时遮挡所述第一金属层3和所述第二金属层5，通过调整所述功能导电层2与所述第一金属层3的膜厚，利用光的干涉效果，降低所述第二金属层5对环境光的反射率以改善当所述阵列基板朝外侧的彩虹云纹的问题，提升显示面板的品质。请参见图3，图3为改善后的阵列基板侧彩虹云纹的现象示意图。由此可见，改善后所述阵列基板侧朝外的彩虹云纹表现与常规的彩膜基板侧表现相当。
请参见图6。在本申请中，还提供一种较优选实施例，与图7所示的实施例的不同之处在于，所述功能导电层2设置于所述第一金属层3靠近所述衬底1的一侧上并覆盖所述第一金属层3，且所述第一金属层3在所述衬底1上的正投影覆盖所述第二金属层5在所述衬底1上的正投影。如图6所示，所述功能导电层2在所述衬底1上的正投影与所述第一金属层3在所述衬底1上的正投影完全重合。
其中，所述功能导电层2用于所述第一金属层3的底部减反，所述第二金属层5的底部采用所述第一金属层3与所述功能导电层2的堆叠结构来达到减反的目的。
请续见图8。还提供一种优选实施例，不同之处在于，所述功能导电层2设置于所述第一金属层3靠近所述衬底1的一侧上，所述阵列基板还包括至少一金属导电层20，所述金属导电层20设置于所述功能导电层2靠近所述第一金属层3的一侧上并与所述第一金属层3绝缘，所述金属导电层20覆盖所述功能导电层2，即所述金属导电层20在所述衬底1上的正投影与所述功能导电层2在所述衬底1上的正投影完全重合。如图8所示，在所述金属导电层20背离所述功能导电层2的一侧上设置一层间绝缘层201，所述层间绝缘层201覆盖所述金属导电层20及所述衬底1。优选地，所述金属导电层20的材料与所述第一金属层3或所述第二金属层5的材料相同。
如图8所示，所述第一金属层3在所述衬底1上的正投影与所述第二金属层5在所述衬底1上的正投影之和落入所述功能导电层2在所述衬底1上的正投影的区域内。在本实施例中，通过在所述衬底1上采用层叠设置的所述功能导电层2及至少一层所述金属导电层20单独成复合膜，所述功能导电层2及至少一层所述金属导电层20用于遮挡所述第一金属层3及所述第二金属层5，以降低所述阵列基板的金属膜层即所述第一金属层3及所述第二金属层5的反射率。
请续见图5。在本实施例中还提供一种实施例，与上述实施例的不同之处在于，如图5所示，所述功能导电层2设置于所述第二金属层5靠近所述衬底1的一侧上并覆盖所述第二金属层5，如图5所示，所述功能导电层2在所述衬底1上的正投影与所述第二金属层5在所述衬底1上的正投影完全重合。其中，所述功能导电层2用于减少所述第二金属层5底部的反射率。
需要进行说明的是，本实施例如图6所示的对所述阵列基板的所述第二金属层5的减反效果相较于图7所示的减少效果较差，本实施例如图8所示的对所述阵列基板的金属膜层的减反效果相较于图6所示的对所述阵列基板的金属膜层的减少效果较差，以及实施例如图5所示的对所述阵列基板的金属膜层的减反效果相较于图8所示的对所述阵列基板的金属膜层的减少效果较差。具体地，由于如图7所示的方案是利用所述第一功能导电层21对所述第一金属层3进行减反，以及利用所述第二功能导电层22对所述第二金属层5进行减反；如图6所示的方案会存在所述第一金属层3和所述第二金属层5覆盖（overlay）偏移的风险；如图8所示的方案为所述功能导电层2和所述金属导电层20作为遮光层，厚度不高，导致减反效果会稍差；而如图5所示的方案只针对所述第二金属层5进行减反处理，效果最差。
在本申请中，所述阵列基板的所述功能导电层2以及所述金属导电层20用于减少所述第一金属层3的反射率时，需要考虑到成膜工艺例如物理气相沉积(Physical Vapour Deposition，PVD)的温度以及功率等因素，以防止所述功能导电层2结晶后蚀刻不干净；另外，制备所述半导体层的成膜温度一般保持在360℃左右，会导致一部分所述功能导电层2结晶形态的转变，进而影响对所述第一金属层3的减反效果，从而成膜工艺参数需要慎重选择。
本申请所述的阵列基板及显示装置，所述阵列基板包括相互绝缘设置的一第一金属层3及一第二金属层5，通过在所述第一金属层3、所述第二金属层5中的至少一者上设置一功能导电层2，且所述功能导电层2在所述衬底1上的正投影覆盖所述第一金属层3在所述衬底1上的正投影，使得所述功能导电层2在一衬底1上的正投影覆盖所述第二金属层5在所述衬底1上的正投影，通过调整所述功能导电层2及所述第一金属层3的膜厚，利用光的干涉效果，降低所述第二金属层5对外部光源的反射率，以改善阵列基板侧朝外的彩虹云纹问题，提升显示面板的品质。并且，所述功能导电层2与所述半导体层之间的接触阻抗可以保持在正常范围内，从而不影响所述阵列基板的电性。
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见其他实施例的相关描述。以上各个操作的具体实施可参见前面的实施例，在此不再赘述。
可以理解的是，对本领域普通技术人员来说，可以根据本申请的技术方案及其发明构思加以等同替换或改变，而所有这些改变或替换都应属于本申请所附的权利要求的保护范围。

Claims (20)

  1. 一种阵列基板，其中，所述阵列基板包括：设置于一衬底上且相互绝缘的一第一金属层及一第二金属层，并且，所述第二金属层设置于所述第一金属层远离所述衬底的一侧；
    至少一功能导电层，所述功能导电层设置于所述第一金属层、所述第二金属层中的至少一者靠近所述衬底的一侧上；其中，
    所述功能导电层在所述衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影；并且，
    所述功能导电层在所述衬底上的正投影覆盖所述第一金属层在所述衬底上的正投影。
  2. 一种阵列基板，其中，所述阵列基板包括：
    设置于一衬底上且相互绝缘的一第一金属层及一第二金属层，并且，所述第二金属层设置于所述第一金属层远离所述衬底的一侧；
    一第一功能导电层和一第二功能导电层，所述第一功能导电层设置于所述第一金属层靠近所述衬底的一侧上，所述第二功能导电层设置于所述第二金属层靠近所述衬底的一侧上；其中，
    所述第二功能导电层在所述衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影。
  3. 根据权利要求2所述的阵列基板，其中，所述第一功能导电层在所述衬底上的正投影覆盖所述第一金属层在所述衬底上的正投影。
  4. 一种阵列基板，其中，所述阵列基板包括：设置于一衬底上且相互绝缘的一第一金属层及一第二金属层，并且，所述第二金属层设置于所述第一金属层远离所述衬底的一侧；
    至少一功能导电层，所述功能导电层设置于所述第一金属层靠近所述衬底的一侧上；其中，
    所述功能导电层在所述衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影；并且，
    所述功能导电层在所述衬底上的正投影覆盖所述第一金属层在所述衬底上的正投影。
  5. 根据权利要求4所述的阵列基板，其中，所述第一金属层在所述衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影。
  6. 一种阵列基板，其中，所述阵列基板包括：设置于一衬底上且相互绝缘的一第一金属层及一第二金属层，并且，所述第二金属层设置于所述第一金属层远离所述衬底的一侧；
    至少一功能导电层，所述功能导电层设置于所述第一金属层靠近所述衬底的一侧上；以及，
    至少一金属导电层，所述金属导电层设置于所述功能导电层靠近所述第一金属层的一侧上；其中，
    所述功能导电层在所述衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影；并且，
    所述功能导电层在所述衬底上的正投影覆盖所述第一金属层在所述衬底上的正投影。
  7. 根据权利要求6所述的阵列基板，其中，所述金属导电层与所述第一金属层绝缘。
  8. 根据权利要求7所述的阵列基板，其中，所述功能导电层在所述衬底上的正投影覆盖所述第一金属层在所述衬底上的正投影与所述第二金属层在所述衬底上的正投影之和。
  9. 一种阵列基板，其中，所述阵列基板包括：设置于一衬底上且相互绝缘的一第一金属层及一第二金属层，并且，所述第二金属层设置于所述第一金属层远离所述衬底的一侧；
    一功能导电层，所述功能导电层设置于所述第二金属层靠近所述衬底的一侧上；其中，
    所述功能导电层在所述衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影。
  10. 根据权利要求9所述的阵列基板，其中，所述阵列基板还包括一栅极绝缘层，所述栅极绝缘层设置于所述第一金属层上，且所述栅极绝缘层覆盖所述第一金属层及所述衬底，所述第二金属层设置于所述栅极绝缘层背离所述第一金属层的一侧上。
  11. 一种阵列基板，其中，所述阵列基板包括：设置于一衬底上且相互绝缘的一第一金属层及一第二金属层，并且，所述第二金属层设置于所述第一金属层远离所述衬底的一侧；
    至少一功能导电层，所述功能导电层设置于所述第一金属层、所述第二金属层中的至少一者靠近所述衬底的一侧上；其中，
    所述功能导电层在所述衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影。
  12. 根据权利要求11所述的阵列基板，其中，所述功能导电层在所述衬底上的正投影覆盖所述第一金属层在所述衬底上的正投影。
  13. 根据权利要求12所述的阵列基板，其中，所述功能导电层包括一第一功能导电层和一第二功能导电层，所述第一功能导电层设置于所述第一金属层靠近所述衬底的一侧上，且所述第一功能导电层覆盖所述第一金属层，所述第二功能导电层设置于所述第二金属层靠近所述衬底的一侧上，且所述第二功能导电层覆盖所述第二金属层。
  14. 根据权利要求12所述的阵列基板，其中，所述功能导电层设置于所述第一金属层靠近所述衬底的一侧上，所述功能导电层覆盖所述第一金属层。
  15. 根据权利要求14所述的阵列基板，其中，所述第一金属层在所述衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影。
  16. 根据权利要求12所述的阵列基板，其中，所述阵列基板还包括至少一金属导电层，所述功能导电层设置于所述第一金属层靠近所述衬底的一侧上，所述金属导电层设置于所述功能导电层靠近所述第一金属层的一侧上，且所述金属导电层与所述第一金属层绝缘。
  17. 根据权利要求16所述的阵列基板，其中，所述功能导电层在所述衬底上的正投影覆盖所述第一金属层在所述衬底上的正投影与所述第二金属层在所述衬底上的正投影之和。
  18. 根据权利要求11所述的阵列基板，其中，所述功能导电层设置于所述第二金属层靠近所述衬底的一侧上，且所述功能导电层覆盖所述第二金属层。
  19. 根据权利要求11所述的阵列基板，其中，所述阵列基板还包括一栅极绝缘层，所述栅极绝缘层设置于所述第一金属层上，且所述栅极绝缘层覆盖所述第一金属层及所述衬底，所述第二金属层设置于所述栅极绝缘层背离所述第一金属层的一侧上。
  20. 一种显示装置，所述显示装置包括阵列基板、与所述阵列基板相对设置的彩膜基板，以及设置于所述阵列基板与所述彩膜基板之间的液晶层，其中，所述阵列基板包括：
    设置于一衬底上且相互绝缘的一第一金属层及一第二金属层，并且，所述第二金属层设置于所述第一金属层远离所述衬底的一侧；
    至少一功能导电层，所述功能导电层设置于所述第一金属层、所述第二金属层中的至少一者靠近所述衬底的一侧上；其中，
    所述功能导电层在所述衬底上的正投影覆盖所述第二金属层在所述衬底上的正投影。
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