TWM589361U - System for semiconductor die sorting and testing processor - Google Patents

System for semiconductor die sorting and testing processor Download PDF

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Publication number
TWM589361U
TWM589361U TW108213549U TW108213549U TWM589361U TW M589361 U TWM589361 U TW M589361U TW 108213549 U TW108213549 U TW 108213549U TW 108213549 U TW108213549 U TW 108213549U TW M589361 U TWM589361 U TW M589361U
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station
die
test
reel
sorting
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TW108213549U
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光榮 胡
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馬來西亞商正齊科技有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67271—Sorting devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67763—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations the wafers being stored in a carrier, involving loading and unloading
    • H01L21/67775—Docking arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

本新型涉及一種用於半導體晶粒分選和測試處理器的系統，其包括至少一個拾取和捲帶系統和至少一個硬對接測試系統，其中所述拾取和捲帶系統包括至少一個具有至少一個輸入站的轉盤，至少一個晶粒對準站，至少一個晶粒物理分選站和至少一個捲帶和捲軸站。硬對接測試系統包括至少一個測試位置和至少一個測試臂，由此所述晶粒通過至少一個橋接系統在拾取和捲帶系統與硬對接測試站之間來回傳送。 The present invention relates to a system for a semiconductor die sorting and testing processor, which includes at least one pickup and reel system and at least one hard docking test system, wherein the pickup and reel system includes at least one having at least one input The turntable of the station, at least one die alignment station, at least one die physical sorting station and at least one tape and reel station. The hard docking test system includes at least one test location and at least one test arm, whereby the die is transferred back and forth between the pickup and reel system and the hard docking test station through at least one bridge system.

Description

用於半導體晶粒分選和測試處理器的系統System for semiconductor die sorting and testing processor

本新型涉及一種用於半導體晶粒分選和測試處理器的系統，其包括至少一個拾取和捲帶系統和至少一個硬對接測試系統，其中所述拾取和捲帶系統包括至少一個具有至少一個輸入站的轉盤，至少一個晶粒對準站，至少一個晶粒物理分選站和至少一個捲帶和捲軸站。硬對接測試系統包括至少一個測試位置和至少一個測試臂，由此所述晶粒通過至少一個橋接系統在拾取和捲帶系統與硬對接測試站之間來回傳送。The present invention relates to a system for a semiconductor die sorting and testing processor, which includes at least one pickup and reel system and at least one hard docking test system, wherein the pickup and reel system includes at least one having at least one input The turntable of the station, at least one die alignment station, at least one die physical sorting station and at least one tape and reel station. The hard docking test system includes at least one test location and at least one test arm, whereby the die is transferred back and forth between the pickup and reel system and the hard docking test station through at least one bridge system.

參閱圖5所示，半導體晶粒通常在運送到另一個位置進行器件封裝之前進行處理。晶粒通常以捲軸或晶圓的形式運輸。捲軸上的晶粒通常用膠帶包裝，密封和捲起，然後運輸到處理場所。在處理場地被使用之前，晶圓中的晶粒通常以已經切割的晶粒的形式出現。通常由一台機器完成的處理任務可能涉及拾取和放置所述晶粒，在許多不同的工作站中操作，例如晶粒分揀站，晶粒帶和捲軸以及許多其他工作站。這裡的晶粒以WLCSP和WLBGA為例。在處理過程之後，晶粒將被運出。上述實施的問題很多。正在運出的晶粒在加工過程中會產生許多類型的缺陷，例如性能缺陷或物理缺陷。As shown in Figure 5, semiconductor die are usually processed before being shipped to another location for device packaging. Dies are usually transported in the form of reels or wafers. The die on the reel are usually packed with tape, sealed and rolled up, and then transported to the disposal site. Before the processing site is used, the grains in the wafer usually appear in the form of diced grains. The processing tasks usually performed by one machine may involve picking up and placing the die, operating in many different workstations, such as die sorting stations, die tapes and reels, and many other workstations. The grains here are WLCSP and WLBGA as examples. After the process, the die will be shipped out. There are many problems with the above implementation. Many types of defects will be generated during the processing of the die being shipped, such as performance defects or physical defects.

過去提出了一些慣用方案以解決上述問題。在某些搬運機械中，晶圓探針在晶粒被研磨、切片和分類之前先對它們進行處理。沒有對這些工藝中的晶粒進行進一步的測試，使得這些晶粒可能在這些工藝中被損壞，使得大量損壞的晶粒被運出。In the past, some conventional solutions have been proposed to solve the above problems. In some handling machines, wafer probes process the grains before they are ground, sliced, and sorted. No further testing of the grains in these processes has allowed these grains to be damaged in these processes, resulting in a large number of damaged grains being shipped out.

測試站被轉移到與分揀站一起工作，以減少包装前的搬運風險。通常，購買和製造這些機器的成本很高，因為它涉及製造兩台或多台機器來執行整個過程。操作人員從每台機器卸載晶粒和向每台機器裝載晶粒所需的時間要多得多，並且還可能導致人為錯誤。The test station was transferred to work with the sorting station to reduce the risk of handling before packaging. Generally, the cost of buying and manufacturing these machines is high because it involves manufacturing two or more machines to perform the entire process. It takes much more time for the operator to unload the die from each machine and load the die into each machine, and may also cause human error.

因此，如果通過具有用於半導體晶粒分選和測試處理器的系統(包括至少一個拾取和捲帶系統和至少一個硬對接測試系統，進一步包括橋接系統)來減輕上述缺點，將是非常有利的。Therefore, it would be very advantageous to alleviate the above-mentioned shortcomings by having a system for semiconductor die sorting and testing processors (including at least one pick and reel system and at least one hard docking test system, further including a bridge system) .

因此，本新型的主要目的是提供一種用於半導體晶粒分類和測試處理器的系統，由於本新型能夠執行過去兩個以上設備所需的任務，因此這是一種更具成本效益的解決方案。Therefore, the main purpose of the new model is to provide a system for semiconductor die classification and test processors. Since the new model can perform the tasks required by more than two devices in the past, this is a more cost-effective solution.

本新型的又一個目的是提供一種用於半導體晶粒分類和測試處理器的系統，該系統節省時間，因為僅需要將晶粒一次性加載到系統而不是像慣用技術需要多次加載。Yet another object of the present invention is to provide a system for semiconductor die classification and test processors that saves time because only the die needs to be loaded into the system at once rather than multiple loadings as in conventional technology.

本新型的又一個目的是提供一種用於半導體晶粒分類和測試處理器的系統，其減少了在生產線中處理和測試晶粒的過程中的步驟。Another object of the present invention is to provide a system for semiconductor die classification and test processors that reduces the steps in the process of processing and testing die in the production line.

本新型的又一個目的是提供一種用於半導體晶粒分類和測試處理器的系統，其在運出之前測試晶粒，藉此提供更高的良品率。Another object of the present invention is to provide a system for semiconductor die classification and test processors that tests die before shipping, thereby providing a higher yield.

本新型的又一個目的是提供一種用於半導體晶粒分選和測試處理器的系統，其在膠带和封裝之前測試晶粒，因此提供更高的輸出品質。Another object of the present invention is to provide a system for semiconductor die sorting and testing processors that tests die before tape and packaging, thus providing higher output quality.

本新型的又一個目的是提供一種用於半導體晶粒分類和測試處理器的系統，其降低了每個晶粒的成本。Yet another object of the present invention is to provide a system for semiconductor die classification and test processors that reduces the cost per die.

通過理解本新型的以下詳細描述或在實際運用中使用本新型，本新型的其他目的將變得顯而易見。Other objects of the present invention will become apparent by understanding the following detailed description of the present invention or using the present invention in actual use.

根據本新型的較佳實施例，提供以下内容：According to the preferred embodiment of the present invention, the following are provided:

一種用於半導體晶粒分類和測試處理器的系統，包括：A system for semiconductor die classification and test processor, including:

至少一個拾取和捲帶系統，包括至少一個具有至少一個工作站的轉盤和至少一個覆晶；At least one pickup and reel system, including at least one turntable with at least one work station and at least one flip chip;

其特徵在於：It is characterized by:

所述系統還包括至少一個硬對接測試系統；The system also includes at least one hard docking test system;

所述硬對接測試系統包括至少一個測試位置和至少一個測試臂；和The hard docking test system includes at least one test position and at least one test arm; and

所述系統還包括至少一個橋接系統，用於在所述拾取和捲帶系統與硬對接測試站之間來回傳送所述晶粒。The system also includes at least one bridge system for transferring the die back and forth between the pickup and reel system and the hard docking test station.

在下面的詳細描述中，為了提供對本新型的透徹理解，闡述了許多具體細節。然而，本領域普通技術人員將理解，可以在沒有這些具體細節的情況下實踐本新型。在其它實例中，沒有詳細描述眾所周知的方法、過程和/或元件，以免模糊本新型。In the following detailed description, in order to provide a thorough understanding of the present invention, many specific details are set forth. However, one of ordinary skill in the art will understand that the new type can be practiced without these specific details. In other instances, well-known methods, procedures, and/or elements have not been described in detail so as not to obscure the novelty.

通過以下對其實施例的描述，將更清楚地理解本新型，僅通過示例的方式參考附圖給出，附圖未按比例繪製。The present invention will be more clearly understood through the following description of its embodiments, and is given by way of example only with reference to the drawings, which are not drawn to scale.

請參考圖1所示，其為本新型的方塊示意圖，其中一半導體晶粒分揀和測試處理器(101)設置在半導體晶圓的組裝操作之後的測試操作處。組裝操作包括，但不限於以下步驟：後磨削、塗層、鐳射標記、鐳射刻槽和切割/鋸切。該半導體晶粒分選和測試處理器（101）能夠執行多個半導體晶粒測試（例如電測試、硬對接測試）、AOI（自動光學檢查）以及捲帶和捲軸。Please refer to FIG. 1, which is a schematic block diagram of the new type, in which a semiconductor die sorting and testing processor (101) is provided at a testing operation place after the assembly operation of the semiconductor wafer. Assembly operations include, but are not limited to the following steps: post-grinding, coating, laser marking, laser engraving, and cutting/sawing. The semiconductor die sorting and test processor (101) can perform multiple semiconductor die tests (such as electrical tests, hard docking tests), AOI (automatic optical inspection), and tape and reel.

請參考圖2所示，展示了本新型涉及一種用於半導體晶粒分類和測試處理器（101）的系統，其包括至少一個拾取和捲帶系統（103），至少一個硬對接測試系統（105）和至少一個橋接系統（113）在所述拾取和捲帶系統（103）與硬對接測試站（105）之間來回傳送所述晶粒。Please refer to FIG. 2, which shows that the present invention relates to a system for semiconductor die classification and test processor (101), which includes at least one pickup and reel system (103) and at least one hard docking test system (105) ) And at least one bridging system (113) to transfer the die back and forth between the pickup and reel system (103) and the hard docking test station (105).

該拾取和捲帶系統（103）包括至少一個具有至少一個工位站的轉盤（107）。該轉盤（107）包括至少一個輸入站（117），至少一個晶粒對準站（118），至少一個晶粒物理檢查站（119），至少一個捲帶和捲軸站（121）和至少一個鐳射標記站（圖中未示）。該輸入站（117）使用至少一個拾取頭（圖中未示）從至少一個捲軸接收晶粒，或者使用至少一個覆晶（圖中未示）從至少一個晶圓接收晶粒。設有至少一個具有視覺檢查站的單元對準模組（120），該對準模組（120）用於在單元/晶粒放置在緩衝腔（圖中未示）之前將這些單元對準。此外，還設有至少一個清除桶以放置未通過檢查的任何單元/晶粒。該轉盤（107）包括多個拾取頭，至少一個直接驅動旋轉馬達，至少一個旋轉刀片和至少一個垂直運動推動器，由此所述拾取頭設置在所述旋轉刀片圓周上。The pickup and reel system (103) includes at least one turntable (107) having at least one station. The turntable (107) includes at least one input station (117), at least one grain alignment station (118), at least one grain physical inspection station (119), at least one tape and reel station (121) and at least one laser Marking station (not shown). The input station (117) uses at least one pick-up head (not shown) to receive die from at least one reel, or at least one flip chip (not shown) to receive die from at least one wafer. At least one unit alignment module (120) with a visual inspection station is provided. The alignment module (120) is used to align the units/die before placing them in the buffer cavity (not shown). In addition, at least one cleaning bucket is provided to place any unit/die that fails the inspection. The turntable (107) includes a plurality of pickup heads, at least one direct drive rotary motor, at least one rotary blade and at least one vertical motion pusher, whereby the pickup head is disposed on the circumference of the rotary blade.

該硬對接測試系統（105）包括至少一個測試位置（109）和至少一個測試臂（111）。該測試臂（111）通常將晶粒拾取到測試位置以進行電測試。 在完成測試之後，將晶粒放置在模版（圖中未示）中，然後將單元運送臂（圖中未示）拾取並放置到緩衝腔中。請參照圖3所示，該測試位置（109）還包括至少一個視覺相機（123），以檢查測試板上的至少一個接觸器針（125）位置，以計算所述晶粒的針和接觸器針之間的偏移，以利在兩組針之間對齊位置。The hard docking test system (105) includes at least one test location (109) and at least one test arm (111). The test arm (111) usually picks up the die to the test position for electrical testing. After the test is completed, the die is placed in a template (not shown in the figure), and then the unit transport arm (not shown in the figure) is picked up and placed in the buffer cavity. Referring to FIG. 3, the test position (109) further includes at least one vision camera (123) to check the position of at least one contactor pin (125) on the test board to calculate the needle and contactor of the die Needle offset to facilitate alignment between the two sets of needles.

可以理解的是，在系統（101）可以進一步橋接到至少一個SMT或引線接合工位之後，以便在硬對接站（105）或拾取和捲帶系統（103）之後對晶粒執行封裝。It can be understood that after the system (101) can be further bridged to at least one SMT or wire bonding station, in order to perform packaging on the die after the hard docking station (105) or the pick and reel system (103).

請參照圖4所示，顯示了用於半導體晶粒分選和測試處理器（2）的方法的處理流程，包括以下步驟：從半導體晶圓（21）執行組裝操作，組裝操作在沒有事先執行晶圓探測的情況下完成；然後對組裝操作進行晶粒分選（22）；晶粒分類還包括對半導體晶粒（23）進行電測試和視覺檢查的步驟，電測試和視覺檢查包括硬對接測試和軟對接測試。同時，晶粒分選包括自動光學檢查。Please refer to FIG. 4, which shows the processing flow of the method for semiconductor die sorting and testing processor (2), including the following steps: the assembly operation is performed from the semiconductor wafer (21), and the assembly operation is not performed in advance Completed in the case of wafer probing; then die sorting (22) for the assembly operation; die classification also includes the steps of electrical testing and visual inspection of the semiconductor die (23), which includes hard docking Test and soft docking test. At the same time, die sorting includes automatic optical inspection.

如上所述，組裝操作包括但不限於背面研磨，塗覆，鐳射標記，鐳射切槽和切割。As mentioned above, assembly operations include but are not limited to back grinding, coating, laser marking, laser grooving, and cutting.

儘管在上面的詳細描述中公開了本新型的較佳實施例及其優點，但是本新型並不限於此，而是僅由所附權利要求的範圍限制。Although the preferred embodiments of the present invention and their advantages are disclosed in the above detailed description, the present invention is not limited thereto, but only by the scope of the appended claims.

（101）‧‧‧半導體晶粒分選和測試處理器 （103）‧‧‧拾取和捲帶系統 （105）‧‧‧硬對接測試系統 （107）‧‧‧轉盤 （109）‧‧‧測試位置 （111）‧‧‧測試臂 （113）‧‧‧橋接系統 （117）‧‧‧輸入站 （118）‧‧‧晶粒對準站 （119）‧‧‧晶粒物理檢查站 （120）‧‧‧具有視覺檢查站的單元對準模組 （121）‧‧‧捲帶和捲軸站 （123）‧‧‧視覺相機 （125）‧‧‧接觸器針 （2）‧‧‧半導體晶粒分選和測試處理器 （21）‧‧‧從半導體晶圓進行組裝操作 （22）‧‧‧對該組裝操作進行晶粒分類 （23）‧‧‧對晶粒進行電氣測試和視覺檢測(101) ‧‧‧ Semiconductor die sorting and testing processor (103) ‧‧‧ Picking and reeling system (105) ‧‧‧ Hard docking test system (107) ‧‧‧ turntable (109) ‧‧‧ test location (111) ‧‧‧ test arm (113) ‧‧‧ bridge system (117) ‧‧‧ input station (118) ‧‧‧ grain alignment station (119) ‧‧‧ Grain Physical Inspection Station (120) ‧‧‧ Unit alignment module with visual inspection station (121) ‧‧‧ Tape and reel station （123）‧‧‧vision camera (125) ‧‧‧ contactor pin (2) ‧‧‧ Semiconductor die sorting and testing processor (21) ‧‧‧ Assembly operations from semiconductor wafers (22) ‧‧‧ grain classification of the assembly operation （23）‧‧‧Electrical test and visual inspection of die

圖1顯示佈置在測試操作處的本新型的方塊圖，該測試操作能夠執行多個半導體晶粒測試(例如電測試、硬對接測試)、AOI(自動光學檢查)以及捲帶和捲盤。 圖2顯示包括拾取和捲帶系統、硬對接測試系統和橋接系統之本新型實施例的結構圖。 圖3為本新型實施例測試現場的部件圖，以在接觸器針和晶粒針之間執行對準。 圖4為本新型實施例的方法處理流程圖。 圖5顯示先前技術。 FIG. 1 shows a block diagram of the present invention arranged at a test operation capable of performing multiple semiconductor die tests (eg, electrical tests, hard docking tests), AOI (Automatic Optical Inspection), and tape and reel. FIG. 2 shows a structural diagram of the new embodiment of the invention including a pick-up and reel system, a hard docking test system, and a bridge system. FIG. 3 is a component diagram of the test site of the new embodiment to perform alignment between the contactor pin and the die pin. FIG. 4 is a flowchart of method processing according to an embodiment of the present invention. Figure 5 shows the prior art.

(101)‧‧‧半導體晶粒分選和測試處理器 (101)‧‧‧Semiconductor die sorting and testing processor

(103)‧‧‧拾取和捲帶系統 (103)‧‧‧ Picking and reeling system

(105)‧‧‧硬對接測試系統 (105)‧‧‧Hard docking test system

(107)‧‧‧轉盤 (107)‧‧‧Turntable

(109)‧‧‧測試位置 (109)‧‧‧Test position

(111)‧‧‧測試臂 (111)‧‧‧Test arm

(113)‧‧‧橋接系統 (113)‧‧‧Bridge system

(117)‧‧‧輸入站 (117)‧‧‧input station

(118)‧‧‧晶粒對準站 (118)‧‧‧Die alignment station

(119)‧‧‧晶粒物理檢查站 (119)‧‧‧grain physical inspection station

(120)‧‧‧具有視覺檢查站的單元對準模組 (120)‧‧‧Unit alignment module with visual inspection station

(121)‧‧‧捲帶和捲軸站 (121)‧‧‧Tape and reel station

Claims (6)

一種用於半導體晶粒分選和測試處理器的系統（101），包括： 至少一個拾取和捲帶系統（103），包括至少一個轉盤(107)具有至少一個工作站和至少一個覆晶； 其特徵在於： 所述系統（101）還包括至少一個硬對接測試系統（105）； 所述硬對接測試系統（105）包括至少一個測試位置（109）和至少一個測試臂（111）；以及 所述系統（101）還包括至少一個橋接系統（113），用於在所述拾取和捲帶系統（103）與硬對接測試系統（105）之間來回傳送所述晶粒。 A system (101) for semiconductor die sorting and testing processors, including: At least one pickup and reel system (103), including at least one turntable (107) with at least one workstation and at least one flip chip; It is characterized by: The system (101) further includes at least one hard docking test system (105); The hard docking test system (105) includes at least one test position (109) and at least one test arm (111); and The system (101) also includes at least one bridge system (113) for transferring the die back and forth between the pickup and reel system (103) and the hard docking test system (105). 如請求項1所述的用於半導體晶粒分選和測試處理器的系統（101），其中所述轉盤（107）包括至少一個輸入站（117），至少一個晶粒對準站（118），至少一個物理檢查站（119）和至少一個捲帶和捲軸站（121）。The system (101) for sorting and testing a semiconductor die according to claim 1, wherein the turntable (107) includes at least one input station (117) and at least one die alignment station (118) , At least one physical inspection station (119) and at least one tape and reel station (121). 如請求項1所述的用於半導體晶粒分選和測試處理器的系統（101），其中所述轉盤（107）包括至少一個輸入站（117），至少一個晶粒對準站（118），至少一個晶粒物理檢查站（119），至少一個捲帶和捲軸站（121）和至少一個鐳射標記站。The system (101) for sorting and testing a semiconductor die according to claim 1, wherein the turntable (107) includes at least one input station (117) and at least one die alignment station (118) , At least one grain physical inspection station (119), at least one tape and reel station (121) and at least one laser marking station. 如請求項2或3所述的用於半導體晶粒分選和測試處理器的系統（101），其中所述輸入站（117）使用至少一個拾取頭從至少一個捲軸接收晶粒，或使用至少一個覆晶從至少一個晶圓接收晶粒。The system (101) for sorting and testing a semiconductor die according to claim 2 or 3, wherein the input station (117) receives die from at least one reel using at least one pick-up head, or uses at least one One flip chip receives die from at least one wafer. 如請求項1所述的用於半導體晶粒分選和測試處理器的系統（101），其中所述轉盤（107）包括多個拾取頭，至少一個直接驅動旋轉馬達，至少一個旋轉刀片和至少一個垂直運動推動器，其中所述拾取頭放置在所述旋轉刀片的圓周上。The system (101) for sorting and testing a semiconductor die according to claim 1, wherein the turntable (107) includes a plurality of pickup heads, at least one direct drive rotary motor, at least one rotary blade, and at least A vertical motion pusher in which the pickup head is placed on the circumference of the rotating blade. 如請求項1所述的用於半導體晶粒分選和測試處理器的系統（101），其中所述測試位置（109）還包括至少一個視覺攝相機（123），以檢查測試板上的至少一個接觸器針（125）位置，以計算所述晶粒的針和接觸器針之間的偏移，以利在兩組針之間對齊位置。The system (101) for sorting and testing a semiconductor die according to claim 1, wherein the test location (109) further includes at least one visual camera (123) to check at least One contactor pin (125) position to calculate the offset between the die pin and the contactor pin to facilitate alignment between the two sets of pins.
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