TWM526190U - 發光式封裝結構 - Google Patents
發光式封裝結構 Download PDFInfo
- Publication number
- TWM526190U TWM526190U TW105205378U TW105205378U TWM526190U TW M526190 U TWM526190 U TW M526190U TW 105205378 U TW105205378 U TW 105205378U TW 105205378 U TW105205378 U TW 105205378U TW M526190 U TWM526190 U TW M526190U
- Authority
- TW
- Taiwan
- Prior art keywords
- package structure
- light
- illuminating
- lead
- emitting
- Prior art date
Links
- 238000005538 encapsulation Methods 0.000 claims description 11
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 10
- 239000000843 powder Substances 0.000 claims description 5
- 229910000679 solder Inorganic materials 0.000 description 17
- 230000000694 effects Effects 0.000 description 7
- 239000013078 crystal Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 6
- 230000008569 process Effects 0.000 description 6
- 239000003822 epoxy resin Substances 0.000 description 5
- 230000017525 heat dissipation Effects 0.000 description 5
- 229920000647 polyepoxide Polymers 0.000 description 5
- 229920001296 polysiloxane Polymers 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 229920006336 epoxy molding compound Polymers 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 239000012943 hotmelt Substances 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/50—Wavelength conversion elements
- H01L33/501—Wavelength conversion elements characterised by the materials, e.g. binder
- H01L33/502—Wavelength conversion materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
- H01L33/56—Materials, e.g. epoxy or silicone resin
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
- H01L33/60—Reflective elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Description
本創作係有關一種封裝結構,尤指一種發光式封裝結構。
隨著電子產業的蓬勃發展,電子產品在型態上趨於輕薄短小,在功能上則逐漸邁入高性能、高功能、高速度化的研發方向,其中,發光二極體(Light Emitting Diode,簡稱LED)因具有壽命長、體積小、高耐震性及耗電量低等優點,故廣泛地應用於照光需求之電子產品中,因此,於工業上、各種電子產品、生活家電之應用日趨普及。
一般發光二極體分為垂直(vertical)型、面朝上(face up)型、覆晶(flip chip)型,其中,該垂直型LED的兩電極分別位於相對之出光側(即主要射出光線之側)與接置側(即結合至承載件之側),面朝上型LED的兩電極均位於出光側,覆晶型LED的兩電極均位於接置側。
第1A圖係揭示一種傳統面朝上型LED封裝結構1之剖面示意圖。如第1A圖所示,該LED封裝結構1係包括:一導線架10、一發光二極體晶片11、一反射件12以及一矽膠13。
所述之導線架10係具有複數導腳10a,10b,且該發光
二極體晶片11設於其中一導腳10b上。
所述之發光二極體晶片11係具有相對之出光側11a與接置側11b,該出光側11a具有電極110,以藉由焊線15打線連接至該導腳10a上,且該發光二極體晶片11以其接置側11b藉由結合層14(如黏膠)結合至該導腳10b上。
所述之反射件12係嵌設該導線架10,並於上側圍繞該發光二極體晶片11而呈碗狀,以供該發光二極體晶片11利用該反射件12之斜面12a朝上(如圖所示之箭頭)發出光線,且該些導腳10a,10b延伸突出該反射件12下側。
所述之矽膠13係形成於該反射件12之碗狀中以包覆該發光二極體晶片11與焊線15,其中,該矽膠13表面設有螢光層(圖略)、或者該矽膠13中混合有螢光粉。
然而,傳統LED封裝結構1中,該導線架10的熱傳導路徑長及熱阻大,且厚度極厚(約0.2mm),故該LED封裝結構1之散熱效果不佳,且不利於微小化之需求。
第1B圖係揭示一種習知EMC(Epoxy Molding Compound)面朝上型LED封裝結構1’之剖面示意圖。如第1B圖所示,該LED封裝結構1’係包括:一導線架10’、一發光二極體晶片11、一反射件12以及一環氧樹脂(Epoxy)13’。
所述之導線架10’係具有一置晶墊100及一導腳101,且該發光二極體晶片11設於該置晶墊100上。
所述之發光二極體晶片11係具有相對之出光側11a與接置側11b,該出光側11a具有電極110,以藉由焊線15
打線連接至該導腳101上,且該發光二極體晶片11以其接置側11b藉由結合層14(如黏膠)結合至該置晶墊100上,其中,該置晶墊100承載整個發光二極體晶片11,故該置晶墊100之版面面積係大於該導腳101之版面面積,如第1B’圖所示。
所述之反射件12係設於該導線架10’之上、下側,並於上側圍繞該發光二極體晶片11而呈碗狀,以供該發光二極體晶片11利用該反射件12之斜面12a朝上(如圖所示之箭頭)發出光線,且於下側露出該置晶墊100之下表面與該導腳101之下表面。
所述之環氧樹脂13’係形成於該反射件12之碗狀中以包覆該發光二極體晶片11與焊線15,其中,該環氧樹脂13’表面設有螢光層(圖略)、或者該環氧樹脂13’中混合有螢光粉。
然而,習知LED封裝結構1’中,該發光二極體晶片11僅設於該置晶墊100上,故該置晶墊100之載重與應力均大於該導腳101之載重與應力,致使應力分佈不平均,導致後續利用表面貼焊技術(Surface Mount Technology,簡稱SMT)製程,將該LED封裝結構1’設於電路板(圖略)上之過程中,結合於該置晶墊100下側與該導腳101下側之焊錫(圖略)容易產生共面性(coplanarity)不良,因而使該LED封裝結構1’傾斜設置於該電路板上。
再者,因該置晶墊100之矩形版面面積係大於該導腳101之矩形版面面積,故於後續進行SMT製程時,結合於
該置晶墊100下側之焊錫之體積會大於結合於該導腳101下側之焊錫之體積,導致該些焊錫之體積及高度之差距大,致使該些焊錫亦容易產生共面性不良,因而使該LED封裝結構1’傾斜設置於該電路板上。
又,該導線架10’的厚度也很厚,致使該置晶墊100與該導腳101之間的距離亦難以縮小,故不利於微小化之需求。
因此,如何克服習知技術中之種種問題,實已成目前亟欲解決的課題。
鑑於上述習知技術之缺失,本創作提供一種發光式封裝結構,係包括:導線架,係具有兩導腳,且該兩導腳之間具有縫隙;發光元件,係具有相對之出光側與接置側,其中該接置側跨越該縫隙而結合至該兩導腳上;以及複數導電元件,係連接該發光元件與該導腳。
前述之發光式封裝結構中,該兩導腳之版面面積係相同。
前述之發光式封裝結構中,該兩導腳之版面形狀係相同。
前述之發光式封裝結構中,該出光側具有複數電極。
前述之發光式封裝結構中,該接置側具有複數電極。
前述之發光式封裝結構中,該導電元件係為焊線。例如,該些焊線係連接對向之該導腳。
前述之發光式封裝結構中,復包括設於該導線架上並
圍繞該發光元件之反射件。
前述之發光式封裝結構中,復包括包覆該發光元件與該些焊線之封裝層。
前述之發光式封裝結構中,復包括設於該封裝層上之螢光層,亦或該封裝層中含有螢光粉。
前述之發光式封裝結構中,該發光元件之表面具有螢光層。
前述之發光式封裝結構中,復包括結合該導線架之絕緣層,且令該導線架之部分表面外露於該絕緣層。
由上可知,本創作之發光式封裝結構,主要藉由將該發光元件之接置側結合至該兩導腳上,使該兩導腳均承受該發光元件之重量與應力,以平均分佈應力,故相較於習知技術,於後續SMT製程中,結合於該兩導腳下側之焊錫之共面性良好,因而能避免該發光式封裝結構於電路板上發生傾斜或墓碑效應(Tombstoning)之問題。所謂之墓碑效應係為元件兩端之金屬接點與板面焊墊之間在焊錫性上可能有差異存在或兩端散熱的速率不同,導致焊錫的固化速率不同,故當經紅外線或熱熔焊後,會出現一端焊牢而另一端被拉起的現象。
再者,該兩導腳之版面面積係相同或接近,故於後續進行SMT製程時,結合於該兩導腳下側之焊錫之體積及高度大致相同,使該些焊錫之共面性良好,因而能避免該發光式封裝結構於電路板上發生傾斜之問題。
又,本創作之導線架的熱傳導路徑極短及熱阻極小,
且厚度極薄,故該發光式封裝結構之散熱效果極佳,且符合微小化之需求。
另外,本創作之發光元件因跨設於該兩導腳上,使該發光元件較容易設於該發光式封裝結構之中間處,故對於該出光側之上方,該發光元件之出光側所發出之光線能均勻分佈,使該發光式封裝結構之光形較佳。
1,1’‧‧‧LED封裝結構
10,10’,20‧‧‧導線架
100‧‧‧置晶墊
10a,10b,101,200,201‧‧‧導腳
11‧‧‧發光二極體晶片
11a,21a,31a‧‧‧出光側
11b,21b,31b‧‧‧接置側
110,210,310‧‧‧電極
12‧‧‧反射件
12a‧‧‧斜面
13‧‧‧矽膠
13’‧‧‧環氧樹脂
14,24‧‧‧結合層
15‧‧‧焊線
2,2’,3,3’‧‧‧發光式封裝結構
202‧‧‧縫隙
21,31‧‧‧發光元件
22,22’‧‧‧絕緣層
220‧‧‧開孔
23,23’‧‧‧封裝層
25,35‧‧‧導電元件
t‧‧‧寬度
第1A圖係為習知LED封裝結構之剖面示意圖;第1B圖係為另一習知LED封裝結構之剖面示意圖;第1B’圖係為第1B圖之LED封裝結構之導線架之下視圖;第2A圖係為本創作之發光式封裝結構之第一實施例的剖面示意圖;第2A’圖係為本創作之發光式封裝結構之導線架的下視圖;第2B圖係為第2A圖之另一實施例;第3圖係為本創作之發光式封裝結構之第二實施例的剖面示意圖;以及第3’圖係為第3圖之另一實施例。
以下藉由特定的具體實施例說明本創作之實施方式,熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本創作之其他優點及功效。
須知,本說明書所附圖式所繪示之結構、比例、大小
等,均僅用以配合說明書所揭示之內容,以供熟悉此技藝之人士之瞭解與閱讀,並非用以限定本創作可實施之限定條件,故不具技術上之實質意義,任何結構之修飾、比例關係之改變或大小之調整,在不影響本創作所能產生之功效及所能達成之目的下,均應仍落在本創作所揭示之技術內容得能涵蓋之範圍內。同時,本說明書中所引用之如“上”及“一”等之用語,亦僅為便於敘述之明瞭,而非用以限定本創作可實施之範圍,其相對關係之改變或調整,在無實質變更技術內容下,當亦視為本創作可實施之範疇。
第2A圖係為本創作之發光式封裝結構2之第一實施例的剖面示意圖。如第2A圖所示,該發光式封裝結構2係包括:一導線架20、一發光元件21、複數導電元件25以及一封裝層23。
所述之導線架20係具有兩相互分離設置之導腳200,201,且該兩導腳200,201係為片狀,兩者之版面面積相同或接近,亦即該兩導腳200,201之版面面積可相同或不相同。
於本實施例中,該兩導腳200,201之版面形狀相同或接近,如矩形,且該兩導腳200,201之間具有一縫隙202。
所述之發光元件21係為水平式的面朝上(face up)型LED,其具有相對之出光側21a與接置側21b,該接置側21b藉由結合層24(如黏膠)結合至該兩導腳200,201上,且該出光側21a具有兩電極210。
於本實施例中,該發光元件21係為LED晶粒或已封裝之LED封裝件(如已將螢光層塗佈於晶片表面之LED,俗稱White chip),且該發光元件21之接置側21b跨越該兩導腳200,201間之縫隙202而結合至該兩導腳200,201上。
所述之導電元件25係為焊線,具有相對之兩端接點,且單一焊線之兩端接點係分別連接該電極210與該導腳200,201。
於本實施例中,該些焊線係連接同向之導腳200,201,即左邊焊線連接左邊導腳201。於其它實施例中,該些焊線亦可連接對向之導腳200,201,即左邊焊線連接右邊導腳200,使各該焊線係相互交錯跨設但並未不會相互接觸。
所述之封裝層23係形成於該導線架20上以包覆該發光元件21與該些導電元件25。
於本實施例中,該封裝層23表面可設具有螢光層(圖略);或者,可將螢光層(圖略)塗佈於該發光元件21之表面上。於其它實施例中,如第2B圖所示之發光式封裝結構2’,可於該封裝層23’中混合有螢光粉。
再者,該封裝層23之輪廓形狀可為矩形(如第2A圖所示)、弧形(如鏡面)或其它形狀等,並無特別限制。
所述之發光式封裝結構2復包括一結合該導線架20之絕緣層22,且令該導線架20之部分表面外露於該絕緣層22。
於本實施例中,該絕緣層22係為防焊層(solder mask),其設於該導線架20下側,且具有複數開孔220,以
令各該導腳200,201之部分下表面外露於各該開孔220,俾供結合焊錫(圖略)。因此,該絕緣層22之開孔220能控制各該導腳200,201之外露面積。
於另一實施例中,如第2B圖所示之發光式封裝結構2’,該絕緣層22可設於該導線架20上側,且具有複數開孔220,以令各該導腳200,201之部分上表面外露於各該開孔220,俾供結合該些導電元件25,而各該導腳200,201之下表面外露於該封裝層23’以結合焊錫(圖略)。
於另一實施例中,所述之發光式封裝結構2,2’復包括一反射件(可參考第1A及1B圖所示之反射件12),其設於該導線架20上側並圍繞該發光元件21而呈碗狀結構,使該發光元件21利用該反射件之斜面朝上發出光線。
另外,本創作之發光元件21係為打線式,其成本低,且該發光元件21之接置側21b接觸該兩導腳200,201之面積越多,則散熱效果越好,故該縫隙202之寬度t越小越好,如第2A’圖所示。
第3圖係為本創作之發光式封裝結構3之第二實施例的剖面示意圖。本實施例與第一實施例之差異在於發光元件之種類,其它結構大致相同,故以下僅說明相異處,而不再贅述相同處。
如第3圖所示,依據第2A圖之結構改變,即該發光元件31係為覆晶型LED,其具有相對之出光側31a與接置側31b,該接置側31b具有兩電極310,以令該接置側31b之電極310藉由導電元件35結合至該兩導腳200,201上。
於本實施例中,該導電元件35係為焊錫、共晶接合結構、銀膠、導電膠或其它導電材料等,並無特別限制。
再者,應可理解地,如第3’圖所示之發光式封裝結構3’,亦可將第2B圖之發光元件與導電元件改為如第3圖所示之發光元件31與導電元件35。
綜上所述,本創作之發光式封裝結構2,2’,3,3’,主要藉由將該發光元件21,31之接置側21b,31b結合至該兩導腳200,201上,使該兩導腳200,201同時承受該發光元件21,31之重量與應力,以平均分佈應力,故於後續SMT製程中,結合於該兩導腳200,201下側之焊錫(圖略)之共面性良好,因而能避免該發光式封裝結構2,2’,3,3’於電路板上發生傾斜或墓碑效應(Tombstoning)之問題。
再者,由於該兩導腳200,201之版面面積相同,故於後續進行SMT製程時,結合於該兩導腳200,201下側之焊錫(圖略)之體積及高度大致相同,因而該些焊錫之共面性良好,進而能避免該發光式封裝結構2,2’,3,3’於電路板上發生傾斜之問題。
又,該導線架20的導腳200,201係為矩形片,因而熱傳導路徑極短及熱阻極小,且厚度極薄(約0.045mm),故該發光式封裝結構2,2’,3,3’之散熱效果極佳,且符合微小化之需求。
另外,本創作之發光元件21,31因跨設於該兩導腳200,201上,使該發光元件21,31較容易設於該發光式封裝結構2,2’,3,3’之中間處,故對於該出光側31a之上方,
該發光元件21,31之出光側31a所發出之光線能均勻分佈,使該發光式封裝結構2,2’,3,3’之光形較佳。
上述實施例係用以例示性說明本創作之原理及其功效,而非用於限制本創作。任何熟習此項技藝之人士均可在不違背本創作之精神及範疇下,對上述實施例進行修改。因此本創作之權利保護範圍,應如後述之申請專利範圍所列。
2‧‧‧發光式封裝結構
20‧‧‧導線架
200,201‧‧‧導腳
202‧‧‧縫隙
21‧‧‧發光元件
21a‧‧‧出光側
21b‧‧‧接置側
210‧‧‧電極
22‧‧‧絕緣層
220‧‧‧開孔
23‧‧‧封裝層
24‧‧‧結合層
25‧‧‧導電元件
Claims (13)
- 一種發光式封裝結構,係包括:導線架,係具有兩導腳,且該兩導腳之間具有縫隙;發光元件,係具有相對之出光側與接置側,其中該接置側跨越該縫隙而結合至該兩導腳上;以及複數導電元件,係連接該發光元件與該導腳。
- 如申請專利範圍第1項所述之發光式封裝結構,其中,該兩導腳之版面面積係相同。
- 如申請專利範圍第1項所述之發光式封裝結構,其中,該兩導腳之版面形狀係相同。
- 如申請專利範圍第1項所述之發光式封裝結構,其中,該出光側具有複數電極。
- 如申請專利範圍第1項所述之發光式封裝結構,其中,該接置側具有複數電極。
- 如申請專利範圍第1項所述之發光式封裝結構,其中,該導電元件係為焊線。
- 如申請專利範圍第6項所述之發光式封裝結構,其中,該些焊線係連接對向之該導腳。
- 如申請專利範圍第1項所述之發光式封裝結構,復包括設於該導線架上並圍繞該發光元件之反射件。
- 如申請專利範圍第1項所述之發光式封裝結構,復包括包覆該發光元件與該些導電元件之封裝層。
- 如申請專利範圍第9項所述之發光式封裝結構,復包括設於該封裝層上之螢光層。
- 如申請專利範圍第9項所述之發光式封裝結構,其中,該封裝層中含有螢光粉。
- 如申請專利範圍第1項所述之發光式封裝結構,其中,該發光元件之表面具有螢光層。
- 如申請專利範圍第1項所述之發光式封裝結構,復包括結合該導線架之絕緣層,且令該導線架之部分表面外露於該絕緣層。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW105205378U TWM526190U (zh) | 2016-04-18 | 2016-04-18 | 發光式封裝結構 |
CN201620393819.3U CN205595374U (zh) | 2016-04-18 | 2016-05-04 | 发光式封装结构 |
US15/200,650 US20170301842A1 (en) | 2016-04-18 | 2016-07-01 | Light emitting package structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW105205378U TWM526190U (zh) | 2016-04-18 | 2016-04-18 | 發光式封裝結構 |
Publications (1)
Publication Number | Publication Date |
---|---|
TWM526190U true TWM526190U (zh) | 2016-07-21 |
Family
ID=56932208
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW105205378U TWM526190U (zh) | 2016-04-18 | 2016-04-18 | 發光式封裝結構 |
Country Status (3)
Country | Link |
---|---|
US (1) | US20170301842A1 (zh) |
CN (1) | CN205595374U (zh) |
TW (1) | TWM526190U (zh) |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWM475024U (zh) * | 2013-12-12 | 2014-03-21 | Lee-Sheng Yen | 可發光式封裝件及其承載結構 |
-
2016
- 2016-04-18 TW TW105205378U patent/TWM526190U/zh unknown
- 2016-05-04 CN CN201620393819.3U patent/CN205595374U/zh active Active
- 2016-07-01 US US15/200,650 patent/US20170301842A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US20170301842A1 (en) | 2017-10-19 |
CN205595374U (zh) | 2016-09-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11411152B2 (en) | Packaging photon building blocks with top side connections and interconnect structure | |
US11145799B2 (en) | LED module having LED chips as light source | |
US8115106B2 (en) | Surface mount device | |
WO2015010554A1 (zh) | 发光二极管显示屏 | |
JP2011061170A (ja) | 放熱効果を高め発光効率を向上させることができる発光ダイオードのパッケージ構造とその製作方法 | |
US9537019B2 (en) | Semiconductor device | |
JP2006303396A (ja) | 表面実装型発光装置 | |
CN107785474A (zh) | 发光二极管元件装置与其制作方法 | |
JP2013115368A (ja) | Ledモジュール | |
TWI593141B (zh) | 封裝結構之製法 | |
TW201532316A (zh) | 封裝結構及其製法 | |
TWM526190U (zh) | 發光式封裝結構 | |
JP2009177188A (ja) | 発光ダイオードパッケージ | |
TW201336114A (zh) | 半導體封裝件及其製法 | |
CN210156422U (zh) | Led支架及led灯珠 | |
JP6650480B2 (ja) | 発光素子モジュール | |
JP6321122B2 (ja) | Ledモジュール | |
KR20090010621A (ko) | 발광소자 패키지 및 발광소자의 패키지 기판 | |
TWI397990B (zh) | 發光二極體模組及發光二極體燈具 | |
TWM504421U (zh) | 直接接受交流電之發光二極體封裝元件 | |
TWI544664B (zh) | 發光式封裝結構及其製法 | |
TW202207493A (zh) | 可側發光的發光二極體封裝結構 | |
TW202205693A (zh) | 具有雙面膠體的發光二極體封裝結構 | |
KR101299587B1 (ko) | 엘이디 조명장치 | |
TWM511015U (zh) | 發光結構 |