M439903 _ r- 第101207140號專利申請案 101年8月i曰修正替換頁 . 五、新型說明： ---- 【新型所屬之技術領域】 纟創作係有關—種封裝結構，尤其是指-種具發光元 件之封裝結構。 【先前技術】 隨著電子產業的蓬勃發展，電子產品在型態上趨於輕 薄短小，在功能上則逐漸邁入高性能、高功能、高速度化 的研發方向其中，發光一極體（Light-Emitting Diode, • LED)因具有壽命長、體積小、高耐震性及耗電量低等優點， 故廣泛地應用於照光需求之電子產品中。 早期LED封裝結構中，係使用一般銅箔印刷電路板 (FR4 )作為承載LED晶片之基板，因銅箔印刷電路板之散 熱效果不佳，故需於該銅箔印刷電路板上增設散熱孔以提 升散熱功能。然而，隨著高功率LED晶片之發展，傳統之 銅箔印刷電路板已無法滿足高功率LED晶片之散熱需求。 鲁 因此，遂發展出一種金屬核心印刷電路板（Metal Core PCB，MCPCB)作為基板’藉由其高散熱之特性，以滿足高 功率LED晶片之散熱需求；其中，該MCPCB係由一散熱層 (鋁材）、一絕緣層及一線路層（鋼箔）所構成^再者， 為了提高散熱效率’係採用晶片直接接置（Chip On Board, COB)之方式，使LED晶片至基板之散熱路徑更短，令該 LED晶片由工作中產生的熱能可有效傳遞至散熱層。 請參閱第1圖’係為習知具有LED晶片之封裝結構之 剖面示意圖，係將LED晶片以COB方式設於MCPCB上。 3 M439903 - 第101207140號專利申請案 101年8月3日修正替換頁 如第1圖所示，習知封裝結構1之製法係包括：提供 一金屬核心印刷電路板（MCPCB)作為基板la，該基板la 具有一散熱層14、一絕緣層13及一線路層1〇，該線路層 10上係具有複數電性接觸墊1〇〇與置晶墊1〇1。接著，將 一發光一極體晶片11設於各該置晶墊1〇1上，且該發光二 極體晶片11藉由導線110電性連接該電性接觸墊100。之 後，於該線路層1〇上形成含螢光劑之封裝膠體12，以包 覆該發光二極體晶片11與導線11〇。 惟，習知封裝結構1中，因採用金屬核心印刷電路板 (MCPCB)作為基板ia，故於兩層金屬層（散熱層μ與線 路層10)之間具有該絕緣層13以作為電性阻隔之用，而 該絕緣層13之散熱特性一般而言並不好，因而導致該發光 二極體晶片11之散熱效率難以提升。 因此’如何克服上述習知技術之問題，實已成目前亟 欲解決的課題。 【新型内容】 鑑於上述習知技術之缺失，本創作係提供一種能解決 C0B式LED封裝結構之散熱問題，其技術手段係直接利用 一厚度較厚之金屬層，使其外露並作為線路及供散熱之 用’以避免絕緣層阻礙散熱，故可降低LEI)晶片之散熱路 徑之熱阻，而提升LED晶片之散熱效率。 因此’本創作之封裝結構包括：具有相對之第一表面 與第一表面之線路層、設於該第一表面上且電性連接該線 路層之發光二極體晶片、以及包覆該發光二極體晶片之封 M439903 第101207140號專利f請案 101年8月$曰修正替換頁 裝膠體，其中，該線路層之第二表面上未結合絕緣層。 【實施方式】 以下藉由特定的具體實施例說明本創作之實施方式， 熟悉此技藝之人士可由本說明書所揭示之内容輕易地瞭解 本創作之其他優點及功效。 須知，本說明書所附圖式所繪示之結構、比例、大小 等，均僅用以配合說明書所揭示之内容，以供熟悉此技藝 之人士之瞭解與閱讀，並非用以限定本創作可實施之限定 • 條件，故不具技術上之實質意義，任何結構之修飾、比例 關係之改變或大小之調整，在不影響本創作所能產生之功 效及所能達成之目的下，均應仍落在本創作所揭示之技術 内容得能涵蓋之範圍内。同時，本說明書中所引用之如 ‘‘上，、‘‘下，’及‘‘一，’等之用語，亦僅為便於敘述之明瞭，而 非用以限定本創作可實施之範圍，其相對關係之改變或調 整，在無實質變更技術内容下，當亦視為本創作可實施之 範疇。 請參閱第2A至2E圖，係為本創作之封裝結構2之製 法之剖視示意圖。 如第2A圖所示，提供一金屬板2a，且該金屬板2a上 具有複數電性接觸墊200與複數置晶墊201。 於本實施例中，該金屬板2a之材質係為鋁、銅等，但 並無特別限制。 如第2B圖所示，於各該置晶墊201上設置一發光二極 體晶片21，且該發光二極體晶片21藉由導線210電性連 5 M439903 第101207140號專利申請案 101年8月b日修正替換頁 接該電性接觸墊200。 於本實施例中，該些電性接觸墊200係作為打線墊， 而於其它實施例中，該些電性接觸墊亦可設計為覆晶焊墊 之形態（未圖示），以供覆晶方式接置該發光二極體晶片 之用。 如第2C圖所示，於該金屬板2a上形成封裝膠體22， 以包覆該發光二極體晶片21、導線210、電性接觸墊200 與置晶墊201。 於本實施例中，該封裝膠體22係包含螢光劑，如釔鋁 石榴石（YsAhOaCe，YAG)螢光粉，但不限於此種成分。 如第2D及2D’圖所示，進行圖案化製程，藉由蝕刻該 金屬板2a，以形成一圖案化線路層20。 於本實施例中，該線路層20係具有相對之第一表面 20a (圖中之上表面）與第二表面20b (圖中之下表面）、 及相鄰該第一與第二表面20a, 20b之側面20c。是以，該 封裝膠體22與該線路層20第一表面20a共平面，且該線 路層20凸出並外露出該封裝膠體22部分底面。 如第2E圖所示，於該線路層20之第二表面20b與側 面20c上形成表面處理層23，以防止氧化。其中，亦可選 擇性地於第2A圖之製程中，於該電性接觸墊200與置晶墊 201上形成表面處理層23，以防止氧化。 於本實施例中，形成該表面處理層23之材質係為電鍍 錄/金、化學鍍錄/金、化錄浸金（ΕΝIG)、化鎳纪浸金 (ENEPIG)、化學鍍錫（Immersion Tin)或有機保焊劑（0SP) M439903 第101207140號專利申請案 101年8月.3曰修正替換頁 之其中一者。 本創作之封裝結構2係包括：一線路層20、電性連接 該線路層20之發光二極體晶片21、以及形成於該線路層 20上之封裝膠體22。 所述之線路層20係具有相對之第一表面20a與第二表 面20b、及相鄰該第一與第二表面20a，20b之側面20c，該 線路層20之第一表面20a上具有複數電性接觸墊200與至 少一置晶墊201，且該線路層20之第二表面20b上未結合 • 絕緣層或散熱件。 所述之發光二極體晶片21係設置於該置晶墊201上且 電性連接該電性接觸墊200。於本實施例中，該發光二極 體晶片21係以打線方式電性連接該線路層20，而於其它 實施例中，該發光二極體晶片亦可以覆晶方式電性連接該 線路層。 所述之封裝膠體22係形成於該線路層20之第一表面 $ 20a上，以包覆該發光二極體晶片21，其中，該封裝膠體 22與該線路層20第一表面20a共平面，且該線路層20之 第二表面20b凸出並外露出該封裝膠體22部分底面。又該 封裝膠體22係包含螢光劑。 所述之封裝結構2復包括表面處理層23,係形成於該 線路層20之第二表面20b與侧面20c上，亦可選擇性地形 成於該電性接觸墊200與置晶墊201上。 综上所述，本創作之封裝結構，主要藉由直接固接於 金屬板上可省略製程步驟，並可提高散熱效率。 7 M439903 第101207140號專利申請案 101年8月^日修正替換頁 上述實施例係用以例示性說明本創作之原理及其功 效，而非用於限制本創作。任何熟習此項技藝之人士均可 在不違背本創作之精神及範疇下，對上述實施例進行修 改。因此本創作之權利保護範圍，應如後述之申請專利範 圍所列。 【圖式簡單說明】 第1圖係為習知封裝結構之剖視示意圖；以及 第2A至2E圖係為本創作封裝結構之製法的剖視示意 圖；其中，第2D’圖係為第2D圖之上視圖。 【主要元件符號說明】 I, 2 封裝結構 la 基板 10,20 線路層 100.200 電性接觸墊 101.201 置晶墊 II, 21 發光二極體晶片 110,210 導線 12,22 封裝膠體 13 絕緣層 14 散熱層 2a 金屬板 20a 第一表面 20b 第二表面 20c 側面 23 表面處理層M439903 _ r- Patent Application No. 101207140 August 101 i曰 Amendment Replacement Page. V. New Description: ---- 【New Technical Fields 纟 有关 纟 纟 — — — — — — — — — — — — — 封装A package structure with a light-emitting element. [Prior Art] With the booming development of the electronics industry, electronic products tend to be light, thin, and short in terms of their functions. In terms of functions, they are gradually entering the high-performance, high-function, high-speed research and development direction. -Emitting Diode, • LED) is widely used in electronic products that require illumination because of its long life, small size, high shock resistance and low power consumption. In the early LED package structure, a general copper foil printed circuit board (FR4) was used as a substrate for carrying LED chips. Since the heat dissipation effect of the copper foil printed circuit board is not good, it is necessary to add a heat dissipation hole to the copper foil printed circuit board. Improve heat dissipation. However, with the development of high-power LED chips, conventional copper foil printed circuit boards have been unable to meet the heat dissipation requirements of high-power LED chips. Therefore, 遂 developed a metal core printed circuit board (MCPCB) as the substrate 'to meet the heat dissipation requirements of high-power LED chips by its high heat dissipation characteristics; wherein the MCPCB is composed of a heat dissipation layer ( Aluminum material, an insulating layer and a circuit layer (steel foil), in order to improve the heat dissipation efficiency, the chip is transferred to the substrate by means of chip on board (COB). Shorter, the LED chip can be effectively transferred to the heat dissipation layer by the thermal energy generated during the operation. Referring to Fig. 1 which is a schematic cross-sectional view showing a conventional package structure having an LED chip, the LED chip is disposed on the MCPCB in a COB manner. 3 M439903 - Patent Application No. 101207140, filed on August 3, 2011, the entire disclosure of which is shown in FIG. 1 , the conventional packaging structure 1 includes a metal core printed circuit board (MCPCB) as a substrate la, The substrate la has a heat dissipation layer 14, an insulation layer 13, and a circuit layer 1B. The circuit layer 10 has a plurality of electrical contact pads 1 and a pad 1. Then, a light-emitting diode chip 11 is disposed on each of the crystal pads 1〇1, and the light-emitting diode wafer 11 is electrically connected to the electrical contact pads 100 by wires 110. Thereafter, a phosphor-containing encapsulant 12 is formed on the wiring layer 1 to cover the LED wafer 11 and the wiring 11 〇. However, in the conventional package structure 1, since the metal core printed circuit board (MCPCB) is used as the substrate ia, the insulating layer 13 is provided between the two metal layers (the heat dissipation layer μ and the wiring layer 10) as an electrical barrier. The heat dissipation characteristics of the insulating layer 13 are generally not good, and thus the heat dissipation efficiency of the LED chip 11 is difficult to increase. Therefore, how to overcome the above-mentioned problems of the prior art has become a problem that is currently being solved. [New content] In view of the lack of the above-mentioned prior art, the present invention provides a heat dissipation problem that can solve the C0B type LED package structure, and the technical means directly utilizes a thick metal layer to expose it and serve as a line and The purpose of heat dissipation is to prevent the insulation layer from blocking heat dissipation, thereby reducing the thermal resistance of the heat dissipation path of the LEI wafer and improving the heat dissipation efficiency of the LED chip. Therefore, the package structure of the present invention includes: a circuit layer having a first surface opposite to the first surface, a light emitting diode chip disposed on the first surface and electrically connected to the circuit layer, and the light emitting diode The sealing of the polar body wafer M439903 Patent No. 101207140, filed on August, 2011, 曰 替换 替换 替换 替换 替换 替换 替换 , , , , , , , , , , , , , , , , , , , , , , , , , [Embodiment] The embodiments of the present invention are described below by way of specific embodiments, and those skilled in the art can easily understand other advantages and effects of the present invention by the contents disclosed in the present specification. It is to be understood that the structure, the proportions, the size and the like of the drawings are only used in conjunction with the disclosure of the specification for the understanding and reading of those skilled in the art, and are not intended to limit the implementation of the present invention. The definitions and conditions are not technically meaningful. Any modification of the structure, change of the proportional relationship or adjustment of the size should remain in the interests of the creation and the purpose that can be achieved. The technical content disclosed in this creation can be covered. In the meantime, the terms used in the specification, such as '', '', '', '', '', ', ', etc., are used for convenience only, and are not intended to limit the scope of the creation. Changes or adjustments in relative relationships are considered to be within the scope of this creation if there is no material change in the material. Please refer to Figures 2A to 2E for a schematic cross-sectional view of the method of the package structure 2 of the present invention. As shown in Fig. 2A, a metal plate 2a is provided, and the metal plate 2a has a plurality of electrical contact pads 200 and a plurality of crystal pads 201 thereon. In the present embodiment, the material of the metal plate 2a is aluminum, copper, or the like, but is not particularly limited. As shown in FIG. 2B, a light-emitting diode chip 21 is disposed on each of the crystal pads 201, and the light-emitting diode chip 21 is electrically connected by a wire 210. M439903 Patent Application No. 101207140 The replacement page is attached to the electrical contact pad 200 on the month b. In the embodiment, the electrical contact pads 200 are used as the wire bonding pads. In other embodiments, the electrical contact pads may also be designed as a flip chip (not shown) for covering. The crystal mode is used to connect the light emitting diode chip. As shown in FIG. 2C, an encapsulant 22 is formed on the metal plate 2a to cover the LED chip 21, the wires 210, the electrical contact pads 200, and the pad 201. In the present embodiment, the encapsulant 22 contains a fluorescent agent such as yttrium aluminum garnet (YsAhOaCe, YAG) phosphor, but is not limited to such a component. As shown in Figs. 2D and 2D', a patterning process is performed to form a patterned wiring layer 20 by etching the metal plate 2a. In this embodiment, the circuit layer 20 has an opposite first surface 20a (the upper surface in the figure) and a second surface 20b (the lower surface in the figure), and adjacent to the first and second surfaces 20a. Side 20c of 20b. Therefore, the encapsulant 22 is coplanar with the first surface 20a of the circuit layer 20, and the circuit layer 20 protrudes and exposes a portion of the bottom surface of the encapsulant 22. As shown in Fig. 2E, a surface treatment layer 23 is formed on the second surface 20b and the side surface 20c of the wiring layer 20 to prevent oxidation. Optionally, in the process of FIG. 2A, a surface treatment layer 23 is formed on the electrical contact pad 200 and the crystal pad 201 to prevent oxidation. In the present embodiment, the material of the surface treatment layer 23 is formed by electroplating/gold, electroless plating/gold, chemical immersion gold (ΕΝIG), nickel immersion gold (ENEPIG), and electroless tin plating (Immersion Tin). ) or organic flux-preserving agent (0SP) M439903 Patent Application No. 101207140, August 2011. 3曰 Amendment of one of the pages. The package structure 2 of the present invention comprises a circuit layer 20, a light-emitting diode chip 21 electrically connected to the circuit layer 20, and an encapsulant 22 formed on the circuit layer 20. The circuit layer 20 has a first surface 20a and a second surface 20b opposite to each other, and a side surface 20c adjacent to the first and second surfaces 20a, 20b. The first surface 20a of the circuit layer 20 has a plurality of electrodes. The contact pad 200 is bonded to at least one of the pads 201, and the second surface 20b of the circuit layer 20 is unbonded with an insulating layer or a heat sink. The LED chip 21 is disposed on the crystal pad 201 and electrically connected to the electrical contact pad 200. In this embodiment, the LED chip 21 is electrically connected to the circuit layer 20 in a wire bonding manner. In other embodiments, the LED chip can be electrically connected to the circuit layer in a flip-chip manner. The encapsulant 22 is formed on the first surface $20a of the circuit layer 20 to cover the LED substrate 21, wherein the encapsulant 22 is coplanar with the first surface 20a of the circuit layer 20. And the second surface 20b of the circuit layer 20 protrudes and exposes a part of the bottom surface of the encapsulant 22. Further, the encapsulant 22 contains a fluorescent agent. The package structure 2 includes a surface treatment layer 23 formed on the second surface 20b and the side surface 20c of the circuit layer 20, and optionally formed on the electrical contact pad 200 and the crystal pad 201. In summary, the package structure of the present invention can be omitted by directly fixing to the metal plate, and the heat dissipation efficiency can be improved. 7 M439903 Patent Application No. 101207140, the entire disclosure of which is incorporated herein by reference. Anyone who is familiar with the art can modify the above embodiments without departing from the spirit and scope of the creation. Therefore, the scope of protection of this creation should be as listed in the patent application scope described later. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view showing a conventional package structure; and FIGS. 2A to 2E are schematic cross-sectional views showing a method of fabricating a package structure; wherein the 2D' diagram is a 2D diagram Above view. [Main component symbol description] I, 2 package structure la substrate 10, 20 circuit layer 100.200 electrical contact pad 101.201 crystal pad II, 21 LED chip 110, 210 wire 12, 22 encapsulant 13 insulation layer 14 heat dissipation layer 2a metal Plate 20a first surface 20b second surface 20c side 23 surface treatment layer