TWM340660U - Half-bridge llc resonant conver with self-driven synchronous rectifier - Google Patents
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- TWM340660U TWM340660U TW97207395U TW97207395U TWM340660U TW M340660 U TWM340660 U TW M340660U TW 97207395 U TW97207395 U TW 97207395U TW 97207395 U TW97207395 U TW 97207395U TW M340660 U TWM340660 U TW M340660U
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M340660 八、新型說明: 【新型所屬之技術領域】 本創作揭示一種具自驅式同步整流器之半橋LLC譜振轉換器。 - 【習知技術】 、 習知技術之電路圖式於第1圖,其中第一開關電晶體^^與第二開 關電晶體M2以半橋結構(half-bridge configuration)連接於輸入電壓源 Vin與諧振電路(resonant tank)之間;LLC諧振電路包含磁化電感上、 諧振電感4與諧振電容變壓器乃包含一組一次側線圈與二組二次 側線圈I ;第一整流二極體。與第二整流二極體D2以中央抽頭式全波 整流器結構(center_tapped fUll-wave rectifier configuration)連接於二次側 線圈从與輸出電容C。之間。 為便於說明,定義下列電路參數(circuit parameters ) : 乂為%與 • %之切換頻率;為4與Cr之諧振頻率;” =|為Tl之一次 側對二次側圈數比;K為輸出電壓;l = 為反射輪出電壓。就電路變 , 數(circuit variables)而言,與]^2之閘-源極電壓〇)與c(〇、譜振 、 電容電壓%(0、一次側電壓vj/)與二次側電壓之參考極性以及諧振 電感電流乂⑺、磁化電感電流、(〇、一次側電流/〆/)與二次側電流7力)之 參考方向亦標明於第1圖。 依據乂 </,乂 = 乂與乂 >乂之情況,C(0、e(/)、/ j)、與4) 之波形圖分別示於第2a圖、第2b圖與第2c圖。因前半週期與後半週期 M340660 之間有對稱性,故僅說明前半週期之等效電路與關鍵波形。 首先說明、/=/】、&〜與之物理意義如下:。為一個諧 振週期重新開始的時刻;從負值變成正值的時刻;^為,♦ (〇 下降至0的時刻;為〇)下降至〇的時刻。M340660 VIII. New Description: [New Technology Field] This work reveals a half-bridge LLC spectrum converter with self-driven synchronous rectifier. - [Prior Art] The circuit diagram of the prior art is shown in FIG. 1 , in which the first switching transistor ^^ and the second switching transistor M2 are connected to the input voltage source Vin in a half-bridge configuration. Between the resonant tanks; the LLC resonant circuit includes a magnetizing inductance, the resonant inductor 4 and the resonant capacitor transformer comprise a set of primary side coils and two sets of secondary side coils I; a first rectifying diode. The second rectifying diode D2 is connected to the secondary side coil slave output capacitor C in a center-tapped fUll-wave rectifier configuration. between. For convenience of explanation, the following circuit parameters are defined: 乂 is the switching frequency of % and • %; is the resonant frequency of 4 and Cr; “=| is the ratio of the primary side to the secondary side turns of Tl; K is the output Voltage; l = voltage for reflection, in terms of circuit variation, circuit variables, and gate-source voltage ]) and c (〇, spectrum, capacitor voltage % (0, primary side) The reference polarity of the voltage vj/) and the secondary side voltage and the reference direction of the resonant inductor current 乂(7), magnetizing inductor current, (〇, primary current /〆/) and secondary side current 7 are also indicated in Figure 1. According to 乂</,乂=乂 and 乂>, the waveforms of C(0, e(/), /j), and 4) are shown in Fig. 2a, Fig. 2b, and 2c, respectively. Since there is symmetry between the first half cycle and the second half cycle M340660, only the equivalent circuit and key waveforms of the first half cycle are explained. First, the physical meanings of /=/, and &~ are as follows: The moment of restarting; the moment from a negative value to a positive value; ^ is, ♦ (the time when 〇 falls to 0; 〇) falls to 〇 engraved.
無論乂<乂或乂 >乂,於之期間,M^M2皆關閉。因匕(〖)小 於〇且大於、◦,故流經地之本體二極體;0)>〇流進^之黑點 端;α〇>〇流出%之黑點端;D!導通但D2截止。4被匕箝制;未能參 加4與cr之諧振。/jL W與7;(〇皆為正弦波;、(〇之上升斜率為匕。〇1在Regardless of 乂<乂 or 乂 >乂, during this period, M^M2 is turned off. Because 匕(〖) is smaller than 〇 and larger than ◦, the body diode flowing through the ground; 0)> turbulent flow into the black point end; α〇> 〇 outflow of the black point end; D! But D2 is cut off. 4 was clamped by 匕; failed to participate in the resonance of 4 and cr. /jL W and 7; (〇 are all sine waves;, (the rising slope of 〇 is 匕. 〇1 at
Aw /二/。的時刻被零電流切換(zen>current_switche(j,zcs)至導通狀離;Ml 可於β G (之期間被零電壓切換(zero-voltage-switched,ZVS)且/或在 Μ的時刻被零電流切換至_狀態以降低切換損失(switdiingbss)。 在乂$乂之情況,/〆/)於地關閉前下降至〇 (即丨。於 之期間,Μ〗開啟但Μ:賴。於y叫之期間,因⑽大於〇且大於々(,), 故、(0流經M】之通道;/>(〇>〇流進Λ^黑點端;咖〇流出^之黑點 端;Α導通但D2截止。4被^箝制;未能參加之譜振。,⑷與⑹ 白為正弦波,J之上升斜率為^ ^ &在κ的時顺零電流切換至截 止狀態·。於~叫之期間,因咖於〇且等於W,故雜經Μ H ’ /» G L ; Di與D2皆戴止、未被L箝制;能參加々與 ^•之白振’J’)與之上升斜率小於在叫的時刻被零電流切 m 換至導通狀態。Aw / two /. The time is switched by zero current (zen>current_switche(j,zcs) to conduction); Ml can be zero-voltage-switched (ZVS) during the period and/or zero at the moment of Μ The current is switched to the _ state to reduce the switching loss (switdiingbss). In the case of 乂$乂, /〆/) drops to 〇 before the ground is closed (ie 丨. During this period, Μ〗 is turned on but Μ: 赖. During the period, because (10) is greater than 〇 and greater than 々 (,), therefore, (0 flows through M] channel; />(〇> 〇flow into 黑^ black point end; curry outflow ^ black point end; Α conduction but D2 cutoff. 4 is clamped; unable to participate in the spectrum., (4) and (6) white is a sine wave, the rising slope of J is ^ ^ & κ zero current is switched to the off state. ~ During the period, because the coffee is 〇 and equals W, the miscellaneous Μ H ' /» GL ; Di and D2 are both worn and not clamped by L; can participate in the 振 and ^• white vibration 'J') The rising slope is less than the zero current cut m to the conducting state at the time of the call.
M340660 在Λ>Λ之情況,㈧於Η關閉後下降至0 (即 ^#〇00 、|。於仝叫 =,Ml _Μ2關閉。因⑽大㈣且大於w,故·經Ml 、、〜(,)〜進义之黑點端;u’)>0流出%之黑點端;&導通但 驗° ;辦加冰彻、(桃撤為正弦波; U0之上升斜率十於〔叫之_,Μι與M2軸。叫大於 Ό)故’j’)流經地之本體二極體、(,)>〇流進#之黑點端; 咖〇流“之黑點端;Dl導通但〇2截止乂被匕籍制;未能參加上與M340660 In the case of Λ>Λ, (8) After Η is closed, it will drop to 0 (ie ^#〇00, |. In the same call =, Ml _Μ2 is closed. Because (10) is large (four) and greater than w, so by Ml, ~ ( ,) ~ black point of the righteousness; u') > 0 out of the black point end; & conduction but test °; do add ice, (Peach is sinusoidal; U0 rise slope is less than [ _, Μι and M2 axis. Called greater than Ό) Therefore 'j') flowing through the body of the body of the diode, (,) > 〇流 into the # black point end; curry flow "the black point end; Dl Conducted but 〇2 was closed by the system of membership; failed to participate in the
Cr之癌。、(/)與咖皆為正弦波;、(,)之上升斜率為匕。《,)在,二,的 Α« s r 時亥J以零電流切換從D】換流(c〇mmutate)至d〗。 因開關電晶體與整流二極體能被零電壓切換或被零電流切換,此習 知轉換器具有低切換損失。然而,此f知轉換器_二極體為整流器, 故導致較面的整流器導通損失㈣^也⑽!㈣。本創作以同步整流器取 代-極體整流$以降低整流II導通損失並揭示便宜有效之閘極驅動器。 理淪上’一次側開關電晶體與二次側同步整流器可被一次側積體電 路控制杰或二次侧積體電路控制器驅動。實務上,一次側積體電路控制 器較二次側積體電路控制器有三項優點:(1)較易取得(2)較易與一 次側功率因素校正器配合(3)較易實現轉換器之保護功能。因此,本創 作提出以一次側積體電路控制器驅動二次側同步整流器之方法。 M340660 【創作内容】 &解決上述問題’本創作揭示-種具自驅式同步整流器之 半橋LLC谐振轉換器,其利用_次側積體電路控制器與問極驅 動器以__次側開關電晶體與二次側同步整流器。 閑極驅動器由積體電路基礎型(IC-based)或變壓器基礎型 (transformer-based ) ^ ( driver m〇dule differential transformer)組成,或者由直流移位器(DC減沉)、直流復位器(dc restorer)與差動變壓器組成。 一次側開關電晶體之驅動電壓為單極性;二次側同步整流器 之驅動電壓可為雙極性或單極性。 【實施方式】 首先以第2a圖至第2c圖之分析說明切換頻率與諧振頻率間之關係 對轉換器操作之影響。 在乂 之情況,於以/以5之期間,Μι開啟但M2關閉。因 diL (/) V τ di 〇) 。,故Di截止。若D!以第一同步整流器SR! 取代,則SR〗與Μ〗同步開啟。輸出電壓&與二次側電壓v力)間之電壓差 除以SR〗之微小導通電阻(con(jucti〇n resistance)將導致巨大擊穿電流 (shoot-through current)而燒毀第一同步整流器SR!。 在乂 > 乂之情況,於/ g之期間,與M2皆關閉。因 M340660 diLm (/) v T diT ί/) _ 一= = K,故D〗導通。若d!以第一同步整流器 取代’則SR〗與Μ〗同步關閉。4)將流經si^之本體二極體且轉換器仍 可安全操作。因此,本創作所揭示之具自驅式同步整流器之半橋LLC 谐振轉換器僅適用在Λ >/.之情況。 一次側的第一開關與第二開關可由Ρ通道金屬氧化半導體場效應 電晶體(p-channel metal oxide semiconductor field effect transistor, PMOS)、N通道金屬氧化半導體場效應電晶體(NM0S)、p型接面場效應 電晶體(p_type junction field effect transistor, p-JFET)以及 N 型接面場效應 電晶體(n-JFET)實作,惟需注意電晶體電極之極性。相同的原理,二次側 的第一同步整流器與第二同步整流器可由PM0S、NM0S、p-JFET或 n-JFET實作’惟需注意電晶體電極之極性。為說明方便,一次側的第一 開關與第二開關與二次側的第一同步整流器與第二同步整流器採用 NMOS實作,分別表示為、M2、SR!、SR2。 source 第一實施例之電路圖與驅動電壓波形圖分別示於第3a圖與第3b 圖,其中一次側積體電路控制器U!輸出兩個對地的參考 (ground-referenced)驅動電壓%(〇與以〇 ;第一開關電晶體Μι與第二 開關電晶體M2以半橋結構(half-bridge configuration)連接於輸入電壓 源Vin與譜振電路(resonant tank)之間,Μι與M2的連接點記為p,其 電壓記為Vp ; LLC諧振電路包含磁化電感4,、諧振電感々與諧振電容 ,麦遥丁2包含'一組^一次側線圈A與二組^一次側線圈 < ;第^一同步 整流器SR!與第二同步整流器SR2以共源極結構(c〇mm〇n_ M340660 configuration)連接於二次側線圈%與二次側接地端之間,二組二次側線 圈Α連接於電壓輸出端V。,電壓輸出端V。與二次側接地端跨接渡波電 容。 當開啟但Μ:關閉時,之源極電位為% ;當Μ〗關閉但% 開啟時,Μ〗之源極電位為〇。因此,μ!之源極電位Vp為一變動電位 (fluctuating potential) 〇 因Μ!之開啟需要Μ!之閘極與源極間之電壓差高於閘-源極臨界電 壓(gate-source threshold voltage),故一積體電路基礎型(K>based)或一 變壓器基礎型(transformer-based)驅動模組认必須被用以將%(〇與〜(〇 轉換成與Μ:之單極性閘·源極電壓心幻與心的。 具1:1:1 一次側對二次側圈數比之差動變壓器丁3之一次側線圈將 〜(/)減去、(/)以產生81^與SR2之雙極性閘·源極電壓,二 次側同步整流器閘極所受電壓如表一: ^3 (0 y〇f(〇 y〇?(〇 K Kc ~Kc 0 0 0 _Kc Kc 表一Cancer of Cr. , (/) and coffee are sine waves; (,) the rising slope is 匕. ",) at, ii, s, s, s, s, y, y, y, y, y, y, y, y, y, y, y, y, y, y, y, y Since the switching transistor and the rectifying diode can be switched by zero voltage or switched by zero current, this conventional converter has low switching loss. However, this converter _ diode is a rectifier, which leads to a lower rectifier conduction loss (four) ^ also (10)! (4). This creation replaces the rectifier rectifier with a synchronous rectifier to reduce the rectification II conduction losses and reveals a cheap and efficient gate driver. The 'primary side switching transistor and the secondary side synchronous rectifier can be driven by the primary side integrated circuit control Jay or the secondary side integrated circuit controller. In practice, the primary side integrated circuit controller has three advantages over the secondary side integrated circuit controller: (1) easier to obtain (2) easier to cooperate with the primary side power factor corrector (3) easier to implement the converter Protection function. Therefore, the present invention proposes a method of driving a secondary side synchronous rectifier with a primary side integrated circuit controller. M340660 [Creation Contents] & Solve the above problems' This work reveals a half-bridge LLC resonant converter with self-driven synchronous rectifier, which uses the _ secondary side integrated circuit controller and the question mark driver with __ secondary side switch Transistor and secondary side synchronous rectifier. The idler driver is composed of an IC-based or transformer-based driver (DC), or a DC shifter (DC sinking) and a DC resetter ( Dc restorer) is composed of a differential transformer. The driving voltage of the primary side switching transistor is unipolar; the driving voltage of the secondary side synchronous rectifier can be bipolar or unipolar. [Embodiment] First, the analysis of Figs. 2a to 2c will explain the influence of the relationship between the switching frequency and the resonance frequency on the operation of the converter. In the case of 乂, during the period of /, the Μι is turned on but the M2 is turned off. Because of diL (/) V τ di 〇). Therefore, Di is closed. If D! is replaced by the first synchronous rectifier SR!, then SR is synchronized with Μ. The voltage difference between the output voltage & and the secondary side voltage v) divided by the small on-resistance of SR (con(jucti〇n resistance) will result in a large shoot-through current and burn the first synchronous rectifier SR! In the case of 乂> ,, during the period of /g, it is turned off with M2. Since M340660 diLm (/) v T diT ί/) _ a == K, D is turned on. If d! is replaced by the first synchronous rectifier, then SR is closed synchronously with Μ. 4) The body diode will flow through the si^ and the converter will still operate safely. Therefore, the half-bridge LLC resonant converter with self-driven synchronous rectifier disclosed in the present application is only applicable to the case of Λ >/. The first switch and the second switch on the primary side may be a p-channel metal oxide semiconductor field effect transistor (PMOS), an N-channel metal oxide semiconductor field effect transistor (NM0S), and a p-type connection. The p_type junction field effect transistor (p-JFET) and the N-type junction field effect transistor (n-JFET) are implemented, but attention should be paid to the polarity of the transistor electrode. By the same principle, the first synchronous rectifier and the second synchronous rectifier on the secondary side can be implemented by PMOS, NMOS, p-JFET or n-JFET', but attention should be paid to the polarity of the transistor electrode. For convenience of explanation, the first switch and the second switch on the primary side and the first synchronous rectifier and the second synchronous rectifier on the secondary side are implemented by NMOS, and are denoted as M2, SR!, SR2, respectively. The circuit diagram and the driving voltage waveform diagram of the first embodiment are shown in FIGS. 3a and 3b, respectively, wherein the primary side integrated circuit controller U! outputs two ground-referenced driving voltage % (〇) And the first switching transistor Μι and the second switching transistor M2 are connected in a half-bridge configuration between the input voltage source Vin and the resonant tank, and the connection point between Μι and M2 Recorded as p, its voltage is recorded as Vp; LLC resonant circuit includes magnetizing inductance 4, resonant inductor 々 and resonant capacitor, Mai Yaoding 2 contains 'a set of ^ primary side coil A and two sets ^ primary side coil <; ^ A synchronous rectifier SR! and a second synchronous rectifier SR2 are connected in a common source structure (c〇mm〇n_ M340660 configuration) between the secondary side coil % and the secondary side ground end, and the two sets of secondary side coil turns are connected At the voltage output terminal V., the voltage output terminal V. Connects to the wave capacitor at the secondary side ground terminal. When turned on but Μ: when turned off, the source potential is %; when Μ 〗 is turned off but % is turned on, Μ The source potential is 〇. Therefore, the source potential Vp of μ! is one. Fluctuating potential 〇! The opening of the Μ! The voltage difference between the gate and the source is higher than the gate-source threshold voltage, so an integrated circuit basic type (K> ;based) or a transformer-based driver module must be used to convert % (〇 and ~ (〇 into Μ: unipolar gate · source voltage heart and heart. :1:1 The ratio of the primary side to the secondary side turns ratio of the differential transformer D3 is reduced by ~(/), (/) to generate the bipolar gate and source voltage of 81^ and SR2, The voltage of the gate of the secondary synchronous rectifier is shown in Table 1: ^3 (0 y〇f(〇y〇?(〇K Kc ~Kc 0 0 0 _Kc Kc Table 1
'(〇、、^/)、v^)、心幻與❾幻之電壓波形如第%圖。 第二實施例之電路圖與驅動電壓波形圖分別示於第4a圖與第4c 圖,其中二極體Da與電阻Rs之組合、二極體D62與電阻&之組合、二 M340660 極體0^與PNP雙極電晶體Qs之組合及二極體d61與PNP雙極電晶體 Q6之組合分別構成SRi與SR2之半波整流器(haif_wave rectifier)與快速 關閉電路(fast tum-off circuit)。 當4(0=匕時,D52、D51、Q6導通但Q5、d62、D61截止;SR】開啟 • 但 SR2 關閉。當 &(/)= 〇 時,D52、D51、D62、D61 截止但 Q5、Q6 導通;SR! 、與SR2皆關閉。當&(/)='時,D62、D61、Q5導通但Q6、D52、D51截止; SR2開啟但SR〗關閉。對應於Ts之雙極性驅動電壓,SRl與Sr2之單極性 驅動電壓列於表二: 厂r3 (’) KHt) ν〇7(0 Kc Kc 0 0 0 0 -匕 0 ------- Kc 表二'(〇,,^/), v^), heart illusion and illusion voltage waveform as shown in the first figure. The circuit diagram and the driving voltage waveform diagram of the second embodiment are shown in FIGS. 4a and 4c, respectively, wherein the combination of the diode Da and the resistor Rs, the combination of the diode D62 and the resistor & the second M340660 polar body 0^ The combination with the PNP bipolar transistor Qs and the combination of the diode d61 and the PNP bipolar transistor Q6 constitute a haif_wave rectifier and a fast tum-off circuit of SRi and SR2, respectively. When 4 (0=匕, D52, D51, Q6 are turned on but Q5, d62, D61 are turned off; SR] is turned on • But SR2 is turned off. When &(/)= 〇, D52, D51, D62, D61 are cut off but Q5 Q6 is turned on; SR! and SR2 are both turned off. When &(/)=', D62, D61, and Q5 are turned on but Q6, D52, and D51 are turned off; SR2 is turned on but SR is turned off. Corresponding to Ts bipolar drive Voltage, SR1 and Sr2 unipolar driving voltage are listed in Table 2: Factory r3 (') KHt) ν〇7 (0 Kc Kc 0 0 0 0 -匕0 ------- Kc Table 2
第二實施例之電路圖與驅動電壓波形圖分別示於第扑圖與第如 圖,其中至動變壓器T5包含一組一次側線圈與一組二次側線圈;二極體 D7與二極體〇8之組合_巩與恥之信號分配器(s㈣distnb_)。 田0)乂日守’ 〇8導通但D7截止;SRi開啟但Sr2關。當⑽=〇 時,D7與d8皆截止;SRl與SR2皆關閉。當又時,D7導通但巧 截止U啟但SR]關閉。對應於丁5之雙極性驅動電壓,眼與% 之單極性驅動電壓列於表三: M340660 匕5 (’) nxt) y〇s2(〇 vcc 〇 0 〇 〇 -匕 〇 Kc 表三 第四實施例之電路圖與驅動電壓波形圖分別示於第5a圖與第5b 圖,其中一次側積體電路控制器认藉由直流移位器與值劉復位器之組合 電路可直接驅動第一開關電晶體从與第二開關電晶體Μ/電容c4與脈 波變壓器(pulse transformer) I構成一直流移位器(DC shifter);電容 C3與二極體D3構成一直流復位器(DC restorer )。 因Μ〗之源極電位Vp為一變動電位但Μ2之源極電位為一接地電位 (grounding potential),故差動變壓器乃不能直接比較Μι之閘·源極電 壓☆(/)與Μ:之閘_源極電壓^益幻。因此,一直流移位器與一直流復位 态必須被用以將vyG)轉換成對地的參考驅動電壓 Ά)。 Q之跨電壓可從伏·秒乘積平衡等式(v〇lt_sec〇nds equilibrium equation)被推導: [Kc-vC4)d^vC4(i-d)^vC4=dvcc 其中’乃為Ml之責任週期比(dutyratio)。因/)«0.5外4=/)心0.5匕, 故FC4在一個切換週期内可被視為一固定電壓源。 -人側對二次側圈數比之A之二次側線圈之跨電壓可被表示 12 X&-M340660 \Vcc-VC4 M, on and A off \-Vc , Mx off and D3 on 當A導通時,C3被充電至^。因此,C3之跨 ‘個切換週期内亦可被視為一固定電壓源。 電壓; 0.54 在 郎點B與一次側接地端間之電壓差可被表示為: vB(thVc +v (t)-V J^-^^〇nandA〇ff = onand A off 3 Λ) °4 \-vc4 ? μ off and A on |〇 , Mx off and D3 onThe circuit diagram and the driving voltage waveform diagram of the second embodiment are respectively shown in the first diagram and the figure, wherein the transformer T5 includes a set of primary side coils and a set of secondary side coils; the diode D7 and the diodes 〇 The combination of 8 _ Gong and shame signal distributor (s (four) distnb_). Tian 0) 乂 守 守 〇 导 8 conduction but D7 cutoff; SRi open but Sr2 closed. When (10) = ,, both D7 and d8 are cut off; both SR1 and SR2 are turned off. When it is again, D7 turns on but the U is turned off but SR] is turned off. Corresponding to the bipolar driving voltage of D5, the unipolar driving voltage of the eye and % is listed in Table 3: M340660 匕5 (') nxt) y〇s2(〇vcc 〇0 〇〇-匕〇Kc Table 3 Fourth Implementation The circuit diagram and driving voltage waveform diagrams of the example are shown in Figures 5a and 5b, respectively, wherein the primary side integrated circuit controller recognizes that the first switching transistor can be directly driven by the combination circuit of the DC shifter and the value resetter. A DC shifter is formed from the second switching transistor Μ/capacitor c4 and a pulse transformer I; the capacitor C3 and the diode D3 constitute a DC restorer. The source potential Vp is a fluctuating potential, but the source potential of Μ2 is a grounding potential, so the differential transformer cannot directly compare the gate of the Μι and the source voltage ☆(/) and Μ:gate _ The source voltage is illusory. Therefore, the continual shifter and the dc reset state must be used to convert vyG) to the reference drive voltage 对). The voltage across Q can be derived from the volt-seconds product equilibrium equation (v〇lt_sec〇nds equilibrium equation): [Kc-vC4)d^vC4(id)^vC4=dvcc where 'is the duty cycle ratio of Ml ( Dutyratio). Since /) «0.5 outside 4 = /) heart 0.5 匕, FC4 can be regarded as a fixed voltage source in one switching cycle. - The crossover voltage of the secondary side coil of the A side to the secondary side turns ratio A can be expressed as 12 X&-M340660 \Vcc-VC4 M, on and A off \-Vc , Mx off and D3 on when A is turned on When C3 is charged to ^. Therefore, C3 can also be considered as a fixed voltage source within a 'switching cycle. Voltage; 0.54 The voltage difference between the ant point B and the primary side ground can be expressed as: vB(thVc +v (t)-VJ^-^^〇nandA〇ff = onand A off 3 Λ) °4 \- Vc4 ? μ off and A on |〇, Mx off and D3 on
第四實施例之二次側電路與第一實施例二次側電路相同,與 ^2(0具有相同的電壓波形。 第五實施例與第六實施例之電路圖與驅動電壓波形圖分別示於第 6a圖至第6c圖,其一次側之電路與第四實施例相同,二次側之電路分別 與第二實施例與第三實施例相同,可由前述實施例類推其作動,此處不 再重新敘述。The secondary side circuit of the fourth embodiment is the same as the secondary side circuit of the first embodiment, and has the same voltage waveform as ^2 (0). The circuit diagram and the driving voltage waveform diagrams of the fifth embodiment and the sixth embodiment are respectively shown in 6a to 6c, the circuit on the primary side is the same as the fourth embodiment, and the circuit on the secondary side is the same as the second embodiment and the third embodiment, respectively, and can be activated by the foregoing embodiment, and no longer Re-narrative.
以上所述之實施例僅係為說明本創作之技術思想及特點, 其目的在使熟習此項技藝之人士能夠暸解本創作之内容並據以 實施,當不能以之限定本創作之專利範圍,即大凡依本創作所 揭示之精神所作之均等變化或修飾,仍應涵蓋在本創作之專利 範圍内。 13 M340660 【圖式簡單說明】 第1圖式習知半橋LLC諧振轉換器之電路圖。 第2a、2b、2c圖式電壓與電流之波形圖;分別對應於乂 <乂、乂 =乂與 乂 >乂之情況。 第3a圖與第3b圖式第一實施例之電路圖與驅動電壓波形圖。 第4a圖與第4c圖式第二實施例之電路圖與驅動電壓波形圖。 第4b圖與第4c圖式第三實施例之電路圖與驅動電壓波形圖。 第5a圖與第5b圖式第四實施例之電路圖與驅動電壓波形圖。 第6a圖與第6c圖式第五實施例之電路圖與驅動電壓波形圖。 第6b圖與第6c圖式第六實施例之電路圖與驅動電壓波形圖。 【主要元件符號說明】 Μι、Μ〗 SR4、SR2 Q5 、Q6 開關電晶體 同步整流電晶體 PNP雙極電晶體The embodiments described above are merely illustrative of the technical ideas and features of the present invention, and the purpose thereof is to enable those skilled in the art to understand the contents of the present invention and implement them according to the scope of the patent. That is, the equivalent changes or modifications made by the people in accordance with the spirit revealed by this creation should still be covered by the scope of the patent of this creation. 13 M340660 [Simple diagram of the diagram] The circuit diagram of the conventional half-bridge LLC resonant converter of the first figure. Waveforms of voltages and currents of patterns 2a, 2b, and 2c; respectively, corresponding to 乂 <乂, 乂 =乂 and 乂 >乂. Circuit diagram and driving voltage waveform diagrams of the first embodiment of Figs. 3a and 3b. Circuit diagram and driving voltage waveform diagrams of the second embodiment of Figs. 4a and 4c. Circuit diagram and driving voltage waveform diagram of the third embodiment of Fig. 4b and Fig. 4c. Circuit diagram and driving voltage waveform diagram of the fourth embodiment of Fig. 5a and Fig. 5b. Circuit diagram and driving voltage waveform diagram of the fifth embodiment of Fig. 6a and Fig. 6c. FIG. 6b and FIG. 6c are diagrams showing a circuit diagram and a driving voltage waveform of the sixth embodiment. [Main component symbol description] Μι, Μ〗 SR4, SR2 Q5, Q6 switching transistor Synchronous rectification transistor PNP bipolar transistor
Di、D2、D4、D51、D52、D61、D62、二極體 D7、DsDi, D2, D4, D51, D52, D61, D62, diode D7, Ds
Lr ' Lm cr、Co、c3、c4Lr ' Lm cr, Co, c3, c4
Vin、V〇、Vp、Vb、VA C(〇 Λ v〇s2(0 ' C(〇 ' C2(〇 nn nn nn nn 丄1、12、丄3、JU、丄5 電感 電容 電壓 閘極驅動電壓 變壓器 14 M340660 A、B、P、G 節點 lLr⑴、iLm(〇、Ip⑴、沾) 電流 t、t〇、t!、ts、tr 時間Vin, V〇, Vp, Vb, VA C(〇Λ v〇s2(0 ' C(〇' C2(〇nn nn nn nn 丄1, 12, 丄3, JU, 丄5 inductor-capacitor voltage gate drive voltage) Transformer 14 M340660 A, B, P, G node lLr (1), iLm (〇, Ip (1), dip) Current t, t〇, t!, ts, tr time
Ui 一次側積體電路控制器 u2 驅動模組 電阻 R5、R6Ui primary side integrated circuit controller u2 drive module resistor R5, R6
1515
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI397249B (en) * | 2009-01-05 | 2013-05-21 | Spi Electronic Co Ltd | Resonant converter with phase shift output path |
US8587963B2 (en) | 2009-01-21 | 2013-11-19 | Fsp Technology Inc. | Resonant converter equipped with multiple output circuits to provide multiple power outlets |
TWI463771B (en) * | 2010-08-27 | 2014-12-01 | Univ Nat Cheng Kung | Llc resonant converting system with continuous-current-mode power-factor-correction |
US9166488B2 (en) | 2009-10-30 | 2015-10-20 | Delta Electronics Inc. | Method and apparatus for resetting a resonant converter |
-
2008
- 2008-04-29 TW TW97207395U patent/TWM340660U/en not_active IP Right Cessation
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI397249B (en) * | 2009-01-05 | 2013-05-21 | Spi Electronic Co Ltd | Resonant converter with phase shift output path |
US8587963B2 (en) | 2009-01-21 | 2013-11-19 | Fsp Technology Inc. | Resonant converter equipped with multiple output circuits to provide multiple power outlets |
US9166488B2 (en) | 2009-10-30 | 2015-10-20 | Delta Electronics Inc. | Method and apparatus for resetting a resonant converter |
TWI463771B (en) * | 2010-08-27 | 2014-12-01 | Univ Nat Cheng Kung | Llc resonant converting system with continuous-current-mode power-factor-correction |
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