M276393 八、新型說明： 【新型所屬之技術領域】 本新型係有關於一種降頻器， 【先前技術】 衛星通訊服務因為具有寬頻、 特別是指，一種全頻段低雜訊之衛星降頻器。 廣播、無國界等特色，近來消費市場對 按收糸統㈣機漸增大。在制衛星龍服務時，需有魅地面接收写 星降頻器（1〇W noise block down_c〇nverter,卿、中賴線、解: 變盗等讀。衛星地面接收器用以接收衛星訊號；衛星降頻器將由3萬多公里 傳來的射頻訊號放大，再將射頻訊號降到中頻電纜能夠傳輸的頻補圍^ 電欖線再將賊送至解調變器作後續的影像處理。第i _數位衛星廣播為例 顯示出接收衛星訊號所需之元件。首先以碟型天線（disk)i〇來接收衛星訊 號。-般電視所用的衛星訊號頻率（射頻）約為1〇 . 7G_12.75ghz，故需用衛星 降頻器2Q將訊號放大後降至同軸魏22所能傳輸的中頻頻段（約 95⑽-mo刚z)。一般衛星降頻器2〇多安裝在碟型天線1〇上。最後以中頻 境線22接至室内之解調變器30加以解調，接上室内單元4〇 (ind〇〇^nit， 工DU)如電視等。 而隨著衛星接收系統的室内單元持續進步，越來越多的室内單元具有個人 ，影機（personal video records ’ PVR)的功能，可以讓使用者一邊收看 節目’-邊收錄不同頻道的節目。因此，多個輸出的衛星接收器需求亦逐漸增 大。 第2圖顯示傳統雙偏極化雙輸出的全頻段衛星降頻器，是由一對低雜訊放 大器（祖）扣、-低雜訊放大器偏壓電路叫、—對本地振盈器255和π?、 混波器251及253、中頻放大器259、中頻切換電路232、控制電路262等所 組成。此類魅關H由補減大g加將水平㈣直胁化的信號放大 後’透過信齡歧ϋ ^把健分成續，分觀财随絲_帶通遽波 器犯及244將信號分成高頻段-垂直訊號（Shv)、低頻段_垂直訊號（Slv)、 M276393 高頻段-水平訊號（Shh)及低頻段-水平訊號（Slh)。低雜訊放大器電路2l4 可控制低雜sfl放大器212的運作。本地振盪器255和257各產生不同頻率之振 盈波，通常約為lOJGHz及9.75GHz，以將垂直偏極化棚信號⑺和水平 偏極化射頻號（H)的頻率範圍由約1〇 . 7G_12.75GHz降到約 .〇.95-2_ιπΗζ。再分別經過混波器2S1或253、濾波器246或248產生各 .自的中頻訊號，再由四對二的中頻切換電路232和控制電路262選擇要取得哪 些中頻訊號。 第2圖中的嫩降頻器設計，在混波器中另需使關介質減器（dr〇)， φ介質振蘯器不但f要人工調頻，也佔據了很大的印刷電路板（print circuit board ’ PCB)面積，是此類降頻器設計之缺點。 【新型内容】 、 有鑑於此，本新型提出一降頻器，包含有二低雜訊放大器、-切換電路、 一濾波器、兩紐器、—混波II、-中頻放大器及—控制電路。低雜訊放大器 :用以放大兩偏極化訊號，濾波器可讓複數個特定頻率的信號通過，混波器用以 將該渡波器的輸出與-第-或一第二振盈波相混合，中頻放大器用以將該混波 器之輸出放大’控制電路可選擇二偏極化訊號其中之一者為輸出，亦可選擇上 述振盪器輸出其中之一者為上述混波器的輸入。 • 【實施方式】 第3A圖疋本新型之一實知例，為一雙偏極化單輸出低雜訊全頻放大降頻器 之方塊圖。本實施例由-二對_切換電路234、—帶通濾波器綱、一混波器 252、-對本地振盡器254及256、一濾波器262、一中頻放大器2別及一控 制電路264等所組成。其中二對一切換電路234内包含有低雜訊放大器21〇 及2U、低雜訊放大器偏壓電路214。低雜訊放大器2ι〇、μ分別將垂直偏 極化訊號（V)、水平偏極化訊號⑻放大後，控制電路編再選擇接收水平偏極 化訊號211或是垂直偏極化訊號no。經過第二級的低雜訊放大器以放大後 送至一帶通濾波器24〇濾掉雜訊，訊號被送至混波器252執行降頻之動作。混 ⑧ M276393 波的252將本地振盪器254或256產生的振盘波&與帶通濾波器之輸出 1相此5、可產生一中頻信號。控制電路264可以選擇以本地振盪器254或 =之輸出為S2。通過濾波器262之後，本地振盈信號與高頻信號被遽去，再 、、、、:頻放大器258後’可以於輸出埠2%得到一降紐的信號。其中輸出璋 27〇传到的輸出可為高頻段一垂直訊號、低頻段-垂直訊號、高頻段-水平訊號或 低頻段水平減四者其中之一。也就是說，控制電路π4彳選擇垂直偏極化訊 號V或水平偏極化訊號Η，並可決定以本地振盪器254《—之輸出決定輸出 阜270之成號内谷為焉頻段或低頻段。 本新型中，並不限定使用何種提供振盪波仏之元件。第圖是本新型之 雙偏極化單輸it{低雜訊全頻放大賴器另_實施方塊圖。在本實補中，以一 鎖相迴路273取代本地振盪器254、256，此外，並須一參考振盪源咖提供 ，疋頻率陳盪波當作鎖她路273之輸人。在本實補巾，制—石英振盈 益作為參考振魏236。控制電路Μ4並產生_控制訊號以決定鎖相迴路⑺ 輸出之振盪頻率。 第3C圖是本新型之雙偏極化單輸出低雜訊全頻放構·另—實 圖。在本實施例中，提供鎖相迴路之其中一種實施例。參考振蘯源a產生的 ^輸入鮮/她你職247後，再錄廳249產生陳齡餘位差比 、：。頻率/相位制H 247將參考振盪源236與除頻器249之輸出的相位差轉 成電壓值，肋調整壓控振魅245的缝解。透過混波器252將放大写 Γ之，Sl相混合’可產生一中頻信號。控制電路264可以藉由解碼器263 ，除頻益249之除數調整’以產生所需的錢，進而控制混波器扣的輸出。 •^經過中頻放大器258後，可以於輸出埠27Q得到—降頻後的信號。盆中輪出 埠270得到的輪出可為高頻段_垂直訊號、低頻段_垂直訊號、高頻段-水平气 == 平訊號四者其中之一。也就是說，控制電路⑽可選擇垂直偏極 匕丑·或水平偏極化訊號H，並可以控制除麵249之輸丨來決錄出璋謂 之訊號内容為衛星訊號之高頻段或低頻段。 M276393 舉例來說，假δ又參考振蓋源23g提供的振盈頻率為5〇MHz，而除頻器 之除數為I95。則壓控振盪器245的頻率975〇MHz經過除頻器249後，即成 為一 5〇脆的振盈波。此外，若將除數改為⑴，則壓控振盈器Μ的頻率 l〇6〇OMHz經過除頻器249後便成一 5〇MHz的振盪波。 第4A圖為本新型之另-實施例，為一雙偏極化雙輸出低雜訊全頻放大降頻 器之方塊圖。本實施例由-對低雜訊放大器21〇及211、一低雜訊放大器偏堡 電路214、一對#號分歧器22〇及、一四對二切換電路、一對帶通濾 波器24〇及、一對混波器252及M2、兩對本地振盪器254及256，284 及286、一對低通濾波器或帶通濾波器262及292、一對中頻放大器258和 288及一控制電路26〇等所組成。低雜訊放大器21〇、分別將垂直偏極化 汛號（V)、水平偏極化訊號（H)放大以後，將放大過的訊號分別以信號分歧器 22〇、221送至一四對二切換電路23〇。信號分歧器22〇、可將輸入轉為 兩相同之輸出。低雜訊放大器偏壓電路214可控制低雜訊放大器21〇、211的 運作。控制電路26〇可選擇四對二切換電路WO的輸出訊號&及Ss2為來自 水平2極化訊號或是來自垂直偏極化訊號。^及^的訊號内容彼此互相獨 立’思即控制電路26〇可分開決定Ssi、Ss2為來自垂直偏極化或是水平偏極化 Λ號並不因ssi選擇了某一方向的偏極化訊號而限制之選擇。切換電路23〇 的輸出Ssi送至一帶通濾波器24〇濾掉雜訊後，訊號S3被送至混波器252執行 降頻的動作。混波器252將本地振盪器254或256產生的振盪波^與帶通濾 波器24〇之輸出仏相混合，可產生一中頻信號。通過濾波器262之後，本地 振盪^旎與高頻信號被濾去，再經過中頻放大器258後，可以於輸出埠270得 至J降頻後的信號。輸出埠27〇得到的輸出可為高頻段-垂直訊號、低頻段—垂 直訊號、高頻段-水平訊號或低頻段_水平訊號四者其中之一。心的來源為本地 振盈器254或256會影響輸出埠27◦為高頻段或低頻段。 、此外’切換電路23〇的輸出Ss2送至一帶通濾波器241濾掉雜訊後，訊號 心被送至混波器282降頻。混波器2S2將本地振盪器284或286產生的振盪 M276393 波34與帶通誠器241之輸出S6相混合，可產生—中頻信號 之後，本地振盪信號與高頻錢被遽去，再經過中頻放大器Μ8後= 出瑋272御，卜降頻後的信號。其巾輸料272得到的輸討_頻段-垂直 訊號、低頻段-垂直職、高嫩-水平域或低頻段_水平職1中之— 電路細可決定以本地振盈器284或瑯之輸出為心。心的來地^ 器謝或286會影響輸出槔272為高頻段或低頻段。同樣的，控制電路㈣ 可自由選擇士、士之來源為何，不會因為&選擇高頻段或低頻段而限制了士 之可能性。 第4B圖是本新型之雙偏極化雙輸出低雜訊全頻放大降頻器另—實施方塊 圖。在本實施例中，以鎖相迴路274、275取代本地振蘯器254、咖、謝 及28Wb外，由參考振盪源236、237提供固定頻率的缝波當作鎖相迴路 273、275之輸入。在本實施例巾，亦採用一石英振盈器作為參考紐源。控制 電路26〇並產生控制訊號以決定鎖相迴路274、275輸出之振I頻率。工 第4C圖是本新型之雙偏極化雙輸出低雜訊全頻放大降頻器另一實施方塊 圖。低雜訊放大器210、211分別將垂直偏極化訊號（v)、水平偏極化訊號⑻ 放大以後’將放大過的訊號分別以信號分歧器220、221送至一四對二切換電 路23〇。仏號分歧22〇、221可將輸入轉為兩相同之輸出。低雜訊放大器偏 壓電路214可控制低雜訊放大器210、211的運作。控制電路26〇可選擇四對 二切換電路230的輸出訊號SS1及Ss2為來自水平偏極化訊號或是來自垂直偏極 化訊號。Ssi及SS2的訊號内容彼此互相獨立’意即控制電路26Q可分開決定 Ssi、Ss?為來自垂直偏極化或是水平偏極化訊號，並不因gsi選擇了某一方向的 偏極化訊號而限制SS2之選擇。331與SS2分別輸入帶通濾波器24〇、mi後， 其餘信號傳遞方式皆與第3B圖相似，故在此略過不述。 第4D圖與第4C圖架構相似，但在第4C圖中僅使用了一個參考振盪源 237。如此以來可以省下電子零件之成本及所占用的面積。 第3A圖亦可衍伸出另外的實施方式。將第3圖中的混波器252、本地振盪 M276393 254及256、;慮波器261及中頻放大器258以一整合電路25〇或第3_丄圖 的整合電路代替，亦為本新型之架構。 同理，在本新型的實施例中，另可以將混波器、振盈器及中頻放大器以一 ‘整合電路來取代，如第3B-3C圖中的整合電路28〇所示。控制電路脱可輸 入控制信號到解碼器263以調整除數，進而控制壓控振魅的輸出頻率。而第 • 4A圖中混波器252、本地振盪器254及256、濾波器犯及中頻放大器258 亦可以-整合電路㈣或代替，第Μ、扣圖中混波器Μ2、壓控振盈器⑽、 頻率/相位偵測器247及除頻器等皆可以一整合電路“ο代替。 φ 本新型雖以單輸出、雙輸出等實施例揭露如上，然熟習此技藝之人士亦可 以本新型之精神延伸出多輸出、多偏極化、多衛星的衛星降頻器。 ，、本新型雖增加了射頻段的元件，卻可以減少帶通濾波器及混波器的數目， •省略錄多的中頻切換電路，同時不需要再使用人卫調_介質共振器的電子 .材料，對於多輸出可採用第4C _方式，所有的整合電路共用—個參考振盈 源。本新型可縮小體積、減少電子材料、免去人工調頻的步驟，總而言之，為 一可以降低生產成本之衛星降頻器設計。 本新型雖以較佳實施例揭露如上，織並義嫌定本新型，任何熟習此 項技藝者，在賴離本翻之精神和範_，t可㈣制更触獅了因此 ♦本新型之保護範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 第1圖顯示數位衛星廣播在接收衛星訊號所需之元件。 第2 g|齡-傳統的錢樹㉙輸㈣全頻段衛星降頻器。 之方塊圖 第3A圖是本新型之-實施例，為—雙偏極化單輸出低雜訊全頻放大降頻器 第3B、3C®分別為本新型之雙偏極化單輸出低雜訊全頻放大降頻器另一 施方塊圖 實 第从圖為本新型之另-實關，為—雙偏極化雙輸出低雜全頻放大降頻 M276393 器之方塊圖。 第4B、4C、4D圖分別為本新型之雙偏極化雙輸出低雜訊全頻放大降頻器 另一實施方塊圖。 【主要元件符號說明】M276393 8. Description of the new type: [Technical field to which the new type belongs] This new type relates to a type of downconverter. [Previous technology] Satellite communication services have a wideband, especially a full-band low-noise satellite downconverter. With the characteristics of broadcasting and borderlessness, the consumer market has recently increased its influence on the revenue system. When making satellite dragon services, you need a charm ground receiver to write to the star downconverter (10W noise block down_converter, Qing, Zhonglai line, solution: theft, etc. read. Satellite ground receiver is used to receive satellite signals; satellite The downconverter will amplify the RF signal from more than 30,000 kilometers, and then reduce the RF signal to the frequency compensation range that the IF cable can transmit ^ The electric cable sends the thief to the demodulator for subsequent image processing. I _ digital satellite broadcasting as an example shows the components required to receive satellite signals. First, a dish antenna (disk) i0 is used to receive satellite signals.-The satellite signal frequency (radio frequency) used by general televisions is about 10. 7G_12. 75ghz, so the satellite downconverter 2Q is needed to amplify the signal and reduce it to the intermediate frequency band (about 95⑽-mogangz) that can be transmitted by the coaxial Wei 22. Generally, the satellite downconverter 20 is installed on the dish antenna 1〇 At last, the IF boundary line 22 is connected to the indoor demodulator 30 for demodulation, and an indoor unit 40 (ind 00 ^ nit, industrial DU) such as a television is connected. And with the indoor unit of the satellite receiving system Continuous improvement, more and more indoor units have personal, movie (p The function of ersonal video records' PVR) allows users to watch programs from different channels at the same time. Therefore, the demand for satellite receivers with multiple outputs is also increasing. Figure 2 shows the traditional dual polarization and dual polarization The output full-band satellite downconverter is a pair of low-noise amplifier (ancestor) buckles,-the low-noise amplifier bias circuit is called,-for local oscillators 255 and π ?, mixers 251 and 253 , Intermediate frequency amplifier 259, intermediate frequency switching circuit 232, control circuit 262, etc. This kind of charm H is composed of a signal that is horizontally threatened and amplified by adding and subtracting g, and then through the signal age difference. Continued, dividing the wealth with the wire_bandpass wave waver and 244 divides the signal into high frequency band-vertical signal (Shv), low frequency band_vertical signal (Slv), M276393 high frequency band-horizontal signal (Shh) and low frequency band- Horizontal signal (Slh). The low-noise amplifier circuit 2l4 can control the operation of the low-noise sfl amplifier 212. The local oscillators 255 and 257 each generate vibration waves with different frequencies, usually about 10JGHz and 9.75GHz to polarize vertically. Signals in the greenhouse and the horizontally polarized radio frequency (H) The frequency range is reduced from about 10.7G_12.75GHz to about 0.95-2_ιπΗζ. Then, each of the IF signals is generated through the mixer 2S1 or 253, the filter 246 or 248, and then four to two. The intermediate frequency switching circuit 232 and the control circuit 262 select which intermediate frequency signals to obtain. The tender downconverter design in Figure 2 requires an additional dielectric reducer (dr0) and a φ dielectric resonator in the mixer. Not only does f require manual frequency modulation, it also takes up a large area of the printed circuit board (PCB), which is a disadvantage of this type of downconverter design. [New content] In view of this, the present invention proposes a frequency downconverter, which includes two low-noise amplifiers, a switching circuit, a filter, two buttons, a mixed wave II, an intermediate frequency amplifier, and a control circuit. . Low-noise amplifier: used to amplify two polarized signals, the filter can pass a number of signals of a specific frequency, and the mixer is used to mix the output of the wavelet with the first-or second-oscillation wave. The IF amplifier is used to amplify the output of the mixer. The control circuit can choose one of the two polarization signals as the output, and one of the oscillator outputs can be selected as the input of the mixer. • [Embodiment] Figure 3A is a block diagram of a novel example of this novel type, which is a dual-polarized single-output low-noise full-frequency amplifier downconverter. In this embodiment, two pairs of switching circuits 234, a bandpass filter, a mixer 252, a pair of local oscillators 254 and 256, a filter 262, an intermediate frequency amplifier 2 and a control circuit 264 and so on. The two-to-one switching circuit 234 includes low-noise amplifiers 21 and 2U, and a low-noise amplifier bias circuit 214. The low-noise amplifier 2m and μ amplify the vertically polarized signal (V) and horizontally polarized signal 分别, respectively, and then the control circuit program selects whether to receive the horizontally polarized signal 211 or the vertically polarized signal no. After being amplified by the second-stage low-noise amplifier, it is sent to a band-pass filter 24 to filter out noise, and the signal is sent to the mixer 252 to perform a frequency reduction operation. The M276393 wave 252 mixes the vibration plate wave & produced by the local oscillator 254 or 256 with the output of the band-pass filter in phase 1. This can generate an intermediate frequency signal. The control circuit 264 can select the output of the local oscillator 254 or = S2. After passing the filter 262, the local vibrating signal and high-frequency signal are removed, and after the 、,,,, and: -frequency amplifier 258 ′, a signal of 2% can be obtained at the output port. The output from output 270 can be one of the high frequency band vertical signal, low frequency band-vertical signal, high frequency band-horizontal signal, or low frequency band minus four. In other words, the control circuit π4 彳 selects the vertically polarized signal V or the horizontally polarized signal Η, and can decide to use the output of the local oscillator 254 "-to determine the output inner valley of Fu 270 as the chirp band or low band . In the present invention, there is no limitation on which element is used to provide the oscillation wave. The figure is a block diagram of the new dual-polarization single-input it {low-noise full-frequency amplifier; In this actual supplement, a phase-locked loop 273 is used to replace the local oscillators 254 and 256. In addition, a reference to the oscillation source must be provided, and the frequency of Chen Dangbo will be used as the input to lock her road 273. In this practical patch, the manufacturing-quartz vibration gain is used as reference for Zhenwei 236. The control circuit M4 generates a control signal to determine the oscillation frequency of the phase-locked loop ⑺ output. Figure 3C is a real-time dual-polarized single-output low-noise full-frequency amplifier architecture. In this embodiment, one embodiment of a phase locked loop is provided. With reference to 蘯 generated by Zhen Zhenyuan a, after entering 247, you can record the remaining age difference ratio of the age of 249. The frequency / phase system H 247 converts the phase difference between the output of the reference oscillation source 236 and the output of the frequency divider 249 into a voltage value, and the rib adjusts the stitching of the voltage-controlled vibration charm 245. The amplified signal is written to Γ through the mixer 252, and the Sl phase is mixed to generate an intermediate frequency signal. The control circuit 264 can adjust the divisor of the frequency gain 249 by the decoder 263 to generate the required money, and then control the output of the mixer buckle. • ^ After passing through the IF amplifier 258, you can get the down-converted signal at output port 27Q. Basin-round wheel-out The wheel-out obtained by port 270 can be one of the high frequency band_vertical signal, low frequency band_vertical signal, high frequency band-horizontal gas == flat signal. That is to say, the control circuit can choose vertical polarized signal or horizontal polarized signal H, and can control the output of surface 249 to determine the content of the predicated signal is the high frequency or low frequency of the satellite signal. . M276393 For example, the false δ also refers to the vibrational frequency provided by the cover source 23g as 50MHz, and the divisor of the divider is I95. Then, the frequency of the voltage-controlled oscillator 245 at 9750 MHz passes through the frequency divider 249, and becomes a 50% brittle vibration wave. In addition, if the divisor is changed to ⑴, the frequency of the voltage-controlled vibrator M is 1060 MHz, which passes through the frequency divider 249 and then becomes a 50 MHz oscillation wave. FIG. 4A is a block diagram of a dual-polarization dual-output low-noise full-frequency amplification downconverter according to another embodiment of the present invention. This embodiment consists of a pair of low-noise amplifiers 21 and 211, a low-noise amplifier bias circuit 214, a pair of # number diverters 22 and a four-to-two switching circuit, and a pair of band-pass filters 24. And, a pair of mixers 252 and M2, two pairs of local oscillators 254 and 256, 284 and 286, a pair of low-pass filters or band-pass filters 262 and 292, a pair of IF amplifiers 258 and 288, and a control Circuit 26〇 and other components. The low-noise amplifier 21 〇 After amplifying the vertically polarized signal (V) and horizontally polarized signal (H), the amplified signals are sent to a four-to-two by signal dividers 22 and 221, respectively. Switching circuit 23〇. The signal brancher 22 can turn the input into two identical outputs. The low noise amplifier bias circuit 214 controls the operation of the low noise amplifiers 21 and 211. The control circuit 26 can select the output signals & and Ss2 of the four-to-two switching circuit WO to be from a horizontally polarized signal or a vertically polarized signal. The signal contents of ^ and ^ are independent of each other. That is, the control circuit 26 can separately determine whether Ssi and Ss2 are from a vertical polarization or a horizontal polarization Λ does not select a polarization signal in a certain direction because ssi And restrict the choice. The output Ssi of the switching circuit 23 is sent to a band-pass filter 24. After the noise is filtered, the signal S3 is sent to the mixer 252 to perform a frequency reduction operation. The mixer 252 mixes the oscillating wave ^ generated by the local oscillator 254 or 256 with the output of the band-pass filter 24 to generate an intermediate frequency signal. After passing through the filter 262, the local oscillation signal and the high-frequency signal are filtered, and after passing through the intermediate frequency amplifier 258, the signal after the frequency reduction of J can be obtained at the output port 270. The output obtained from output port 27 can be one of the high frequency band-vertical signal, low frequency band-vertical signal, high frequency band-horizontal signal, or low frequency band_horizontal signal. The source of the heart is the local oscillator 254 or 256, which will affect the output port 27. It is high or low frequency. In addition, the output Ss2 of the switching circuit 23 is sent to a band-pass filter 241 to filter out noise, and the signal core is sent to the mixer 282 for frequency reduction. The mixer 2S2 mixes the oscillation M276393 wave 34 generated by the local oscillator 284 or 286 with the output S6 of the band pass 241, which can generate-after the intermediate frequency signal, the local oscillation signal and high frequency money are taken away, and then passed After the IF amplifier M8 = Chu Wei 272, the signal after the frequency reduction. The output obtained by its towel material 272_Band-vertical signal, low-band-vertical duty, high tenderness-horizontal domain or low frequency band_ one of the horizontal duty — the circuit can be determined by the output of the local vibrator 284 or Lang For the heart. The arrival of the heart ^ Xie Xie or 286 will affect the output 槔 272 for high frequency or low frequency. Similarly, the control circuit can freely choose the source of taxis and taxis, and will not limit the possibility of taxis because of the & choice of high or low frequency bands. Figure 4B is another implementation block diagram of the novel dual-polarization dual-output low-noise full-frequency amplification downconverter. In this embodiment, the phase-locked loops 274 and 275 are used to replace the local oscillators 254, 254, and 28Wb, and the reference wave sources 236 and 237 provide a fixed frequency slot wave as the input of the phase-locked loops 273 and 275. . In this embodiment, a quartz oscillator is also used as a reference source. The control circuit 26 and generates a control signal to determine the vibration I frequency output by the phase-locked loops 274, 275. Figure 4C is a block diagram of another implementation of the new dual-polarization dual-output low-noise full-frequency amplifier downconverter. The low-noise amplifiers 210 and 211 respectively amplify the vertically polarized signal (v) and the horizontally polarized signal. After amplification, the amplified signals are sent to the one-to-two switching circuit 23 by the signal dividers 220 and 221, respectively. . No. 22, 221 can turn the input into two identical outputs. The low-noise amplifier bias circuit 214 can control the operation of the low-noise amplifier 210, 211. The control circuit 26 may select whether the output signals SS1 and Ss2 of the four-to-two switching circuit 230 are from a horizontally polarized signal or a vertically polarized signal. The signal contents of Ssi and SS2 are independent of each other, which means that the control circuit 26Q can separately determine whether Ssi and Ss? Are from a vertically polarized signal or a horizontally polarized signal. It is not because gsi chose a polarized signal in a certain direction. The choice of SS2 is limited. After 331 and SS2 are input to the band-pass filters 24o and mi, the rest of the signal transmission methods are similar to those in Figure 3B, so they are not described here. Fig. 4D is similar in structure to Fig. 4C, but in Fig. 4C only one reference oscillation source 237 is used. In this way, the cost and area occupied by electronic parts can be saved. Figure 3A can also be extended to another embodiment. The mixer 252, local oscillation M276393 254, and 256 in Figure 3; the wave filter 261 and intermediate frequency amplifier 258 are replaced by an integrated circuit 25 or the integrated circuit in Figure 3_ 丄, which is also the new model. Architecture. Similarly, in the embodiment of the present invention, the mixer, the vibrator, and the intermediate frequency amplifier may be replaced by an integrated circuit, as shown in the integrated circuit 28 in FIGS. 3B-3C. The control circuit may input a control signal to the decoder 263 to adjust the divisor, thereby controlling the output frequency of the voltage-controlled vibration. The mixer 252, local oscillators 254 and 256, filter filter and intermediate frequency amplifier 258 in Fig. 4A can also be integrated circuits or replaced. ⑽, frequency / phase detector 247, and frequency divider can all be replaced by an integrated circuit "ο. Φ Although this embodiment is disclosed as above with single output, dual output, etc., those who are familiar with this technology can also use this type The spirit of the extension of the multi-output, multi-polarization, multi-satellite downconverter. Although this model adds components in the radio frequency range, it can reduce the number of band-pass filters and mixers. The intermediate frequency switching circuit does not need to use the electronics and materials of the satellite tuning _ dielectric resonator. For multiple outputs, the 4C _ method can be used. All integrated circuits share a reference source of vibration. This new model can reduce the size. , Reducing electronic materials, eliminating the need for manual frequency modulation, in a word, it is a satellite downconverter design that can reduce production costs. Although the new model is disclosed above with a preferred embodiment, weaving and defining the new model, anyone familiar with this Artists, relying on the spirit and scope of Lifanben, t can control the lion even more. Therefore, the scope of protection of this new model shall be determined by the scope of the attached patent application. [Schematic description of the diagram] Section 1 The figure shows the components required for a digital satellite broadcast to receive satellite signals. 2g | Age-Traditional money tree inputs a full-band satellite downconverter. Block diagram 3A is an embodiment of the new model, which is- Double-biased single-output low-noise full-frequency amplification downconverter Nos. 3B and 3C® are another block diagram of the new dual-polarized single-output low-noise full-frequency amplification downconverter. The other part of this new model is the block diagram of the dual-polarization dual-output low-noise full-frequency amplification down-frequency M276393. Figures 4B, 4C, and 4D are the new dual-polarization and dual-output low-noise, respectively. Another implementation block diagram of full-frequency amplification downconverter. [Key component symbol description]
10 碟型天線 20 降頻器 22 中頻纜線 30 解調變器 40 室内單元 220 - 221 信號分歧器 214 低雜訊放大器偏 210 > 212 - 低雜訊放大器 壓電路 216 - 217 230 四對二切換電路 237 參考振盡源 234 二對一切換電路 236 ' 237 參考振盪源 240、241 帶通濾波器 242 〜244 帶通濾波器 246 ' 248 帶通濾波器或低 232 四對二中頻段切換 通遽波器 電路 243 壓控振盪器 247 頻率/相位偵測器 245 壓控振盪器 249 除頻器 250 整合電路 251 - 252 > 混波器 253 254 - 255 - 本地振盪器 258 - 259 中頻放大器 256 - 257 260 - 266 控制電路 261 放大器 262 遽波器 263 解碼器 264 控制電路 265 放大器 266 放大器 270 " 272 輸出埠 274 鎖相迴路 275 鎖相迴路 280 整合電路 281 頻率/相位伯測器 11 M276393 282 混波器 284、286 本地振盪器 288 中頻放大器 V 垂直偏極化訊號 Shv 高頻段-垂直訊號 Shh 南頻段_水平訊號 283 除頻器 285 解碼器 290 - 292 整合電路 Η 水平偏極化訊號 Slv 低頻段-垂直訊號 Slh 低頻段-水平訊號10 dish antenna 20 downconverter 22 IF cable 30 demodulator 40 indoor unit 220-221 signal splitter 214 low noise amplifier bias 210 > 212-low noise amplifier voltage circuit 216-217 230 four Two-to-two switching circuit 237 Reference vibration exhaust source 234 Two-to-one switching circuit 236 '237 Reference oscillation source 240, 241 Band-pass filter 242 to 244 Band-pass filter 246' 248 Band-pass filter or low 232 Four-to-two mid-band Switched pass wave circuit 243 Voltage controlled oscillator 247 Frequency / phase detector 245 Voltage controlled oscillator 249 Frequency divider 250 Integrated circuit 251-252 > Mixer 253 254-255-Local oscillator 258-259 Frequency amplifier 256-257 260-266 Control circuit 261 Amplifier 262 Wavelet 263 Decoder 264 Control circuit 265 Amplifier 266 Amplifier 270 " 272 Output port 274 Phase locked loop 275 Phase locked loop 280 Integrated circuit 281 Frequency / phase detector 11 M276393 282 Mixer 284, 286 Local oscillator 288 IF amplifier V Vertical polarization signal Shv High frequency band-vertical signal Shh South frequency band_Horizontal information No. 283 Frequency divider 285 Decoder 290-292 Integrated circuit Η Horizontally polarized signal Slv Low frequency band-vertical signal Slh Low frequency band-horizontal signal