TWI844342B - Optical structure and method for forming the same - Google Patents
Optical structure and method for forming the same Download PDFInfo
- Publication number
- TWI844342B TWI844342B TW112115278A TW112115278A TWI844342B TW I844342 B TWI844342 B TW I844342B TW 112115278 A TW112115278 A TW 112115278A TW 112115278 A TW112115278 A TW 112115278A TW I844342 B TWI844342 B TW I844342B
- Authority
- TW
- Taiwan
- Prior art keywords
- layer
- optical
- forming
- optical channel
- optical structure
- Prior art date
Links
- 230000003287 optical effect Effects 0.000 title claims abstract description 182
- 238000000034 method Methods 0.000 title claims abstract description 133
- 230000003647 oxidation Effects 0.000 claims abstract description 96
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 96
- 239000000463 material Substances 0.000 claims abstract description 89
- 238000005253 cladding Methods 0.000 claims abstract description 56
- 239000000758 substrate Substances 0.000 claims abstract description 27
- 238000000059 patterning Methods 0.000 claims abstract description 12
- 238000005530 etching Methods 0.000 claims description 16
- 230000001590 oxidative effect Effects 0.000 claims description 5
- 239000010410 layer Substances 0.000 description 177
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 9
- 230000015572 biosynthetic process Effects 0.000 description 9
- 229910052710 silicon Inorganic materials 0.000 description 9
- 239000010703 silicon Substances 0.000 description 9
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 8
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 6
- 229920002120 photoresistant polymer Polymers 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- 238000001039 wet etching Methods 0.000 description 5
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 4
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 4
- 238000002955 isolation Methods 0.000 description 4
- 229910010271 silicon carbide Inorganic materials 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- 238000005137 deposition process Methods 0.000 description 3
- 239000003989 dielectric material Substances 0.000 description 3
- 238000009826 distribution Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000000717 retained effect Effects 0.000 description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 3
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 2
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 2
- 229910021529 ammonia Inorganic materials 0.000 description 2
- 238000000231 atomic layer deposition Methods 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 239000011247 coating layer Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910002601 GaN Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910001195 gallium oxide Inorganic materials 0.000 description 1
- YBMRDBCBODYGJE-UHFFFAOYSA-N germanium oxide Inorganic materials O=[Ge]=O YBMRDBCBODYGJE-UHFFFAOYSA-N 0.000 description 1
- 229910003437 indium oxide Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- PVADDRMAFCOOPC-UHFFFAOYSA-N oxogermanium Chemical compound [Ge]=O PVADDRMAFCOOPC-UHFFFAOYSA-N 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- -1 silicon carbide nitride Chemical class 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 235000012431 wafers Nutrition 0.000 description 1
Images
Abstract
Description
本發明是關於光學結構及其形成方法,特別是關於在光通道層的頂部具有弧面的光學結構。The present invention relates to an optical structure and a method for forming the same, and in particular to an optical structure having a curved surface on the top of a light channel layer.
在光子應用中,已成功地將例如波導、調變器、偵測器、解調變器、諧振器、分接頭、分離器、放大器、光柵、耦合器、或其他的光子元件整合於一積體電路基板上。通常光子裝置具有用於引導光的核心以及環繞核心以將光侷限於核心中的包覆結構。核心的材料可以包括例如矽,且包覆結構可以包括例如氧化矽。一般而言,典型的含矽半導體結構可以使用互補式金氧半導體(Complementary Metal Oxide Semiconductor,CMOS)技術的製程來進行。In photonic applications, photonic components such as waveguides, modulators, detectors, demodulators, resonators, taps, splitters, amplifiers, gratings, couplers, or other photonic components have been successfully integrated onto an integrated circuit substrate. Typically, a photonic device has a core for guiding light and a cladding structure surrounding the core to confine the light to the core. The material of the core may include, for example, silicon, and the cladding structure may include, for example, silicon oxide. In general, typical silicon-containing semiconductor structures can be fabricated using processes using complementary metal oxide semiconductor (CMOS) technology.
CMOS技術係一種用來製作積體電路之製程。通常在CMOS廠進行CMOS製程以在矽晶圓或基板中製作積體電路。在典型的CMOS製程期間,可以在單一基板中於基板上選擇性地沈積、蝕刻、及摻雜各種金屬、半導體以及介電材料層,甚至可以蝕刻、摻雜基板本身,藉此形成大量的場效電晶體及其他電子裝置。一旦處理完成,則將基板切割成個別的晶片,且這些晶片可以被封裝以供電子裝置使用。CMOS technology is a process used to make integrated circuits. CMOS processes are usually performed in CMOS factories to make integrated circuits in silicon wafers or substrates. During a typical CMOS process, various metal, semiconductor and dielectric material layers can be selectively deposited, etched, and doped on a single substrate, and even the substrate itself can be etched and doped to form a large number of field effect transistors and other electronic devices. Once the processing is completed, the substrate is cut into individual chips, and these chips can be packaged for use in electronic devices.
然而,光子元件(例如光柵、脊形波導等)的形成需要準確地控制用於形成核心的光通道材料層的厚度。舉例而言,需要調整蝕刻製程以使光通道材料層的厚度控制在例如2nm以內的精度。儘管習知的CMOS技術中的淺溝槽隔離(shallow trench isolation,STI)製程已被廣泛用於光子元件的形成,但是STI製程的蝕刻深度對於光子元件的光通道材料(例如矽)至少具有約30nm的誤差範圍,因此不適合用於光子元件的製造。此外,在CMOS技術的製程中由於是以電漿蝕刻光通道材料層,所形成的光子元件的核心具有較粗糙的表面。因此,以習知的蝕刻方式形成的光子元件會在核心與包覆層之間具有較差的全反射,影響所形成光子元件的性能。However, the formation of photonic components (such as gratings, ridge waveguides, etc.) requires accurate control of the thickness of the optical channel material layer used to form the core. For example, the etching process needs to be adjusted so that the thickness of the optical channel material layer is controlled within an accuracy of, for example, 2 nm. Although the shallow trench isolation (STI) process in the known CMOS technology has been widely used in the formation of photonic components, the etching depth of the STI process has an error range of at least about 30 nm for the optical channel material (such as silicon) of the photonic component, and is therefore not suitable for the manufacture of photonic components. In addition, in the CMOS technology process, since the optical channel material layer is etched by plasma, the core of the formed photonic component has a rougher surface. Therefore, a photonic device formed by a conventional etching method will have poor total reflection between the core and the cladding layer, which affects the performance of the formed photonic device.
一種光學結構的形成方法,包括:提供基板,其中基板包括下包覆層以及設置於下包覆層上的光通道材料層;對光通道材料層進行至少一局部氧化製程以形成嵌入光通道材料層的多個氧化部件;以及進行圖案化製程以將光通道材料層圖案化為光通道層,且在光通道層的頂部具有弧面,其中下包覆層的介電常數小於該光通道層的介電常數。A method for forming an optical structure includes: providing a substrate, wherein the substrate includes a lower cladding layer and an optical channel material layer disposed on the lower cladding layer; performing at least one local oxidation process on the optical channel material layer to form a plurality of oxidized components embedded in the optical channel material layer; and performing a patterning process to pattern the optical channel material layer into an optical channel layer having a curved surface at the top of the optical channel layer, wherein the dielectric constant of the lower cladding layer is less than the dielectric constant of the optical channel layer.
一種光學結構,包括:下包覆層;光通道層,設置於下包覆層上,且在光通道層的頂部具有弧面,其中下包覆層的介電常數小於光通道層的介電常數。An optical structure includes: a lower cladding layer; and an optical channel layer disposed on the lower cladding layer and having a curved surface at the top of the optical channel layer, wherein the dielectric constant of the lower cladding layer is smaller than the dielectric constant of the optical channel layer.
以下的揭示內容提供許多不同的實施例或範例,以展示本發明實施例的不同部件。以下將揭示本說明書各部件及其排列方式之特定範例,用以簡化本揭露敘述。當然,這些特定範例並非用於限定本揭露。例如,若是本說明書以下的發明內容敘述了將形成第一部件於第二部件之上或上方,即表示其包括了所形成之第一及第二部件是直接接觸的實施例,亦包括了尚可將附加的部件形成於上述第一及第二部件之間,則第一及第二部件為未直接接觸的實施例。此外,本揭露說明中的各式範例可能使用重複的參照符號及/或用字。這些重複符號或用字的目的在於簡化與清晰,並非用以限定各式實施例及/或所述配置之間的關係。The following disclosure provides many different embodiments or examples to show different components of the embodiments of the present invention. The following will disclose specific examples of the components of this specification and their arrangement to simplify the disclosure. Of course, these specific examples are not used to limit the disclosure. For example, if the following invention content of this specification describes forming a first component on or above a second component, it means that it includes an embodiment in which the first and second components formed are in direct contact, and also includes an embodiment in which an additional component can be formed between the above-mentioned first and second components, and the first and second components are not in direct contact. In addition, the various examples in the disclosure may use repeated reference symbols and/or words. The purpose of these repeated symbols or words is to simplify and clarify, and is not used to limit the relationship between the various embodiments and/or the configurations.
再者,為了方便描述圖式中一元件或部件與另一(些)元件或部件的關係,可使用空間相對用語,例如「在…之下」、「下方」、「下部」、「上方」、「上部」及諸如此類用語。除了圖式所繪示之方位外,空間相對用語亦涵蓋使用或操作中之裝置的不同方位。當裝置被轉向不同方位時(例如,旋轉90度或者其他方位),則其中所使用的空間相對形容詞亦將依轉向後的方位來解釋。Furthermore, to facilitate description of the relationship between one element or component and another element or component in the drawings, spatially relative terms may be used, such as "under," "below," "lower," "above," "upper," and the like. In addition to the orientation depicted in the drawings, spatially relative terms also cover different orientations of the device in use or operation. When the device is turned to a different orientation (for example, rotated 90 degrees or other orientations), the spatially relative adjectives used therein will also be interpreted based on the orientation after the rotation.
在此,「約」、「大約」、「大抵」之用語通常表示在一給定值或範圍的20%之內,較佳是10%之內,且更佳是5%之內,或3%之內,或2%之內,或1%之內,或0.5%之內。應注意的是,說明書中所提供的數量為大約的數量,亦即在沒有特定說明「約」、「大約」、「大抵」的情況下,仍可隱含「約」、「大約」、「大抵」之含義。Here, the terms "about", "approximately", and "generally" generally mean within 20% of a given value or range, preferably within 10%, and more preferably within 5%, or within 3%, or within 2%, or within 1%, or within 0.5%. It should be noted that the quantities provided in the specification are approximate quantities, that is, in the absence of specific description of "about", "approximately", and "generally", the meaning of "about", "approximately", and "generally" can still be implied.
以下敘述一些本發明實施例,在這些實施例中所述的多個階段之前、期間以及/或之後,可提供額外的步驟。一些所述階段在不同實施例中可被替換或刪去。半導體裝置結構可增加額外部件。一些所述部件在不同實施例中可被替換或刪去。儘管所討論的一些實施例以特定順序的步驟執行,這些步驟仍可以另一合乎邏輯的順序執行。Some embodiments of the present invention are described below, and additional steps may be provided before, during, and/or after the various stages described in these embodiments. Some of the stages may be replaced or deleted in different embodiments. Additional components may be added to the semiconductor device structure. Some of the components may be replaced or deleted in different embodiments. Although some of the embodiments discussed are performed in a specific order of steps, these steps may still be performed in another logical order.
此處所使用的用語「實質上(substantially)」,表示一給定量的數值可基於目標半導體裝置相關的特定技術節點而改變。在一些實施例中,基於特定的技術節點,用語「實質上地」可表示一給定量的數值在例如目標(或期望)值之±5%的範圍。As used herein, the term "substantially" means that a given amount of value may vary based on a particular technology node associated with the target semiconductor device. In some embodiments, based on a particular technology node, the term "substantially" may mean that a given amount of value is within a range of, for example, ±5% of a target (or desired) value.
本揭露提供一種光學結構及其形成方法,在利用局部氧化製程形成氧化部件之後對光通道材料進行圖案化製程,藉此形成光通道層在頂部具有弧面的光學結構。可以透過調整氧化步驟的持續時間及溫度以精確地控制氧化部件在光通道材料層中嵌入的深度。如此一來,相較於習知的淺溝槽隔離結構的蝕刻製程,本揭露的光學結構的形成方法可以對作為光學結構的核心之光通道層的厚度進行精確的控制。舉例而言,能夠將光通道層的局部厚度與其理想厚度的差異控制在較小的範圍以內(例如約≤2nm),使得光學結構更適合用於光子應用。再者,由於是藉由將光通道材料局部氧化以改變所形成的光通道層的結構特徵,相較於利用習知的蝕刻製程所形成的光通道層,在本揭露中的光通道層可以具有粗糙度較低的表面。因此,當光線在光通道層中傳遞時,能夠在光通道層與光通道層的周圍的材料之間具有較佳的全反射性質,藉此改善光學結構在光子應用上的性能。The present disclosure provides an optical structure and a method for forming the same. After forming an oxidation component by a local oxidation process, a patterning process is performed on an optical channel material to form an optical structure in which the optical channel layer has a curved surface at the top. The depth to which the oxidation component is embedded in the optical channel material layer can be precisely controlled by adjusting the duration and temperature of the oxidation step. In this way, compared to the etching process of the known shallow trench isolation structure, the method for forming the optical structure disclosed in the present disclosure can precisely control the thickness of the optical channel layer, which is the core of the optical structure. For example, the difference between the local thickness of the optical channel layer and its ideal thickness can be controlled within a smaller range (e.g., about ≤2nm), making the optical structure more suitable for photonic applications. Furthermore, since the structure characteristics of the optical channel layer are changed by partially oxidizing the optical channel material, the optical channel layer in the present disclosure can have a surface with lower roughness compared to the optical channel layer formed by the conventional etching process. Therefore, when light is transmitted in the optical channel layer, it can have better total reflection properties between the optical channel layer and the materials around the optical channel layer, thereby improving the performance of the optical structure in photonic applications.
第1A~1H圖是根據本揭露的一些實施例,繪示出在光學結構的製造過程中的各個階段的剖面圖。FIGS. 1A to 1H are cross-sectional views showing various stages in the manufacturing process of an optical structure according to some embodiments of the present disclosure.
參照第1A圖,提供基板10。基板10可以包括下包覆層100以及設置於下包覆層100上的光通道材料層102。在一些實施例中,基板10是絕緣體上半導體(semiconductor-on-insulator,SOI)基板。基板10可以更包括設置於下包覆層100下的基底104。Referring to FIG. 1A , a
下包覆層100可以包括埋藏介電材料,例如埋藏氧化物(buried oxide,BOX)、埋藏氮化物、其他適合的材料、或前述之組合。藉由設置下包覆層100,可以使光通道層112之四周包覆低介電材料。光通道材料層102可以包括矽、鍺、矽鍺、氮化矽、砷化鎵、磷化銦、其他適合的材料、或前述之組合。在一個特定的實施例中,下包覆層100包括氧化矽,且光通道材料層102包括矽。此外,下包覆層100的介電常數小於光通道材料層102的介電常數。舉例而言,下包覆層100的介電常數可以在1.0~12.0的範圍內,且光通道材料層102的介電常數可以在3.0~20.0的範圍內。如此一來,光線可以在下包覆層100與後續形成的光通道層之間的界面進行全反射。基底104可以包括矽基底、鍺基底、矽鍺基底、碳化矽基底、氮化鋁基底、氮化鎵基底、其他適合的基底、或前述之組合。The
在第1A~1H圖中顯示了將基板10以及後續形成的光學結構分隔為第一區域10A及第二區域10B的分隔符11。應理解的是,在分隔符11兩側的第一區域10A及第二區域10B可以是基板10以及後續形成的光學結構之相鄰的區域或分隔的區域。此外,儘管在第1A~1H圖中同時顯示了第一區域10A及第二區域10B,但這些圖式中所顯示的第一區域10A及第二區域10B的剖面圖可以是來自於不同方向的剖面,例如彼此垂直的方向。In FIGS. 1A to 1H, a
接著,參照第1B~1D圖,對光通道材料層102進行至少一局部氧化製程以形成嵌入光通道材料層102的多個氧化部件,例如第一氧化部件108A及第二氧化部件108B。分別參照第1B~1C圖及第1D圖,上述至少一局部氧化製程可以包括形成多個第一氧化部件108A的第一局部氧化製程以及形成多個第二氧化部件108B的第二局部氧化製程,且第一氧化部件108A的厚度大於第二氧化部件108B的厚度。應理解的是,本揭露並未限定第一局部氧化製程及第二局部氧化製程的形成順序,通常知識者可以根據製程的設計選擇第一氧化部件108A及第二氧化部件108B的形成順序。在以下的圖式所繪示的實施例中,將以第二局部氧化製程在第一局部氧化製程之後進行的情況進行說明。也就是,以下的圖式是以先形成較厚的第一氧化部件108A再形成較薄的第二氧化部件108B的情況來說明。Next, referring to FIGS. 1B to 1D, at least one local oxidation process is performed on the optical
以下說明用於形成第一氧化部件108A的第一局部氧化製程。為了形成第一氧化部件108A,如第1B圖所示,可以在光通道材料層102上形成遮罩層106,且遮罩層106可以具有在第一區域10A露出光通道材料層102的多個開口O1。在一些實施例中,這些開口O1是多個條紋狀(striped)開口。遮罩層106可以包括光阻,例如正型光阻或負型光阻。在一些實施例中,遮罩層106可以包括硬遮罩,且可由氧化矽、氮化矽、氮氧化矽、碳化矽、氮碳化矽、類似的材料或前述之組合形成。遮罩層106可以是單層或多層結構。形成遮罩層106的方法可以包括沉積製程、微影製程等。沉積製程可以包括例如物理氣相沉積製程、化學氣相沉積製程、原子層沉積製程、或任何適合的沉積製程。微影製程可以包括例如光阻塗佈、軟烤、曝光、曝光後烘烤、顯影、硬烤等步驟。The following describes a first local oxidation process for forming a
接著,參照第1C圖,氧化多個部分的光通道材料層102以形成氧化部件108A。在一些實施例中,氧化部件108A是透過加熱從開口O1露出的部分的光通道材料層102所形成。更具體而言,藉由進行熱處理,可以將光通道材料層102的表面的材料氧化以形成包括氧化物的氧化部件108A。Next, referring to FIG. 1C , multiple portions of the optical
以下說明用於形成第二氧化部件108B的第二局部氧化製程。參照第1D圖,進行與上述用於形成氧化部件108A的製程類似的製程以形成氧化部件108B。更具體而言,氧化部件108B的形成可以包括在光通道材料層102上形成遮罩層106,且遮罩層106具有露出光通道材料層102的多個開口O2。接著,氧化部件108B的形成可以更包括氧化多個部分的光通道材料層102以形成氧化部件108B。在一些實施例中,氧化部件108A穿過光通道材料層102且與下包覆層100接觸。另一方面,光通道材料層102可以在氧化部件108B下方橫向延伸。在一些其他的實施例中,光通道材料層102也在氧化部件108A下方橫向延伸,且光通道材料層102在氧化部件108A下方橫向延伸的部分實質上比在氧化部件108B下方橫向延伸的部分更薄。通常知識者可以透過調整上述氧化步驟的持續時間及溫度以精確地控制氧化部件108A、108B在光通道材料層102中嵌入的深度。除此之外,在第二局部氧化製程中的氧化步驟與有關第一局部氧化製程中所述的類似,在此為了簡化起見而省略其詳細描述。The following describes a second local oxidation process for forming a
此外,在第一及第二局部氧化製程中所使用的遮罩層106可以是同一個遮罩層或在個別的製程中形成的不同遮罩層。舉例而言,在使用同一個遮罩層的實施例中,在第二局部氧化製程期間使用在第一區域10A設置於遮罩層106上的遮罩部件(未顯示)遮蔽已形成的第一氧化部件108A,避免第一氧化部件108A在第二局部氧化製程期間進一步擴展。In addition, the
在這樣的實施例中,也能夠先進行第二局部氧化製程以形成厚度較小的第二氧化部件108B,再進行第一局部氧化製程以形成厚度較大的第一氧化部件108A。也就是,在第一局部氧化製程期間使用在第二區域10B設置於遮罩層106上的遮罩部件(未顯示)遮蔽已形成的第二氧化部件108B,避免第二氧化部件108B在第一局部氧化製程期間進一步擴展。因此,藉由在第一及第二局部氧化製程中使用遮罩部件(未顯示)以及同一個遮罩層106,第一氧化部件108A及第二氧化部件108B的形成順序並不受到限制。In such an embodiment, the second partial oxidation process can be performed first to form the second
在一些其他的實施例中,在第二局部氧化製程之前移除在第一局部氧化製程中形成的遮罩層106。遮罩層106的移除是利用蝕刻製程來進行,例如乾式或濕式蝕刻製程或前述之組合。在一些實施例中,上述移除是利用濕式蝕刻製程來進行,所使用的蝕刻劑包括氫氟酸(HF)、硝酸(HNO
3)、硫酸(H
2SO
4)、磷酸(H
3PO
4)、鹽酸(HCl)、氨(NH
3)、其他適合的蝕刻劑、或前述之組合。接著,可以在光通道材料層102上形成另一個遮罩層106,且遮罩層106具有在第二區域10B露出光通道材料層102的多個開口O2。在一些實施例中,這些開口O2是多個條紋狀開口。由於上述另一個遮罩層106覆蓋已形成的第一氧化部件108A,能夠避免第一氧化部件108A在第二局部氧化製程期間進一步擴展。有關上述另一個遮罩層106的材料及形成方法與第一局部氧化製程中使用的遮罩層106相同,在此為了簡化起見而省略其詳細描述。
In some other embodiments, the
在這樣的實施例中,也能夠先進行第二局部氧化製程以形成厚度較小的第二氧化部件108B,再進行第一局部氧化製程以形成厚度較大的第一氧化部件108A。也就是,在第一局部氧化製程期間形成的遮罩層106可以覆蓋已形成的第二氧化部件108B,能夠避免第二氧化部件108B在第一局部氧化製程期間進一步擴展。因此,藉由在第一及第二局部氧化製程中使用在個別的製程中形成的不同遮罩層106,第一氧化部件108A及第二氧化部件108B的形成順序也不會受到限制。In such an embodiment, the second partial oxidation process can be performed first to form the
如以上所討論,各個局部氧化製程可以包括在光通道材料層102上形成具有露出光通道材料層102的多個開口的遮罩層106,且可以包括氧化多個部分的光通道材料層102以形成氧化部件。As discussed above, each local oxidation process may include forming a
如第1C、1D圖所示,在一些實施例中,由於上述部分的光通道材料層102在被氧化為氧化部件108A、108B之後體積膨脹,氧化部件108A、108B的多個頂表面高於光通道材料層102的頂表面。在進行上述局部氧化製程之後,在所形成的光通道材料層102(以及後續形成的光通道層112)的頂部具有弧面。此外,如第1D圖所示,各個氧化部件108A、108B可以包括突出(protrusion)108P,且在各個氧化部件108A、108B的側壁與突出108P之間具有弧形的凹面。上述弧形的凹面對應光通道材料層102的頂部所具有的弧面,也對應後續形成的光通道層112的頂部所具有的弧面。此外,如第1D圖所示,上述突出108P可以在光通道材料層102的頂表面上橫向延伸。As shown in FIGS. 1C and 1D, in some embodiments, since the volume of the above-mentioned portion of the optical
氧化部件108A、108B可以包括與光通道材料層102共同的元素。舉例而言,氧化部件108A、108B可以包括氧化矽、氧化鍺、氧化鎵、氧化銦、其他適合的材料、或前述之組合。此外,在一些實施例中,氧化部件108A、108B的介電常數小於光通道材料層102的介電常數。The oxidized
在形成氧化部件108A、108B之後,參照第1E圖,可以移除遮罩層106以露出光通道材料層102。接著參照第1F、1G圖,可以進行圖案化製程以將光通道材料層102圖案化為光通道層112,且在光通道層112的頂部具有弧面。具體而言,上述圖案化製程可以包括在光通道材料層102上形成覆蓋氧化部件108A、108B的圖案化遮罩110,且可以更包括蝕刻被圖案化遮罩110露出的部分的光通道材料層102。在一些實施例中,上述圖案化製程包括蝕刻光通道材料層102直到露出下包覆層100,如第1G圖所示。圖案化遮罩110的材料可以包括氮化矽、氮氧化矽、碳化矽、氮碳化矽、光阻、類似的材料、或前述之組合。上述蝕刻製程可以是以乾蝕刻製程來進行,例如反應性離子蝕刻製程。After forming the
在進行圖案化製程之後,可以移除圖案化遮罩110。圖案化遮罩110的移除是利用蝕刻製程來進行,例如乾式或濕式蝕刻製程或前述之組合。在一些實施例中,上述移除是利用濕式蝕刻製程來進行,所使用的蝕刻劑包括氫氟酸(HF)、硝酸(HNO
3)、硫酸(H
2SO
4)、磷酸(H
3PO
4)、鹽酸(HCl)、氨(NH
3)、其他適合的蝕刻劑、或前述之組合。
After the patterning process, the patterned
光通道層112可以分別在所形成的光學結構的不同區域中具有不同的剖面形狀。舉例而言,如第1G圖所示,光通道層112可以在第一區域10A被形成為條紋狀,且具有與弧面鄰近的垂直側壁。另一方面,如第1G圖所示,光通道層112可以在第二區域10B被形成為脊形,且具有從光通道層112的與弧面鄰近的垂直側壁往外延伸的橫向延伸部112H。橫向延伸部112H可以延伸到與第1F圖所示的氧化部件108B的邊緣對齊,在一些實施例中,橫向延伸部112H與氧化部件108B的突出108P對齊。The
應理解的是,由於在本揭露中是藉由將光通道材料層102局部氧化以改變所形成的光通道層112的結構特徵,相較於利用習知的蝕刻製程所形成的光通道層,在本揭露中的光通道層112可以具有粗糙度較低的表面,例如側壁、橫向延伸部112H的頂表面等。因此,當光線在光通道層112中傳遞時,能夠在光通道層112與光通道層112的周圍的材料之間具有較佳的全反射性質,藉此改善光學結構在光子應用上的性能。It should be understood that, since the light
在一些實施例中,在進行圖案化製程以形成光通道層112之後,移除氧化部件108A、108B。舉例而言,可以藉由乾式或濕式蝕刻製程或前述之組合移除氧化部件108A、108B。然而,氧化部件108A、108B也可以被保留在光通道層112上,且各個氧化部件108A、108B可以具有對應光通道層112的弧面的凹面。在保留氧化部件108A、108B的情況下,氧化部件108A、108B的多個頂表面高於該光通道層112的頂表面。In some embodiments, after the patterning process is performed to form the
在一些實施例中,如第1H圖所示,在光通道層112上形成上包覆層114,且上包覆層114的介電常數小於光通道層112的介電常數。此外,由於下包覆層100的介電常數也小於光通道層112的介電常數,光線可以在包覆結構(例如下包覆層100或上包覆層114)與光通道層112之間的界面進行全反射。上包覆層114的材料可以與下包覆層100相同或類似,在此為了簡化起見而省略其詳細描述。上包覆層114的形成方法可以包括物理氣相沉積、化學氣相沉積、原子層沉積、或其他適合的方法、或前述之組合。在氧化部件108A、108B被保留在光通道層112上的實施例中,上包覆層114可以被設置於光通道層112的頂部以及氧化部件108A、108B上。在一些實施例中,上包覆層114包括與氧化部件108A、108B相同或類似的材料。In some embodiments, as shown in FIG. 1H , an
第2A圖是根據本揭露的一些實施例,繪示出光學結構1的三維示意圖。第2B圖是根據本揭露的一些實施例,繪示出對應第2A圖的剖線X-X’的剖面圖。第2C圖是根據本揭露的一些實施例,繪示出對應第2A圖的剖線Y-Y’的剖面圖。光學結構1包括設置於下包覆層100上的光通道層112,且在光通道層112的頂部具有如第2B、2C圖所示的弧面(未顯示於第2A圖)。FIG. 2A is a three-dimensional schematic diagram of an optical structure 1 according to some embodiments of the present disclosure. FIG. 2B is a cross-sectional view corresponding to the section line X-X' of FIG. 2A according to some embodiments of the present disclosure. FIG. 2C is a cross-sectional view corresponding to the section line Y-Y' of FIG. 2A according to some embodiments of the present disclosure. The optical structure 1 includes an
在一些實施例中,光學結構1的形成可以包括形成光通道層112的波導112A及/或光柵112B。具體而言,在一些實施例中,上述第一局部氧化製程及第二局部氧化製程分別用於形成光通道層112的波導112A及光柵112B。可以在第一局部氧化製程中使用較厚的氧化部件以形成具有弧面的波導112A,且可以在第二局部氧化製程中使用較薄的氧化部件以形成具有弧面的光柵112B。In some embodiments, the formation of the optical structure 1 may include forming a
參照第2A圖,波導112A在與下包覆層100的頂表面平行的第一方向(以下將以y方向為第一方向來說明)上延伸。在一些實施例中,如第2圖所示,波導112A具有在與第一方向垂直的第二方向(以下將以x方向為第二方向來說明)上變化的寬度以匯聚光通道層112中的光線。在第2A圖中所示的波導112A為條紋狀的波導,且如第2B圖所示,在對應剖線X-X’的剖面中不具有橫向延伸部。然而,通常知識者也可以根據設計需求以使光通道層112包括類似第1H圖所示的橫向延伸部112H的橫向延伸部,且上述橫向延伸部可以從波導112A的多個側壁延伸於與第一方向垂直的第二方向。在一些實施例中,藉由控制橫向延伸部的厚度,能夠確保在光通道層112中傳遞的光線不會進入橫向延伸部,減少光線的洩漏。本揭露並未限定從波導112A的側壁延伸的橫向延伸部的厚度。舉例而言,在一個特定的實施例中,波導112A的厚度在100nm~1000nm的範圍內,例如220nm,且上述橫向延伸部的厚度在20nm~700nm的範圍內,例如90nm。Referring to FIG. 2A , the
參照第2A、2C圖,光通道層112的光柵112B可以包括各具有弧面(未顯示於第2A圖)且在與下包覆層100的頂表面平行的第二方向(x方向)上延伸的複數個條紋部112S。光柵112B可以更包括在條紋部112S與下包覆層100之間延伸於與第二方向垂直的第一方向(y方向)的橫向連通部112C。光柵112B可以藉由在局部氧化製程中形成大量的在第二方向延伸的氧化部件來形成。本揭露並未限定從光柵112B的條紋部112S及橫向連通部112C的厚度。舉例而言,在一個特定的實施例中,條紋部112S的厚度在100nm~1000nm的範圍內,例如220nm,且橫向連通部112C的厚度在0nm~700nm的範圍內,例如150nm。在一些實施例中,光柵112B的橫向連通部112C的厚度大於波導112A的橫向延伸部的厚度。2A and 2C, the grating 112B of the
相較於習知的淺溝槽隔離結構的蝕刻製程,本揭露的光學結構的形成方法可以對作為光學結構1的核心之光通道層112的厚度進行精確的控制。舉例而言,能夠將波導112A及光柵112B的局部厚度與其理想厚度的差異控制在較小的範圍以內(例如約≤2nm),使得光學結構1更適合用於光子應用。Compared to the conventional etching process of the shallow trench isolation structure, the method for forming the optical structure disclosed herein can accurately control the thickness of the
以下參照第2A圖以說明光學結構1的運作原理。舉例而言,來自光源2之具有特定波長分布λ
0的光線可以以入射角θ照射到具有週期Λ的光柵112B,接著光線可以在光通道層112內傳遞到波導112A。光柵112B的週期Λ可以根據光學結構1所對應的使用光波長來決定。舉例而言,在光線的波長分布λ
0在100nm~2000nm的範圍內情況下,週期Λ可以在20nm~1000nm的範圍內。應理解的是,為了簡化起見,在第2A圖中並未繪示在光通道層112上覆蓋光通道層112的上包覆層或尚未移除的氧化部件。光線可以在光通道層112與周圍的材料之間的界面進行全反射。
The operation principle of the optical structure 1 is explained below with reference to FIG. 2A. For example, light with a specific wavelength distribution λ 0 from the
綜上所述,本揭露提供一種光學結構及其形成方法,在利用局部氧化製程形成氧化部件之後對光通道材料進行圖案化製程,藉此形成光通道層在頂部具有弧面的光學結構。可以透過調整氧化步驟的持續時間及溫度以精確地控制氧化部件在光通道材料層中嵌入的深度。如此一來,相較於習知的淺溝槽隔離結構的蝕刻製程,本揭露的光學結構的形成方法可以對作為光學結構的核心之光通道層的厚度進行精確的控制。舉例而言,能夠將光通道層的局部厚度與其理想厚度的差異控制在較小的範圍以內(例如約≤2nm),使得光學結構更適合用於光子應用。再者,由於是藉由將光通道材料局部氧化以改變所形成的光通道層的結構特徵,相較於利用習知的蝕刻製程所形成的光通道層,在本揭露中的光通道層可以具有粗糙度較低的表面。因此,當光線在光通道層中傳遞時,能夠在光通道層與光通道層的周圍的材料之間具有較佳的全反射性質,藉此改善光學結構在光子應用上的性能。In summary, the present disclosure provides an optical structure and a method for forming the same. After forming an oxidation component by a local oxidation process, a patterning process is performed on the optical channel material to form an optical structure in which the optical channel layer has a curved surface at the top. The depth to which the oxidation component is embedded in the optical channel material layer can be precisely controlled by adjusting the duration and temperature of the oxidation step. In this way, compared to the known etching process of the shallow trench isolation structure, the method for forming the optical structure disclosed in the present disclosure can precisely control the thickness of the optical channel layer, which is the core of the optical structure. For example, the difference between the local thickness of the optical channel layer and its ideal thickness can be controlled within a smaller range (e.g., about ≤2nm), making the optical structure more suitable for photonic applications. Furthermore, since the structure characteristics of the optical channel layer are changed by partially oxidizing the optical channel material, the optical channel layer in the present disclosure can have a surface with lower roughness compared to the optical channel layer formed by the conventional etching process. Therefore, when light is transmitted in the optical channel layer, it can have better total reflection properties between the optical channel layer and the materials around the optical channel layer, thereby improving the performance of the optical structure in photonic applications.
以上概述數個實施例之特徵,以使本發明所屬技術領域中具有通常知識者可更易理解本發明實施例的觀點。本發明所屬技術領域中具有通常知識者應理解,可輕易地以本發明實施例為基礎,設計或修改其他製程和結構,以達到與在此介紹的實施例相同之目的及/或優勢。在本發明所屬技術領域中具有通常知識者也應理解到,此類等效的製程和結構並無悖離本發明的精神與範圍,且可在不違背本發明之精神和範圍之下,做各式各樣的改變、取代和替換。The features of several embodiments are summarized above so that those with ordinary knowledge in the art to which the present invention belongs can more easily understand the viewpoints of the embodiments of the present invention. Those with ordinary knowledge in the art to which the present invention belongs should understand that other processes and structures can be easily designed or modified based on the embodiments of the present invention to achieve the same purpose and/or advantages as the embodiments introduced herein. Those with ordinary knowledge in the art to which the present invention belongs should also understand that such equivalent processes and structures do not violate the spirit and scope of the present invention, and various changes, substitutions and replacements can be made without violating the spirit and scope of the present invention.
1:光學結構1: Optical structure
2:光源2: Light source
10:基板10: Substrate
10A:第一區域10A: Area 1
10B:第二區域10B: Second Area
11:分隔符11: Separator
100:下包覆層100: Lower coating layer
102:光通道材料層102: Optical channel material layer
104:基底104: Base
106:遮罩層106: Mask layer
108A,108B:氧化部件108A, 108B: Oxidized parts
108P:突出108P: Prominent
110:圖案化遮罩110: Patterned Mask
112:光通道層112: Optical channel layer
112A:波導112A: Waveguide
112B:光柵112B: Grating
112C:橫向連通部112C: Horizontal connection
112H:橫向延伸部112H: Horizontal extension
112S:條紋部112S: Stripe
114:上包覆層114: Upper coating
X-X’,Y-Y’:剖線X-X’, Y-Y’: Section Line
x,y,z:方向x,y,z: direction
O1,O2:開口O1,O2: Open
λ:波長分布λ: wavelength distribution
θ:入射角θ: angle of incidence
Λ:週期Λ: Cycle
以下將配合所附圖式詳述本發明實施例。應注意的是,依據在業界的標準做法,各種特徵並未按照比例繪製且僅用以說明例示。事實上,可任意地放大或縮小元件的尺寸,以清楚地表現出本發明實施例的特徵。 第1A~1H圖是根據本揭露的一些實施例,繪示出在光學結構的製造過程中的各個階段的剖面圖。 第2A圖是根據本揭露的一些實施例,繪示出光學結構的三維示意圖。 第2B圖是根據本揭露的一些實施例,繪示出對應第2A圖的剖線X-X’的剖面圖。 第2C圖是根據本揭露的一些實施例,繪示出對應第2A圖的剖線Y-Y’的剖面圖。 The following will be described in detail with the accompanying drawings. It should be noted that, according to standard practices in the industry, various features are not drawn to scale and are only used for illustration. In fact, the size of the components can be arbitrarily enlarged or reduced to clearly show the features of the embodiments of the present invention. Figures 1A to 1H are cross-sectional views of various stages in the manufacturing process of the optical structure according to some embodiments of the present disclosure. Figure 2A is a three-dimensional schematic diagram of the optical structure according to some embodiments of the present disclosure. Figure 2B is a cross-sectional view corresponding to the section line X-X' of Figure 2A according to some embodiments of the present disclosure. Figure 2C is a cross-sectional view corresponding to the section line Y-Y' of Figure 2A according to some embodiments of the present disclosure.
10A:第一區域 10A: First Area
10B:第二區域 10B: Second area
11:分隔符 11: Separator
100:下包覆層 100: Lower coating layer
104:基底 104: Base
112:光通道層 112: Optical channel layer
112H:橫向延伸部 112H: Horizontal extension
114:上包覆層 114: Upper covering layer
Claims (23)
Publications (1)
Publication Number | Publication Date |
---|---|
TWI844342B true TWI844342B (en) | 2024-06-01 |
Family
ID=
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20190107672A1 (en) | 2017-10-05 | 2019-04-11 | Globalfoundries Inc. | Non-planar waveguide structures |
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20190107672A1 (en) | 2017-10-05 | 2019-04-11 | Globalfoundries Inc. | Non-planar waveguide structures |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7169682B2 (en) | Method for manufacturing semiconductor device | |
KR20110055912A (en) | Method for forming fine pattern in semiconductor device | |
US20080064216A1 (en) | Method of manufacturing flash memory device | |
US7611961B2 (en) | Method for fabricating semiconductor wafer with enhanced alignment performance | |
KR100726148B1 (en) | Manufacturing method for semiconductor device | |
TWI844342B (en) | Optical structure and method for forming the same | |
CN115185038B (en) | Semiconductor device and manufacturing method thereof | |
US8084832B2 (en) | Semiconductor device | |
TWI567785B (en) | Method for fabricating patterned structure of semiconductor device | |
US6184116B1 (en) | Method to fabricate the MOS gate | |
CN108257910B (en) | The production method of shallow trench isolation groove | |
WO2023092291A1 (en) | Method for etching optical waveguide structure in chip, and chip and optical communication device | |
CN103367119B (en) | Mask process for double patterning design | |
KR100442852B1 (en) | Method for forming trench isolation region to embody isolation region proper for high integrated semiconductor device | |
JP6130284B2 (en) | Optical waveguide fabrication method | |
JP3585039B2 (en) | Hole forming method | |
KR100816210B1 (en) | Method of fabricating semiconductor devices | |
JP2008124399A (en) | Manufacturing method of semiconductor device | |
KR20020027503A (en) | Method of dry etching an antireflection coating in semiconductor devices | |
KR100359787B1 (en) | Method for fabricating of pattern | |
JP2005033192A (en) | Method for manufacturing semiconductor device | |
JP2002324787A (en) | Method of manufacturing semiconductor device | |
JPH11311865A (en) | Highly accurate resist patterning method on substrate having difference in level | |
KR100481557B1 (en) | Method for making narrow sti by using double nitride etch | |
TW202131090A (en) | Method of manufacturing phase-shifting photomask |