TWI828598B - Method of forming pattern - Google Patents

Abstract

The present disclosure provides a method of forming a pattern. The method comprises: forming a first insulating layer and a second insulating layer on the substrate in sequence; forming a first patterned mask on the second insulating layer; performing a first isotropic etching process on the first patterned mask to form a first mask pattern; forming a second patterned mask spaced apart from the first mask pattern on the second insulating layer; and performing a second isotropic etching process on the second patterned mask to form a second mask pattern.

Description

How to form patterns

The present invention relates to a method of forming a pattern.

Memory can be divided into non-volatile memory and volatile memory. Static random-access memory (SRAM) is a volatile memory commonly found in electronic devices. sexual memory. SRAM generally includes a large number of memory cells with asymmetric shapes and different spacings. Therefore, some patterning methods may not be applicable to SRAM manufacturing processes. For example, in some processes, a spacer surrounding the pattern is used as a mask to form a pattern with a small line width. However, the patterns formed by this process are often paired and symmetrical, so they are not suitable for forming SRAM memory cells.

As the size of electronic devices continues to shrink and users' requirements for the performance of electronic devices continue to increase, how to form small-sized patterns with asymmetric shapes and different spacings has become one of the goals that those skilled in the art are eager to strive for.

The present invention provides a method for forming a pattern, wherein the first mask pattern and the second mask pattern are formed by a first isotropic etching process and a second isotropic etching process respectively. That is to say, the first mask pattern The pattern and the second mask pattern are formed independently. The spacing between the two and their respective widths can be adjusted by the first isotropic etching process and/or the second isotropic etching process, and their respective shapes can also be adjusted. It can be determined by an independent process, so it is suitable for application in small-size patterns with asymmetric shapes and different pitches.

An embodiment of the present invention provides a method for forming a pattern, which includes: sequentially forming a first insulating layer and a second insulating layer on a substrate; forming a first patterned mask on the second insulating layer; The mask undergoes a first isotropic etching process to form a first mask pattern; a second patterned mask spaced apart from the first mask pattern is formed on the second insulating layer; and the second patterned mask is The screen undergoes a second isotropic etching process to form a second mask pattern.

In an embodiment of the present invention, the above-mentioned pattern forming method further includes: removing the portion of the second insulating layer exposed by the first mask pattern and the second mask pattern to form a plurality of second insulating patterns. , wherein the plurality of second insulating patterns are respectively under the first mask pattern and the second mask pattern; the portion of the first insulating layer exposed by the plurality of second insulating patterns is removed to form a plurality of first insulating patterns. , wherein the plurality of first insulation patterns are respectively under the plurality of second insulation patterns; and the plurality of first insulation patterns and the plurality of second insulation patterns are used as masks to perform a patterning process on the substrate to form active patterns and definitions. Active pattern trench pattern.

In an embodiment of the invention, during the step of removing the portion of the first insulation layer exposed by the plurality of second insulation patterns, the second mask pattern is also removed.

In an embodiment of the invention, the material of the first mask pattern is different from the material of the second mask pattern.

In an embodiment of the invention, the second isotropic etching process has different etching rates for the second patterned mask and the first mask pattern.

In an embodiment of the invention, the first patterned mask includes a first width in a first direction and a first length in a second direction intersecting the first direction, the first direction and the second direction being parallel on the surface of the substrate. The first mask pattern includes a second width in a first direction and a second length in a second direction. The first patterned mask has the same shape as the first mask pattern, the first width is greater than the second width, and the first length is greater than the second length.

In an embodiment of the invention, the second patterned mask includes a third width in the first direction and a third length in the second direction, and the second pattern mask includes a fourth length in the first direction. width and a fourth length in the second direction, and the second patterned mask and the second mask pattern have the same shape, the third width is greater than the fourth width, and the third length is greater than the fourth length.

In an embodiment of the invention, the first mask pattern and the second patterned mask are separated by a first distance, the first mask pattern and the second mask pattern are separated by a second distance, and the second distance is greater than the second distance. A distance.

In an embodiment of the invention, the second distance is equal to the second width and the fourth width.

In an embodiment of the present invention, the step of forming the second patterned mask includes: after forming the first mask pattern, forming a mask material layer covering the first mask pattern on the second insulating layer; and pattern The layer of mask material is formed to form a second patterned mask.

Based on the above, in the pattern forming method of the above embodiment, the first mask pattern and the second mask pattern are formed by the first isotropic etching process and the second isotropic etching process respectively, that is to say , the first mask pattern and the second mask pattern are formed independently, and the spacing between them and their respective widths can be adjusted through the first isotropic etching process and/or the second isotropic etching process, Moreover, their respective shapes can also be determined by independent processes, so they are suitable for application in small-size patterns with asymmetric shapes and different pitches.

The present invention will be described more fully with reference to the drawings of this embodiment. However, the present invention may also be embodied in various forms and should not be limited to the embodiments described herein. The thickness of layers and regions in the drawings are exaggerated for clarity. The same or similar reference numbers indicate the same or similar components, and will not be repeated one by one in the following paragraphs.

It will be understood that when an element is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element or intervening elements may also be present. When an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements present. As used herein, "connection" may refer to a physical and/or electrical connection, and "electrical connection" or "coupling" may refer to the presence of other components between two components. "Electrical connection" as used herein may include physical connections (such as wired connections) and physical disconnections (such as wireless connections).

As used herein, "about," "approximately" or "substantially" includes the recited value and the average within an acceptable range of deviations from the specific value that a person with ordinary skill in the art can determine, taking into account the Discuss the measurement and the specific amount of error associated with the measurement (i.e., the limitations of the measurement system). For example, "about" may mean within one or more standard deviations of the stated value, or within ±30%, ±20%, ±10%, ±5%. Furthermore, "about", "approximately" or "substantially" used in this article can be used to select a more acceptable deviation range or standard deviation based on optical properties, etching properties or other properties, and one standard deviation does not apply to all properties. .

The terminology used herein is used only to describe illustrative embodiments and does not limit the disclosure. In such cases, the singular form includes the plural form unless the context dictates otherwise.

1 to 9 are schematic diagrams of a pattern forming method according to an embodiment of the present invention, in which (a) in Figs. 2 to 9 is a schematic cross-sectional view, and (b) in Figs. 2 to 9 is a schematic top view. Figure 10 is a top view of an active pattern according to an embodiment of the present invention.

Referring to FIG. 1 , a first insulating layer 200 and a second insulating layer 300 are sequentially formed on the substrate 100 . The substrate 100 may include a semiconductor substrate or a semiconductor on insulator (SOI) substrate. The semiconductor material in the semiconductor substrate or SOI substrate may include element semiconductor, alloy semiconductor or compound semiconductor. For example, elemental semiconductors may include Si or Ge. Alloy semiconductors may include SiGe, SiGeC, etc. Compound semiconductors may include SiC, III-V semiconductor materials, or II-VI semiconductor materials. Group III-V semiconductor materials may include GaN, GaP, GaAs, AIN, AlP, AlAs, InN, InP, InAs, GaNP, GaNAs, GaPAs, AlNP, AlNAs, AlPAs, InNP, InNAs, InPAs, GaAlNP, GaAlNAs, GaAlPAs, GaInNP, GaInNAs, GaInPAs, InAlNP, InAlNAs or InAlPAs. Group II-VI semiconductor materials may include CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, HgS, HgSe, HgTe, CdSeS, CdSeTe, CdSTe, ZnSeS, ZnSeTe, ZnSTe, HgSeS, HgSeTe, HgSTe, CdZnS, CdZnSe, CdZnTe, CdHgS, CdHgSe, CdHgTe, HgZnS, HgZnSe, HgZnTe, CdZnSeS, CdZnSeTe, CdZnSTe, CdHgSeS, CdHgSeTe, CdHgSTe, HgZnSeS, HgZnSeTe or HgZnSTe. The semiconductor material may be doped with a dopant of a first conductivity type or a dopant of a second conductivity type that is complementary to the first conductivity type. For example, the first conductivity type may be N-type, and the second conductivity type may be P-type.

In some embodiments, the material of the first insulating layer 200 may be different from the material of the second insulating layer 300 . For example, the first insulating layer 200 may include an oxide (eg, silicon oxide), and the second insulating layer 300 may include a nitride (eg, silicon nitride).

Next, referring to FIGS. 1 and 2 , a first patterned mask 402 is formed on the second insulating layer 300 . In some embodiments, the first patterned mask 402 is formed by, for example, the following steps. First, the mask material layer 400 is formed on the second insulation layer 300 . In some embodiments, the material of the mask material layer 400 may be different from the material of the second insulating layer 300 . For example, the mask material layer 400 may include polysilicon, and the second insulating layer 300 may include a nitride (eg, silicon nitride). In some embodiments, the thickness of mask material layer 400 may be approximately 300 Å. Next, a photoresist pattern PR1 is formed on the mask material layer 400 . Afterwards, the portion of the mask material layer 400 exposed by the photoresist pattern PR1 is removed to form a first patterned mask 402 . After the first patterned mask 402 is formed, the photoresist pattern PR1 is removed. In some embodiments, the photoresist pattern PR1 can be removed through an ashing process, but the invention is not limited thereto.

The first patterned mask 402 may include a first width W1 in a first direction D1 and a first length L1 in a second direction D2 intersecting the first direction D1. The first direction D1 and the second direction D2 may be parallel to the surface of the substrate 100 . In some embodiments, the first direction D1 may be perpendicular to the second direction D2. In some embodiments, the first patterned mask 402 may include a first height H1 in a third direction D3, where the third direction D3 is perpendicular to the first direction D1 and the second direction D2.

After that, please refer to FIG. 2 and FIG. 3 to perform a first isotropic etching process on the first patterned mask 402 to form a first mask pattern 404 . The first mask pattern 404 may include a second width W1' in the first direction D1 and a second length L1' in the second direction D2. In some embodiments, the first mask pattern 404 may include a second height H1' in the third direction D3. In this embodiment, the first patterned mask 402 and the first mask pattern 404 have the same shape, wherein the first width W1 (eg, approximately 60 nm) is greater than the second width W1' (eg, approximately 30 nm) , the first length L1 is greater than the second length L1', and the first height H1 (for example, about 300Å) is greater than the second height H1' (for example, about 150Å).

Then, referring to FIGS. 3 to 5 , a second patterned mask 502 spaced apart from the first mask pattern 404 is formed on the second insulating layer 300 . In some embodiments, the second patterned mask 502 may be formed by the following steps.

First, please refer to FIGS. 3 and 4 . After the first mask pattern 404 is formed, a mask material layer 500 covering the first mask pattern 404 is formed on the second insulating layer 300 . In some embodiments, the material of the mask material layer 500 may be different from the materials of the second insulating layer 300 and the first mask pattern 404 . For example, the mask material layer 500 may include an oxide such as tetraethyl orthosilicate (TEOS). The first mask pattern 404 may include polysilicon, and the second insulating layer 300 may include nitride (eg, silicon nitride). In some embodiments, the layer of mask material 500 may be approximately 300 Å thick. Next, referring to FIGS. 4 and 5 , the mask material layer 500 is patterned to form a second patterned mask 502 . In some embodiments, the mask material layer 500 may be patterned by the following steps. First, the photoresist pattern PR2 is formed on the mask material layer 500 . Afterwards, the portion of the mask material layer 500 exposed by the photoresist pattern PR2 is removed to form a second patterned mask 502 . After the second patterned mask 502 is formed, the photoresist pattern PR2 is removed. In some embodiments, the photoresist pattern PR2 can be removed through an ashing process, but the invention is not limited thereto.

The second patterned mask 502 may include a third width W2 in the first direction D1 and a third length L2 in the second direction D2. In some embodiments, the second patterned mask 502 may include a third height H2 in the third direction D3. In some embodiments, the first mask pattern 404 is spaced apart from the second patterned mask 502 by a first distance P1. In this embodiment, the third width W2 (eg, approximately 60 nm) is greater than the second width W1' (eg, approximately 30 nm), and the third height H2 (eg, approximately 300 Å) is greater than the second height H1' (eg, approximately is 150Å), and the third length L2 is greater than the second length L1'. In some embodiments, the third width W2 (eg, about 60 nm) is greater than the second width W1' (eg, about 30 nm), and the second width W1' is greater than the first distance P1 (eg, about 15 nm).

Referring to FIGS. 5 and 6 , a second isotropic etching process is performed on the second patterned mask 502 to form a second mask pattern 504 . The material in the first mask pattern 404 is different from the material in the second mask pattern 504 . For example, the first mask pattern 404 may be polycrystalline silicon, and the second mask pattern 504 may be an oxide such as tetraethyl orthosilicate (TEOS). In some embodiments, the second isotropic etch process has different etch rates for the second patterned mask 502 and the first mask pattern 404 . For example, the etching rate of the second patterned mask 502 in the second isotropic etching process is greater than the etching rate of the first mask pattern 404 . In this way, when the second isotropic etching process is performed on the second patterned mask 502, the first mask pattern 404 will not be affected.

, the second mask pattern 504 may include a fourth width W2' in the first direction D1 and a fourth length L2' in the second direction D2. In some embodiments, the second mask pattern 504 may include a fourth height H2' in the third direction D3. In this embodiment, the second patterned mask 502 has the same shape as the second mask pattern 504, wherein the third width W2 (eg, approximately 60 nm) is greater than the fourth width W2' (eg, approximately 30 nm) , the third length L2 is greater than the fourth length L2', and the third height H2 (for example, about 300Å) is greater than the fourth height H2' (for example, about 150Å). The first mask pattern 404 and the second mask pattern 504 are spaced apart by a second distance P1'. The second distance P1' (eg approximately 30 nm) is greater than the first distance P1 (eg approximately 15 nm). In some embodiments, the second distance P1' is equal to the second width W1' and the fourth width W2'. For example, the second distance P1', the second width W1', and the fourth width W2' may all be 30 nm.

Based on the above steps, it can be seen that the first mask pattern 404 and the second mask pattern 504 are formed independently, and the spacing between them (for example, the second distance P1') and their respective widths (for example, the second width W1' and the second distance P1') are formed independently. The four widths W2') can be determined by the first isotropic etching process and/or the second isotropic etching process, and their respective shapes can also be determined by independent processes (such as the above-mentioned formation of the first patterned mask 402 and the second patterned mask 402). Determined by the manufacturing process of the patterned mask 502), it is suitable for forming small-sized patterns with asymmetric shapes and different spacings. For example, it may be suitable for forming small-sized patterns with asymmetric shapes and different spacings in the substrate (for example, as shown in FIG. 10 Substrate 10) containing active patterns AP11 and AP22.

Afterwards, referring to FIGS. 6 and 7 , the portions of the second insulating layer 300 exposed by the first mask pattern 404 and the second mask pattern 504 are removed to form a plurality of second insulating patterns 302 . The second insulation patterns 302 are respectively below the first mask pattern 404 and the second mask pattern 504 and may be spaced apart from each other by a second distance P1'.

Then, referring to FIGS. 7 and 8 , portions of the first insulating layer 200 exposed by the plurality of second insulating patterns 302 are removed to form a plurality of first insulating patterns 202 . The first insulation patterns 202 are respectively below the second insulation patterns 302 and may be spaced apart from each other by a second distance P1'. When the second mask pattern 504 and the first insulating layer 200 are made of the same or similar materials (for example, both are oxides), the portion of the first insulating layer 200 exposed by the plurality of second insulating patterns 302 is removed. In the step, the second mask pattern 504 is also removed (as shown in FIG. 8 ). After the first insulation pattern 202 is formed, the first mask pattern 404 may be removed.

8 and 9 , using the plurality of first insulation patterns 202 and the plurality of second insulation patterns 302 as masks, a patterning process is performed on the substrate 100 to form active patterns AP1, AP2 and The trench pattern TR defines the active patterns AP1 and AP2.

To sum up, in the pattern forming method of the above embodiment, the first mask pattern and the second mask pattern are formed by the first isotropic etching process and the second isotropic etching process, respectively. That is to say, the first mask pattern and the second mask pattern are formed independently, and the spacing between them and their respective widths can be determined by the first isotropic etching process and/or the second isotropic etching process. Adjustable, and their respective shapes can also be determined by independent processes, so they are suitable for application in small-size patterns with asymmetric shapes and different spacings.

10, 100, 102: Base

200: First insulation layer

202: First insulation pattern

300: Second insulation layer

302: Second insulation pattern

400, 500: Curtain material layer

402: First Patterned Mask

404: First veil pattern

502:Second Patterned Mask

504: Second veil pattern

AP1, AP11, AP2, AP22: active pattern

D1: first direction

D2: second direction

D3: Third direction

H1: first height

H1': second height

H2: The third height

H2': The fourth height

L1: first length

L1': second length

L2: The third length

L2': fourth length

PR1, PR2: photoresist pattern

P1: first distance

P1': second distance

TR: Trench Pattern

W1: first width

W1': second width

W2: third width

W2': fourth width

1 to 9 are schematic diagrams of a pattern forming method according to an embodiment of the present invention. Figure 10 is a top view of an active pattern according to an embodiment of the present invention.

100:Base

200: First insulation layer

300: Second insulation layer

404: First veil pattern

502:Second Patterned Mask

D1: first direction

D2: second direction

D3: Third direction

H1': second height

H2: The third height

L1': second length

L2: The third length

PR2: Photoresist pattern

P1: first distance

W1': second width

W2: third width

Claims (9)

A method of forming a pattern, including: sequentially forming a first insulating layer and a second insulating layer on a substrate; forming a first patterned mask on the second insulating layer; and performing a process on the first patterned mask. A first isotropic etching process to form a first mask pattern; forming a second patterned mask spaced apart from the first mask pattern on the second insulating layer; and forming a second patterned mask on the second insulating layer. The patterned mask undergoes a second isotropic etching process to form a second mask pattern, wherein the step of forming the second patterned mask includes: after forming the first mask pattern, Forming a mask material layer covering the first mask pattern on the two insulating layers; and patterning the mask material layer to form the second patterned mask. The method of forming a pattern as claimed in claim 1, further comprising: removing a portion of the second insulating layer exposed by the first mask pattern and the second mask pattern to form a plurality of third mask patterns. Two insulation patterns, wherein the plurality of second insulation patterns are respectively under the first mask pattern and the second mask pattern; remove the portion of the first insulation layer covered by the plurality of second insulation patterns. the exposed portions to form a plurality of first insulating patterns, wherein the plurality of first insulating patterns are respectively under the plurality of second insulating patterns; and with the plurality of first insulating patterns and the plurality of second insulating patterns The second insulation pattern is a mask, A patterning process is performed on the substrate to form an active pattern and a trench pattern defining the active pattern. The method of forming a pattern according to claim 2, wherein in the step of removing the portion of the first insulating layer exposed by the plurality of second insulating patterns, the second mask pattern is also followed by Remove. The method of forming a pattern as claimed in claim 1, wherein the material of the first mask pattern is different from the material of the second mask pattern. The method of forming a pattern according to claim 1, wherein the second isotropic etching process has different etching rates for the second patterned mask and the first mask pattern. The method of forming a pattern as claimed in claim 1, wherein the first patterned mask includes a first width in a first direction and a first length in a second direction intersecting the first direction, The first direction and the second direction are parallel to the surface of the substrate, and the first mask pattern includes a second width in the first direction and a second length in the second direction. , and the first patterned mask and the first mask pattern have the same shape, the first width is greater than the second width, and the first length is greater than the second length. The method of forming a pattern according to claim 6, wherein the second patterned mask includes a third width in the first direction and a third length in the second direction, The second mask pattern includes a fourth width in the first direction and a fourth length in the second direction, and the second patterned mask and the second mask pattern have In the same shape, the third width is greater than the fourth width, and the third length is greater than the fourth length. The method of forming a pattern according to claim 7, wherein the first mask pattern and the second patterned mask are separated by a first distance, and the first mask pattern and the second mask pattern A second distance is spaced apart, and the second distance is greater than the first distance. The method of forming a pattern according to claim 8, wherein the second distance is equal to the second width and the fourth width.

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