TWI828456B - Overlay mark and method of forming the same - Google Patents

Abstract

The present disclosure provides an overlay mark and a method of forming the same. The overlay mark includes a first epitaxial pattern disposed on a substrate, a second epitaxial pattern disposed on the substrate and surrounding the first epitaxial pattern, a first spacer disposed on opposite sidewalls of the first epitaxial pattern, and a second spacer disposed on opposite sidewalls of the second epitaxial pattern. The substrate includes an isolation structure defining a first region and a second region in an active region of the substrate. The second region surrounds the first region. The first and second epitaxial patterns are disposed on the first and second regions, respectively. The first spacer includes a first portion disposed over the isolation structure and a second portion disposed on the first region of the substrate. The second spacer includes a first portion disposed over the isolation structure and a second portion disposed on the second region of the substrate.

Description

Alignment marks and methods of forming them

The present invention relates to an alignment mark and a method for forming the same.

In the semiconductor manufacturing process, the lithography process is a process that transfers the pattern on the photomask to the semiconductor wafer. In order to achieve good overlay accuracy between the photomask and the semiconductor wafer, the relative position between the photomask and the semiconductor wafer needs to be calculated. Alignment marks are generally formed in one of the pattern layers (such as the first layer) in the semiconductor wafer, so that subsequent film layers formed on the pattern layer can be in contact with the pattern through the alignment marks formed therein. Layer alignment.

However, as the feature sizes of semiconductor devices continue to be minimized and the density of semiconductor packages continues to be maximized, current alignment marks are no longer able to meet the alignment error requirements in the manufacturing process of semiconductor devices.

The present invention provides an alignment mark and a method for forming the same, wherein the first spacer and the second spacer are respectively formed on opposite side walls of the first epitaxial pattern and the second epitaxial pattern, and the first spacer and the second gap The walls are each formed to include a first portion above the isolation structure so that the overlay signal can be enhanced by a step height between the first and second spacers and the isolation structure to obtain good alignment. Accuracy.

An embodiment of the present invention provides a method for forming alignment marks, which includes the following steps: forming a dielectric layer on a surface of a substrate, wherein the substrate includes an isolation structure extending from the surface of the substrate into the substrate, and the isolation structure is on an active side of the substrate. A first region and a second region surrounding the first region are defined in the region, and the dielectric layer covers the isolation structure, the first region and the second region; the dielectric layer is patterned to form an exposed isolation structure, a portion of the first region and A dielectric pattern of a portion of the second region; using the dielectric pattern as a mask, a selective epitaxial growth (SEG) process is performed on the portion of the first region and the portion of the second region to grow in the first region respectively. forming a first epitaxial pattern and a second epitaxial pattern on the portion of the region and the portion of the second region; forming a first spacer on opposite side walls of the first epitaxial pattern; and forming a first spacer on the second epitaxial pattern. Second spacers are formed on opposite side walls of the epitaxial pattern.

In some embodiments, the first spacer and the second spacer are made of a material different from the material of the isolation structure.

In some embodiments, the method of forming the alignment mark further includes: before forming the first epitaxial pattern and the second epitaxial pattern, removing a portion of the dielectric pattern and the isolation structure, so that the top surface of the isolation structure includes a horizontal height The area below the level of the surface of the substrate.

In some embodiments, the first spacer includes a first portion formed on the top surface of the isolation structure and a second portion formed on the first region of the substrate, and the second spacer includes a first portion formed on the top surface of the isolation structure. a first portion and a second portion formed on a second region of the substrate.

In some embodiments, the first portion of the first spacer and the first portion of the second spacer extend to a region of the top surface of the isolation structure, such that the level of the bottommost surface of the first portion of the first spacer is lower than that of the first spacer. The level of the bottommost surface of the second portion of the second spacer is lower than the level of the bottommost surface of the second portion of the second spacer.

In some embodiments, the method of forming the alignment mark further includes: after forming the first spacer and the second spacer, performing an etching process on a region on the top surface of the isolation structure to form a third spacer in contact with the first spacer. An insulation pattern, a second insulation pattern in contact with the second spacer, and an isolation structure under the first insulation pattern and the second insulation pattern.

In some embodiments, the isolation structure under the first and second insulation patterns is spaced apart from the first and second spacers.

An embodiment of the present invention provides an alignment mark, which includes a first epitaxial pattern, a second epitaxial pattern, a first spacer and a second spacer. A first epitaxial pattern is disposed on the substrate. The second epitaxial pattern is disposed on the substrate and surrounds the first epitaxial pattern. The first spacers are disposed on opposite side walls of the first epitaxial pattern. The second spacers are disposed on opposite side walls of the second epitaxial pattern. The substrate includes an isolation structure defining first and second regions in an active region of the substrate. The second area surrounds the first area. The first epitaxial pattern and the second epitaxial pattern are respectively disposed on the first area and the second area of the substrate. The first spacer includes a first portion disposed over the isolation structure and a second portion disposed on the first region of the substrate. The second spacer includes a first portion disposed over the isolation structure and a second portion disposed on the second region of the substrate.

In some embodiments, the first epitaxial pattern and the second epitaxial pattern directly contact the substrate.

In some embodiments, the bottommost surface of the first portion of the first spacer has a lower level than the bottommost surface of the second portion of the first spacer, and the bottommost surface of the first portion of the second spacer The horizontal height is lower than the horizontal height of the bottommost surface of the second part of the second spacer wall.

In some embodiments, the bottommost surface of the first portion of the first spacer is spaced apart from the isolation structure, the bottommost surface of the second portion of the first spacer is in contact with the first region of the substrate, and the second spacer is in contact with the first region of the substrate. A bottommost surface of the first portion is spaced apart from the isolation structure, and a bottommost surface of the second portion of the second spacer is in contact with the second region of the substrate.

In some embodiments, the alignment mark further includes a first insulation pattern and a second insulation pattern. The first insulation pattern is disposed above the isolation structure and surrounds the first region of the substrate. The second insulation pattern is disposed above the isolation structure and surrounds the first insulation pattern. The first insulation pattern contacts the first portion of the first spacer, and the second insulation pattern contacts the first portion of the second spacer.

In some embodiments, the first spacer and the second spacer are made of a material different from the material of the isolation structure.

Based on the above, in the above alignment mark and its forming method, the first spacer and the second spacer are respectively formed on the opposite side walls of the first epitaxial pattern and the second epitaxial pattern, and the first spacer and the second spacer The spacers are each formed to include a first portion above the isolation structure, so that the alignment signal (overlay signal) can be enhanced by the step height between the first spacer and the second spacer and the isolation structure to obtain good alignment. Accuracy.

The present invention will be described more fully with reference to the drawings of this embodiment. However, the present invention may also be embodied in various forms and should not be limited to the embodiments described herein. The thickness of layers and regions in the drawings are exaggerated for clarity. The same or similar reference numbers indicate the same or similar components, and will not be repeated one by one in the following paragraphs.

It will be understood that when an element is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element or intervening elements may also be present. When an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements present. As used herein, "connection" may refer to a physical and/or electrical connection, and "electrical connection" or "coupling" may refer to the presence of other components between two components. "Electrical connection" as used herein may include physical connections (such as wired connections) and physical disconnections (such as wireless connections).

As used herein, "about," "approximately" or "substantially" includes the recited value and the average within an acceptable range of deviations from the specific value that a person with ordinary skill in the art can determine, taking into account the Discuss the measurement and the specific amount of error associated with the measurement (i.e., the limitations of the measurement system). For example, "about" may mean within one or more standard deviations of the stated value, or within ±30%, ±20%, ±10%, ±5%. Furthermore, "about", "approximately" or "substantially" used in this article can be used to select a more acceptable deviation range or standard deviation based on optical properties, etching properties or other properties, and one standard deviation does not apply to all properties. .

The terminology used herein is used only to describe illustrative embodiments and does not limit the disclosure. In such cases, the singular form includes the plural form unless the context dictates otherwise.

1 to 6 are schematic diagrams of a method of forming alignment marks according to an embodiment of the present invention. In FIGS. 1 to 6 , (a) is a schematic plan view, and (b) is a schematic cross-sectional view taken along line AA′ of (a).

First, referring to FIGS. 1 and 2 , a dielectric layer 110 is formed on the surface of the substrate 100 . The substrate 100 includes an isolation structure 102 extending from a surface of the substrate 100 into the substrate 100 . The isolation structure 102 defines a first region R1 and a second region R2 surrounding the first region R1 in the active region of the substrate 100 . The dielectric layer 110 covers the isolation structure 102 and the first region R1 and the second region R2 of the substrate 100 . In some embodiments, the level of the top surface of the isolation structure 102 is approximately equal to the level of the top surface of the substrate 100 . In some embodiments, the substrate 100 may further include a device isolation structure (not shown) defining an active region and a channel layer (not shown) formed in the active region.

The substrate 100 may include a semiconductor substrate or a semiconductor on insulator (SOI) substrate. The semiconductor material in the semiconductor substrate or SOI substrate may include element semiconductor, alloy semiconductor or compound semiconductor. For example, elemental semiconductors may include Si or Ge. Alloy semiconductors may include SiGe, SiGeC, etc. Compound semiconductors may include SiC, III-V semiconductor materials, or II-VI semiconductor materials. Group III-V semiconductor materials may include GaN, GaP, GaAs, AIN, AlP, AlAs, InN, InP, InAs, GaNP, GaNAs, GaPAs, AlNP, AlNAs, AlPAs, InNP, InNAs, InPAs, GaAlNP, GaAlNAs, GaAlPAs, GaInNP, GaInNAs, GaInPAs, InAlNP, InAlNAs or InAlPAs. Group II-VI semiconductor materials may include CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, HgS, HgSe, HgTe, CdSeS, CdSeTe, CdSTe, ZnSeS, ZnSeTe, ZnSTe, HgSeS, HgSeTe, HgSTe, CdZnS, CdZnSe, CdZnTe, CdHgS, CdHgSe, CdHgTe, HgZnS, HgZnSe, HgZnTe, CdZnSeS, CdZnSeTe, CdZnSTe, CdHgSeS, CdHgSeTe, CdHgSTe, HgZnSeS, HgZnSeTe or HgZnSTe. The semiconductor material may be doped with a dopant of a first conductivity type or a dopant of a second conductivity type that is complementary to the first conductivity type. For example, the first conductivity type may be N-type, and the second conductivity type may be P-type. Isolation structure 102 may include silicon oxide. In some embodiments, as shown in FIG. 1(a) , the isolation structure 102 may have a ring pattern. Dielectric layer 110 may include silicon oxide.

Next, referring to FIGS. 2 and 3 , the dielectric layer 110 is patterned to form a dielectric pattern 112 that exposes the isolation structure 102 and a portion of the first region R1 and the second region R2 of the substrate 100 . In some embodiments, as shown in (a) and (b) of FIG. 3 , the dielectric pattern 112 may include a first pattern 112 a disposed in the first region R1 of the substrate 100 , and a first pattern 112 a disposed in the second region R2 of the substrate 100 . The second pattern 112b and the opening OP1 arranged between the first pattern 112a and the second pattern 112b. The first pattern 112a is surrounded by the second pattern 112b and is spaced apart from the second pattern 112b by the opening OP1. The opening OP1 of the dielectric pattern 112 exposes the isolation structure 102 , a portion of the first region R1 of the substrate 100 , and a portion of the second region R2 of the substrate 100 .

Then, please refer to FIGS. 3 and 4 , using the dielectric pattern 112 as a mask, a selective epitaxial growth (SEG) process is performed on the portions of the first region R1 and the second region R2 of the substrate 100 that are exposed by the opening OP. , to form the first epitaxial pattern 120a and the second epitaxial pattern 120b on the parts of the first region R1 and the second region R2 respectively.

In some embodiments, from a top view (as shown in (a) of FIG. 4 ), the first epitaxial pattern 120 a may surround the first pattern 112 a of the dielectric pattern 112 , and the second epitaxial pattern 120 b may Surrounding the first epitaxial pattern 120a and may be surrounded by a second pattern 112b of the dielectric pattern 112. That is to say, the epitaxial layer 120 can expose the isolation structure 102 and be formed on the substrate 100 around the isolation structure 102 .

4 and 5, first spacers 132a are formed on opposite side walls of the first epitaxial pattern 120a and second spacers 132b are formed on opposite side walls of the second epitaxial pattern 120b, so that The alignment signal (overlay signal) is enhanced by the step height between the first spacer 132a and the second spacer 132b and the isolation structure (the isolation structure 102 of FIG. 4 or the isolation structure 104 of FIG. 5) to obtain a good alignment accuracy. The first spacer 132a and the second spacer 132b may include silicon nitride.

The first spacer 132a may include a first portion 132a1 formed on a top surface of the isolation structure (such as the isolation structure 102 of FIG. 4 or the isolation structure 104 of FIG. 5 ) and a second portion formed on the first region R1 of the substrate 100 132a2. The second spacer 132b may include a first portion 132b1 formed on a top surface of the isolation structure (such as the isolation structure 102 of FIG. 4 or the isolation structure 104 of FIG. 5 ) and a second portion formed on the second region R2 of the substrate 100 132b2.

In some embodiments, before forming the first epitaxial pattern 120a and the second epitaxial pattern 120b, the dielectric pattern 112 and a portion of the isolation structure 102 may be removed, so that the top surface of the isolation structure 102 includes a horizontal height lower than The horizontal height area of the surface of the substrate 100 can further increase the step height between the first spacer 132 a and the second spacer 132 b and the isolation structure (the isolation structure 104 in FIG. 5 ) to obtain better alignment. signal. In this embodiment, the first portion 132a1 of the first spacer 132a and the first portion 132b1 of the second spacer 132b may extend to a region of the top surface of the isolation structure 104 that is lower than the surface of the substrate 100, so that the first spacer 132a The horizontal height of the bottommost surface of the first part 132a1 is lower than the horizontal height of the bottommost surface of the second part 132a2 of the first spacer 132a, and the horizontal height of the bottommost surface of the first part 132b1 of the second spacer 132b is lower than The horizontal height of the bottommost surface of the second portion 132b2 of the second spacer 132b.

In some embodiments, the first spacer 132a and the second spacer 132b may be manufactured through the following steps. First, a spacer material layer is formed on the surface of the substrate 100 covering the top surface and opposite side walls of the first region R1, the second region R2, the isolation structure 104, the first epitaxial pattern 120a and the second epitaxial pattern 120b. (not shown). Next, the spacer material layer on the top surface of the first region R1 , the second region R2 , the isolation structure 104 and the first epitaxial pattern 120 a and the second epitaxial pattern 120 b is removed through an etch-back process, so that the spacer material layer on the top surface of the first epitaxial pattern 120 a and the second epitaxial pattern 120 b is removed respectively. A first spacer 132a and a second spacer 132b are formed on opposite side walls of an epitaxial pattern 120a and a second epitaxial pattern 120b.

Then, referring to FIGS. 5 and 6 , after forming the first spacer 132 a and the second spacer 132 b, an etching process is performed on the area of the top surface of the isolation structure 104 that is lower than the surface of the substrate 100 to form a gap with the first gap. The first insulation pattern 108a in contact with the wall 132a, the second insulation pattern 108b in contact with the second spacer 132b, and the isolation structure 106 below the first insulation pattern 108a and the second insulation pattern 108b can further improve the first insulation pattern 108a. The step height between the spacer 132a and the second spacer 132b and the isolation structure 106 is to obtain a better alignment signal. In some embodiments, the first spacer 132 a and the second spacer 132 b are made of a different material than the isolation structure 104 . For example, the material of the first spacer 132a and the second spacer 132b may be silicon nitride, and the material of the isolation structure 104 may be silicon oxide.

On the other hand, since the first spacer 132a and the second spacer 132b are formed on the opposite side walls of the first epitaxial pattern 120a and the second epitaxial pattern 120b, the isolation structure 104 is subjected to an etching process (eg, wet After the etching process), the first spacer 132a and the second spacer 132b can still be well adhered to the opposite side walls of the first epitaxial pattern 120a and the second epitaxial pattern 120b without the isolation structure 106 being missing. support (for example, the isolation structure 106 is spaced apart from the first spacer 132a and the second spacer 132b) and there is a concern of delamination. In some embodiments, the first insulation pattern 108a, the second insulation pattern 108b and the isolation structure 106 are formed simultaneously in the same process and therefore have the same material.

Hereinafter, the alignment mark will be explained with reference to FIG. 6 . Although the alignment marks shown in FIG. 6 can be formed by the above process, it is not limited to this. In other embodiments, the alignment marks shown in FIG. 6 can also be formed by other processes.

Please refer to FIG. 6 , the alignment mark includes a first epitaxial pattern 120a, a second epitaxial pattern 120b, a first spacer 132a and a second spacer 132b. The first epitaxial pattern 120a is provided on the substrate 100. The second epitaxial pattern 120b is disposed on the substrate 100 and surrounds the first epitaxial pattern 120a. The first spacers 132a are provided on opposite side walls of the first epitaxial pattern 120a. The second spacers 132b are disposed on opposite side walls of the second epitaxial pattern 120b. The substrate 100 includes an isolation structure 16 defining a first region R1 and a second region R2 in an active region of the substrate 100 . The second area R2 surrounds the first area R1. The first epitaxial pattern 120a and the second epitaxial pattern 120b are respectively disposed on the first region R1 and the second region R2 of the substrate 100. The first spacer 132a includes a first portion 132a1 disposed above the isolation structure 106 and a second portion 132a2 disposed on the first region R1 of the substrate 100. The second spacer 132b includes a first portion 132b1 disposed above the isolation structure 106 and a second portion 132b2 disposed on the second region R2 of the substrate 100 .

In some embodiments, the first epitaxial pattern 120a and the second epitaxial pattern 120b may directly contact the substrate 100. In some embodiments, the material of the first spacer 132 a and the second spacer 132 b is different from the material of the isolation structure 106 .

In some embodiments, the level of the bottommost surface of the first part 132a1 of the first spacer 132a is lower than the level of the bottommost surface of the second part 132a2 of the first spacer 132a, and the level of the bottom surface of the second part 132a2 of the first spacer 132b is The horizontal height of the bottommost surface of the portion 132b1 is lower than the horizontal height of the bottommost surface of the second portion 132b2 of the second spacer 132b. In some embodiments, the bottommost surface of the first portion 132a1 of the first spacer 132a is spaced apart from the isolation structure 106 and the bottommost surface of the second portion 132a2 of the first spacer 132a is in contact with the first region R1 of the substrate 100 , and the bottom surface of the first portion 132b1 of the second spacer 132b is spaced apart from the isolation structure 106, and the bottom surface of the second portion 132b2 of the second spacer 132b is in contact with the second region R2 of the substrate 100.

In some embodiments, the alignment mark further includes a first insulation pattern 108a and a second insulation pattern 108b. The first insulation pattern 108 a is disposed above the isolation structure 106 and surrounds the first region R1 of the substrate 100 . The second insulation pattern 108b is disposed above the isolation structure 106 and surrounds the first insulation pattern 108a. The first insulation pattern 108a contacts the first portion 132a1 of the first spacer 132a, and the second insulation pattern 108b contacts the first portion 132b1 of the second spacer 132b.

To sum up, in the alignment mark and the forming method of the above embodiments, the first spacer and the second spacer are respectively formed on the opposite side walls of the first epitaxial pattern and the second epitaxial pattern, and the first The spacers and the second spacers are each formed to include a first portion above the isolation structure, so that the alignment signal (overlay signal) can be enhanced by the step height between the first spacer and the second spacer and the isolation structure. for good alignment accuracy.

100:Base

102, 104, 106: Isolation structure

108a: First insulation pattern

108b: Second insulation pattern

110: Dielectric layer

112:Dielectric pattern

112a: first pattern

112b: Second pattern

120: Epitaxial pattern

120a: First epitaxial pattern

120b: Second epitaxial pattern

132a: first spacer

132b: Second spacer

132a1, 132b1: Part 1

132a2, 132b2: Part 2

OP1: Open your mouth

R1: The first area

R2:Second area

1 to 6 are schematic diagrams of a method of forming alignment marks according to an embodiment of the present invention.

100:Base

106:Isolation structure

108a: First insulation pattern

108b: Second insulation pattern

120: Epitaxial pattern

120a: First epitaxial pattern

120b: Second epitaxial pattern

132a: first spacer

132b: Second spacer

132a1, 132b1: Part 1

132a2, 132b2: Part 2

R1: The first area

R2: Second area

Claims (13)

A method of forming alignment marks, comprising: forming a dielectric layer on a surface of a substrate, wherein the substrate includes an isolation structure extending from the surface of the substrate into the substrate, the isolation structure being in the The active area of the substrate defines a first area and a second area surrounding the first area, and the dielectric layer covers the isolation structure, the first area and the second area; patterning the dielectric layer The electrical layer is used to form a dielectric pattern that exposes the isolation structure, a portion of the first region, and a portion of the second region; using the dielectric pattern as a mask, the first region is A selective epitaxial growth (SEG) process is performed on a portion of the first region and a portion of the second region to form a first epitaxial growth layer on the portion of the first region and the portion of the second region, respectively. pattern and a second epitaxial pattern; forming first spacers on opposite side walls of the first epitaxial pattern; and forming second spacers on opposite side walls of the second epitaxial pattern. The method of forming an alignment mark as claimed in claim 1, wherein the first spacer and the second spacer are made of materials different from the material of the isolation structure. The method of forming alignment marks according to claim 1, further comprising: removing a portion of the dielectric pattern and the isolation structure before forming the first epitaxial pattern and the second epitaxial pattern. , such that the top surface of the isolation structure includes a region with a level lower than the level of the surface of the substrate. The method of forming an alignment mark as claimed in claim 3, wherein the first spacer includes a first portion formed on the top surface of the isolation structure and a first region formed on the substrate The second portion includes a first portion formed on the top surface of the isolation structure and a second portion formed on the second region of the substrate. The method of forming an alignment mark according to claim 4, wherein the first portion of the first spacer and the first portion of the second spacer extend to the top surface of the isolation structure. The region is such that the level of the bottommost surface of the first portion of the first spacer is lower than the level of the bottommost surface of the second portion of the first spacer, and the second A bottommost surface of the first portion of the spacer has a lower level than a bottommost surface of the second portion of the second spacer. The method of forming alignment marks according to claim 5, further comprising: etching the area on the top surface of the isolation structure after forming the first spacer and the second spacer. A process to form a first insulation pattern in contact with the first spacer, a second insulation pattern in contact with the second spacer, and an isolation structure under the first insulation pattern and the second insulation pattern . The method of forming an alignment mark according to claim 6, wherein the isolation structure under the first insulation pattern and the second insulation pattern is spaced apart from the first spacer and the second spacer. Come on. An alignment mark consisting of: A first epitaxial pattern is provided on the substrate; a second epitaxial pattern is provided on the substrate and surrounds the first epitaxial pattern; first spacers are provided on opposite sides of the first epitaxial pattern. on the sidewalls; and second spacers provided on opposite sidewalls of the second epitaxial pattern, wherein the substrate includes an isolation structure defining a first region and a second region in an active region of the substrate, so The second area surrounds the first area, and the first epitaxial pattern and the second epitaxial pattern are respectively disposed on the first area and the second area of the substrate, and the A first spacer includes a first portion disposed above the isolation structure and a second portion disposed on the first region of the substrate, the second spacer includes a first portion disposed above the isolation structure and a second portion disposed on the second region of the substrate. The alignment mark of claim 8, wherein the first epitaxial pattern and the second epitaxial pattern directly contact the substrate. The alignment mark of claim 8, wherein the level of the bottommost surface of the first portion of the first spacer is lower than the level of the bottommost surface of the second portion of the first spacer. height, and the horizontal height of the bottommost surface of the first portion of the second spacer is lower than the horizontal height of the bottommost surface of the second portion of the second spacer. The alignment mark of claim 10, wherein the bottommost surface of the first portion of the first spacer is spaced apart from the isolation structure, and the second portion of the first spacer The bottommost surface of the first portion of the second spacer is in contact with the first region of the substrate, and the bottommost surface of the first portion of the second spacer is spaced apart from the isolation structure, the second gap The bottommost surface of the second portion of the wall is in contact with the second region of the substrate. The alignment mark of claim 11, further comprising: a first insulating pattern disposed above the isolation structure and surrounding the first region of the substrate; and a second insulating pattern disposed on the isolation structure above and surrounding the first insulating pattern, wherein the first insulating pattern contacts the first portion of the first spacer, and the second insulating pattern contacts the first portion of the second spacer. The alignment mark of claim 8, wherein the first spacer and the second spacer are made of materials different from the material of the isolation structure.

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