TWI800865B - 矽光子結構及其製造方法以及晶圓級系統 - Google Patents

矽光子結構及其製造方法以及晶圓級系統 Download PDF

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Publication number
TWI800865B
TWI800865B TW110125060A TW110125060A TWI800865B TW I800865 B TWI800865 B TW I800865B TW 110125060 A TW110125060 A TW 110125060A TW 110125060 A TW110125060 A TW 110125060A TW I800865 B TWI800865 B TW I800865B
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TW
Taiwan
Prior art keywords
fabricating
wafer
same
level system
silicon photonic
Prior art date
Application number
TW110125060A
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English (en)
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TW202245286A (zh
Inventor
陳又豪
李惠宇
翁崇銘
管瑞豐
吳建德
Original Assignee
台灣積體電路製造股份有限公司
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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4204—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
    • G02B6/4214—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms the intermediate optical element having redirecting reflective means, e.g. mirrors, prisms for deflecting the radiation from horizontal to down- or upward direction toward a device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/122—Basic optical elements, e.g. light-guiding paths
    • G02B6/1221—Basic optical elements, e.g. light-guiding paths made from organic materials
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4204—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68345—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68359—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H01L2224/0237—Disposition of the redistribution layers
    • H01L2224/02379—Fan-out arrangement

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Optics & Photonics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Optical Integrated Circuits (AREA)
TW110125060A 2021-05-14 2021-07-08 矽光子結構及其製造方法以及晶圓級系統 TWI800865B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US17/320,596 2021-05-14
US17/320,596 US11740415B2 (en) 2021-05-14 2021-05-14 Structures and process flow for integrated photonic-electric IC package by using polymer waveguide

Publications (2)

Publication Number Publication Date
TW202245286A TW202245286A (zh) 2022-11-16
TWI800865B true TWI800865B (zh) 2023-05-01

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
TW110125060A TWI800865B (zh) 2021-05-14 2021-07-08 矽光子結構及其製造方法以及晶圓級系統

Country Status (3)

Country Link
US (2) US11740415B2 (zh)
CN (1) CN114994831A (zh)
TW (1) TWI800865B (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11709327B2 (en) * 2021-04-26 2023-07-25 Advanced Micro Devices, Inc. Fanout module integrating a photonic integrated circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070287212A1 (en) * 2003-10-27 2007-12-13 Rpo Pty Limited Planar Waveguide with Patterned Cladding and Method for Producing Same
US20200088960A1 (en) * 2017-07-27 2020-03-19 Taiwan Semiconductor Manufacturing Co., Ltd. Methods of forming semiconductor packages
TW202114087A (zh) * 2019-09-19 2021-04-01 台灣積體電路製造股份有限公司 封裝及其製造方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9618712B2 (en) * 2012-02-23 2017-04-11 Taiwan Semiconductor Manufacturing Company, Ltd. Optical bench on substrate and method of making the same
US9786641B2 (en) * 2015-08-13 2017-10-10 International Business Machines Corporation Packaging optoelectronic components and CMOS circuitry using silicon-on-insulator substrates for photonics applications
US10690849B2 (en) * 2016-06-06 2020-06-23 The Trustees Of Columbia University In The City Of New York Integrated micro-lens waveguide and methods of making and using same
US10120148B2 (en) * 2016-11-01 2018-11-06 Hewlett Packard Enterprise Development Lp Devices with optical ports in fan-out configurations
US10712497B2 (en) * 2018-02-27 2020-07-14 Samsung Electronics Co., Ltd. Photonic integrated circuit packages and methods of manufacturing the same
US10914895B2 (en) * 2018-09-18 2021-02-09 Taiwan Semiconductor Manufacturing Company, Ltd. Package structure and manufacturing method thereof
FR3094502A1 (fr) * 2019-03-25 2020-10-02 Stmicroelectronics (Crolles 2) Sas Puce de circuit intégré photonique
US10937736B2 (en) * 2019-06-14 2021-03-02 Taiwan Semiconductor Manufacturing Company, Ltd. Hybrid integrated circuit package and method
US11670610B2 (en) * 2019-08-20 2023-06-06 Taiwan Semiconductor Manufacturing Company, Ltd. Method and system for verifying integrated circuit stack having photonic device
US11233039B2 (en) * 2019-08-29 2022-01-25 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor packages
CN112558240A (zh) * 2019-09-26 2021-03-26 台湾积体电路制造股份有限公司 封装总成及其制造方法
US11899251B2 (en) * 2019-10-31 2024-02-13 Ayar Labs, Inc. Vertical integrated photonics chiplet for in-package optical interconnect
US11177219B1 (en) * 2020-09-16 2021-11-16 Hewlett Packard Enterprise Development Lp Photonic integrated circuit with integrated optical transceiver front-end circuitry for photonic devices and methods of fabricating the same
US20220342150A1 (en) * 2021-04-22 2022-10-27 Intel Corporation Photonic integrated circuit packaging architecture

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070287212A1 (en) * 2003-10-27 2007-12-13 Rpo Pty Limited Planar Waveguide with Patterned Cladding and Method for Producing Same
US20200088960A1 (en) * 2017-07-27 2020-03-19 Taiwan Semiconductor Manufacturing Co., Ltd. Methods of forming semiconductor packages
TW202114087A (zh) * 2019-09-19 2021-04-01 台灣積體電路製造股份有限公司 封裝及其製造方法

Also Published As

Publication number Publication date
TW202245286A (zh) 2022-11-16
CN114994831A (zh) 2022-09-02
US20220365294A1 (en) 2022-11-17
US11740415B2 (en) 2023-08-29
US20230384538A1 (en) 2023-11-30

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