TWI792486B - Display panel, display backplane and manufacturing method thereof - Google Patents

Abstract

The invention relates to a display panel, a display backplane and a manufacturing method thereof. The metal circuit connection area on the top surface of the substrate for electrical connection with the outside is transferred to the bottom surface as a second wire layer, and the substrate is bonded through the binding layer on the side of the substrate. The driving circuit on the top surface is electrically connected to the second wire layer on the bottom surface. In addition, the upper end of the binding layer disposed on the side of the substrate is higher than the top surface of the substrate, and is combined with the encapsulation layer formed on the top surface of the substrate.

Description

Display panel, display backplane and manufacturing method thereof

The invention relates to the display field, in particular to a display panel, a display backplane and a manufacturing method thereof.

Micro light-emitting diodes (Micro LEDs) are sought after by various manufacturers due to their advantages such as high brightness, wide color gamut coverage, and high contrast. They are called next-generation display devices, and their popularity has continued to rise in recent years; There are still many problems to be overcome. For example, Micro LED is limited by the yield and efficiency of mass transfer. The main application scenario is on small-sized display panels; It needs to be realized by splicing multiple display panels to form a large-size display screen, and the larger the size, the more display panels need to be spliced. However, the Micro LED and the driving circuit on the display backplane of a single display panel are all set on the top surface of the display backplane, and the edge position of the top surface needs to be further reserved to connect the driving circuit to the external electrical connection metal line area, resulting in a wider bezel for a single display panel. Moreover, after splicing a plurality of display panels, the gap between the splicing parts of the display panels is at least twice the width of the frame of a single display panel, which will greatly affect the visual effect and viewing experience.

Therefore, how to reduce the frame width of the display panel is an urgent problem to be solved.

In view of the above-mentioned deficiencies in the prior art, the purpose of the present application is to provide a display panel, a display backplane and a manufacturing method thereof, aiming at solving the problem of how to reduce the frame width of the display panel.

A display backplane, comprising: a substrate, the substrate has an opposite top surface and a bottom surface, the top surface of the substrate is provided with a driving circuit for driving a micro light-emitting chip, the driving circuit includes a chip bonding area circuit, connected to the chip bonding area circuit and At least two first wire layers insulated from each other, one end of the first wire layer extends to the side of the substrate and is flush with this side; the bottom surface of the substrate is provided with at least two second wires corresponding to the first wire layer and insulated from each other layer; an encapsulation layer disposed on the top surface of the substrate; attached to the side of the substrate, at least two bonding layers that electrically connect the corresponding first wire layer and the second wire layer; at least two bonding layers Insulated from each other; one end of the first wire layer extending to the side of the substrate is attached to the inner surface of the binding layer, and the upper end of the binding layer is higher than the top surface of the substrate and combined with the packaging layer; the inner surface of the binding layer is bonded The layer is close to the surface of the substrate, and the upper end of the binding layer is the end of the binding layer close to the top surface of the substrate.

In the above-mentioned display backplane, a drive circuit for driving the miniature light-emitting chips is arranged on the top surface of the substrate, and one end of the first wire layer of the drive circuit extends to the side of the substrate and is flush with the side, and is opposite to the top surface of the substrate. A second wire layer corresponding to the first wire layer is provided on the bottom surface of the substrate, and then a bonding layer is formed on the side of the substrate to electrically connect the corresponding first wire layer and the second wire layer, so as to realize the connection between the driving circuit on the top surface and the second wire layer. The second wire layer on the bottom surface is electrically connected, and can be electrically connected to the outside through the second wire layer, so there is no need to reserve a metal circuit connection area on the top surface of the substrate, which can reduce the frame width of the display backplane; in addition , the upper end of the binding layer arranged on the side of the substrate is higher than the top surface of the substrate, and is combined with the encapsulation layer formed on the top surface, so that the bonding strength between the binding layer and the above-mentioned side can be improved, and the binding layer can be prevented from Falling off or loosening leads to poor conduction, thereby improving the yield and reliability of the display backplane.

Based on the same inventive idea, the present application further provides a method for manufacturing a display backplane, including: manufacturing a driving circuit on the top surface of the substrate, the driving circuit includes a wafer bonding area circuit, and a circuit connected to the wafer bonding area and insulated from each other. At least two first wire layers, one end of the first wire layer extending to the side of the substrate and being flush with the side; and making at least two second conductor layers corresponding to the first conductor layer and insulated from each other on the bottom surface of the substrate, the above-mentioned top surface and bottom surface being two opposite surfaces of the substrate; Form an encapsulation layer on the top surface of the substrate, and the side of the encapsulation layer is flush with the side of the substrate; On the side of the substrate substrate and the encapsulation layer, at least two conductively connected corresponding first wire layers and second wire layers are formed The binding layer, at least two binding layers formed are insulated from each other, and one end of the first wire layer extending to the side of the substrate is attached to the inner surface of the binding layer, the upper end of the binding layer is higher than the top surface of the substrate, and The packaging layer is combined; the inner surface of the binding layer is the surface of the binding layer close to the substrate, and the upper end of the binding layer is the end of the binding layer close to the top surface of the substrate.

The display backplane produced by the above-mentioned manufacturing method of the display backplane has a narrow frame, and the prepared binding layer is not only attached to the side of the substrate, but its upper end is further higher than the top surface of the substrate and can be combined with the encapsulation layer. It can improve the firmness of the bonding layer, avoid the occurrence of poor conduction caused by the bonding layer falling off or loosening from the side, thereby improving the yield rate of display backplane production and reducing costs.

Based on the same inventive concept, the present application further provides a display panel, which includes the above-mentioned display backplane.

The above-mentioned display panel passes through the above-mentioned display backplane with a narrow frame, so the display panel also has a narrow frame, which can improve the visual effect and viewing experience; and the binding layer is not only attached to the side of the substrate, but its upper end is further higher than the top surface of the substrate Combined with the encapsulation layer, it can ensure the firmness of the bonding layer, avoiding the occurrence of poor conduction caused by the bonding layer falling off or loosening from the side, thereby improving the yield and reliability of the display panel.

1: Substrate

10: Bonding area

11: The first wire layer

12: Second wire layer

13: Binding layer

131: the upper end of the binding layer

132: the lower end of the binding layer

100: chamfering area

101: Fillet area

14: Protective layer

2: Miniature light-emitting chip

30: photoresist layer

31: Second vinyl layer

32: Translucent adhesive layer

33: gray glue layer

40: Peelable adhesive layer

B: top surface

A1, A2, A3, A4: side

A11: Groove

AA: display area

L1, L2, L3, L4: distance

S801, S802, S803, S804, S8021, S8022, S8023, S901, S902, S1001, S1002, S1003, S1004, S1005, S1006: steps

Figure 1-1 is a three-dimensional schematic view of the substrate provided by the embodiment of the present application; Figure 1-2 is a cross-sectional view of the substrate provided by the embodiment of the present application; Figure 2-1 is the first sectional view of the display backplane provided by the embodiment of the present application; Figure 2-2 is the second sectional view of the display backplane provided by the embodiment of the present application; Figure 2-3 is the display backplane provided by the embodiment of the present application Figure 2-4 is the fourth cross-sectional view of the display backplane provided by the embodiment of the present application; Figure 2-5 is the fifth cross-sectional view of the display backplane provided by the embodiment of the present application; Figure 3-1 is the cross-sectional view of the display backplane provided by the embodiment of the present application Figure 3-2 is the seventh sectional view of the display backplane provided by the embodiment of the present application; Figure 3-3 is the eighth sectional view of the display backplane provided by the embodiment of the present application; Figure 4 is the implementation of the present application Figure 5-1 is a cross-sectional view of the display backplane provided in the embodiment of the present application II; Figure 5-2 is a cross-sectional view of the display backplane provided in the embodiment of the present application ten; Figure 5-3 is The eleventh cross-sectional view of the display backplane provided by the embodiment of the present application; Figure 6-1 is the twelve-sectional view of the display backplane provided by the embodiment of the present application; Figure 6-2 is the tenth cross-sectional view of the display backplane provided by the embodiment of the present application 3. Figure 7 is a cross-sectional view of the display backplane provided by the embodiment of the present application. Figure 8-1 is a schematic flow chart of the manufacturing method of the display backplane provided by another embodiment of the present application; Figure 8-2 is another embodiment of the present application Figure 8-3 is the top view of the display backplane provided by another embodiment of the present application. Figure 8-4 is the top view of the display backplane provided by another embodiment of the present application. ; Fig. 8-5 is a schematic diagram of the production process of the binding layer provided by another embodiment of the present application; Fig. 8-6 is a schematic structural diagram of a peelable adhesive layer provided by another embodiment of the present application; Fig. 8-7 is the present application Another embodiment of the application provides a schematic structural view of the peelable adhesive layer after removal; Figure 8-8 is a schematic structural view of a protective layer formed on the display backplane provided by another embodiment of the application; Figure 8-9 is another embodiment of the application Another structural schematic diagram provided by an embodiment provided with a peelable adhesive layer; Figures 8-10 are schematic structural diagrams after removal of another peelable adhesive layer provided by another embodiment of the present application; Schematic diagram of the structure; FIG. 9-1 is a schematic flow chart of a method for manufacturing a display backplane provided by another embodiment of the present application; FIG. 9-2 is a schematic diagram of wafer bonding provided by another embodiment of the present application; FIG. 10-1 is A schematic flow chart of a method for manufacturing a display backplane provided in yet another embodiment of the present application; FIG. 10-2 is a top view of a display backplane provided in yet another embodiment of the present application; FIG. 10-3 is yet another implementation of the present application Figure 10-4 is a top view of a display backplane provided by another embodiment of the present application; Figure 10-5 is a top view of a display backplane provided by another embodiment of this application Four; Figure 10-6 is a schematic diagram of cutting a display backplane provided by yet another embodiment of the present application; Figure 10-7 is a cross-sectional view of a display backplane provided by yet another embodiment of this application with the first wire layer formed; 10-8 is a perspective view of a display backplane formed with a first wire layer according to yet another embodiment of the present application; FIG. 10-9 is a perspective view of a display backplane formed with a protective layer according to yet another embodiment of the present application; FIGS. 10-10 are a second perspective view of a protective layer formed on a display backplane provided by yet another embodiment of the present application.

In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Preferred embodiments of the application are provided in the accompanying drawings. However, the present application may be embodied in many different forms and is not limited to the embodiments set forth herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the application more thorough and comprehensive.

Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs. The terms used herein in the description of the application are only for the purpose of describing specific embodiments, and are not intended to limit the application.

In the related art, in the display panel, the LED chip and the driving circuit are arranged on the top surface of the display backplane, and the edge position of the top surface is reserved with a metal circuit connection area for electrically connecting the driving circuit with the outside. , resulting in a wider border of the display panel. When multiple display panels are spliced to form a large-sized display screen, the gap between the splicing of the display panels is at least twice the frame width of a single display panel, which will greatly affect the visual effect and viewing. experience.

In view of this, the present application hopes to provide a solution capable of solving the above-mentioned technical problems, and the details thereof will be described in subsequent embodiments.

This embodiment provides a display backplane. Through the second wire layer connected to the outside on the bottom surface of the substrate, and through the conductive bonding layer provided on the side surface of the substrate, the driving circuit on the top surface of the substrate and the second wire layer on the bottom surface are connected. The wire layer is electrically connected, and then the driving circuit is electrically connected to the outside through the second wire layer. It is not necessary to reserve a metal circuit connection area on the top surface of the substrate to be electrically connected to the outside, which can reduce the frame width of the substrate; The upper end of the binding layer is further combined with the encapsulation layer formed on the top surface of the substrate, which can improve the firmness of the binding layer and prevent the binding layer from falling off or loosening from the side to cause poor conduction.

For ease of understanding, the present embodiment will illustrate the display backplane below with reference to the accompanying drawings.

The display backplane provided in this embodiment includes a substrate 1 shown in FIG. 1-1 and FIG. 1-2. The substrate 1 has a top surface (marked as top surface B in the figure, which can also be called the front surface), and The bottom surface (also called the back) opposite to the top surface B. It should be understood that the shape of the substrate 1 in this embodiment can be set arbitrarily according to requirements, for example, it can be set as but not limited to rectangle, sector, circle, rhombus, regular hexagon, etc. The regular shape can also be set to an irregular shape according to requirements, and details will not be described here. In addition, the material of the substrate 1 in this embodiment can also be set according to application requirements, for example, it can include but not limited to a glass substrate, a printed circuit board (PCB, Printed Circuit Board) substrate, and a silicon substrate.

In this embodiment, the top surface B of the substrate 1 is provided with a driving circuit for driving a micro light-emitting chip. The micro light-emitting chip in this embodiment refers to a micron-level light-emitting chip, which may include, but is not limited to, submillimeter light-emitting diodes. At least one of (Mini LED) wafers and micro light emitting diode (Micro LED) wafers. Of course, the miniature light-emitting chip can also be replaced with a chip of other sizes according to the requirement, and details will not be repeated here.

The drive circuit in this embodiment includes a wafer bonding area circuit, and at least two mutually insulated first wire layers 11 electrically connected to the wafer bonding area circuit. One end of the first wire layer 11 extends to the side of the substrate 1 and flush with this side. In an example of this embodiment, as shown in Fig. 1-2, the chip bonding area circuit may include but not limited to the bonding area 10 corresponding to the positive pin and the negative pin of each miniature light-emitting chip, and the bonding The area 10 specifically includes a corresponding positive electrode bonding area and a negative electrode bonding area, and the first wire layer 11 may include but not limited to at least two wire layers that are electrically connected to the positive electrode bonding area and the negative electrode bonding area respectively and are insulated from each other. Of course, it should be understood that the driving circuit may be further configured to include a bonding area 10 corresponding to electrical connections with other devices and a corresponding first wire layer 11 according to requirements. Moreover, it should be understood that, in this embodiment, the end of the first wire layer 11 extending to the side of the substrate 1 may be the end of the first wire layer 11 away from the driving circuit. And this end is flush with the side of the substrate 1 , that is to say, the end face of this end is on the same plane as the side of the substrate 1 .

It should be understood that each first wire layer 11 in this embodiment may extend to the same side of the substrate 1 , or may extend to different sides of the substrate 1 . For ease of understanding, the substrate 1 shown in FIG. 1-1 is taken as an example for description below. The substrate 1 includes four sides A1 to A4, and the first wire layer 11 on it may all extend to one of the sides, for example, both may extend to the side A1; Side A1 and side A2, or side A3 and side A4; or can extend to two adjacent sides respectively, for example extend to side A1 and side A3 respectively, or side A2 and side A4 etc.; Of course, it can be further extended to three sides or four sides thereof according to requirements, and details will not be repeated here.

In this embodiment, at least two second wire layers 12 corresponding to the first wire layer 11 and insulated from each other are provided on the bottom surface of the substrate 1 . It should be understood that the corresponding relationship between the first wire layer 11 and the second wire layer 12 in this embodiment can be flexibly set. For example, it can be set as one-to-one correspondence, or it can be set as one-to-many or many-to-one according to requirements, and details will not be described here.

The second wiring layer 12 in this embodiment may not extend to the side of the substrate 1, but may also extend to the side of the substrate 1. In this case, it may specifically extend to the side where the first corresponding first wiring layer 11 is located, and may It is flush with this side, for example, as shown with reference to the second wire layer 12 in FIGS. 1-2 , of course, it may not be flush. The second wire layer 12 can be used as a wire layer for external connection, so that after the first wire layer 11 is electrically connected, the driving circuit is electrically connected to the outside. Therefore, there is no need to reserve a metal circuit connection area on the top surface of the substrate 1 , the frame width of the display backplane can be reduced, and even a frameless effect can be achieved visually. When the display backplanes are spliced to form a large display screen, the width of the splicing gap between adjacent display backplanes after splicing can be kept basically with the distance between adjacent light-emitting chips in the display area of each display backplane. Consistent, and can basically achieve a seamless effect in terms of visual effects.

In this embodiment, the display backplane further includes at least two bonding layers 13 attached to the side of the substrate 1 and conductively connecting the corresponding first wire layer 11 and the second wire layer 12; wherein at least two bonding layers 13 are insulated from each other; the end of the first wire layer 11 extending to the side is attached to the inner surface of the binding layer 13, and the upper end of the binding layer 13 is higher than the top surface, and is arranged on the packaging layer (not shown in the figure) on the top surface. out) combination; the inner surface of the binding layer 13 in this embodiment is the surface of the binding layer 13 close to the substrate 1, that is, the side that is attached to the substrate 1, and the upper end of the binding layer 13 is that the binding layer 13 is close to the top. one end of the face.

It should be understood that, in some application examples of this embodiment, when the electrode polarities of two binding layers are the same, the two may not be insulated and isolated; similarly, for the first wire layer and the second wire layer Layers can also be set in a similar manner, and these equivalent replacement setting methods will not be repeated here.

For ease of understanding, the structure in which the binding layer 13 electrically connects the corresponding first wire layer 11 and the second wire layer 12 is described below in conjunction with the examples shown in FIGS. 2-1 to 2-4 .

2-1 to 2-4, one end of the first wire layer 11 extending to the side of the substrate 1 is flush with the side, and the bonding layer 13 attached to the side of the substrate 1 connects the first wire layer 11 and its corresponding second wire layer 12 are electrically connected, wherein, one end of the first wire layer 11 extending to this side is connected to the inner surface of the bonding layer 13 (that is, the bonding layer 13 is bonded to the side surface of the substrate 1 in the figure). Surface) bonding, the upper end 131 of the binding layer 13 is higher than the top surface of the substrate 1, and is combined with the encapsulation layer (not shown) on the top surface; in this embodiment, the binding layer 13 will not extend to Therefore, the top surface of the substrate 1 will not occupy the area of the top surface of the substrate 1, and the frame width of the obtained display backplane can be further reduced. In order to ensure the attachment firmness of the binding layer 13 , the upper end 131 of the binding layer 13 is set higher than the top surface of the substrate 1 and combined with the encapsulation layer on the top surface. Moreover, it should be understood that the connection between the upper end 131 and the encapsulation layer can be flexibly set, which will be exemplified later.

In an example of this embodiment, in order to increase the bonding area between the end of the first wire layer 11 extending to the side of the substrate 1 and the inner surface of the binding layer 13, the first wire layer 11 can be set to a multi-layer structure, In this way, the area of the end surface of the end of the first wire layer 11 extending to this side surface, that is, the bonding area with the inner surface of the binding layer 13 is increased. The first wire layer 11 in this embodiment may be, but not limited to, a multi-layer metal layer, or may be a mixed layer material composed of a metal layer or other conductive materials (such as a conductive adhesive layer). For example, referring to an example shown in FIGS. 2-5 , the first wire layer 11 includes a metal layer formed by stacking at least two metal sub-layers. The materials of the respective metal sublayers may be the same or different, or may be partly the same or partly different. In an application example, the material of the metal sublayer is selected from but not limited to at least one of Al, Mo, Au, Ni, Ag, and Cu.

Of course, in some application examples, the second wire layer 12 may be a single-layer conductive structure, or may be configured as a multi-layer conductive structure, which will not be repeated here.

In this embodiment, the connection mode between the binding layer 13 and the second wire layer 12 can be flexibly set. For ease of understanding, a number of examples will be described below.

Example 1: Referring to Figures 2-4, one end of the second wire layer 12 also extends to the side (this side is the side where the corresponding first wire layer 11 extends) and is flush with this side, the second wire layer 12 One end extending to this side is attached to the inner surface of the binding layer 13; Flat (that is, the end surface of the lower end 132 is on the same plane as the lower surface of the second wire layer 12 (the lower surface is the surface away from the bottom surface of the substrate 1)), and may not be flush with the second wire layer 12, specifically according to Requires flexible settings.

Example 2: As shown in FIG. 2-2, the lower end 132 of the binding layer 13 extends to the bottom surface and is superimposed on the corresponding second wire layer 12, and the electrical connection is realized in this way of superimposing up and down (ie, overlap) , can improve the contact area between the two and the reliability of the connection. In this example, the second wire layer 12 may not extend to the side of the substrate 1 , but the second wire layer 12 extends to the side of the substrate 1 in the example shown in FIG. 2-2 . Of course, in some other application examples, the second wire layer 12 may not extend to the side of the substrate 1, for example, as shown in FIG. It is attached to the inner surface of the binding layer 13, thereby further increasing the contact area between the two. That is to say, in this embodiment, while the lower end 132 of the binding layer 13 can be stacked up and down with the second wire layer 12, the end of the second wire layer 12 extending to the side of the substrate 1 can be further combined with the binding layer 13 at the same time. The inner surface is in close contact.

Example 3: Referring to Figure 2-3, the difference between this example and the connection structure shown in Figure 2-2 in Example 2 is that the lower end 132 of the binding layer 13 extends to the bottom surface, and is connected to the corresponding second wire layer 12 The end face at one end fits in contact.

Certainly, the connection structure between the bonding layer and the second wire layer is not limited to the several structures shown in the above examples, and can be further flexibly replaced with other structures, which will not be repeated here.

In an example of this embodiment, in order to avoid the problem of disconnection when the bonding layer extends to the bottom surface of the substrate, at least one side of the substrate (for example, the side to which the first wiring layer extends) and the bottom surface intersect The area is set as a chamfered area or a rounded area, and the lower end of the binding layer extends to the bottom surface along the chamfered area or the rounded area, so as to avoid disconnection as much as possible and further improve the reliability of the electrical connection. The specific size of the above-mentioned chamfered area or rounded area in this embodiment can be flexibly set.

For example, as shown in FIG. 3-1 and FIG. 3-2 , the area where the side surface and the bottom surface of the substrate 1 intersect is set as a chamfered area 100 , and the lower end 132 of the binding layer 13 extends along the chamfered area 100 to the bottom surface of the substrate 1 . Of course, the chamfered area 100 in this example can also be replaced by the rounded area 101 shown in FIG. 3-3 , or other transitional areas that can avoid disconnection, and details will not be repeated here.

In an example of this embodiment, in order to further enhance the strength of the attachment between the binding layer and the side surface of the substrate, at least a part of the region where the binding layer is attached on the side surface of the substrate can be set as a rough surface, thereby improving The bonding strength between the two. For example, the entire area of the attachment layer can be set as a rough surface, or only a part of it can be set as a rough surface, or the entire area of the side surface of the substrate can be directly set as a rough surface, and the rough surface can be set through the concave surface on the side surface. The grooves and/or protrusions can also be formed by grinding the side surfaces, which will not be repeated here. The roughness of the rough surface in this embodiment can be flexibly set, for example, the roughness Sa can be set to be greater than or equal to 0.1 μm and less than or equal to 0.5 μm.

In an example of this embodiment, on the side of the substrate where the binding layer needs to be provided, a groove penetrating through the top surface and the bottom surface of the substrate can be provided corresponding to the installation area of the binding layer, and the binding layer can be directly disposed in the groove. In this way, the bonding area between the binding layer and the substrate can be improved, and the bonding strength between the two can be improved; the binding layer can also be arranged in the groove, and the binding layer can be reduced from protruding from the side of the substrate as much as possible. size, which can further reduce the frame width of the display backplane. It should be understood that the shape and size of the groove in this example can be flexibly set according to application requirements, for example, the cross-sectional shape of the groove can be but not limited to regular shapes such as rectangle, arc, triangle, or irregular shape. For ease of understanding, an arc-shaped groove is taken as an example for description below.

Referring to the substrate 1 shown in FIG. 4, a plurality of grooves A11 are provided on its side A1, the grooves A11 are arc-shaped grooves, and the first wire layer 11 on the top surface of the substrate 1 extends to the end surface of one end of the side A1. It is flush with the inner surface of the groove A11, so that a binding layer can be set in the groove A11. In an example of this embodiment, the outer surface of the binding layer (the surface of the binding layer away from the substrate) can be located on the same surface as the area on the side A1 where the groove A11 is not provided, that is, it is arranged flush with the side A1 , so as to reduce the frame width of the manufactured display backplane as much as possible. Of course, in some application examples, the outer surface of the binding layer can also be set to protrude from the side A1, or the outer surface of the binding layer is located in the groove A11.

In this embodiment, the way of combining the upper end of the binding layer with the encapsulation layer formed on the top surface of the substrate may be that at least a part of the upper end of the binding layer is embedded in the encapsulation layer, or the inner surface of the binding layer may be Bonded to the side of the encapsulation layer. Among them, in order to improve the display effect, further reduce the frame of the display backplane visually, and achieve the effect of basically no frame visually, the distance between the upper end and the bottom surface of the binding layer can be set to be smaller than the upper surface and the bottom surface of the encapsulation layer. The distance between the bottom surfaces, that is, the upper surface of the encapsulation layer is higher than the upper end of the binding layer, so that part of the light can be emitted through the side of the encapsulation layer, and basically achieve the effect of no frame visually; the upper surface of the encapsulation layer is the encapsulation layer The face away from the top face.

In an example of this implementation, the display backplane may further include a protective layer covering the binding layer, so as to protect the binding layer. The protective layer in this embodiment may be but not limited to an insulating layer, or may be but not limited to a conductive layer with certain conductivity. When the protective layer is an insulating layer, one binding layer may correspond to one protective layer, or one protective layer may directly cover multiple binding layers (at this time, the adjacent binding layers are also covered by the protective layer). The protective layer in this embodiment may be a light-transmitting layer, or may be set as a non-light-transmitting layer according to requirements. The setting of the protective layer can prevent the binding layers between adjacent display backplanes from colliding and being damaged when a plurality of display backplanes are spliced to form a large-size display screen. In one example, in order to improve the visual effect of the joint, the protective layer may be set as a black protective layer, such as but not limited to a black ink layer or a first black glue layer. The thickness of the black ink layer or the first vinyl layer can be flexibly set according to requirements, for example, it can be set to be greater than or equal to 3 μm and less than or equal to 10 μm. The optical density (Optical Density, OD) value of the protective layer can also be flexibly set, for example, can be set to be greater than or equal to 2 but not limited to.

For example, referring to an example shown in FIG. 5-1 , the display backplane further includes a protective layer 14 covering the binding layer 13 . In this example, the upper end of the protective layer 14 is higher than the upper end 131 of the binding layer 13 .

For another example, referring to an example shown in FIG. 5-2, the display backplane further includes a protective layer 14 covering the binding layer 13. In this example, the upper end of the protective layer 14 is flush with the upper end 131 of the binding layer 13. .

It should be understood that the protective layer 14 in this embodiment may fully cover the outer surface of the binding layer 13, or may only partially cover the outer surface of the binding layer 13, as shown in Fig. 5-3 for example. The details can be flexibly set according to requirements.

The display backplane provided in this embodiment does not need to reserve the metal line area for electrically connecting the drive circuit to the outside on the front of the substrate, but instead transfers the area to the back of the substrate, thus making the substrate have a narrower Frame, the width of the frame can reach half of the distance between the corresponding light-emitting chips, or even smaller, in terms of visual effect, it can achieve a visual effect without a frame, and when it is spliced into a large display screen, it can basically achieve a seamless splicing visual effect effect; in addition, the binding layer is not only attached to the side of the substrate, but its upper end is further higher than the top surface of the substrate to be combined with the encapsulation layer, which can improve the firmness of the binding layer and prevent the binding layer from falling off or loosening from the side This leads to the occurrence of poor conduction, thereby improving the yield rate of the display backplane and reducing the cost.

In an example of this embodiment, the display backplane further includes an encapsulation layer and a plurality of micro light-emitting chips, the plurality of micro light-emitting chips are fixed on the top surface of the substrate and electrically connected to the chip bonding area circuit, and the encapsulation layer is arranged on the substrate. The top surface is combined with the upper end of the binding layer, and the micro light-emitting chip is covered. Of course, in some application scenarios, at least one light-emitting surface of at least one micro light-emitting chip can also be exposed to the encapsulation layer.

The miniature light-emitting chip in this embodiment may include but not limited to at least one of a Mini LED chip and a Micro LED chip. The micro-light-emitting chip can be transferred to the top surface of the substrate through various chip transfer methods, and bonded to the corresponding bonding area in the driving circuit.

In this embodiment, the structure of the encapsulation layer can be flexibly set, which will be described below with multiple structural examples.

Example 1: the encapsulation layer includes a second black glue layer covering the top surface, and a transparent glue layer or a translucent glue layer arranged on the second black glue layer; at least one light-emitting surface of the micro light-emitting chip is exposed on the second black glue layer. glue layer. For example, referring to the display backplane shown in FIG. 6-1, a micro light emitting chip 2 is bonded on the top surface of the substrate 1. The micro light emitting chip 2 may include but not limited to a blue light emitting chip, or include but not limited to a blue light emitting chip. Wafers, Red Emitting Wafers, and Green Emitting Wafers. A second black glue layer 31 is provided on the top surface of the substrate 1 , the light-emitting surface of the front surface of the micro light-emitting chip 2 is exposed to the second black glue layer 31 , and a translucent glue layer 32 is arranged on the second black glue layer 31 . In an application example, the thickness of the second black glue layer 31 may be but not limited to 50 μm to 60 μm, and the thickness of the translucent glue layer 32 may be but not limited to 150 μm to 200 μm. In some application examples, the translucent adhesive layer 32 or the transparent adhesive layer can be replaced by a transparent substrate. In the example shown in Figure 6-1, the upper end of the binding layer 13 is embedded in the encapsulation layer, specifically the upper end of the binding layer 13 is embedded in the translucent adhesive layer 32, and is lower than the upper end of the translucent adhesive layer 32. top surface. The upper end of the protective layer 14 in this example is also embedded in the translucent adhesive layer 32 , of course, it may not be embedded in the translucent adhesive layer 32 .

Example 2: The encapsulation layer includes a gray adhesive layer covering the top surface and covering a plurality of micro light-emitting chips; the gray adhesive layer has light transmittance, and the light transmittance of the gray adhesive layer is lower than that of the translucent adhesive layer . For example, referring to the display backplane shown in Figure 6-2, a micro light-emitting chip 2 is bonded on the top surface of the substrate 1, and a gray glue layer 33 is arranged on the top surface of the substrate 1, and the thickness of the gray glue layer 33 can be flexibly set. . In the example shown in FIG. 6-2 , the inner surface of the upper end of the binding layer 13 is attached to the inner surface of the encapsulation layer, specifically, the inner surface of the gray adhesive layer 33 . The upper end of the binding layer 13 and the upper end of the protective layer 14 can be set flush, and can also be lower than the protective layer. The upper end of the layer 14; the upper end of the protective layer 14 and the upper surface of the gray glue layer 33 can be arranged flush, and can also be lower than the gray glue layer 33.

Example 3: In this example, the encapsulation layer may further include a color filter layer (also called a luminescence conversion layer) that performs color conversion on the light emitted by the micro light emitting chip 2, and the color filter layer may be directly arranged on the micro light emitting chip 2 can also be arranged on the second black adhesive layer 31 in the above example, or on the translucent adhesive layer 32 , or on the gray adhesive layer 33 .

Example 4: In this embodiment, on the basis of the above examples, it may further include a peelable adhesive layer at the lowest layer, and the peelable adhesive layer does not cover the circuit in the bonding area of the wafer.

Of course, it should be understood that the structure of the encapsulation layer in this embodiment is not limited to the structure of the above examples. For example, in some application examples, the encapsulation layer may further include Of course, other adhesive layers or conversion layers can be further set according to the requirements, and details will not be repeated here. In addition, the specific materials and manufacturing processes of the above layers in this embodiment can be flexibly set, and will not be repeated here.

In an example of this embodiment, as shown in FIG. 7, the distance L1 between the upper end 131 of the binding layer and the bottom surface of the substrate 1 is smaller than the upper surface of the packaging layer (in this example, the translucent adhesive layer 32 in FIG. 7 The distance L2 between the upper surface of the encapsulation layer) and the bottom surface of the substrate 1, that is, the upper surface of the encapsulation layer is higher than the upper end 131 of the binding layer, so that part of the light can be emitted through the side of the encapsulation layer, so as to basically achieve the effect of no frame visually. . And when splicing into a large display screen, the visual effect of seamless splicing can basically be achieved.

Another preferred embodiment: this embodiment provides a method for manufacturing a display backplane, which can be used to manufacture the display backplane shown in the above embodiments, as shown in Figure 8-1, which includes but is not limited to the following steps .

Step S801: Fabricate a circuit on a substrate.

In step S801 , it includes fabricating a driving circuit on the top surface of the substrate, and fabricating at least two second wire layers insulated from each other on the bottom surface of the substrate. The fabricated drive circuit contains mutual insulation There are at least two first wire layers, one end of the first wire layer extends to the side of the substrate and is flush with the side, and the second wire layer formed on the bottom surface of the substrate corresponds to the first wire layer.

It should be understood that, in this embodiment, there is no limitation to the manner of fabricating the circuit on the substrate. For ease of understanding, the following uses a glass substrate as an example and a process of fabricating a circuit on the substrate as an example for description.

In this example, the substrate can be driven in active mode (PM mode) or in passive mode (AM mode). During the manufacturing process, as shown in FIG. 8-2 , when forming a metal film on the substrate 1 to form a circuit, the metal layer at the edge of the display area AA on the substrate 1 is reserved to extend beyond the display boundary. Then the substrate 1 is cut along the edge of the display area AA. On the top surface and the bottom surface of the substrate 1, the metal layer extending from the edge of the display area AA is cut to form corresponding first wire layers and second wire layers respectively. wire layer. For example, referring to FIG. 8-3 , the first wire layer 11 is formed on the top surface of the substrate 1 after cutting.

In this embodiment, in order to avoid a short circuit between adjacent wire layers when bonding layers on the side of the substrate 1, a layer of insulating photoresist can be covered on the metal line after film formation, exposure, and development to form a line pattern (That is, a layer of insulating photoresist is formed on the front and back of the substrate 1), the photoresist layer at this time covers all the metal lines, and the photoresist layer on the surface of the wire layer corresponding to the edge position of the display area AA can be passed through Exposure and development for window opening. For example, refer to the photoresist layer 30 shown in FIGS. 8-4 .

In some application examples, because the thickness of the single-layer metal layer is small, in order to improve the bonding (also called lap) between the side end of the first wire layer extending to the substrate and the inner surface of the bonding layer The area can be passed through, but not limited to, through the yellow light process to sequentially stack multiple metal sub-layers to form a first wire layer with a multi-layer structure, thereby multiplying the thickness of the first wire layer to ensure that the first wire layer and the bonding The bonding area between layers. The multi-layer structure of the formed first wiring layer can be referred to but not limited to that shown in FIGS. 2-5 , and will not be repeated here.

Step S802: forming an encapsulation layer on the top surface of the substrate.

Step S803: forming at least two bonding layers electrically connecting the corresponding first wire layer and the second wire layer on the side surfaces of the substrate and the encapsulation layer.

In this example, the formed at least two bonding layers are insulated from each other, and the end of the first wire layer extending to the side is attached to the inner surface of the bonding layer, and the upper end of the bonding layer is higher than the top surface of the substrate, and is in line with the design. The encapsulation layer on this top surface is bonded.

It should be understood that, in this embodiment, the manner of forming the binding layer on the side surfaces of the substrate and the encapsulation layer can be flexibly set. And in some examples, before at least two bonding layers electrically connecting the corresponding first wire layer and the second wire layer are formed on the side surfaces of the substrate and the encapsulation layer, at least one of the following configurations may be included but not limited to.

The area where the side and the bottom of the substrate intersect is chamfered to form a chamfered area or rounded to form a rounded area, so as to avoid the formation of the binding layer and the lower end of the binding layer during the extension process.

At least the area on the side of the substrate where the bonding layer is to be formed is ground to form a rough surface.

A groove is formed on the side surface of the substrate where the binding layer needs to be formed, and in some examples, the inner wall of the groove can also be treated as a rough surface. Of course, the grooves in this embodiment can also be formed in advance. For example, in the process of making the substrate, a through hole can be opened in the junction area of the substrate first, and then cut along the center of the through hole. The groove is preset at the corresponding position on the side.

For ease of understanding, multiple examples of forming a binding layer are used for illustration below. Referring to Fig. 8-5, it includes but not limited to the following examples.

Step S8021: forming a peelable adhesive layer on the top surface of the substrate, the side of the peelable adhesive layer being flush with the side of the substrate.

Step S8022: Form a binding layer on the side of the substrate and the side of the peelable adhesive layer, the distance between the upper end and the bottom surface of the binding layer is less than or equal to the distance between the upper surface and the bottom surface of the peelable adhesive layer, and the peelable adhesive layer can be peeled The upper surface of the adhesive layer is the surface away from the top surface of the peelable adhesive layer.

For example with reference to shown in Figure 8-6, be provided with peelable adhesive layer 40 on the top surface of substrate 1, then form binding layer 13 on the side of substrate 1 and the side surface of removable adhesive layer 40, the binding layer 13 The distance L3 between the upper end 131 and the bottom surface of the substrate 1 is less than or equal to the distance L4 between the upper surface of the peelable adhesive layer 40 and the bottom surface of the substrate 1, and the upper surface of the peelable adhesive layer is far from the top surface of the substrate 1. face.

In one example, the binding layer can be formed on the side of the substrate and the side of the peelable adhesive layer through, but not limited to, printing metal paste (for example, silver paste), sputtering metal film and transferring ink; binding After the fixed layer is formed, curing treatment can be carried out. According to different materials, Oven curing can be used but not limited to (for example, low-temperature curing silver paste can be 80 ° C for about 40 minutes, high-temperature curing silver paste can be 180 ° C for 30 minutes) or thunder Radiation curing (for example, a transient 260°C laser at a rate of 5mm/sec).

Step S8023: removing the part of the peelable adhesive layer covering the circuit in the bonding region of the wafer.

After removal, at least retain the edge area of the peelable adhesive layer, for example, with reference to Figures 8-7, after the peelable adhesive layer 40 is removed, the remaining edge area (the edge area includes at least the edge of the side where the binding layer 13 is provided) region) combined with the upper end 131 of the binding layer 13, the width of the reserved edge region can be flexibly set, for example, it can be set to 50um to 70um. In an example of this embodiment, the strippable adhesive layer 40 may be, but not limited to, the photoresist layer 30 , and the photoresist to be removed may be removed by opening a window through, but not limited to, the photoresist 30 . Certainly, in step S8023, the photoresist layer 30 may be further removed.

After step S8023, the bonding of the miniature light-emitting chip can be completed on the exposed chip bonding area circuit, and other glue layers of the packaging layer can be formed continuously, for example: a second black glue layer is formed on the top surface, and a second black glue layer is formed on the second The black glue layer forms a transparent glue layer or a translucent glue layer; or, a gray glue layer is formed on the top surface to cover a plurality of micro light-emitting chips.

For ease of understanding, the following description will be made in conjunction with FIG. 9 , which includes but not limited to the following steps.

Step S901: completing the transfer and bonding of the micro light-emitting chip on the top surface of the substrate.

For example, for Mini LED chips, but not limited to Surface Mount Technology (SMT, Surface Mounted Technology) process can be used, for Micro LED chips, can be used but not limited to anisotropic conductive film (ACF, Anisotropic Conductive Film) for material Bonding or bonding in a eutectic manner of an under-bump metallization (UBM, Under-bump metallization) layer. For example, as shown in FIG. 9-2 , the bonding of the micro light-emitting chip 2 is completed on the top surface of the substrate 1 .

Step S902: forming other glue layers of the encapsulation layer on the top surface of the substrate.

For example, after completing the bonding of the micro light-emitting chip in step S901, a layer of 50 μm to 60 μm black glue material (that is, the first Two black glue layers, the black glue material can be a composite material of reactive polyimide and epoxy resin, wherein polyimide is used as a curing agent, and additional elements such as carbon are added to increase the blackness). In this example, the vinyl layer after encapsulation can cover the peelable adhesive layer. The black glue beyond the upper surface of the micro light-emitting chip is removed by a slurry method. The vinyl layer can play the role of enhancing the brightness of the brightness display area and improving the front reflection. Then seal a layer of translucent adhesive layer on the upper surface of the black adhesive layer by vacuum hot pressing. The thickness of the translucent adhesive layer is 150 μm to 200 μm. The material can also be but not limited to epoxy resin with polyimide as the curing agent. Resin composites.

Of course, in some examples, the above-mentioned black glue layer and translucent glue layer can be replaced by a gray glue layer with a light transmittance lower than that of the translucent glue layer.

Step S804: Form a protective layer covering the binding layer on the side surfaces of the substrate and the encapsulation layer, as shown in FIG. 8-8. It should be understood that step S804 is an optional step.

For example, a layer of black protective glue (that is, the first black glue layer) or a black ink layer can be covered on the outer surface of the binding layer, which can prevent collisions from damaging lines and improve the visual effect of joints. For example, in an application scenario, a layer of black protective glue can be covered. The black protective glue can be made of but not limited to improved acrylic resin material plus black pigment filler, etc., which has high adhesion, and its thickness can be set to one The part is 3 μm to 8 μm, and the optical density (OD, Optical Density) value is greater than 2. The material of the gray glue can be, for example, silicone resin mixed with carbon powder, and the specific material is not limited here.

In another example of this embodiment, after the peelable adhesive layer is formed on the top surface of the substrate, the part of the peelable adhesive layer covering the wafer bonding area circuit can also be removed first, and then the peelable adhesive layer can be formed on the side surface of the substrate and the peelable adhesive layer. A binding layer is formed on the side of the glue layer.

For example, with reference to Figures 8-9, a peelable adhesive layer 40 is first formed on the top surface of the substrate 1; with reference to Figures 8-10, the part where the peelable adhesive layer 40 covers the wafer bonding area circuit is removed, The edge of the substrate 1 retains a peelable adhesive layer 40 with a predetermined width; referring to FIGS. 8-11 , a binding layer 13 is formed on the sides of the substrate 1 and the peelable adhesive layer 40 .

The display backplane produced by the above method of manufacturing the display backplane no longer needs to reserve a metal line connection area on the top surface of the substrate, but realizes the connection with the outside through the second wire layer on the bottom surface of the substrate. The obtained display backplane has a narrow frame, and the prepared binding layer is not only attached to the side of the substrate, but its upper end is further higher than the top surface of the substrate so that it can be combined with the encapsulation layer, and its attachment firmness is better. ensure.

Another preferred embodiment: this embodiment further provides a method for manufacturing a display backplane, which mainly includes several processes of substrate manufacturing, wafer bonding, forming an encapsulation layer, and manufacturing a binding layer. For example, as shown in FIG. 10-1 , the manufacturing method of the display backplane includes but not limited to the following steps.

Step S1001: Fabricate a circuit on a substrate.

The process of making the circuit on the substrate in step S1001 can refer to the process in step S801 in the above embodiment, but after the circuit pattern is formed in the display area AA on the substrate 1, it is not cut first, and in order to avoid the circuit pattern on the substrate 1 When the bonding layer is made on the side of the wire, there is a short circuit between adjacent wire layers, and a layer of insulating photoresist can be covered on the metal line after film formation, exposure, and development to form a circuit pattern. At this time, the photoresist layer 30 covers all Metal wiring, and the photoresist layer 30 on the surface of the wire layer corresponding to the edge position of the display area AA can be exposed and developed to open a window, and the obtained structure diagram is shown in FIG. 10-2.

Step S1002: completing the bonding of the micro light-emitting chip on the top surface of the substrate.

In this embodiment, the transfer and bonding process of the micro-light-emitting chip will not be described in detail. An example after bonding is shown in Figure 10-3. The micro-light-emitting chip 2 in the figure can be a blue light-emitting chip, or it can include blue light Chips, Red Light Emitting Chips and Green Light Emitting Chips.

Step S1003: forming an encapsulation layer on the top surface of the substrate, the formed encapsulation layer covers the miniature light-emitting chips, and the sides of the encapsulation layer are flush with the sides of the substrate.

In this embodiment, the process of forming the encapsulation layer on the top surface of the substrate may refer to, but is not limited to, the process of forming the encapsulation layer in the above examples. The encapsulation layer includes a second black glue layer and a translucent glue layer as an example for description below.

A second black glue layer 31 can be formed on the top surface of the substrate 1 first, as shown in FIG. 10-4 , and then a translucent glue layer 32 is formed on the second black glue layer 31 , as shown in FIG. 10-5 . The cured hardness of the photoresist layer 30 , the second black glue layer 31 and the translucent glue layer 32 can be set to be greater than or equal to 2H to meet the subsequent cutting requirements.

Step S1004: cutting the substrate along the display area to remove other parts outside the display area AA. It should be understood that step S1004 in this embodiment is an optional step, and step S1004 may not be performed when the entire top surface of the substrate is the display area.

In this embodiment, after the encapsulation layer is formed, four sides of the substrate 1 can be cut according to the size of the display area AA. The cutting method can be but not limited to laser cutting, knife wheel cutting and other processes. example Referring to the cutting direction indicated by the arrow in Figure 10-6, the laser can be used to cut from the sealing layer downwards, the laser cuts off the packaging layer, and further cuts to a depth of 70 μm to 80 μm on the substrate 1, and then manually splits Or remove the area outside the display area AA by means of mechanical automatic splitting. Of course, in some examples, it can also be cut to the bottom surface of the substrate 1 .

Step S1005: On the side surfaces of the substrate and the encapsulation layer, form at least two binding layers conductively connecting the corresponding first wire layer and the second wire layer.

The at least two binding layers 13 formed in step S1005 are insulated from each other, and the end of the first wire layer 11 extending to the side is attached to the inner surface of the binding layer 13, and the upper end of the binding layer 13 is higher than the top surface, and is in contact with the The combination of encapsulation layers is shown in Figure 10-7 and Figure 10-8.

It should be understood that, in this embodiment, after step S1004 is performed and before step S1005 is performed, at least one of the following processes may be selectively performed but not limited to.

Grind at least the area where the binding layer needs to be formed on the side of the substrate to form a rough surface; for example, a diamond grinding rod can be used but not limited to the side of the cut substrate (preferably, the encapsulation layer can be further processed at the same time as required) side) for grinding, the mesh of the grinding rod can be 800, 1000 and 1500, etc. After grinding, the surface roughness Sa is greater than or equal to 0.1 μm and less than or equal to 0.3 μm. The roughness can improve the adhesion of the conductive material used to make the binding layer , so as to improve the bonding strength between the bonding layer and the substrate and the encapsulation layer; chamfering the area where the side and bottom of the substrate intersect to form a chamfered area or rounding the corners to form a rounded area, thereby avoiding the formation of bonding layer, the lower end of the bonded layer is disconnected during extension; in one example, the bottom of the substrate can be chamfered or rounded during grinding of the sides of the substrate, chamfered or rounded The size may be less than or equal to 100 μm; a groove is provided on the side of the substrate where the binding layer needs to be formed, and in some examples, the inner wall of the groove can also be treated as a rough surface. Of course, the grooves in this embodiment can also be formed in advance. For example, in the process of making the substrate, a through hole can be opened in the junction area of the substrate first, and then along the through hole The center of the hole is cut, and the groove is preset at the corresponding position on the side of the monolithic substrate obtained after cutting. Of course, in some examples, the groove can further penetrate the encapsulation layer.

Step S1006: forming a protective layer covering the binding layer on the side surfaces of the substrate and the encapsulation layer. It should be understood that step S1006 is an optional step.

For example, a layer of black protective glue (that is, the first black glue layer) or a black ink layer can be covered on the outer surface of the binding layer, which can prevent collisions from damaging lines and improve the visual effect of joints. For example, in an application scenario, a layer of black protective glue can be covered. The black protective glue can be made of but not limited to improved acrylic resin material plus black pigment filler, etc., which has high adhesion, and its thickness can be set to one The part is 5 μm to 7 μm, and the optical density (OD, Optical Density) value is greater than or equal to 2.

For example, referring to an example shown in FIGS. 10-9 , the display backplane includes a plurality of protective layers 14 that correspond one-to-one to the plurality of binding layers 13 , and each protective layer 14 covers each corresponding binding layer 13 . The protective layer 14 in this example can be an insulating protective layer, or can be set as a conductive protective layer according to requirements.

For another example, referring to another example shown in FIGS. 10-10 , the display backplane includes a protective layer 14 disposed on the side of the substrate 1 , and the protective layer 14 directly covers the plurality of binding layers 13 . The protective layer 14 in this example is an insulating protective layer.

Another preferred embodiment: this embodiment further provides a display panel, which includes the above-mentioned display backplane. Moreover, a display screen is further provided, which includes a display panel and a frame, and the display panel is fixed on the frame. The display screen has a narrow border, and the substrate can achieve a borderless effect in terms of visual effects, so the display effect and viewing experience are better. It can be applied to but not limited to various smart mobile terminals, vehicle terminals, personal computers, monitors, electronic advertising boards, etc. .

This embodiment further provides a spliced display screen. The spliced display screen can be formed by splicing at least two display screens as shown above. Since the borders of the display screens are narrow, adjacent display screens The width of the splicing gap after splicing between the screens can be basically consistent with the distance between adjacent light-emitting chips in the display area of each display screen, so as to achieve a seamless visual effect.

It should be understood that the application of the present invention is not limited to the above-mentioned examples, and those skilled in the art can improve or change according to the above description, and all these improvements and changes should belong to the scope of protection of the appended claims of the present invention .

1: Substrate

11: The first wire layer

12: Second wire layer

14: Protective layer

2: Miniature light-emitting chip

31: Second vinyl layer

32: Translucent adhesive layer

131: the upper end of the binding layer

L1, L2: distance

Claims (13)

A display backplane, comprising: a substrate, the substrate has an opposite top surface and a bottom surface, the top surface is provided with a drive circuit for driving a micro light-emitting chip, the drive circuit includes a chip bonding area circuit, and The chip bonding area is connected to at least two first wire layers that are insulated from each other. One end of the first wire layer extends to a side of the substrate and is flush with the side; the bottom surface is provided with a layer corresponding to the first wire layer. At least two second wire layers that are insulated from each other; a plurality of micro light-emitting chips, the plurality of micro light-emitting chips are fixed on the top surface and connected to the chip bonding area; a package layer, the package layer is set on the top surface surface; the encapsulation layer includes a second black glue layer covering the top surface, and a transparent glue layer or a semi-transparent glue layer arranged on the second black glue layer, at least one of the plurality of micro light-emitting chips The light-emitting surface is exposed on the second black glue layer; or, the encapsulation layer includes a gray glue layer covering the top surface and covering the plurality of micro light-emitting chips; at least two bonding layers, the at least two bonding layers The layer is attached to the side, and the corresponding first wire layer and the second wire layer are respectively conductively connected; the at least two bonding layers are insulated from each other; the first wire layer extends to one end of the side and the bonding layer The inner surface of the binding layer is bonded, the upper end of the binding layer is higher than the top surface, and is combined with an encapsulation layer arranged on the top surface; the inner surface of the binding layer is the surface of the binding layer close to the substrate, The upper end of the binding layer is the end of the binding layer close to the top surface. The display backplane as described in claim item 1, wherein the lower end of the binding layer extends to the bottom surface and is superimposed on the corresponding second wire layer, and the lower end of the binding layer is The bonding layer is away from one end of the top surface; and/or, one end of the second wire layer extends to the side and is flush with the side, and the second wire layer extends to the end of the side and the bonding layer Fitted inside. The display backplane according to claim 2, wherein the area where the side surface and the bottom surface of the substrate intersect is a chamfered area or a rounded area, and the lower end of the binding layer is along the chamfered area or the rounded area. The bottom surface extends. The display backplane as described in any one of claim 1 to claim 3, wherein a groove is provided on the side surface where the binding layer is attached, and the binding layer is located in the groove; and/ Or; at least a part of the region where the binding layer is attached on the side is a rough surface. The display backplane according to any one of claim 1 to claim 3, wherein the inner surface of the binding layer is attached to the side surface of the encapsulation layer. The display backplane according to any one of claim 1 to claim 3, wherein the distance between the upper end of the binding layer and the bottom surface is smaller than the distance between the upper surface of the encapsulation layer and the bottom surface, the The upper surface of the encapsulation layer is the surface of the encapsulation layer away from the top surface. The display backplane according to any one of claim 1 to claim 3, wherein the first wire layer includes a metal layer formed by stacking at least two metal sub-layers. The display backplane according to any one of claim 1 to claim 3, wherein the display backplane further includes a protective layer covering the binding layer. A method for manufacturing a display backplane, comprising: Fabricate a driving circuit on a top surface of a substrate, the driving circuit includes a wafer bonding area circuit, and at least two first wire layers connected to the wafer bonding area circuit and insulated from each other, one end of the first wire layer Extending to one side of the substrate and being flush with the side; and making at least two second conductor layers corresponding to the first conductor layer and insulated from each other on a bottom surface of the substrate, the top surface and the bottom surface are opposite to the substrate on the top surface, an encapsulation layer is formed, and the side of the encapsulation layer is flush with the side surface of the substrate; on the side surfaces of the substrate and the encapsulation layer, the corresponding first wiring layer and The second wire layer is electrically connected to at least two binding layers, and the at least two binding layers formed are insulated from each other, and one end of the first wire layer extending to the side is attached to the inner surface of the binding layer, and the binding layer The upper end of the fixed layer is higher than the top surface and combined with the encapsulation layer; the inner surface of the binding layer is the surface of the binding layer close to the substrate, and the upper end of the binding layer is the surface of the binding layer close to the top surface before forming the encapsulation layer on the top surface, further comprising: completing the bonding of a micro light-emitting chip on the wafer bonding area circuit; forming the encapsulation layer on the top surface includes: forming the encapsulation layer on the top surface A second black glue layer is formed on the second black glue layer, and a transparent glue layer or a semi-transparent glue layer is formed on the second black glue layer; at least one light-emitting surface of the micro light-emitting chip is exposed to the second black glue layer; or, in A gray glue layer covering the micro light-emitting chip is formed on the top surface. The manufacturing method of the display backplane as described in Claim 9, wherein the wafer is bonded Before completing the bonding of the micro light-emitting chip on the regional circuit, it further includes: forming a peelable adhesive layer on the top surface, the side of the peelable adhesive layer is flush with the side of the substrate; Forming at least two bonding layers electrically connecting the corresponding first wire layer and the second wire layer on the side of the encapsulation layer includes: forming the bonding layer on the side of the substrate and the side of the peelable adhesive layer After layering, remove the part of the peelable adhesive layer covering the wafer bonding area circuit; or, after removing the part of the peelable adhesive layer covering the wafer bonding area circuit, on the side of the substrate and the detachable The binding layer is formed on the side of the peeling adhesive layer; the distance between the upper end of the binding layer and the bottom surface is less than or equal to the distance between the upper surface of the peelable adhesive layer and the bottom surface, and the upper end of the peelable adhesive layer The surface is the surface of the peelable adhesive layer away from the top surface. The method for manufacturing a display backplane as described in any one of claim 9 to claim 10, wherein the corresponding first wiring layer and the second wiring layer are formed on the side surfaces of the substrate and the encapsulation layer Before the at least two bonding layers that are electrically connected, it further includes: chamfering the area where the side surface and the bottom surface of the substrate intersect to form a chamfering area or performing rounding processing to form a rounded area; between the substrate and Forming the at least two bonding layers electrically connecting the corresponding first wire layer and the second wire layer on the side of the packaging layer includes: the lower end of the bonding layer along the chamfered area or the rounded area Extending toward the bottom surface, the lower end of the binding layer is the end of the binding layer away from the top surface; And/or, before forming at least two bonding layers electrically connecting the corresponding first wire layer and the second wire layer on the side surface of the substrate and the side surface of the encapsulation layer, further comprising: at least the substrate The area on the side where the bonding layer needs to be formed is ground to form a rough surface. The method for manufacturing a display backplane as described in any one of claim 9 to claim 10, wherein the corresponding first wiring layer and the second wiring layer are formed on the side surface of the substrate and the side surface of the encapsulation layer. After the at least two binding layers electrically connected by the wire layer, the method further includes: forming a protective layer covering the binding layer on the side surface of the substrate and the side surface of the encapsulation layer. A display panel, including the display backplane described in any one of claim 1 to claim 8.

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