TWI787283B - Supporting glass substrates and laminated substrates using them - Google Patents

Supporting glass substrates and laminated substrates using them Download PDF

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TWI787283B
TWI787283B TW107121248A TW107121248A TWI787283B TW I787283 B TWI787283 B TW I787283B TW 107121248 A TW107121248 A TW 107121248A TW 107121248 A TW107121248 A TW 107121248A TW I787283 B TWI787283 B TW I787283B
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substrate
glass substrate
supporting glass
supporting
processing
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TW201910285A (en
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村田哲哉
藤井美紅
鈴木良太
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日商日本電氣硝子股份有限公司
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B17/00Layered products essentially comprising sheet glass, or glass, slag, or like fibres
    • B32B17/06Layered products essentially comprising sheet glass, or glass, slag, or like fibres comprising glass as the main or only constituent of a layer, next to another layer of a specific material
    • CCHEMISTRY; METALLURGY
    • C03GLASS; MINERAL OR SLAG WOOL
    • C03CCHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C3/00Glass compositions
    • C03C3/04Glass compositions containing silica
    • C03C3/076Glass compositions containing silica with 40% to 90% silica, by weight
    • C03C3/083Glass compositions containing silica with 40% to 90% silica, by weight containing aluminium oxide or an iron compound
    • C03C3/085Glass compositions containing silica with 40% to 90% silica, by weight containing aluminium oxide or an iron compound containing an oxide of a divalent metal
    • C03C3/087Glass compositions containing silica with 40% to 90% silica, by weight containing aluminium oxide or an iron compound containing an oxide of a divalent metal containing calcium oxide, e.g. common sheet or container glass
    • CCHEMISTRY; METALLURGY
    • C03GLASS; MINERAL OR SLAG WOOL
    • C03CCHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C3/00Glass compositions
    • C03C3/04Glass compositions containing silica
    • C03C3/076Glass compositions containing silica with 40% to 90% silica, by weight
    • C03C3/089Glass compositions containing silica with 40% to 90% silica, by weight containing boron
    • C03C3/091Glass compositions containing silica with 40% to 90% silica, by weight containing boron containing aluminium
    • CCHEMISTRY; METALLURGY
    • C03GLASS; MINERAL OR SLAG WOOL
    • C03CCHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C3/00Glass compositions
    • C03C3/04Glass compositions containing silica
    • C03C3/076Glass compositions containing silica with 40% to 90% silica, by weight
    • C03C3/089Glass compositions containing silica with 40% to 90% silica, by weight containing boron
    • C03C3/091Glass compositions containing silica with 40% to 90% silica, by weight containing boron containing aluminium
    • C03C3/093Glass compositions containing silica with 40% to 90% silica, by weight containing boron containing aluminium containing zinc or zirconium
    • CCHEMISTRY; METALLURGY
    • C03GLASS; MINERAL OR SLAG WOOL
    • C03CCHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C3/00Glass compositions
    • C03C3/04Glass compositions containing silica
    • C03C3/076Glass compositions containing silica with 40% to 90% silica, by weight
    • C03C3/095Glass compositions containing silica with 40% to 90% silica, by weight containing rare earths
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568Temporary substrate used as encapsulation process aid
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/32Holders for supporting the complete device in operation, i.e. detachable fixtures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381Details of chemical or physical process used for separating the auxiliary support from a device or wafer
    • H01L2221/68386Separation by peeling

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Organic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Geochemistry & Mineralogy (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Glass Compositions (AREA)
  • Joining Of Glass To Other Materials (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Laminated Bodies (AREA)

Abstract

本發明係一種支持玻璃基板及使用此之層積基板係其特徵為在30~380℃之溫度範圍的平均線熱膨脹係數為30×10-7 /℃以上,且55×10-7 /℃以下,而楊氏模量則為80 GPa以上者。The present invention relates to a supporting glass substrate and a laminated substrate using the same, characterized in that the average linear thermal expansion coefficient in the temperature range of 30 to 380°C is not less than 30×10 -7 /°C and not more than 55×10 -7 /°C , while the Young's modulus is above 80 GPa.

Description

支持玻璃基板及使用此之層積基板Supporting glass substrates and laminated substrates using them

本發明係有關支持玻璃基板及使用此之層積基板,具體而言係有關在半導體封裝之製造工程,使用於鑄模半導體晶片於樹脂之加工基板的支持之支持玻璃基板及使用此之層積基板。The present invention relates to a supporting glass substrate and a laminated substrate using the same, and specifically relates to a supporting glass substrate and a laminated substrate using the same for supporting a processing substrate of a molded semiconductor chip in a resin in a manufacturing process of a semiconductor package .

對於行動電話,筆記型電腦,PDA(Personal Data Assistance)等之攜帶型電子機器,係要求小型化及輕量化。伴隨於此,亦嚴格加以限制使用於此等電子機器之半導體晶片的安裝空間,而半導體晶片的高密度之安裝則成為課題。因此,在近年中,經由三次元安裝技術,即,層積半導體晶片彼此,配線連接各半導體晶片間之時,而謀求半導體封裝之高密度安裝。Portable electronic devices such as mobile phones, notebook computers, and PDAs (Personal Data Assistance) require miniaturization and light weight. Along with this, the mounting space of semiconductor chips used in these electronic devices is also strictly limited, and high-density mounting of semiconductor chips has become a problem. Therefore, in recent years, high-density mounting of semiconductor packages has been pursued through three-dimensional mounting technology, that is, when semiconductor chips are laminated and interconnected between semiconductor chips.

另外,以往的晶圓級封裝(WLP)係在晶圓的狀態而形成凸塊之後,經由切割而個片化加以製作。但以往的WLP係加上於不易使銷數增加,在半導體晶片的背面露出之狀態加以安裝之故,而有容易產生有半導體晶片的缺陷等之問題。In addition, conventional wafer-level packaging (WLP) is produced by forming bumps in a wafer state, and then dicing and individualizing. However, conventional WLPs are mounted in a state in which the number of pins is not easily increased and are exposed on the back surface of the semiconductor wafer, and there is a problem that defects of the semiconductor wafer are likely to occur.

因此,作為新的WLP係加以提案有fan out型之WLP。fan out型之WLP係可使銷數增加,另外,經由保護半導體晶片的端部之時,可防止半導體晶片之缺陷等。Therefore, a fan out WLP is proposed as a new WLP. The fan out type WLP can increase the number of pins, and can prevent defects of the semiconductor chip by protecting the end of the semiconductor chip.

對於fan out型之WLP係有著先晶片型與後晶片型之製造方法。在先晶片型中,例如,具有在以樹脂之封閉材而鑄模(封閉)複數之半導體晶片,形成加工基板之後,配線於加工基板之一方的表面之工程,形成焊錫凸塊之工程等。在後晶片型中,例如,具有在設置配線層於支持基板上之後,配列複數之半導體晶片,以樹脂的封閉材而鑄模形成加工基板之後,形成焊錫凸塊之工程等。There are chip-first and chip-last manufacturing methods for fan out WLP. In the chip-first type, for example, there are processes of molding (sealed) a plurality of semiconductor chips with a sealing material of resin to form a processed substrate, wiring on one surface of the processed substrate, and processes of forming solder bumps. In the post-wafer type, for example, after disposing a wiring layer on a support substrate, arranging a plurality of semiconductor chips, forming a process substrate by molding with a resin sealing material, and then forming solder bumps, etc.

更且,在最近中,亦加以檢討有稱為面板級封裝(PLP)之半導體封裝。在PLP中,使支持基板每1片的半導體封裝之取得數增加同時,為了使製造成本降低,並非晶圓狀,而加以使用矩形狀的支持基板。Furthermore, recently, a semiconductor package called panel level packaging (PLP) is also under review. In PLP, the number of semiconductor packages obtained per support substrate is increased, and in order to reduce manufacturing costs, a rectangular support substrate is used instead of a wafer shape.

在此等之半導體封裝之製造工程中,為了伴隨約200℃之熱處理,而有封閉材產生變形,對於加工基板產生有彎曲之虞。當對於加工基板產生有彎曲時,對於加工基板之一方的表面而言,高密度地進行配線者則變為困難,另外,正確地形成焊錫凸塊者亦變為困難。In the manufacturing process of such a semiconductor package, due to heat treatment at about 200°C, the sealing material may be deformed, and the processed substrate may be bent. When warping occurs in the processed substrate, it becomes difficult to perform high-density wiring on one surface of the processed substrate, and it also becomes difficult to accurately form solder bumps.

從如此之情事,為了抑制加工基板之彎曲,加以檢討使用支持加工基板之玻璃基板者(參照專利文獻1)。From such a situation, in order to suppress the warping of the processed substrate, it has been examined to use a glass substrate supporting the processed substrate (see Patent Document 1).

玻璃基板係容易將表面平滑化,且具有剛性。因而,當作為支持基板而使用玻璃基板時,可成為將加工基板,堅固,且正確地支持者。另外,玻璃基板係容易透過紫外光,紅外光等之光線。因而,當作為支持基板而使用玻璃基板時,經由設置紫外線硬化型接著劑等之接著層等之時,可容易地固定加工基板者。更且,經由設置吸收紅外線的剝離層等之時,亦可容易地分離加工基板者。作為另外的方式而經由紫外線硬化型膠帶等而設置接著層等之時,亦可容易地固定,分離加工基板者。 [先前技術文獻] [專利文獻]Glass substrates are easy to smooth the surface and have rigidity. Therefore, when a glass substrate is used as a supporting substrate, the substrate to be processed can be firmly and accurately supported. In addition, the glass substrate is easy to transmit light such as ultraviolet light and infrared light. Therefore, when a glass substrate is used as a supporting substrate, the processing substrate can be easily fixed by providing an adhesive layer such as an ultraviolet curable adhesive or the like. Furthermore, by providing a peeling layer or the like that absorbs infrared rays, it is also possible to easily separate processed substrates. Alternatively, when an adhesive layer or the like is provided via an ultraviolet curable adhesive tape or the like, it is also possible to easily fix and separate the processed substrate. [Prior Art Document] [Patent Document]

[專利文獻1]日本特開2015-78113號公報[Patent Document 1] Japanese Patent Laid-Open No. 2015-78113

[發明欲解決之課題][Problem to be solved by the invention]

在fan out型之WLP和PLP中,具有以樹脂之封閉材而鑄模複數之半導體晶片,形成加工基板之後,配線於加工基板之一方的表面之工程,形成焊錫凸塊之工程等。In the fan out type WLP and PLP, there is a process of molding a plurality of semiconductor chips with a resin sealing material, forming a processed substrate, wiring on one surface of the processed substrate, and forming solder bumps.

此等之工程係伴隨約200~300℃之熱處理之故,而封閉材產生變形,而有加工基板產生尺寸變化之虞。當對於加工基板產生有尺寸變化時,對於加工基板之一方的表面而言,高密度地進行配線者則變為困難,另外,正確地形成焊錫凸塊者亦變為困難。These processes are accompanied by heat treatment at about 200-300°C, and the sealing material is deformed, which may cause dimensional changes of the processed substrate. When a dimensional change occurs in the processed substrate, it becomes difficult to perform high-density wiring on one surface of the processed substrate, and it also becomes difficult to accurately form solder bumps.

為了抑制加工基板之尺寸變化,作為支持基板而使用玻璃基板者為有效。但,使用玻璃基板之情況,亦有產生有加工基板的尺寸變化之情況。In order to suppress the dimensional change of the processed substrate, it is effective to use a glass substrate as a support substrate. However, when a glass substrate is used, there may be a case where a dimensional change of the processed substrate occurs.

本發明係有鑑於上述情事所作為之構成,其技術性的課題係經由發明不易使加工基板的尺寸變化產生之玻璃基板之時,可貢獻於半導體封裝之高密度安裝者。 [為了解決課題之手段]The present invention is constructed in view of the above circumstances, and its technical problem is to contribute to high-density mounting of semiconductor packages by inventing a glass substrate that is less prone to dimensional changes of the processed substrate. [Means to solve the problem]

本發明者們係重複各種實驗之結果,嚴格限制支持玻璃基板之熱膨脹係數之同時,經營提高支持玻璃基板之楊氏模量之時,發現可解決上述技術的課題者,而作為發明者而提案者。即,本發明之支持玻璃基板係其特徵為在30~380℃之溫度範圍的平均線熱膨脹係數為30×10-7 /℃以上,且55×10-7 /℃以下,而楊氏模量則為80GPa以上者。在此,「在30~380℃之溫度範圍的平均線熱膨脹係數」 係可以熱膨脹儀測定。「楊氏模量」係可以周知之共振法進行測定。As a result of repeated experiments, the inventors of the present invention found that the above-mentioned technical problems can be solved by strictly limiting the thermal expansion coefficient of the supporting glass substrate while increasing the Young's modulus of the supporting glass substrate, and proposed it as the inventors. By. That is, the supporting glass substrate of the present invention is characterized in that the average linear thermal expansion coefficient in the temperature range of 30 to 380°C is not less than 30×10 -7 /°C and not more than 55×10 -7 /°C, and the Young's modulus Those above 80GPa. Here, "average linear thermal expansion coefficient in the temperature range of 30-380 degreeC" can be measured with a thermal dilatometer. "Young's modulus" can be measured by a well-known resonance method.

在本發明之支持玻璃基板中,30~380℃之溫度範圍的平均線熱膨脹係數為30×10-7 /℃以上,且限制為55×10-7 /℃以下。如作為如此,成為容易使加工基板與支持玻璃基板的熱膨脹係數整合。並且,當兩者之熱膨脹係數整合時,成為在加工處理時,容易抑制加工基板的尺寸變化(特別是,彎曲變形)。作為結果,對於加工基板之一方的表面而言,成為可高密度地進行配線者,另外,亦成為可正確地形成焊錫凸塊者。In the supporting glass substrate of the present invention, the average linear thermal expansion coefficient in the temperature range of 30 to 380°C is not less than 30×10 -7 /°C and limited to not more than 55×10 -7 /°C. As such, it becomes easy to align the thermal expansion coefficients of the processing substrate and the supporting glass substrate. In addition, when the coefficients of thermal expansion of both are integrated, it becomes easy to suppress the dimensional change (in particular, bending deformation) of the processed substrate during processing. As a result, it becomes possible to perform wiring at a high density with respect to one surface of the processed substrate, and also to enable accurate formation of solder bumps.

更且,在本發明之支持玻璃基板中,楊氏模量則限制為80GPa以上。如作為如此,層積基板之剛性則提升之故,成為容易抑制加工基板之尺寸變化(特別是彎曲變形),而成為可堅固,且正確地支持加工基板者。Furthermore, in the supporting glass substrate of the present invention, the Young's modulus is limited to 80 GPa or more. As such, since the rigidity of the laminated substrate is improved, it becomes easy to suppress the dimensional change (particularly bending deformation) of the processed substrate, and it becomes possible to firmly and accurately support the processed substrate.

另外,本發明之支持玻璃基板係總厚度變異量(TTV)則不足2.0μm者為佳。如作為如此,成為容易提高加工處理的精確度。特別是可提高配線精確度之故,成為可進行高密度的配線。更且可增加支持玻璃基板之再利用次數者。在此,「總厚度變異量(TTV)」 係全體之最大板厚與最小板厚的差,例如,可經由KOBELCO research institute公司製之SBW-331ML/d而測定。In addition, the supporting glass substrate of the present invention preferably has a total thickness variation (TTV) of less than 2.0 μm. As such, it becomes easy to improve the accuracy of processing. In particular, since wiring accuracy can be improved, high-density wiring can be performed. Moreover, it can increase the number of times of reuse of the supporting glass substrate. Here, the "total thickness variation (TTV)" is the difference between the maximum thickness and the minimum thickness of the whole, and can be measured, for example, by SBW-331ML/d manufactured by KOBELCO research institute.

另外,本發明之支持玻璃基板係作為玻璃組成,以質量%,含有SiO2 50~66%、Al2 O3 7~34%、B2 O3 0~8%、MgO 0~22%、CaO 1~15%、Y2 O3 +La2 O3 +ZrO2 0~20%者為佳。在此,「Y2 O3 +La2 O3 +ZrO2 」 係指Y2 O3 、La2 O3 及ZrO2 之合量。In addition, the supporting glass substrate of the present invention contains, as a glass composition, 50-66% of SiO 2 , 7-34% of Al 2 O 3 , 0-8% of B 2 O 3 , 0-22% of MgO, CaO 1-15%, Y 2 O 3 +La 2 O 3 +ZrO 2 0-20% is preferred. Here, "Y 2 O 3 +La 2 O 3 +ZrO 2 " means the total amount of Y 2 O 3 , La 2 O 3 and ZrO 2 .

另外,在本發明之支持玻璃基板係在半導體封裝之製造工程,使用於鑄模(封閉)半導體晶片於樹脂之加工基板的支持者為佳。In addition, the supporting glass substrate of the present invention is preferably used as a supporter for molding (encapsulating) semiconductor chips in resin processing substrates in the manufacturing process of semiconductor packaging.

另外,本發明之層積基板係至少具備加工基板與為了支持加工基板之支持玻璃基板的層積基板,支持玻璃基板則為上述之支持玻璃基板者為佳。In addition, the laminated substrate of the present invention is a laminated substrate comprising at least a processed substrate and a supporting glass substrate for supporting the processed substrate, and the supporting glass substrate is preferably the aforementioned supporting glass substrate.

另外,本發明之層積基板係加工基板則為鑄模半導體晶片於樹脂之加工基板者為佳。In addition, the laminated substrate of the present invention is preferably a processed substrate in which a semiconductor chip is molded into a resin.

另外,本發明之半導體封裝之製造方法係具有:準備至少具備加工基板與為了支持加工基板之支持玻璃基板的層積基板的工程,和對於加工基板而言,進行加工處理之工程的同時,支持玻璃基板為上述之支持玻璃基板者為佳。In addition, the manufacturing method of the semiconductor package of the present invention has the steps of preparing a laminated substrate including at least a processing substrate and a supporting glass substrate for supporting the processing substrate, and a process of performing processing on the processing substrate, and supporting The glass substrate is preferably the aforementioned supporting glass substrate.

另外,本發明之半導體封裝之製造方法係加工處理則包含:於加工基板之一方的表面進行配線的工程者為佳。In addition, it is preferable that the manufacturing method of the semiconductor package of the present invention includes the process of performing wiring on the surface of one of the processed substrates.

另外,本發明之半導體封裝之製造方法係加工處理則包含:於加工基板之一方的表面形成焊錫凸塊的工程者為佳。In addition, the manufacturing method of the semiconductor package of the present invention preferably includes the process of forming solder bumps on the surface of one of the processed substrates.

在本發明之支持玻璃基板中,30~380℃之溫度範圍的平均線熱膨脹係數為30×10-7 /℃以上,且55×10-7 /℃以下,而理想為32×10-7 /℃以上、且52×10-7 /℃以下、理想為33×10-7 /℃以上、且49×10-7 /℃以下、特別理想為34×10-7 /℃以上、且44×10-7 /℃以下。當30~380℃之溫度範圍的平均線熱膨脹係數則成為上述範圍外時,加工基板與支持玻璃基板的熱膨脹係數則成為不易整合。並且,當兩者之熱膨脹係數則成為不整合時,成為在加工處理時,容易產生加工基板的尺寸變化(特別是,彎曲變形)。In the supporting glass substrate of the present invention, the average linear thermal expansion coefficient in the temperature range of 30 to 380°C is not less than 30×10 -7 /°C and not more than 55×10 -7 /°C, preferably 32×10 -7 /°C °C or higher and 52×10 -7 /°C or lower, preferably 33×10 -7 /°C or higher and 49×10 -7 /°C or lower, particularly preferably 34×10 -7 /°C or higher and 44×10 -7 /°C below. When the average linear thermal expansion coefficient in the temperature range of 30 to 380° C. falls outside the above-mentioned range, the thermal expansion coefficients of the processing substrate and the supporting glass substrate become difficult to integrate. In addition, when the thermal expansion coefficients of the two are inconsistent, dimensional changes (in particular, bending deformation) of the processed substrate are likely to occur during processing.

在本發明之支持玻璃基板中,楊氏模量係理想為80GPa以上、85GPa以上、90GPa以上、95GPa以上、特別是96~130GPa。楊氏模量過低時,成為不易維持層積體的剛性,成為容易產生加工基板的尺寸變化(特別是彎曲變形)。In the supporting glass substrate of the present invention, the Young's modulus is preferably 80 GPa or more, 85 GPa or more, 90 GPa or more, 95 GPa or more, particularly 96 to 130 GPa. When the Young's modulus is too low, it becomes difficult to maintain the rigidity of the laminate, and dimensional changes (particularly bending deformation) of the processed substrate tend to occur.

在本發明之支持玻璃基板中,總厚度變異量(TTV)係理想為不足2.0μm,1.5μm以下、1.0μm以下、特別是不足0.1~1.0μm。總厚度變異量(TTV)則過大時,加工處理的精確度則成為容易降低。更且,成為不易再利用支持玻璃基板。In the supporting glass substrate of the present invention, the total thickness variation (TTV) is preferably less than 2.0 μm, 1.5 μm or less, 1.0 μm or less, particularly less than 0.1 to 1.0 μm. When the total thickness variation (TTV) is too large, the accuracy of processing tends to decrease. Furthermore, it becomes difficult to recycle a supporting glass substrate.

本發明之支持玻璃基板係表面全體為研磨面者為佳。如作為如此,成為容易將總厚度變異量(TTV)限制為不足2.0μm,1.5μm以下、1.0μm以下、特別是不足1.0μm。作為研磨處理的方法係可採用各種的方法,但以一對的研磨墊而夾入玻璃基板之兩面,使玻璃基板與一對的研磨墊同時旋轉之同時,研磨處理玻璃基板之方法為佳。更且,一對的研磨墊係外徑為不同者為佳,在研磨時,間歇性地,玻璃基板之一部分則呈從研磨墊溢出地進行研磨處理者為佳。經由此,成為容易降低總厚度變異量(TTV)則,另外,彎曲量亦成為容易降低。然而,在研磨處理中,研磨深度係未特別加以限定,但研磨深度係理想為50μm以下、30μm以下、20μm以下、特別是10μm以下。研磨深度越小,支持玻璃基板的生產性則提升。The supporting glass substrate of the present invention is preferably one whose entire surface is polished. As such, it becomes easy to limit the total thickness variation (TTV) to less than 2.0 μm, 1.5 μm or less, 1.0 μm or less, particularly less than 1.0 μm. Various methods can be used as the method of polishing treatment, but a pair of polishing pads are sandwiched between both sides of the glass substrate, and the method of polishing the glass substrate while rotating the glass substrate and the pair of polishing pads simultaneously is preferable. Furthermore, it is preferable that a pair of polishing pads have different outer diameters, and it is preferable that a part of the glass substrate is intermittently polished from the polishing pad during polishing. This makes it easy to reduce the total thickness variation (TTV), and also makes it easy to reduce the amount of warpage. However, in the polishing treatment, the polishing depth is not particularly limited, but the polishing depth is preferably 50 μm or less, 30 μm or less, 20 μm or less, particularly 10 μm or less. The smaller the grinding depth, the higher the productivity of the supporting glass substrate.

本發明之支持玻璃基板係作為玻璃組成,以質量%,含有SiO2 50~66%、Al2 O3 7~34%、B2 O3 0~8%、MgO 0~22%、CaO 1~15%、Y2 O3 +La2 O3 +ZrO2 0~20%者為更佳。如上述,限定各成分之含有量的理由,顯示於以下。然而,在各成分之含有量的說明中,%顯示係除了有特別註明之情況,而表示質量%。The supporting glass substrate of the present invention is a glass composition containing 50-66% of SiO 2 , 7-34% of Al 2 O 3 , 0-8% of B 2 O 3 , 0-22% of MgO, and 1-6% of CaO in mass %. 15%, Y 2 O 3 +La 2 O 3 +ZrO 2 0-20% is more preferable. As mentioned above, the reason for limiting the content of each component is shown below. However, in the description of the content of each component, % display means % by mass unless otherwise specified.

SiO2 係形成玻璃的網絡之成分。SiO2 之含有量係理想為50~66%、51~65%、52~64%、53~63%、54~62.5%、56~62%、特別是58~61%。SiO2 之含有量過少時,成為不易玻璃化,另外,耐候性則成為容易降低。更且,熱膨脹係數則容易變為過高。另一方面,SiO2 之含有量過多時,熔融性或成形性則成為容易降低,另外,熱膨脹係數則成為過低。SiO 2 is a component that forms the network of glass. The content of SiO 2 is ideally 50-66%, 51-65%, 52-64%, 53-63%, 54-62.5%, 56-62%, especially 58-61%. When the content of SiO 2 is too small, vitrification becomes difficult, and weather resistance tends to decrease. Furthermore, the coefficient of thermal expansion tends to become too high. On the other hand, when the content of SiO 2 is too large, the meltability and formability tend to decrease, and the coefficient of thermal expansion becomes too low.

Al2 O3 係提高楊氏模量或耐候性的成分。Al2 O3 之含有量係理想為7~34%、8~26%、9~24%、11~23%、12~22%、14~21%、特別是16~21%。Al2 O3 之含有量過少時,楊氏模量或耐候性則成為容易降低。另一方面,Al2 O3 之含有量過多時,熔融性,成形性及耐失透性則成為容易降低。Al 2 O 3 is a component that improves Young's modulus or weather resistance. The content of Al 2 O 3 is ideally 7-34%, 8-26%, 9-24%, 11-23%, 12-22%, 14-21%, especially 16-21%. When the content of Al 2 O 3 is too small, Young's modulus and weather resistance tend to decrease. On the other hand, when the content of Al 2 O 3 is too large, the meltability, formability and devitrification resistance tend to decrease.

B2 O3 係形成玻璃之網絡的成分,但使楊氏模量或耐候性降低之成分。因而,B2 O3 之含有量係理想為0~8%、0.1~7%、1~6%、特別是3~5%。B 2 O 3 is a component that forms a network of glass, but lowers Young's modulus and weather resistance. Therefore, the content of B 2 O 3 is ideally 0-8%, 0.1-7%, 1-6%, especially 3-5%.

MgO係大幅度地提高楊氏模量,另外,使高溫黏度降低而提高熔融性或成形性的成分。MgO的含有量係理想為0~22%、0.5~21%、1~20.5%、2~20%、4~19.5%、5~19%、7~19%、8~18%、8.5~16%、9~16%、9~14%、特別是9~12%。MgO之含有量過少時,成為不易得到上述效果。另一方面,MgO之含有量過多時,耐失透性則成為容易降低。MgO is a component that greatly increases Young's modulus and lowers high-temperature viscosity to improve meltability and formability. The content of MgO is ideally 0-22%, 0.5-21%, 1-20.5%, 2-20%, 4-19.5%, 5-19%, 7-19%, 8-18%, 8.5-16% %, 9-16%, 9-14%, especially 9-12%. When the content of MgO is too small, it becomes difficult to obtain the said effect. On the other hand, when there is too much content of MgO, devitrification resistance will fall easily.

CaO係使高溫黏度降低而提高熔融性及成形性的成分。CaO之含有量係理想為1~15%、2~12%、3~10%、特別是5~8%。CaO之含有量過少時,成為不易得到上述效果。另一方面,CaO之含有量過多時,耐失透性則成為容易降低。CaO is a component that lowers high-temperature viscosity and improves meltability and formability. The content of CaO is preferably 1-15%, 2-12%, 3-10%, especially 5-8%. When the content of CaO is too small, it becomes difficult to obtain the said effect. On the other hand, when there is too much content of CaO, devitrification resistance will fall easily.

從提高楊氏模量之觀點,莫耳比MgO/(MgO+CaO+SrO+BaO)係理想為0以上、0.1以上、0.2以上、0.3以上、0.4以上、0.5以上、0.6以上、特別是0.7以上。然而,「MgO/(MgO+CaO+SrO+BaO)」係以MgO、CaO、SrO及BaO之合量除以MgO的含有量。From the viewpoint of increasing Young's modulus, the molar ratio MgO/(MgO+CaO+SrO+BaO) is preferably 0 or more, 0.1 or more, 0.2 or more, 0.3 or more, 0.4 or more, 0.5 or more, 0.6 or more, especially 0.7 above. However, "MgO/(MgO+CaO+SrO+BaO)" is the total amount of MgO, CaO, SrO, and BaO divided by the content of MgO.

Y2 O3 、La2 O3 及ZrO2 係提高楊氏模量的成分。Y2 O3 、La2 O3 及ZrO2 的合量係理想為0~20%、0.1~18%、0.5~16%、1~15%、1~14%、1~12%、1.2~10%、1.3~8%、特別是1.5~5%。Y2 O3 、La2 O3 及ZrO2 之合量過多時,耐失透性則成為容易降低。Y2 O3 之含有量係理想為0~15%、0.1~14%、0.5~13%、0.5~12%、0.5~10%、0.5~8%、0.5~6%、特別是1~4%。La2 O3 之含有量係理想為0~6%、0~4%、特別是0~2%。ZrO2 之含有量係理想為0~10%、0.1~6%、0.5~4%、特別是1~3%。Y2 O3 之含有量過多時,耐失透性則成為容易降低,另外,原料成本則成為容易高漲。La2 O3 之含有量過多時,耐失透性則成為容易降低,另外,原料成本則成為容易高漲。ZrO2 之含有量過多時,耐失透性則成為容易降低。Y 2 O 3 , La 2 O 3 and ZrO 2 are components that increase Young's modulus. The total amount of Y 2 O 3 , La 2 O 3 and ZrO 2 is ideally 0 to 20%, 0.1 to 18%, 0.5 to 16%, 1 to 15%, 1 to 14%, 1 to 12%, 1.2 to 10%, 1.3-8%, especially 1.5-5%. When the total amount of Y 2 O 3 , La 2 O 3 and ZrO 2 is too large, devitrification resistance tends to decrease. The content of Y 2 O 3 is ideally 0-15%, 0.1-14%, 0.5-13%, 0.5-12%, 0.5-10%, 0.5-8%, 0.5-6%, especially 1-4% %. The content of La 2 O 3 is preferably 0-6%, 0-4%, especially 0-2%. The content of ZrO 2 is ideally 0-10%, 0.1-6%, 0.5-4%, especially 1-3%. When the content of Y 2 O 3 is too large, the devitrification resistance tends to decrease, and the cost of raw materials tends to increase. When the content of La 2 O 3 is too large, the devitrification resistance tends to decrease, and the cost of raw materials tends to increase. When the content of ZrO 2 is too large, the devitrification resistance tends to decrease.

除上述成分以外,例如,添加以下的成分亦可。In addition to the above-mentioned components, for example, the following components may be added.

SrO及BaO係使高溫黏度降低而提高熔融性及成形性的成分。SrO及BaO係各為0~15%、0.1~12%、特別是0.5~10%。SrO and BaO are components that lower high-temperature viscosity and improve meltability and formability. SrO and BaO-based are each 0 to 15%, 0.1 to 12%, especially 0.5 to 10%.

ZnO係降低高溫黏性,顯著提高熔融性的成分。ZnO之含有量係理想為0~7%、0.1~5%、特別是0.5~3%。ZnO之含有量過少時,成為不易得到上述效果。然而,ZnO之含有量過多時,玻璃則成為容易失透。ZnO-based components reduce high-temperature viscosity and remarkably improve meltability. The content of ZnO is preferably 0-7%, 0.1-5%, especially 0.5-3%. When the content of ZnO is too small, it becomes difficult to obtain the said effect. However, when the content of ZnO is too large, the glass will easily devitrify.

Li2 O、Na2 O及K2 O係使高溫黏度降低而提高熔融性及成形性的成分,但使熱膨脹係數上升之成分。對於使高溫黏度降低而提高熔融性及成形性的同時,使熱膨脹係數上升,Li2 O、Na2 O及K2 O的合量係理想為0~15%、0.01~10%、0.05~8%、特別是0.1~5%。各Li2 O、Na2 O及K2 O之含有量係理想為0~10%、0.01~5%、0.05~4%、特別是不足0.1~3%。為了使熱膨脹係數降低,Li2 O、Na2 O及K2 O之合量係理想為0~15%、0~10%、0~5%、0~1%、0~0.1%、0~0.05%、特別是不足0~0.01%。各Li2 O、Na2 O及K2 O之含有量係理想為0~15%、0~10%、0~5%、0~1%、0~0.1%、0~0.05%、特別是不足0~0.01%。Li 2 O, Na 2 O, and K 2 O are components that lower high-temperature viscosity to improve meltability and formability, but increase the coefficient of thermal expansion. In order to lower the high-temperature viscosity and improve the meltability and formability while increasing the thermal expansion coefficient, the total amount of Li 2 O, Na 2 O and K 2 O is ideally 0-15%, 0.01-10%, 0.05-8 %, especially 0.1 to 5%. The content of each of Li 2 O, Na 2 O and K 2 O is preferably 0 to 10%, 0.01 to 5%, 0.05 to 4%, especially less than 0.1 to 3%. In order to reduce the thermal expansion coefficient, the total amount of Li 2 O, Na 2 O and K 2 O is ideally 0-15%, 0-10%, 0-5%, 0-1%, 0-0.1%, 0- 0.05%, especially less than 0-0.01%. The content of Li 2 O, Na 2 O and K 2 O is ideally 0-15%, 0-10%, 0-5%, 0-1%, 0-0.1%, 0-0.05%, especially Less than 0-0.01%.

TiO2 係提高耐候性的成分,但使玻璃著色之成分。因而,TiO2 之含有量係理想為0~0.5%、特別是不足0~0.1%。TiO 2 is a component that improves weather resistance, but is a component that colors glass. Therefore, the content of TiO 2 is preferably 0 to 0.5%, especially less than 0 to 0.1%.

作為澄清劑,添加0.05~0.5%選自SnO2 、Cl、SO3 、CeO2 的群(理想係SnO2 、SO3 的群)之一種或二種以上亦可。As a clarifier, 0.05 to 0.5% of one or two or more selected from the group of SnO 2 , Cl, SO 3 , and CeO 2 (group of ideal SnO 2 and SO 3 ) may be added.

Fe2 O3 係作為不純物而不可避免地混入於玻璃原料之成分,為著色成分。因而,Fe2 O3 之含有量係理想為0.5%以下、0.001~0.1%、0.005~0.07%、0.008~0.03%、特別是0.01~0.025%。Fe 2 O 3 is a component that is inevitably mixed into glass raw materials as an impurity, and is a coloring component. Therefore, the content of Fe 2 O 3 is preferably 0.5% or less, 0.001-0.1%, 0.005-0.07%, 0.008-0.03%, especially 0.01-0.025%.

V2 O5 、Cr2 O3 、CoO3 及NiO係著色成分。因而,各V2 O5 、Cr2 O3 、CoO3 及NiO之含有量係理想為0.1%以下、特別是不足0.01%。V 2 O 5 , Cr 2 O 3 , CoO 3 and NiO-based coloring components. Therefore, the content of each of V 2 O 5 , Cr 2 O 3 , CoO 3 and NiO is preferably 0.1% or less, particularly less than 0.01%.

從環境的關懷,作為玻璃組成,實質上未含有As2 O3 、Sb2 O3 、PbO、Bi2 O3 及F者為佳。在此,「實質上未含有~」係指作為玻璃成分而未添加積極性明示之成分,但容許作為不純物而混入之情況的內容,而具體而言係指明示的成分之含有量為不足0.05%者。From environmental considerations, it is preferable that the glass composition does not substantially contain As 2 O 3 , Sb 2 O 3 , PbO, Bi 2 O 3 , and F. Here, "substantially does not contain ..." means that no positively stated component is added as a glass component, but it is allowed to be mixed as an impurity, and specifically means that the content of the indicated component is less than 0.05%. By.

本發明之支持玻璃基板係具有以下的特性者為佳。The supporting glass substrate of the present invention preferably has the following characteristics.

應變點係理想為580℃以上、620℃以上、650℃以上、680℃以上、特別是700~850℃。應變點越高,在半導體封裝之製造工程中,成為越容易降低支持玻璃基板之熱收縮。作為結果,成為容易提高加工處理的精確度。然而,「應變點」係指依據ASTM C336之方法而測定的值。The strain point is preferably 580°C or higher, 620°C or higher, 650°C or higher, 680°C or higher, particularly 700 to 850°C. The higher the strain point, the easier it is to reduce the thermal shrinkage of the supporting glass substrate in the manufacturing process of semiconductor packaging. As a result, it becomes easy to improve the accuracy of processing. However, the "strain point" means a value measured according to the method of ASTM C336.

液相溫度係理想為1300℃以下、1280℃以下、1250℃以下、1160℃以下、1130℃以下、特別是1100℃以下。如作為如此,成為容易成形為板狀之故,即使未研磨表面,或者經由少量的研磨,可將總厚度變異量(TTV)降低至不足2.0μm,特別是不足1.0μm者,作為結果,可將支持玻璃基板之製造成本作為低廉化者。更且,成為容易防止在成形時,產生失透結晶的事態。在此,「液相溫度」係通過標準篩30網目(500μm),將殘留於50網目(300μm)之玻璃粉末,放入至白金皿之後,保持24小時於溫度梯度爐中,可經由測定結晶析出之溫度而算出。The liquidus temperature is preferably 1300°C or lower, 1280°C or lower, 1250°C or lower, 1160°C or lower, 1130°C or lower, especially 1100°C or lower. As such, it becomes easy to form into a plate shape, even if the surface is not ground, or through a small amount of grinding, the total thickness variation (TTV) can be reduced to less than 2.0 μm, especially less than 1.0 μm, as a result, can be The manufacturing cost of supporting glass substrates is regarded as the one that lowers the cost. Furthermore, it becomes easy to prevent the occurrence of devitrified crystals during molding. Here, the "liquidus temperature" refers to passing through a standard sieve with 30 mesh (500μm), put the glass powder remaining in the 50 mesh (300μm) into a platinum dish, keep it in a temperature gradient furnace for 24 hours, and measure the crystallization The precipitation temperature is calculated.

液相黏度係理想為103.8 dPa・s以上、104.0 dPa・s以上、104.2 dPa・s以上、104.4 dPa・s以上、特別是104.6 dPa・s以上。如作為如此,成為容易成形為板狀之故,即使未研磨表面,或者經由少量的研磨,可將總厚度變異量(TTV)降低至不足2.0μm,特別是不足1.0μm者,作為結果,可將支持玻璃基板之製造成本作為低廉化者。在此,「液相黏度」 係可以白金球提升法而測定。The liquid phase viscosity is preferably 10 3.8 dPa・s or higher, 10 4.0 dPa・s or higher, 10 4.2 dPa・s or higher, 10 4.4 dPa・s or higher, especially 10 4.6 dPa・s or higher. As such, it becomes easy to form into a plate shape, even if the surface is not ground, or through a small amount of grinding, the total thickness variation (TTV) can be reduced to less than 2.0 μm, especially less than 1.0 μm, as a result, can be The manufacturing cost of supporting glass substrates is regarded as the one that lowers the cost. Here, the "liquid phase viscosity" can be measured by the platinum ball lifting method.

在102.5 dPa・s之溫度係理想為1550℃以下、1500℃以下、1480℃以下、1450℃以下、特別是1200~1400℃以下。在102.5 dPa・s之溫度變高時,熔融性則降低,支持玻璃基板之製造成本則高漲。在此,「在102.5 dPa・s之溫度」 係可以白金球提升法而測定。The temperature at 10 2.5 dPa・s is ideally below 1550°C, below 1500°C, below 1480°C, below 1450°C, especially below 1200-1400°C. When the temperature of 10 2.5 dPa・s increases, the melting property decreases, and the manufacturing cost of the supporting glass substrate increases. Here, "the temperature at 10 2.5 dPa・s" can be measured by the platinum ball lifting method.

板厚係理想為1.5mm以下、1.2mm以下、1.0mm以下、特別是0.9mm以下。另一方面,板厚過薄時,支持玻璃基板本身的強度則降低,成為不易達成作為支持基板之機能。因而,支持玻璃基板之板厚係理想為0.5mm以上、0.6mm以上、特別是超過0.7mm。The plate thickness is preferably 1.5 mm or less, 1.2 mm or less, 1.0 mm or less, particularly 0.9 mm or less. On the other hand, when the plate thickness is too thin, the strength of the supporting glass substrate itself decreases, making it difficult to achieve the function as a supporting substrate. Therefore, the plate thickness of the supporting glass substrate is preferably 0.5 mm or more, 0.6 mm or more, particularly more than 0.7 mm.

彎曲量係理想為60μm以下、55μm以下、50μm以下、1~45μm、特別是5~40μm。彎曲量越小,成為越容易提高加工處理的精確度。特別是可提高配線精確度之故,成為可進行高密度的配線。然而,對於為了降低彎曲量,使複數之玻璃基板層積而進行熱處理者為佳。然而,「彎曲量」係指在支持玻璃基板全體的最高位點與最小平方焦點面之間的最大距離之絕對值,和最低位點與最小平方焦點面之絕對值的合計,例如,可經由KOBELCO research institute公司製之SBW-331ML/d而測定。The amount of curvature is preferably 60 μm or less, 55 μm or less, 50 μm or less, 1 to 45 μm, particularly 5 to 40 μm. The smaller the amount of warping, the easier it is to improve the accuracy of processing. In particular, since wiring accuracy can be improved, high-density wiring can be performed. However, in order to reduce the amount of warping, it is preferable to laminate a plurality of glass substrates and perform heat treatment. However, the "bending amount" refers to the absolute value of the maximum distance between the highest point and the focal plane of least square and the absolute value of the absolute value of the lowest point and the focal plane of least square between the highest point and the focal plane of least square on the entire support glass substrate. For example, it can be obtained by SBW-331ML/d manufactured by KOBELCO research institute company was measured.

本發明之支持玻璃基板係晶圓狀(略正圓狀)者為佳,其直徑係100mm以上500mm以下、特別是150mm以上450mm以下為佳,其正圓度(但,除了缺口部)係1mm以下、0.1mm以下、0.05mm以下、特別是0.03mm以下為佳。如作為如此,成為容易適用於半導體封裝之製造工程。然而,「正圓度」係自晶圓的外形之最大值減去最小值的值。The supporting glass substrate of the present invention is preferably in the shape of a wafer (slightly round), with a diameter of 100 mm to 500 mm, especially 150 mm to 450 mm, and its roundness (except for the notch) is 1 mm It is preferably less than or equal to 0.1 mm, less than 0.05 mm, especially less than 0.03 mm. As such, it becomes easy to apply to the manufacturing process of semiconductor packaging. However, "roundness" is the value obtained by subtracting the minimum value from the maximum value of the outer shape of the wafer.

本發明之支持玻璃基板係具有缺口部(缺口形狀之位置調整部)者為佳,而缺口部的深部係以平面視為略圓形狀或略V溝形狀者為更佳。經由此,使定位銷等之定位的構件抵接於支持玻璃基板的缺口部,而成為容易固定支持玻璃基板的位置。作為結果,支持玻璃基板與加工基板的位置調整則成為容易。特別是對於加工基板,亦形成缺口部,使定位構件抵接時,層積體全體的位置調整則成為容易。The supporting glass substrate of the present invention preferably has a notch (notch-shaped position adjustment portion), and the deep part of the notch is more preferably in a slightly circular shape or a V-groove shape when viewed in plan. Through this, positioning members such as positioning pins are brought into contact with the notches for supporting the glass substrate, and it becomes a position where the glass substrate is easily fixed and supported. As a result, positional adjustment of the support glass substrate and the processing substrate becomes easy. In particular, the notch portion is also formed on the processed substrate, and when the positioning member is brought into contact, position adjustment of the entire laminate can be facilitated.

另一方面,於支持玻璃基板之缺口部,抵接定位構件時,應力則容易集中於缺口部,而將缺口部作為起點,支持玻璃基板則成為容易破損。特別是經由外力而彎曲支持玻璃基板時,其傾向則變為顯著。因而,缺口部的表面與端面所交叉之端緣範圍的全部或一部分作為倒角者為佳。經由此,可有效地迴避缺口部作為起點之破損。On the other hand, when the notch of the supporting glass substrate abuts against the positioning member, the stress is likely to concentrate on the notch, and the supporting glass substrate is easily damaged when the notch is used as a starting point. In particular, when the supporting glass substrate is bent by an external force, this tendency becomes remarkable. Therefore, it is preferable to chamfer all or part of the edge range where the surface of the notch part and the end surface intersect. Through this, it is possible to effectively avoid the damage starting from the notch.

缺口部的表面與端面所交叉之端緣範圍的50%以上作為倒角者為更佳,而缺口部的表面與端面所交叉之端緣範圍的90%以上作為倒角者為特別理想,缺口部的表面與端面所交叉之端緣範圍的全部作為倒角者為最佳。在缺口部作為倒角之範圍越大,越可降低缺口部作為起點之破損的機率。More than 50% of the edge range where the surface of the notch and the end face intersect are used as chamfers, and more than 90% of the edge range where the surface of the notch and the end face intersect is used as chamfers. It is best to chamfer the entire range of the edge where the surface of the upper part and the end face intersect. The larger the range of chamfering at the notch, the lower the probability of damage at the notch as the starting point.

缺口部之表面方向之倒角寬度(背面方向之倒角寬度亦同樣)係理想為50~900μm、200~800μm、300~700μm、400~650μm、特別是500~600μm。缺口部之表面方向之倒角寬度過小時,缺口部作為起點,支持玻璃基板則成為容易破損。另一方面,缺口部之表面方向之倒角寬度過大時,倒角效率則降低,而支持玻璃基板之製造成本則成為容易高漲。The chamfer width in the surface direction of the notch (the chamfer width in the back direction is the same) is preferably 50-900 μm, 200-800 μm, 300-700 μm, 400-650 μm, especially 500-600 μm. When the chamfering width in the surface direction of the notch is too small, the notch serves as a starting point, and the supporting glass substrate is easily damaged. On the other hand, if the chamfering width in the surface direction of the notch is too large, the chamfering efficiency will decrease, and the manufacturing cost of the supporting glass substrate will easily increase.

缺口部之板厚方向的倒角寬度(表面與背面之倒角寬度的合計)係理想為板厚的5~80%、20~75%、30~70%、35~65%、特別是40~60%。缺口部之板厚方向之倒角寬度過小時,缺口部作為起點,支持玻璃基板則成為容易破損。另一方面,缺口部之板厚方向之倒角寬度過大時,外力則成為容易集中於缺口部之端面,缺口部的端面作為起點,支持玻璃基板則成為容易破損。The chamfer width in the thickness direction of the notch (the sum of the chamfer widths on the surface and the back) is ideally 5-80%, 20-75%, 30-70%, 35-65%, especially 40% of the thickness. ~60%. When the chamfering width in the plate thickness direction of the notch is too small, the notch serves as a starting point, and the supporting glass substrate is easily damaged. On the other hand, when the chamfer width in the thickness direction of the notch is too large, the external force tends to concentrate on the end face of the notch, and the end face of the notch serves as the starting point, and the supporting glass substrate becomes easily damaged.

本發明之支持玻璃基板係從降低總厚度變異量(TTV)之觀點,未進行化學強化處理者為佳。也就是,於表面未具有壓縮應力層者為佳。The supporting glass substrate of the present invention is preferably not subjected to chemical strengthening treatment from the viewpoint of reducing the total thickness variation (TTV). That is, it is preferable not to have a compressive stress layer on the surface.

作為支持玻璃基板之形成方法,可採取各種的方法。例如,可採取槽向下法,捲出法,重繪法,浮法,鑄錠成型法者。Various methods can be adopted as a method of forming the supporting glass substrate. For example, trough-down method, roll-out method, redrawing method, float method, and ingot molding method can be adopted.

本發明之層積基板係至少具備加工基板與為了支持加工基板之支持玻璃基板的層積基板,支持玻璃基板則為上述之支持玻璃基板者為特徵。在此,本發明之層積基板之技術性特徵(最佳的構成,效果)係與本發明之支持玻璃基板的技術性特徵重複。因而,在本說明書中,對於其重複部分,省略詳細之記載。The laminated substrate of the present invention is a laminated substrate comprising at least a processed substrate and a supporting glass substrate for supporting the processed substrate, and the supporting glass substrate is the aforementioned supporting glass substrate. Here, the technical features (best configuration, effect) of the laminated substrate of the present invention overlap with the technical features of the supporting glass substrate of the present invention. Therefore, in this specification, detailed descriptions of overlapping parts are omitted.

本發明之層積基板係於加工基板與支持玻璃基板之間,具有接著層者為佳。接著層係為樹脂者為佳,例如,熱硬化性樹脂,光硬化性樹脂(特別是紫外線硬化樹脂)等為佳。另外,在半導體封裝之製造工程中,具有可承受熱處理之耐熱性之構成為佳。經由此,在半導體封裝之製造工程,接著層則成為不易熔解,而可提高加工處理之精確度。The laminated substrate of the present invention is preferably provided with an adhesive layer between the processed substrate and the supporting glass substrate. The next layer is preferably resin, for example, thermosetting resin, photocurable resin (especially ultraviolet curable resin), etc. are preferred. In addition, in the manufacturing process of semiconductor packaging, it is preferable to have a configuration with heat resistance that can withstand heat treatment. Through this, in the manufacturing process of semiconductor packaging, the bonding layer becomes difficult to melt, and the precision of processing can be improved.

本發明之層積基板係更於加工基板與支持玻璃基板之間,更具體而言係於加工基板與接著層之間,具有剝離層者,或者於支持玻璃基板與接著層之間,具有剝離層者為佳。如作為如此,對於加工基板而言,進行特定之加工處理之後,成為自支持玻璃基板容易剝離加工基板。加工基板之剝離係從生產性的觀點,經由雷射光等之照射光而進行者為佳。The laminated substrate of the present invention has a peeling layer between the processing substrate and the supporting glass substrate, more specifically, between the processing substrate and the bonding layer, or has a peeling layer between the supporting glass substrate and the bonding layer. Layers are better. As such, the processed substrate becomes a self-supporting glass substrate after specific processing is performed, and the processed substrate can be easily peeled off. From the viewpoint of productivity, it is preferable that the peeling of the processed substrate is carried out through irradiation light such as laser light.

剝離層係以經由雷射光等之照射光而產生「層內剝離」或「界面剝離」之材料而加以構成。也就是當照射一定強度的光時,以在原子或分子中之原子間或分子間的結合力消失或減少,產生消融(ablation)等,使剝離產生之材料而加以構成。然而,有著經由照射光的照射,含於剝離層之成分則成為氣體而加以釋放至分離之情況,和剝離層則吸收光而成為氣體,釋放其蒸氣而至分離之情況。The release layer is composed of a material that causes "intralayer peeling" or "interfacial peeling" by irradiation of light such as laser light. That is, when a certain intensity of light is irradiated, the binding force between atoms or molecules in atoms or molecules disappears or decreases, ablation occurs, and the generated materials are peeled off to form a structure. However, there are cases where the components contained in the peeling layer become gas and are released to separate when irradiated with irradiating light, and the peeling layer absorbs light to become gas and release its vapor to separate.

在本發明之層積基板中,支持玻璃基板係較加工基板為大者為佳。經由此,在支持加工基板與支持玻璃基板時,兩者之中心位置則即使在稍微離間之情況,成為不易自支持玻璃基板溢出有加工基板之緣部。In the laminated substrate of the present invention, it is preferable that the supporting glass substrate is larger than the processing substrate. Through this, when the processed substrate and the supporting glass substrate are supported, even if the center positions of the two are slightly separated, the edges of the processed substrate are unlikely to protrude from the supporting glass substrate.

本發明之半導體封裝之製造方法係具有:準備至少具備加工基板與為了支持加工基板之支持玻璃基板的層積基板的工程,和對於加工基板而言,進行加工處理之工程的同時,支持玻璃基板為上述之支持玻璃基板者為特徵。在此,本發明之半導體封裝之製造方法之技術性特徵(最佳的構成,效果)係與本發明之支持玻璃基板及層積基板的技術性特徵重複。因而,在本說明書中,對於其重複部分,省略詳細之記載。The manufacturing method of the semiconductor package of the present invention has the steps of preparing a laminated substrate including at least a processing substrate and a supporting glass substrate for supporting the processing substrate, and a step of processing the processing substrate, and simultaneously supporting the glass substrate. It is characterized by the above-mentioned support glass substrate. Here, the technical features (best configuration, effect) of the manufacturing method of the semiconductor package of the present invention overlap with the technical features of the supporting glass substrate and the laminated substrate of the present invention. Therefore, in this specification, detailed descriptions of overlapping parts are omitted.

本發明之半導體封裝之製造方法係具有準備至少具備加工基板與為了支持加工基板之支持玻璃基板的層積基板的工程。至少具備加工基板與為了支持加工基板之支持玻璃基板的層積基板係具有上述之材料構成。然而,作為玻璃基板之成形方法,可採取上述成形方法者。The manufacturing method of the semiconductor package of the present invention includes a process of preparing a laminated substrate including at least a processing substrate and a supporting glass substrate for supporting the processing substrate. A laminated substrate including at least a processed substrate and a supporting glass substrate for supporting the processed substrate has the above-mentioned material configuration. However, as the forming method of the glass substrate, the above-mentioned forming method can be adopted.

本發明之半導體封裝之製造方法係更具有搬送層積基板之工程者為佳。經由此,可提高加工處理之處理效率者。然而,「搬送層積基板之工程」和「對於加工基板而言,進行加工處理之工程」係無須另外進行,而同時進行亦可。The manufacturing method of the semiconductor package of the present invention preferably has a process of transferring laminated substrates. Through this, the processing efficiency of processing can be improved. However, the "process of transporting laminated substrates" and "process of processing substrates for processing" do not need to be performed separately, but may be performed at the same time.

在本發明之半導體封裝之製造方法中,加工處理係於加工基板之一方的表面進行配線的處理,或者於加工基板之一方的表面形成焊錫凸塊之處理為佳。在本發明之半導體封裝之製造方法中,在此等之處理時,加工基板則不易產生尺寸變化之故,可適當地進行此等之工程者。In the manufacturing method of the semiconductor package of the present invention, the processing is preferably a process of performing wiring on one surface of the processed substrate, or a process of forming solder bumps on one surface of the processed substrate. In the manufacturing method of the semiconductor package of the present invention, during these processes, since the processed substrate is less prone to dimensional changes, these processes can be properly performed.

作為加工處理,除上述以外,亦可為機械性地研磨加工基板之一方的表面(通常,與支持玻璃基板相反側的表面)之處理,乾蝕刻加工基板之一方的表面(通常,與支持玻璃基板相反側的表面)之處理,濕蝕刻加工基板之一方的表面(通常,與支持玻璃基板相反側的表面)之處理之任一。然而,在本發明之半導體封裝之製造方法中,不易於加工基板產生彎曲之同時,可維持層積基板之剛性者。作為結果,可適當地進行上述加工處理者。As the processing, in addition to the above, it is also possible to mechanically grind one surface of the processed substrate (usually, the surface opposite to the supporting glass substrate), dry etch the surface of one of the processed substrates (usually, the surface opposite to the supporting glass substrate). Either of the treatment of the surface on the opposite side of the substrate), or the treatment of one of the surfaces of the substrate to be wet-etched (generally, the surface on the opposite side to the supporting glass substrate). However, in the manufacturing method of the semiconductor package of the present invention, it is not easy to process the substrate to be warped while maintaining the rigidity of the laminated substrate. As a result, the above-mentioned processing can be appropriately performed.

參酌圖面同時,更加以說明本發明。The present invention is further described with reference to the drawings.

圖1係顯示本發明之層積基板1之一例的概念斜視圖。在圖1中,層積基板1係具備:支持玻璃基板10與加工基板11。支持玻璃基板10係為了防止加工基板11之尺寸變化,而加以貼著於加工基板11。並且,支持玻璃基板10係其特徵為在30~380℃之溫度範圍的平均線熱膨脹係數為32×10-7 /℃以上,且55×10-7 /℃以下,而楊氏模量則為80GPa以上者。另外,對於支持玻璃基板10與加工基板11之間,係加以配置有剝離層12與接著層13。剝離層12係與支持玻璃基板10接觸,而接著層13係與加工基板11接觸。FIG. 1 is a conceptual perspective view showing an example of a laminate substrate 1 of the present invention. In FIG. 1 , a laminated substrate 1 includes a supporting glass substrate 10 and a processing substrate 11 . The supporting glass substrate 10 is attached to the processing substrate 11 in order to prevent the dimensional change of the processing substrate 11 . In addition, the supporting glass substrate 10 is characterized in that the average linear thermal expansion coefficient in the temperature range of 30 to 380°C is not less than 32×10 -7 /°C and not more than 55×10 -7 /°C, and the Young's modulus is Above 80GPa. In addition, a release layer 12 and an adhesive layer 13 are arranged between the supporting glass substrate 10 and the processing substrate 11 . The release layer 12 is in contact with the supporting glass substrate 10 , and the adhesive layer 13 is in contact with the processing substrate 11 .

如自圖1了解到,層積基板1係依支持玻璃基板10,剝離層12,接著層13,加工基板11之順序加以層積配置。支持玻璃基板10之形狀係因應加工基板11而加以決定,但在圖1中,支持玻璃基板10及加工基板11之形狀係均為晶圓形狀。剝離層12係除了非晶質矽(a-Si)以外,亦加以使用氧化矽,矽氧化合物,氮化矽,氮化鋁,氮化鈦等。剝離層12係經由電漿CVD,經由溶膠-凝膠法之旋塗法等而加以形成。接著層13係以樹脂加以構成,例如,經由各種印刷法,噴墨法,旋塗法,滾輪塗佈法等而加以塗佈形成。接著層13係經由剝離層12而自加工基板11加以剝離支持玻璃基板10之後,經由溶劑等而加以溶解除去。As understood from FIG. 1 , the laminated substrate 1 is laminated and arranged in the order of the supporting glass substrate 10 , the release layer 12 , the bonding layer 13 , and the processed substrate 11 . The shape of the supporting glass substrate 10 is determined according to the processing substrate 11, but in FIG. 1, the shapes of the supporting glass substrate 10 and the processing substrate 11 are both wafer shapes. For the peeling layer 12, in addition to amorphous silicon (a-Si), silicon oxide, silicon oxide, silicon nitride, aluminum nitride, titanium nitride, and the like are also used. The peeling layer 12 is formed by plasma CVD, a sol-gel spin coating method, or the like. The adhesive layer 13 is made of resin, for example, it is formed by coating through various printing methods, inkjet method, spin coating method, roller coating method and the like. After the support glass substrate 10 is peeled from the processing substrate 11 via the peeling layer 12, the adhesive layer 13 is dissolved and removed via a solvent or the like.

圖2係顯示fan out型之WLP的先晶片型之製造工程的概念剖面圖。圖2(a)係顯示形成接著層21於支持構件20之一方的表面上之狀態。因應必要,形成剝離層於支持構件20與接著層21之間亦可。接著,如圖2(b)所示,於接著層21上貼上複數之半導體晶片22。此時,使半導體晶片22之有效側的面接觸於接著層21。接著,如圖2(c)所示,以樹脂之封閉材23鑄模半導體晶片22。封閉材23係使用壓縮成形後的尺寸變化,成形配線時之尺寸變化少之材料。接著,如圖2(d)、(e)所示,自支持構件20,分離鑄模半導體晶片22之加工基板24之後,藉由接著層25而與支持玻璃基板26接著固定。此時,加工基板24之表面之中,與埋入有半導體晶片22側的表面相反側的表面則加以配置於支持玻璃基板26側。如此作為,可得到層積基板27。然而,因應必要,形成剝離層於接著層25與支持玻璃基板26之間亦可。更且,在搬送所得到之層積基板27之後,如圖2(f)所示,於埋入有加工基板24之半導體晶片22側的表面,形成配線28之後,形成複數之焊錫凸塊29。最後,自支持玻璃基板26分離加工基板24之後,將加工基板24切斷為各半導體晶片22,再供給至之後的封裝工程(圖2(g))。FIG. 2 is a conceptual cross-sectional view showing a chip-first manufacturing process of a fan out WLP. FIG. 2( a ) shows the state where the adhesive layer 21 is formed on one surface of the supporting member 20 . If necessary, a release layer may be formed between the support member 20 and the adhesive layer 21 . Then, as shown in FIG. 2( b ), a plurality of semiconductor chips 22 are pasted on the adhesive layer 21 . At this time, the effective side surface of the semiconductor wafer 22 is brought into contact with the adhesive layer 21 . Next, as shown in FIG. 2( c ), the semiconductor chip 22 is molded with a resin sealing material 23 . The sealing material 23 is a material that has little dimensional change after compression molding and little dimensional change when wiring is formed. Next, as shown in FIG. 2( d ) and ( e ), after the processed substrate 24 of the molded semiconductor wafer 22 is separated from the supporting member 20 , it is bonded and fixed to the supporting glass substrate 26 through the adhesive layer 25 . At this time, among the surfaces of the processing substrate 24 , the surface opposite to the surface on which the semiconductor wafer 22 is buried is arranged on the side of the supporting glass substrate 26 . In this way, the laminated substrate 27 can be obtained. However, if necessary, a release layer may be formed between the adhesive layer 25 and the supporting glass substrate 26 . Furthermore, after transferring the obtained laminated substrate 27, as shown in FIG. . Finally, after the processing substrate 24 is separated from the supporting glass substrate 26, the processing substrate 24 is cut into individual semiconductor wafers 22, and supplied to the subsequent packaging process (FIG. 2(g)).

圖3係顯示將支持玻璃基板使用於背照光基板,將加工基板作為薄型化之工程的概念剖面圖。圖3(a)係顯示層積基板30。層積基板30係依支持玻璃基板31,剝離層32,接著層33,加工基板(矽晶圓)34之順序而加以層積配置。對於接觸於加工基板之接著層33側的表面,係經由光微影法等而加以複數形成半導體晶片35。圖3(b)係顯示經由研磨裝置36而將加工基板34作為薄型化之工程。經由此工程,加工基板34係機械性地加以研磨,例如,薄型化至數十μm為止。圖3(c)係顯示通過支持玻璃基板31,照射紫外光37於剝離層32之工程。當歷經此工程時,如圖3(d)所示,成為可分離支持玻璃基板31者。所分離之支持玻璃基板31係因應必要而加以再利用。圖3(e)係顯示自加工基板34除去接著層33之工程。當歷經此工程時,可採取薄型化之加工基板34者。 [實施例]Fig. 3 is a conceptual cross-sectional view showing the process of using a supporting glass substrate as a backlight substrate and processing the substrate as a thinner process. FIG. 3( a ) shows a laminated substrate 30 . The laminated substrate 30 is laminated and arranged in the order of a supporting glass substrate 31 , a peeling layer 32 , an adhesive layer 33 , and a processing substrate (silicon wafer) 34 . The surface on the side of the adhesive layer 33 that is in contact with the substrate to be processed is multiplied by photolithography to form a semiconductor wafer 35 . FIG. 3( b ) shows the process of processing the substrate 34 as a thinning process through the grinding device 36 . Through this process, the processed substrate 34 is mechanically polished, for example, reduced in thickness to several tens of μm. FIG. 3( c ) shows the process of irradiating ultraviolet light 37 on the peeling layer 32 through the supporting glass substrate 31 . After this process, as shown in FIG. 3( d ), the support glass substrate 31 becomes separable. The separated supporting glass substrate 31 is reused as necessary. FIG. 3( e ) shows the process of removing the adhesive layer 33 from the processed substrate 34 . When going through this process, a thinner processed substrate 34 can be used. [Example]

以下,依據實施例而加以說明本發明。然而,以下的實施例係單純的例示。本發明係對於以下之實施例未加以任何限定。Hereinafter, the present invention will be described based on examples. However, the following examples are merely illustrations. The present invention is not limited to the following examples.

表1~9係顯示本發明之實施例(試料No.1~86)及比較例(試料No.87)。Tables 1 to 9 show examples (sample Nos. 1 to 86) and comparative examples (sample No. 87) of the present invention.

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Figure 02_image017

首先,呈成為表中之玻璃組成地,將調合玻璃原料之玻璃批放入至白金坩堝之後,以1500~1700℃進行24小時熔融,澄清,均質化。在玻璃批之熔解時,使用白金攪拌器進行攪拌,進行均質化。接著,將熔融玻璃流出於碳板上,成形為板狀之後,以緩冷卻點附近之溫度進行30分鐘緩冷卻。對於所得到之各玻璃基板,評估密度,在30~380℃溫度範圍的平均線熱膨漲係數CTE30 380 、楊氏模量,應變點Ps、緩冷卻點Ta、軟化點Ts、在高溫黏度104.0 dPa・s之溫度,在高溫黏度103.0 dPa・s之溫度、在高溫黏度102.5 dPa・s之溫度。然而,在表中的「N.A.」係表示未測定。First, put the glass batches of the prepared glass raw materials into a platinum crucible so as to have the glass composition in the table, and melt at 1500-1700°C for 24 hours to clarify and homogenize. When the glass batch is melting, use a platinum stirrer to stir and homogenize. Next, the molten glass was flowed on a carbon plate and formed into a plate shape, and then slowly cooled at a temperature near the slow cooling point for 30 minutes. For each of the obtained glass substrates, the density, the average coefficient of linear thermal expansion CTE in the temperature range of 30 to 380°C 30 to 380 °C , the Young's modulus, the strain point Ps, the slow cooling point Ta, the softening point Ts, the The temperature at high temperature viscosity is 10 4.0 dPa・s, the temperature at high temperature viscosity is 10 3.0 dPa・s, the temperature at high temperature viscosity is 10 2.5 dPa・s. However, "NA" in the table means not determined.

密度係經由阿基米德法而測定的值。Density is a value measured by the Archimedes method.

在30~380℃之溫度範圍的平均線熱膨脹係數CTE30 380 係由熱膨脹儀而測定的值。The average linear coefficient of thermal expansion CTE 30-380 °C in the temperature range of 30-380 °C is a value measured by a thermal dilatometer.

楊氏模量係指經由共振法而測定的值。Young's modulus means the value measured by the resonance method.

應變點Ps、緩冷卻點Ta、軟化點Ts係依據ASTM C336及C338之方法而測定的值。The strain point Ps, slow cooling point Ta, and softening point Ts are values measured in accordance with the methods of ASTM C336 and C338.

在高溫黏度104.0 dPa・s、103.0 dPa・s、102.5 dPa・s之溫度係以白金球提升法而測定的值。The high-temperature viscosity of 10 4.0 dPa・s, 10 3.0 dPa・s, and 10 2.5 dPa・s is the value measured by the platinum ball lifting method.

自表1~9了解到,試料No.1~86係在30~380℃之溫度範圍的平均線熱膨脹係數CTE30 380 為33.2×10-7 /℃~48.0×10-7 /℃、楊氏模量為80.0~101.2GPa之故,認為作為支持玻璃基板而為最佳。另一方面,試料No.87係在在30~380℃之溫度範圍的平均線熱膨脹係數CTE30 380 為35×10-7 /℃,但楊氏模量為76GPa之故,認為作為支持玻璃基板而並非最佳。From Tables 1 to 9, the average coefficient of linear thermal expansion CTE of samples No.1 to 86 in the temperature range of 30 to 380 °C is 33.2×10 -7 /°C to 48.0×10 -7 /°C, Since the Young's modulus is 80.0 to 101.2 GPa, it is thought that it is optimal as a supporting glass substrate. On the other hand, sample No. 87 has an average coefficient of linear thermal expansion CTE 30 to 380 ° C in the temperature range of 30 to 380°C, which is 35×10 -7 /°C, but the Young's modulus is 76GPa, which is considered to support Glass substrates are not optimal.

接著,將有關試料No.1~86之玻璃基板加工為φ300mm×0.8mm厚之後,經由研磨裝置而研磨處理其兩表面。具體而言,以外徑不同之一對之研磨墊而夾入玻璃基板之兩表面,同時使玻璃基板與一對之研磨墊旋轉之同時,研磨處理玻璃基板之兩表面。研磨處理時,時而玻璃基板之一部分則呈自研磨墊溢出地加以控制。然而,研磨墊係胺甲酸乙酯製,在研磨處理時使用之研磨漿料的平均粒徑係2.5μm、研磨速度係15m/分。對於所得到之各研磨處理完成之玻璃基板,經由KOBELCO research institute公司製之SBW-331ML/d而測定總厚度變異量(TTV)與彎曲量。其結果,總厚度變異量(TTV)則各為0.45μm,彎曲量則各為35μm。Next, after processing the glass substrates of samples No. 1 to 86 to a thickness of φ300mm×0.8mm, both surfaces thereof were polished by a polishing device. Specifically, a pair of polishing pads with different outer diameters are sandwiched between both surfaces of the glass substrate, and the glass substrate and the pair of polishing pads are rotated simultaneously to polish both surfaces of the glass substrate. During the polishing process, sometimes a part of the glass substrate is controlled so that it overflows from the polishing pad. However, the polishing pad was made of urethane, the average particle diameter of the polishing slurry used in the polishing treatment was 2.5 μm, and the polishing speed was 15 m/min. The total thickness variation (TTV) and the amount of warping were measured for each of the obtained glass substrates having been polished through SBW-331ML/d manufactured by KOBELCO Research Institute. As a result, the total thickness variation (TTV) was 0.45 μm each, and the amount of warpage was 35 μm each.

1、27、30‧‧‧層積基板10、26、31‧‧‧支持玻璃基板11、24、34‧‧‧加工基板12、32‧‧‧剝離層13、21、25、33‧‧‧接著層20‧‧‧支持構件22、35‧‧‧半導體晶片23‧‧‧封閉材28‧‧‧配線29‧‧‧焊錫凸塊36‧‧‧研磨裝置37‧‧‧紫外光1, 27, 30‧‧‧Laminated substrate 10, 26, 31‧‧‧Supporting glass substrate 11, 24, 34‧‧‧Processing substrate 12, 32‧‧‧Peel layer 13, 21, 25, 33‧‧‧ Bonding layer 20‧‧‧support member 22, 35‧‧‧semiconductor chip 23‧‧‧sealing material 28‧‧‧wiring 29‧‧‧solder bump 36‧‧‧grinding device 37‧‧‧ultraviolet light

圖1係顯示本發明之層積基板之一例的概念斜視圖。   圖2係顯示fan out型之WLP的先晶片型之製造工程的概念剖面圖。   圖3係顯示將支持玻璃基板使用於背照光基板,將加工基板作為薄型化之工程的概念剖面圖。Fig. 1 is a conceptual perspective view showing an example of a laminated substrate of the present invention. Fig. 2 is a conceptual cross-sectional view showing a chip-first manufacturing process of a fan out WLP. Figure 3 is a conceptual cross-sectional view showing the process of using a supporting glass substrate as a backlight substrate and processing the substrate as a thinner process.

1‧‧‧層積基板 1‧‧‧Laminated substrate

10‧‧‧支持玻璃基板 10‧‧‧Support glass substrate

11‧‧‧加工基板 11‧‧‧Processing substrate

12‧‧‧剝離層 12‧‧‧Peeling layer

13‧‧‧接著層 13‧‧‧adhesion layer

Claims (9)

一種支持玻璃基板,係其特徵為在30~380℃之溫度範圍的平均線熱膨脹係數為30×10-7/℃以上,且55×10-7/℃以下,而楊氏模量則為80GPa以上者。 A supporting glass substrate, characterized in that the average linear thermal expansion coefficient in the temperature range of 30 to 380°C is not less than 30×10 -7 /°C and not more than 55×10 -7 /°C, and the Young's modulus is 80GPa above. 如申請專利範圍第1項記載之支持玻璃基板,其中,總厚度變異量,亦即TTV則不足2.0μm者。 For the supporting glass substrate described in item 1 of the scope of application, the total thickness variation, ie TTV, is less than 2.0 μm. 如申請專利範圍第1項或第2項記載之支持玻璃基板,其中,作為玻璃組成,以質量%,含有SiO2 50~66%、Al2O3 7~34%、B2O3 0~8%、MgO 5.2~22%、CaO 1~15%、Y2O3+La2O3+ZrO2 0~20%者。 As for the supporting glass substrate described in item 1 or item 2 of the scope of application, the glass composition contains 50~66% of SiO 2 , 7 ~34% of Al 2 O 3 , 0 ~ 8%, MgO 5.2~22%, CaO 1~15%, Y 2 O 3 +La 2 O 3 +ZrO 2 0~20%. 如申請專利範圍第1項或第2項記載之支持玻璃基板,其中,在半導體封裝件之製造步驟,用樹脂對半導體晶片進行成形而成之加工基板的支持者。 The supporting glass substrate described in claim 1 or claim 2 of the claims, wherein, in the manufacturing step of a semiconductor package, a supporter of a processed substrate formed by molding a semiconductor wafer with a resin. 一種層積基板,係至少具備加工基板與用以支持加工基板之支持玻璃基板的層積基板,其特徵為支持玻璃基板則為如申請專利範圍第1項或2項記載之支持玻璃基板者。 A laminated substrate comprising at least a processed substrate and a supporting glass substrate for supporting the processed substrate, characterized in that the supporting glass substrate is the supporting glass substrate described in item 1 or 2 of the scope of application. 如申請專利範圍第5項記載之層積基板,其中,加工基板則為鑄模半導體晶片於樹脂之加工基板者。 For the laminated substrate described in claim 5, the processed substrate is a processed substrate in which semiconductor chips are molded in resin. 一種半導體封裝之製造方法,其特徵為具有:準備至少具備加工基板與為了支持加工基板之支持玻璃基板的層積基板之工程,和對於加工基板而言,進行加工處理之工程,並且,支持玻璃基板則為如申請專利範圍第1項至第4項任一項記載之支持玻璃基板者。 A method of manufacturing a semiconductor package, characterized by comprising: a process of preparing a laminated substrate including at least a processing substrate and a supporting glass substrate for supporting the processing substrate, and a process of performing processing on the processing substrate, and the supporting glass The substrate is a supporting glass substrate as described in any one of items 1 to 4 of the scope of the patent application. 如申請專利範圍第7項記載之半導體封裝之製造方法,其中,加工處理則包含:於加工基板之一方的表面進行配線的工程者。 For the method of manufacturing a semiconductor package as described in claim 7 of the scope of the patent application, the processing includes: the process of performing wiring on the surface of one of the processed substrates. 如申請專利範圍第7項或第8項記載之半導體封裝之製造方法,其中,加工處理則包含:於加工基板之一方的表面形成焊錫凸塊的工程者。 For the method of manufacturing a semiconductor package as described in claim 7 or claim 8 of the scope of the patent application, the processing includes: the process of forming solder bumps on the surface of one of the processed substrates.
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