TWI776922B - 鰭式場效電晶體裝置結構及其形成方法 - Google Patents

鰭式場效電晶體裝置結構及其形成方法 Download PDF

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TWI776922B
TWI776922B TW107124486A TW107124486A TWI776922B TW I776922 B TWI776922 B TW I776922B TW 107124486 A TW107124486 A TW 107124486A TW 107124486 A TW107124486 A TW 107124486A TW I776922 B TWI776922 B TW I776922B
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source
fin
drain
gallium
layer
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TW107124486A
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TW201916178A (zh
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蔡俊雄
沙哈吉Ｂ 摩爾
彭成毅
林佑明
游國豐
子韋 方
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台灣積體電路製造股份有限公司
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Abstract

一種鰭式場效電晶體裝置結構及其形成方法被提供。此鰭式場效電晶體裝置結構包括延伸於基板之上的鰭片結構，以及形成於此鰭片結構的中間部分之上的閘極結構。此鰭片結構的中間部分被上述閘極結構所包覆。此鰭式場效電晶體裝置結構包括相鄰於上述閘極結構的源極/汲極結構，且此源極/汲極結構包括位於源極/汲極結構的外部分的摻雜區域，且此摻雜區域包括鎵。此鰭式場效電晶體裝置結構包括形成於上述源極/汲極結構的摻雜區域上的金屬矽化物層，且此金屬矽化物層直接接觸上述源極/汲極結構的摻雜區域。

Description

鰭式場效電晶體裝置結構及其形成方法
本發明實施例係有關於一種半導體結構，且特別有關於一種鰭式場效電晶體裝置結構及其形成方法。
半導體裝置使用於各種電子應用中，例如個人電腦、行動電話、數位相機和其他電子設備。半導體裝置通常藉由以下方式而製造，包括在半導體基板上依序沉積絕緣或介電層、導電層及半導體層，使用微影製程圖案化上述各材料層，藉以在此半導體基板上形成電路組件及元件。通常在單一半導體晶圓上製造許多積體電路，並且藉由沿著切割線在積體電路之間進行切割，以將各個晶粒單一化。上述各個晶粒通常分別地封裝於，例如，多晶片模組中或其他類型的封裝中。
隨著半導體工業已經進入奈米技術製程節點，在追求更高的裝置密度、更高的效能及更低的成本等方面，來自製造及設計問題的挑戰已經導致三維設計的發展，例如，鰭式場效電晶體(fin field effect transistor,FinFET)。鰭式場效電晶體具有從基板延伸出來的薄的垂直「鰭片」(或鰭片結構)。鰭式場效電晶體的通道形成於此垂直鰭片之中。閘極位於鰭片之 上。鰭式場效電晶體之優點可包括降低短通道效應與更高的電流流量。
雖然現有的鰭式場效電晶體裝置及其製造方法已普遍足以達成預期的目標，然而卻無法完全滿足所有需求。
本發明之一實施例提供一種鰭式場效電晶體裝置結構，包括：鰭片結構，延伸於基板之上；閘極結構，形成於鰭片結構的中間部分之上，其中鰭片結構的中間部分被閘極結構所包覆；源極/汲極結構，相鄰於閘極結構，其中源極/汲極結構包括摻雜區域位於源極/汲極結構的外部分，且摻雜區域包括鎵；以及金屬矽化物層，形成於源極/汲極結構的摻雜區域之上，其中金屬矽化物層直接接觸源極/汲極結構的摻雜區域。
本發明之另一實施例亦提供一種鰭式場效電晶體裝置結構，包括：鰭片結構，延伸於基板之上；閘極結構，形成於鰭片結構的中間部分之上；源極/汲極結構，形成於閘極結構的一側上，其中源極/汲極結構包括摻雜鎵的摻雜區域；層間介電層，圍繞源極/汲極結構，其中層間介電層被摻雜鎵；金屬矽化物層，形成於摻雜鎵的摻雜區域之上；以及源極/汲極接觸結構，形成於金屬矽化物層之上。
本發明之又一實施例提供一種鰭式場效應電晶體裝置結構之形成方法，包括：形成鰭片結構，其中鰭片結構延伸位於基板之上；形成閘極結構，其中閘極結構形成於鰭片結構的中間部分之上；形成源極/汲極結構於鰭片結構之上，其 中源極/汲極結構相鄰於閘極結構；摻雜源極/汲極結構的外部分，以形成摻雜區域，其中摻雜區域包括鎵；形成金屬矽化物層於摻雜區域之上；以及形成源極/汲極接觸結構於金屬矽化物層之上。
11:離子佈植製程
100:鰭式場效電晶體裝置結構
100’:鰭式場效電晶體裝置結構
102:基板
104:介電層
106:罩幕層
108:光阻層
110:鰭片結構
110a:第一鰭片結構
110b:第二鰭片結構
111:凹口
112:絕緣層
114:隔離結構
116:虛設閘極介電層
118:虛設閘極電極層
120:虛設閘極結構
122:閘極間隔物層
123:鰭片側壁間隔物
124:源極/汲極結構
124A:向上晶面
124B:向下晶面
126:接觸蝕刻停止層
128:層間介電層
133:溝槽
134:合併的源極/汲極結構
134A:向上晶面
134B:向下晶面
135:凹陷部分
136:閘極介電層
138:閘極電極層
140:閘極結構
151:接觸開口
200:鰭式場效電晶體裝置結構
200’:鰭式場效電晶體裝置結構
210:摻雜區域
212:金屬層
214:金屬氮化物層
216:金屬矽化物層
220:源極/汲極接觸結構
300:鰭式場效電晶體裝置結構
300’:鰭式場效電晶體裝置結構
θ:角度
根據以下的詳細說明並配合所附圖式做完整揭露。應注意的是，根據本產業的一般作業，圖示並未必按照比例繪製。事實上，可能任意的放大或縮小元件的尺寸，以做清楚的說明。
第1A圖到第1J圖繪示依據本發明之一些實施例之形成鰭式場效電晶體裝置結構之各個製程階段之立體圖。
第2A圖到2E圖繪示依據本發明之一些實施例之鰭式場效電晶體裝置結構在形成如第1J圖所繪示的結構之後之各個製程階段之剖面圖。
第2E’圖繪示依據本發明之一些實施例之鰭式場效電晶體裝置結構之剖面圖。
第3A圖到第3E圖繪示依據本發明之一些實施例之鰭式場效電晶體裝置結構在形成如第1J圖所繪示的結構之後之各個製程階段之剖面圖。
第3E’圖繪示依據本發明之一些實施例之鰭式場效電晶體裝置結構之剖面圖。
第4A圖到第4D圖繪示依據本發明之一些實施例之鰭式場效電晶體裝置結構之各個製程階段之剖面圖。
第4D’圖繪示依據本發明之一些實施例之鰭式場效電晶體 裝置結構之剖面圖。
第5A圖到第5D圖繪示依據本發明之一些實施例之鰭式場效電晶體裝置結構之各個製程階段之剖面圖。
第5D’圖繪示依據本發明之一些實施例之鰭式場效電晶體裝置結構之剖面圖。
以下的揭露內容提供許多不同的實施例或範例以實施本案的不同部件(feature)。以下的揭露內容敘述各個構件及其排列方式的特定範例，以簡化說明。當然，這些特定的範例並非用以限定。例如，若是本說明書敘述了一第一部件形成於一第二部件之上或上方，即表示其可能包含上述第一部件與上述第二部件是直接接觸的實施例，亦可能包含了有附加部件形成於上述第一部件與上述第二部件之間，而使上述第一部件與第二部件可能未直接接觸的實施例。另外，以下揭露的不同範例可能重複使用相同的參照符號及/或標記。這些重複係為了簡化與清晰的目的，並非用以限定所討論的不同實施例及/或結構之間有特定的關係。
下文描述實施例的各種變化。藉由各種視圖與所繪示之實施例，類似的元件標號用於標示類似的元件。應可理解的是，可在進行所述的方法之前、之間或之後，提供額外的操作步驟，並且在所述的方法的其他實施例中，所述的部分步驟可被變更順序、置換或省略。
可藉由任何合適的方法將鰭片圖案化。舉例而言，可使用一種或多種微影製程將鰭片圖案化，其中微影製程可包 括雙圖案微影(double patterning)或多圖案微影(multiple patterning)製程。一般而言，雙圖案微影或多圖案微影製程結合微影與自對準製程(self-aligned process)，因而能夠創造具有微小節距的圖案，此圖案的節距小於，例如，使用單一直接微影製程所能夠得到的節距。例如，在一實施例中，形成犧牲層於基板之上，並使用微影製程進行圖案化。使用自對準製程沿著圖案化的犧牲層形成間隔物。之後移除犧牲層，接著可使用餘留的間隔物將鰭片圖案化。
本發明實施例提供形成鰭式場效電晶體裝置結構(FinFET device structure)之實施例。第1A圖到第1J圖繪示依據本發明之一些實施例之形成鰭式場效電晶體裝置結構100之各個製程階段之立體圖。
請參照第1A圖，提供基板102。基板102可以由矽或其他半導體材料所形成。另外地且額外地，基板102可包括其他元素半導體，例如，鍺。在一些實施例中，基板102由化合物半導體所形成，例如，碳化矽(silicon carbide)、砷化鎵(gallium arsenic)、砷化銦(indium arsenide)或磷化銦(indium phosphide)。在一些實施例中，基板102由合金半導體所形成，例如，矽鍺(silicon germanium)、碳化矽鍺(silicon germanium carbide)、砷磷化鎵(gallium arsenic phosphide)或磷化鎵銦(gallium indium phosphide)。在一些實施例中，基板102包括磊晶層(epitaxial layer)。舉例而言，基板102具有位於塊材(bulk)半導體之上的磊晶層。
之後，形成介電層104與罩幕層106於基板102之上， 並且形成光阻層108於罩幕層106之上。藉由圖案化製程將光阻層108圖案化。圖案化製程包括微影製程與蝕刻製程。微影製程包括光阻塗佈(例如，旋轉塗佈)、軟烘烤(soft baking)、光罩對準(mask aligning)、曝光(exposure)、曝光後烘烤(post-exposure baking)、顯影(developing)光阻、潤洗(rising)、乾燥(例如，硬烘烤(hard baking))。蝕刻製程包括乾式蝕刻製程或濕式蝕刻製程。
介電層104是介於基板102與罩幕層106之間的緩衝層。另外，當移除罩幕層106時，使用介電層104作為停止層。介電層104可以由氧化矽所形成。罩幕層106可以由氧化矽、氮化矽、氮氧化矽或其他合適的材料所形成。在一些其他實施例中，在介電層104之上形成多於一個罩幕層106。
藉由沉積製程以形成介電層104及罩幕層106，沉積製程包括，例如，化學氣相沉積(chemical vapor deposition,CVD)製程、高密度電漿化學氣相沉積(high-density plasma chemical vapor deposition,HDPCVD)製程、旋轉塗佈(spin-on)製程、濺鍍(sputtering)製程或其他合適的製程。
根據一些實施例，如第1B圖所繪示，在將光阻層108圖案化之後，藉由使用經過圖案化的光阻層108作為罩幕，以將介電層104及罩幕層106圖案化。如此一來，得到經過圖案化的介電層104及經過圖案化的罩幕層106。然後，移除經過圖案化的光阻層108。
接著，藉由使用經過圖案化的介電層104及經過圖案化的罩幕層106作為罩幕，對基板102進行蝕刻製程，以形成 鰭片結構(fin structure)110。蝕刻製程可以是乾式蝕刻製程或濕式蝕刻製程。
在一些實施例中，使用乾式蝕刻製程蝕刻基板102。乾式蝕刻製程包括使用基於氟的(fluorine-based)氣體，例如，六氟化硫(SF6)、碳氟化物(CxFy)、三氟化氮(NF3)或上述之組合。蝕刻製程可以是藉由時間控制的(time-controlled)製程，且持續進行直到鰭片結構110達到預定的高度。在一些實施例中，鰭片結構110具有一寬度，且此寬度從上部分到往下部分逐漸增加。
根據一些實施例，如第1C圖所繪示，在形成鰭片結構110之後，形成絕緣層112以覆蓋位於基板102之上的鰭片結構110。
在一些實施例中，絕緣層112由氧化矽、氮化矽、氮氧化矽、摻雜氟的矽酸鹽玻璃(fluoride-doped silicate glass,FSG)或其他低介電常數(low-k)介電材料所形成。可以藉由化學氣相沉積製程、旋轉塗佈玻璃(spin-on-glass)製程或其他合適的製程沉積絕緣層112。
之後，將絕緣層112薄化或平坦化，以暴露經過圖案化的罩幕層106的頂表面。在一些實施例中，藉由化學機械研磨(chemical mechanical polishing,CMP)製程將絕緣層112薄化。之後，移除經過圖案化的介電層104及經過圖案化的罩幕層106。
之後，根據一些實施例，如第1D圖所繪示，移除一部分的絕緣層112，以形成隔離結構114。隔離結構114可以 是圍繞鰭片結構110的淺溝槽隔離(shallow trench isolation,STI)結構。鰭片結構110的下部分被隔離結構114所圍繞，且鰭片結構110的上部分延伸突出於隔離結構114。換言之，鰭片結構110的一部分埋設於隔離結構114之中。隔離結構114用以避免電子干擾(electrical interference)或串音干擾(crosstalk)。
之後，根據一些實施例，如第1E圖所繪示，形成虛設閘極結構(dummy gate structure)120橫跨鰭片結構110並延伸至隔離結構114之上。
在一些實施例中，虛設閘極結構120包括虛設閘極介電層116及虛設閘極電極層118，其中虛設閘極電極層118位於虛設閘極介電層116之上。在形成虛設閘極結構120之後，形成閘極間隔物層122於虛設閘極結構120的相對兩側的側壁表面之上。閘極間隔物層122可以是單層或是多層。鰭片側壁間隔物(fin sidewall spacer)123形成於鰭片結構110的相對兩側的側壁表面之上。鰭片側壁間隔物123可以是單層或是多層。
之後，根據一些實施例，如第1F圖所繪示，移除鰭片結構110的上部分，以形成凹口111。凹口111的底表面低於隔離結構114的頂表面。
之後，根據一些實施例，如第1G圖所繪示，形成源極/汲極(source/drain,S/D)結構124於鰭片結構110之上。
在一些實施例中，將鰭片結構110相鄰於虛設閘極結構120的部分凹陷化，以在鰭片結構110的兩側形成凹口，並且藉由磊晶製程在上述凹口中成長應力材料(strained material)，以形成源極/汲極結構124。源極/汲極結構124是形 成於鰭片結構110之上。
此外，應力材料的晶格常數(lattice constant)可不同於基板102的晶格常數。在一些實施例中，源極/汲極結構124包括鍺(Ge)、矽鍺(SiGe)、砷化銦(InAs)、砷化銦鎵(InGaAs)、銻化銦(InSb)、砷化鎵(GaAs)、銻化鎵(GaSb)、磷化銦鋁(InAlP)、磷化銦(InP)或其他類似之物。在一些實施例中，源極/汲極結構124由矽鍺(SixGey，其中x為0.05-0.5，Y為0.5-0.95)所形成，且鍺原子百分比為50至95的範圍。在一些實施例中，源極/汲極結構124由經過摻雜的矽鍺(SixGey，其中x為0.05-0.5，Y為0.5-0.95)所形成，其中經過摻雜的矽鍺可以是，例如，摻雜硼的矽鍺(SixGey，其中x為0.05-0.5，Y為0.5-0.95)。
之後，根據一些實施例，如第1H圖所繪示，在形成源極/汲極結構124之後，形成接觸蝕刻停止層(contact etch stop layer,CESL)126於基板102之上，並且形成層間介電(inter-layer dielectric,ILD)層128於接觸蝕刻停止層126之上。
在一些其他實施例中，接觸蝕刻停止層126是由氮化矽、氮氧化矽及/或其他合適的材料所形成。可藉由電漿增強化學氣相沉積(plasma enhanced CVD,PECVD)製程、低壓化學氣相沉積(low-pressure CVD,LPCVD)製程、原子層沉積(atomic layer deposition,ALD)製程或其他合適的製程形成接觸蝕刻停止層126。
層間介電層128可包括由多種介電材料所形成的多層結構，其中介電材料可包括，例如，氧化矽、氮化矽、氮氧化矽、四乙氧基化矽烷(tetraethoxysilane,TEOS)、磷矽酸鹽 玻璃(phosphosilicate glass,PSG)、硼磷矽酸鹽玻璃(borophosphosilicate glass,BPSG)、低介電常數介電材料及/或其他合適的介電材料。低介電常數介電材料之例子可包括但不限於：摻雜氟的矽酸鹽玻璃、摻雜碳的氧化矽、非晶氟化碳(amorphous fluorinated carbon)、聚對二甲苯(parylene)、雙苯並環丁烯(bis-benzocyclobutenes,BCB)或聚醯亞胺。可以藉由化學氣相沉積製程、物理氣相沉積製程、原子層沉積製程、旋轉塗佈製程或其他合適的製程形成層間介電層128。
之後，對層間介電層128進行研磨製程，直到暴露出虛設閘極結構120的頂表面。在一些實施例中，藉由化學機械研磨製程將層間介電層128平坦化。
之後，根據一些實施例，如第1I圖所繪示，移除虛設閘極結構120，以形成溝槽133於層間介電層128之中。藉由蝕刻製程，例如，乾式蝕刻製程或濕式蝕刻製程，以移除虛設閘極介電層116及虛設閘極電極層118。
之後，根據一些實施例，如第1J圖所繪示，形成閘極結構140於溝槽133之中。閘極結構140是形成於隔離結構114之上。閘極結構140包括閘極介電層136以及閘極電極層138，其中閘極電極層138位於閘極介電層136之上。
閘極介電層136可以是單層或是多層。閘極介電層136由以下材料所形成：氧化矽(silicon oxide,SiOx)、氮化矽(silicon nitride,SixNy)、氮氧化矽(silicon oxynitride,SiON)、具有高介電常數(high-k)的介電材料或上述之組合。在一些實施例中，藉由電漿增強化學氣相沉積製程或旋轉塗佈製程形成 閘極介電層136。
閘極電極層138由導電材料所形成，例如，鋁(Al)、銅(Cu)、鎢(W)、鈦(Ti)、鉭(Ta)或其他合適的材料。藉由沉積製程，例如，化學氣相沉積製程、物理氣相沉積製程、原子層沉積製程、高密度電漿化學氣相沉積製程、有機金屬化學氣相沉積(metal-organic chemical vapor deposition,MOCVD)製程或電漿增強化學氣相沉積製程，以形成閘極電極層138。
在一些實施例中，形成功函數層於閘極介電層136與閘極電極層138之間。功函數層由金屬材料所形成，且此金屬材料可包括N型功函數金屬(N-work-function metal)或P型功函數金屬(P-work-function metal)。N型功函數金屬包括鎢、銅、鈦、銀(Ag)、鋁、鈦鋁合金(TiAl alloy)、氮化鈦鋁(TiAlN)、碳化鉭(TaC)、碳氮化鉭(TaCN)、矽氮化鉭(TaSiN)、錳(Mn)、鋯(Zr)或上述之組合。P型功函數金屬包括氮化鈦(TiN)、氮化鎢(WN)、氮化鉭(TaN)、釕(Ru)或上述之組合。
第2A圖到2E圖繪示依據本發明之一些實施例之鰭式場效電晶體裝置結構100在形成如第1J圖所繪示的結構之後之各個製程階段之剖面圖。
第2A圖繪示沿著第1J圖之鰭式場效電晶體裝置結構100之I-I’剖線之剖面圖。形成接觸蝕刻停止層126於源極/汲極結構124之上，並且形成層間介電層128於接觸蝕刻停止層126之上。源極/汲極結構124包括向上晶面(upwardly facing facet)124A與向下晶面(downwardly facing facet)124B。
之後，根據一些實施例，如第2B圖所繪示，移除 層間介電層128的一部分及接觸蝕刻停止層126的一部分，以形成接觸開口151。如此一來，暴露出源極/汲極結構124的一部分。更具體而言，暴露出源極/汲極結構124的外部分。在一些實施例中，暴露出源極/汲極結構124的向上晶面124A與向下晶面124B。
之後，根據一些實施例，如第2C圖所繪示，對源極/汲極結構124的一部分進行摻雜，以在源極/汲極結構124之中形成摻雜區域210。藉由進行離子佈植製程11，以形成摻雜區域210。更具體而言，源極/汲極結構124包括外部分與內部分，且源極/汲極結構124的外部分受到摻雜。使用雜質對源極/汲極結構124的向上晶面124A的暴露表面與向下晶面124B的暴露表面進行摻雜，以形成摻雜區域210。
由於源極/汲極結構124具有菱形形狀，因此摻雜區域210具有不同的摻雜濃度。在一些實施例中，摻雜區域210具有位於向上晶面124A的第一部分，以及位於向下晶面124B的第二部分。摻雜區域210的第一部分的摻雜濃度高於摻雜區域210的第二部分。換言之，摻雜區域210的第一部分的摻雜程度比摻雜區域210的第二部分的摻雜程度更重度。
在一些實施例中，使用摻質對源極/汲極結構124的外部分進行摻雜，以形成摻雜區域210，此摻質包括鎵(Ga)。摻雜區域210是鎵摻雜區域(Ga-doped region)。摻雜區域210用以降低介於源極/汲極結構124與金屬矽化物126(將於後續形成)之間的接觸電阻。
在一些實施例中，當源極/汲極結構124是由未摻雜 的或經摻雜的矽鍺所形成，且摻質是鎵時，隨著鍺在矽鍺之中的濃度提高，鎵的固態溶解度(solid solubility)會隨之提高。不同於鎵，硼的固態溶解度則是會隨著鍺在矽鍺之中的濃度提高而降低。若源極/汲極結構124只有摻雜硼，由於其固態溶解度較低，硼的摻雜濃度會受到限制。因此，相較於硼，由於鎵的固態溶解度較高，摻雜到源極/汲極結構124中的鎵的摻雜量較高。
本說明書中的摻雜區域210受到鎵的摻雜，由於鎵比硼更重，因此，鎵的擴散比硼的擴散慢，可避免因為摻質擴散到通道區域而造成的短通道效應(short channel effect)。通道區域是直接位於閘極結構之下，並且介於源極結構與汲極結構之間。
在一些實施例中，源極/汲極結構124由矽鍺(SixGey)所形成，其中x的範圍為約5%至約50%，且y的範圍為約50%至約95%。在P型鰭式場效電晶體裝置的通道區域中的壓縮應力藉由提高鍺的濃度而得到改善。若鍺濃度低於50%，則P型鰭式場效電晶體裝置的效能就會降低。當鍺濃度介於上述範圍內的時候，能夠提高P型鰭式場效電晶體裝置的效能。
在一些實施例中，使用鎵源極/汲極結構124對進行摻雜，因此，摻雜區域210是由摻雜鎵的矽鍺(Ga-doped silicon germanium,SiGeGa)所形成。鎵的濃度為約1E19原子/立方公分至約4E20原子/立方公分的範圍。在一些實施例中，摻雜區域210的摻雜深度為約5nm至約15nm的範圍。離子佈植製程11的能量為約2KeV至約6KeV的範圍。
在一些其他實施例中，使用鎵與硼對源極/汲極結構124進行摻雜，因此，摻雜區域210由摻雜鎵與硼的矽鍺(Ga and B-doped silicon germanium,SiGeGaB)所形成。在一些實施例中，鎵的濃度為約1E19原子/立方公分至約4E20原子/立方公分的範圍，且硼的濃度為約1E19原子/立方公分至約1E21原子/立方公分的範圍。
當鎵與硼兩者被共同摻雜到源極/汲極結構124中時，摻雜順序是很重要的。在一些實施例中，對源極/汲極結構124進行第一摻雜製程，且第一離子佈植製程包括使用第一摻質，且此第一摻質為鎵。之後，對源極/汲極結構124進行第二摻雜製程，且第二離子佈植製程包括使用第二摻質，且此第二摻質為硼。
首先摻雜鎵，且隨後摻雜硼。硼輕於鎵，且硼容易擴散到通道區域。若在摻雜鎵之前先摻雜硼，則硼可能會很容易擴散進入通道區域中，而造成不欲發生的短通道效應。因此，本說明書的摻雜順序是用以降低並且避免硼擴散到通道區域中。如此一來，可降低短通道效應與漏電流(leakage current)的風險。
需注意的是，除了源極/汲極結構124以外，也可使用鎵(Ga)以及鎵/硼(Ga/B)對層間介電層128進行摻雜。在一些實施例中，也使用鎵對層間介電層128進行摻雜，且層間介電層128包括鎵摻質。層間介電層128的鎵摻雜濃度從頂表面到下表面逐漸降低。在一些其他實施例中，也使用鎵與硼對層間介電層128進行摻雜，且層間介電層128包括鎵摻質與硼摻質。
之後，根據一些實施例，如第2D圖所繪示，形成金屬層212與金屬氮化物層214於摻雜區域210上。金屬層212與金屬氮化物層214形成於隔離結構214上。金屬層212用以降低源極/汲極接觸結構的接觸電阻。金屬氮化物層214用以作為擴散阻障層，以避免金屬層212中的金屬被氧化。
金屬層212由鎳(Ni)、鈦(Ti)、鈷(Co)、鉭(Ta)或鉑(Pt)或其他合適的材料所形成。金屬氮化物層214由氮化鎳(NiN)、氮化鈦(TiN)、氮化鈷(CoN)、氮化鉭(TaN)或氮化鉑(PtN)或其他合適的材料所形成。在一些實施例中，金屬層212由鈦所形成，且金屬氮化物層214由氮化鈦所形成。可藉由沉積製程例如，化學氣相沉積(CVD)製程、物理氣相沉積(PVD)製程、原子層沉積(ALD)製程或其他合適的製程，以形成金屬層212與金屬氮化物層214。在一些實施例中，金屬層212的厚度為約5nm至約7nm的範圍。在一些實施例中，金屬氮化物層214的厚度為約1nm至約2nm的範圍。
之後，根據一些實施例，如第2E圖所繪示，對金屬層212與金屬氮化物層214進行退火製程，以形成金屬矽化物層216於摻雜區域210之上，並且使用導電材料填滿剩餘的接觸開口151，以形成源極/汲極接觸結構220。金屬矽化物層216形成於摻雜區域210之上，並且直接接觸摻雜區域210。退火製程用以活化位於源極/汲極結構124中的摻質。
藉由進行退火製程，使金屬層212與位於源極/汲極結構124中的矽進行反應，以形成金屬矽化物層216。在一些實施例中，金屬層212由鈦所形成，且金屬矽化物層216由矽化鈦 (TiSix)所形成。在一些實施例中，金屬層212由鉭所形成，且金屬矽化物層216由鉭化矽(TaSix)所形成。未反應的金屬層212與金屬氮化物層214殘留於隔離結構214之上。
退火製程可以是熱浸製程(thermal soaking process)、尖峰式退火製程(spike annealing process)、閃光退火製程(flash annealing process)或雷射退火製程(laser annealing process)。在一些實施例中，在約500℃到約700℃的溫度範圍下進行退火製程。在一些實施例中，進行退火製程的持續時間為約5秒到約30秒的範圍。
需注意的是，當摻雜區域210是由摻雜鎵與硼的矽鍺所形成，且金屬矽化物層216是由矽化鈦所形成時，鈦與硼將會進行反應而形成一種化合物。如此一來，位於摻雜區域210中的硼可能會擴散到通道區域中。
源極/汲極接觸結構220可由鎢、鎢合金、鋁、鋁合金、銅或銅合金所形成。源極/汲極接觸結構220藉由金屬矽化物層216電性連接至源極/汲極結構124。
需注意的是，源極/汲極結構124是由半導體材料所形成，金屬矽化物層216是由金屬材料所形成，因此，在半導體材料與金屬材料之間存在有阻障。若是沒有界面層(interface layer)位於金屬矽化物層216與源極/汲極結構124之間，則將有交界區(junction)存在。使用摻雜區域210作為界面層，以降低介於金屬矽化物層216與源極/汲極結構124之間的接觸電阻(Rcsd)。
第2E’圖繪示依據本發明之一些實施例之鰭式場 效電晶體裝置結構100’之剖面圖。第2E’圖的結構相似於第2E圖的結構，差別在於金屬層212並未完全與位於源極/汲極結構124中的矽進行反應，且未反應的金屬層212殘留於第2E’圖的金屬矽化物層216上，如第2E’圖所繪示。此外，位於隔離結構114之上的金屬層212的部分比位於金屬矽化物層216之上的殘留的金屬層212更厚。
第3A圖到第3E圖繪示依據本發明之一些實施例之鰭式場效電晶體裝置結構100在形成如第1J圖所繪示的結構之後之各個製程階段之剖面圖。第3A圖繪示沿著第1J圖之鰭式場效電晶體裝置結構100之II-II’剖線之剖面圖。
根據一些實施例，如第3A圖所繪示，形成閘極間隔物層122於閘極結構140的相對兩側的側壁表面上。形成接觸蝕刻停止層126於源極/汲極結構124之上，並且形成層間介電層128於接觸蝕刻停止層126之上。
之後，根據一些實施例，如第3B圖所繪示，移除層間介電層128的一部分及接觸蝕刻停止層126的一部分，以形成接觸開口151。如此一來，暴露出源極/汲極結構124的頂部分。
之後，根據一些實施例，如第3C圖所繪示，對源極/汲極結構124的一部分進行摻雜，以在源極/汲極結構124之中形成摻雜區域210。藉由進行離子佈植製程11，以對源極/汲極結構124進行摻雜。更具體而言，對源極/汲極結構124的外部分進行摻雜，以形成摻雜區域210。
之後，根據一些實施例，如第3D圖所繪示，形成 金屬層212與金屬氮化物層214於摻雜區域210上。
之後，根據一些實施例，如第3E圖所繪示，對金屬層212與金屬氮化物層214進行退火製程，以形成金屬矽化物層216，並且形成源極/汲極接觸結構220於金屬矽化物層216之上。金屬矽化物層216形成於摻雜區域210之上，並且直接接觸摻雜區域210。退火製程用以活化源極/汲極結構124之摻質。在一些實施例中，位於源極/汲極結構124中的矽與鈦進行反應，以形成矽化鈦作為金屬矽化物層216。
第3E’圖繪示依據本發明之一些實施例之鰭式場效電晶體裝置結構100’之剖面圖。第3E’圖的結構相似於第3E圖的結構，差別在於金屬層212並未完全與位於源極/汲極結構124中的矽進行反應，且未反應的金屬層212殘留於第2E’圖的金屬矽化物層216上，如第3E’圖所繪示。
第4A圖到第4D圖繪示依據本發明之一些實施例之鰭式場效電晶體裝置結構200之各個製程階段之剖面圖。用以形成鰭式場效電晶體裝置結構200之一些製程與材料是相似於或相同於用以形成鰭式場效電晶體裝置結構100之製程與材料，因此不再贅述。
根據一些實施例，如第4A圖所繪示，移除層間介電層128的一部分及接觸蝕刻停止層126的一部分，以形成接觸開口151。更具體而言，暴露出源極/汲極結構124的向上晶面124A與向下晶面124B。在向上晶面124A與向下晶面124B之間存在一角度θ。在一些實施例中，此角度θ為約80度至約150度。
之後，根據一些實施例，如第4B圖所繪示，對源極/汲極結構124的一部分進行摻雜，以在源極/汲極結構124之中形成摻雜區域210。藉由進行離子佈植製程11，以形成摻雜區域210。在一些實施例中，因為陰影效應(shadow effect)，源極/汲極結構124的一部分並未受到摻雜。因此，摻雜區域210形成於向上晶面124A之上，但是並未形成於向下晶面124B之上。
之後，根據一些實施例，如第4C圖所繪示，形成金屬層212與金屬氮化物層214於摻雜區域210之上。
之後，根據一些實施例，如第4D圖所繪示，對金屬層212與金屬氮化物層214進行退火製程，以形成金屬矽化物層216，並且形成源極/汲極接觸結構220於金屬矽化物層216之上。需注意的是，摻雜區域210介於源極/汲極結構124與金屬矽化物層216之間，以降低源極/汲極結構124與金屬矽化物層216之間的接觸電阻。
第4D’圖繪示依據本發明之一些實施例之鰭式場效電晶體裝置結構200’之剖面圖。第4D’圖的結構相似於第4D圖的結構，差別在於金屬層212並未完全與位於源極/汲極結構124中的矽進行反應，且未反應的金屬層212殘留於第2E’圖的金屬矽化物層216上，如第4D’圖所繪示。因此，金屬矽化物層216介於摻雜區域210與金屬層212之間，且金屬層212介於金屬矽化物層216與源極/汲極接觸結構220之間。此外，位於隔離結構114之上的金屬層212的部分比位於金屬矽化物層216之上的殘留的金屬層212更厚。
第5A圖到第5D圖繪示依據本發明之一些實施例之鰭式場效電晶體裝置結構300之各個製程階段之剖面圖。
根據一些實施例，如第5A圖所繪示，形成合併的源極/汲極結構(merged S/D structure)134於第一鰭片結構110a與第二鰭片結構110b之上。合併的源極/汲極結構134具有凹陷部分135，其中此凹陷部分135位於合併的源極/汲極結構134之中心。由於有凹陷部分135，使合併的源極/汲極結構134能夠提供用以讓源極/汲極接觸結構220座落的較大的表面積。
之後，根據一些實施例，如第5B圖所繪示，對合併的源極/汲極結構134的上部分進行摻雜，以形成摻雜區域210。摻雜區域210從第一位置延伸至第二位置。第一位置是形成於第一鰭片結構110a之上，且第二位置是形成於第二鰭片結構110b之上。摻雜區域210形成於向上晶面134A之上，但是並未形成於向下晶面134B之上。
之後，根據一些實施例，如第5C圖所繪示，形成金屬層212與金屬氮化物層214於摻雜區域210之上。
之後，根據一些實施例，如第5D圖所繪示，對金屬層212與金屬氮化物層214進行退火製程，以形成金屬矽化物層216於摻雜區域210之上，並且使用導電材料填滿剩餘的接觸開口151，以形成源極/汲極接觸結構220。
摻雜區域210介於合併的源極/汲極結構134與金屬矽化物層216之間，以降低合併的源極/汲極結構134與金屬矽化物層216之間的接觸電阻。摻雜區域210沿著合併的源極/汲極結構134的形狀而形成，因此，摻雜區域210具有波形 (wave-shaped)結構。
第5D’圖繪示依據本發明之一些實施例之鰭式場效電晶體裝置結構300’之剖面圖。第5D’圖的結構相似於第5D圖的結構，差別在於金屬層212並未完全與位於合併的源極/汲極結構134中的矽進行反應，且未反應的金屬層212殘留於第2E’圖的金屬矽化物層216上，如第5D’圖所繪示。因此，金屬矽化物層216介於摻雜區域210與金屬層212之間，且金屬層212介於金屬矽化物層216與源極/汲極接觸結構220之間。
需注意的是，摻雜區域210包括鎵。在一些實施例中，使用鎵對源極/汲極結構124的外部分進行摻雜，以形成鎵摻雜區域210。鎵摻雜區域210之鎵的使用提供了許多優點。鎵的固態溶解度會隨著在源極/汲極結構124的矽鍺中的鍺濃度提高而提高。因此，當摻雜區域210包括鎵，由於摻雜區域210具有較高濃度的鎵，其能夠提供鰭式場效電晶體裝置結構高應力，因而能夠改善鰭式場效電晶體裝置結構的性能。由於鎵比硼更重，因此，鎵的擴散比硼的擴散慢，可避免因為摻質擴散到通道區域而造成的短通道效應。通道區域是直接位於閘極結構之下，並且介於源極結構與汲極結構之間。鎵的固態溶解度大於硼的固態溶解度，且鎵比硼更重。因此，當位於源極/汲極結構124或合併的源極/汲極結構134中的摻雜區域210包括鎵時，能夠改善鰭式場效電晶體裝置結構的性能表現。
在一些實施例中，當使用鎵與硼對摻雜區域210進行摻雜，要先摻雜鎵，而在之後才摻雜硼。硼輕於鎵，且硼容易擴散到通道區域。若在摻雜鎵之前先摻雜硼，則硼可能會很 容易擴散進入通道區域中，而造成不欲發生的短通道效應。因此，本說明書的摻雜順序是用以降低並且避免硼擴散到通道區域中。如此一來，可降低短通道效應與漏電流的風險。
在此提供鰭式場效應電晶體裝置結構及其製造方法的一些實施例。鰭式場效應電晶體裝置結構包括形成於基板之上的鰭片結構，以及形成於鰭片結構之上的閘極結構。源極/汲極結構相鄰於閘極結構而形成。使用摻質對源極/汲極結構的外部分進行摻雜，以形成摻雜區域。摻雜區域包括鎵或鎵/硼。金屬矽化物層形成於摻雜區域之上且直接接觸摻雜區域。摻雜區域用以降低由半導體材料所形成的源極/汲極結構與由金屬層所形成的金屬矽化物層之間的接觸電阻。因此，能夠改善鰭式場效電晶體裝置結構的性能表現。
在本發明的一些實施例中，提供一種鰭式場效電晶體裝置結構。上述鰭式場效電晶體裝置結構包括延伸於基板之上的鰭片結構，以及形成於上述鰭片結構的中間部分之上的閘極結構。上述鰭片結構的上述中間部分被上述閘極結構所包覆。上述鰭式場效電晶體裝置結構包括相鄰於上述閘極結構的源極/汲極結構，且上述源極/汲極結構包括位於上述源極/汲極結構的外部分的摻雜區域，且上述摻雜區域包括鎵。上述鰭式場效電晶體裝置結構包括形成於上述源極/汲極結構的上述摻雜區域上的金屬矽化物層，且上述金屬矽化物層直接接觸上述源極/汲極結構的摻雜區域。
如本發明的一些實施例所述之鰭式場效電晶體裝置結構。上述鰭式場效電晶體裝置結構更包括形成於該金屬矽 化物層之上的源極/汲極接觸結構，其中上述源極/汲極接觸結構藉由上述金屬矽化物層電性連接至上述源極/汲極結構。
如本發明的一些實施例所述之鰭式場效電晶體裝置結構，其中上述源極/汲極結構由矽鍺所形成，且上述源極/汲極結構的上述摻雜區域由摻雜鎵的矽鍺或是摻雜鎵與硼的矽鍺所形成。
如本發明的一些實施例所述之鰭式場效電晶體裝置結構。上述鰭式場效電晶體裝置結構更包括形成於上述金屬矽化物層之上的金屬層；形成於上述金屬層之上的金屬氮化物層；以及形成於上述金屬氮化物層之上的源極/汲極接觸結構，其中上述金屬氮化物層直接接觸上述金屬層及上述源極/汲極接觸結構。
如本發明的一些實施例所述之鰭式場效電晶體裝置結構。上述鰭式場效電晶體裝置結構更包括層間介電層，此層間介電層形成於上述鰭片結構之上且相鄰於上述閘極結構，其中上述層間介電層被摻雜鎵，且上述層間介電層的鎵濃度從底部到頂部逐漸增加。
如本發明的一些實施例所述之鰭式場效電晶體裝置結構。上述鰭式場效電晶體裝置結構更包括形成於上述基板之上的隔離結構，其中上述閘極結構及上述源極/汲極結構皆形成於上述隔離結構之上，且上述摻雜區域高於上述隔離結構。
在本發明的另一些實施例中，提供一種鰭式場效電晶體裝置結構。上述鰭式場效電晶體裝置結構包括延伸於基 板之上的鰭片結構，以及形成於上述鰭片結構的中間部分之上的閘極結構。上述鰭式場效電晶體裝置結構包括形成於上述閘極結構的一側上的源極/汲極結構，其中上述源極/汲極結構包括摻雜鎵的摻雜區域。上述鰭式場效電晶體裝置結構亦包括圍繞上述源極/汲極結構的層間介電層，其中上述層間介電層被摻雜鎵。上述鰭式場效電晶體裝置結構更包括形成於上述摻雜鎵的摻雜區域之上的金屬矽化物層；以及形成於上述金屬矽化物層之上的源極/汲極接觸結構。
如本發明的另一些實施例所述之鰭式場效電晶體裝置結構，其中上述源極/汲極結構由矽鍺(SixGey)所形成，其中x為約5%至約50%的範圍，且y為約50%至約95%的範圍。
如本發明的另一些實施例所述之鰭式場效電晶體裝置結構，其中上述摻雜鎵的摻雜區域由摻雜鎵之矽鍺或是摻雜鎵與硼之矽鍺所形成。
如本發明的另一些實施例所述之鰭式場效電晶體裝置結構，其中上述層間介電層的鎵濃度從底部到頂部逐漸增加。
如本發明的另一些實施例所述之鰭式場效電晶體裝置結構，其中上述金屬矽化物層直接接觸上述摻雜鎵的摻雜區域。
如本發明的另一些實施例所述之鰭式場效電晶體裝置結構。上述鰭式場效電晶體裝置結構更包括延伸於上述基板之上的另一鰭片結構，其中上述源極/汲極結構形成於上述另一鰭片結構之上，且上述摻雜鎵的摻雜區域從第一位置延伸 至第二位置，且上述第一位置高於上述鰭片結構，上述第二位置高於上述另一鰭片結構，且上述摻雜鎵的摻雜區域具有波型結構。
如本發明的另一些實施例所述之鰭式場效電晶體裝置結構，其中上述源極/汲極結構包括複數個向上晶面與複數個向下晶面，且上述摻雜鎵的摻雜區域形成於上述向上晶面之上，但是並未形成於上述向下晶面之上。
如本發明的另一些實施例所述之鰭式場效電晶體裝置結構。上述鰭式場效電晶體裝置結構更包括形成於上述金屬矽化物層之上的金屬層，其中上述金屬層介於上述金屬矽化物層與上述源極/汲極接觸結構之間。
在本發明的又一些實施例中，提供一種鰭式場效應電晶體裝置結構之形成方法。上述方法包括形成鰭片結構，其中上述鰭片結構延伸位於基板之上；以及形成閘極結構，其中上述閘極結構形成於上述鰭片結構的中間部分之上。上述方法亦包括形成源極/汲極結構於上述鰭片結構之上，其中上述源極/汲極結構相鄰於上述閘極結構。上述方法更包括摻雜上述源極/汲極結構的一外部分，以形成摻雜區域，其中上述摻雜區域包括鎵。上述方法包括形成金屬矽化物層於上述摻雜區域之上；以及形成源極/汲極接觸結構於上述金屬矽化物層之上。
如本發明的另一些實施例所述之鰭式場效電晶體裝置結構。上述方法更包括形成金屬層於上述摻雜區域之上；形成金屬氮化物層於上述金屬層之上；以及對上述金屬氮化物 層與上述金屬層進行退火製程，以形成上述金屬矽化物層於上述摻雜區域之上。
如本發明的另一些實施例所述之鰭式場效電晶體裝置結構，其中形成上述源極/汲極結構於上述鰭片結構之上包括：移除上述鰭片結構的一部分，以形成凹口相鄰於上述閘極結構；以及磊晶形成應力材料於上述凹口中且位於上述鰭片結構之上，以形成上述源極/汲極結構。
如本發明的另一些實施例所述之鰭式場效電晶體裝置結構，其中上述源極/汲極結構由矽鍺所形成，且上述摻雜區域由摻雜鎵之矽鍺或是由摻雜鎵與硼之矽鍺所形成。
如本發明的另一些實施例所述之鰭式場效電晶體裝置結構，其中形成上述摻雜區域於上述源極/汲極結構之上包括：對上述源極/汲極結構進行第一離子佈植製程，且上述第一離子佈植製程包括使用第一摻質，且上述第一摻質包括鎵。
如本發明的另一些實施例所述之鰭式場效電晶體裝置結構。上述方法更包括在進行上述第一離子佈植製程之後，對上述源極/汲極結構進行第二離子佈植製程，其中上述第二離子佈植製程包括使用第二摻質，且上述第二摻質包括硼。
前述內文概述了許多實施例的部件，使本技術領域中具有通常知識者可以從各個方面更佳地了解本發明實施例。本技術領域中具有通常知識者應可理解，且可輕易地以本發明實施例為基礎來設計或修飾其他製程及結構，並以此達到相同的目的及/或達到與在此介紹的實施例等相同之優點。本 技術領域中具有通常知識者也應了解這些相等的結構並未背離本發明的發明精神與範圍。在不背離本發明的發明精神與範圍之前提下，可對本發明進行各種改變、置換或修改。
雖然本發明已以數個較佳實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作任意之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
100:鰭式場效電晶體裝置結構
102:基板
110:鰭片結構
114:隔離結構
123:鰭片側壁間隔物
124:源極/汲極結構
126:接觸蝕刻停止層
128:層間介電層
210:摻雜區域
212:金屬層
214:金屬氮化物層
216:金屬矽化物層
220:源極/汲極接觸結構

Claims (8)

  1. 一種鰭式場效電晶體裝置結構，包括：一鰭片結構，延伸於一基板之上；一閘極結構，形成於該鰭片結構的一中間部分之上，其中該鰭片結構的該中間部分被該閘極結構所包覆；一層間介電層，形成於該鰭片結構之上且相鄰於該閘極結構，其中該層間介電層被摻雜鎵，且該層間介電層的鎵濃度從底部到頂部逐漸增加；一源極/汲極結構，相鄰於該閘極結構，其中該源極/汲極結構包括一摻雜區域位於該源極/汲極結構的一外部分，且該摻雜區域包括鎵；以及一金屬矽化物層，形成於該源極/汲極結構的該摻雜區域之上，其中該金屬矽化物層直接接觸該源極/汲極結構的該摻雜區域。
  2. 一種鰭式場效電晶體裝置結構，包括：一鰭片結構和另一鰭片結構，延伸於一基板之上；一閘極結構，形成於該鰭片結構的一中間部分之上；一源極/汲極結構，形成於該閘極結構的一側和該另一鰭片結構上，其中該源極/汲極結構包括一摻雜鎵的摻雜區域，該摻雜鎵的摻雜區域從一第一位置延伸至一第二位置，該第一位置高於該鰭片結構，該第二位置高於該另一鰭片結構，且該摻雜鎵的摻雜區域具有波型結構；一層間介電層，圍繞該源極/汲極結構，其中該層間介電層被摻雜鎵； 一金屬矽化物層，形成於該摻雜鎵的摻雜區域之上；以及一源極/汲極接觸結構，形成於該金屬矽化物層之上。
  3. 一種鰭式場效電晶體裝置結構，包括：一鰭片結構，延伸於一基板之上；一閘極結構，形成於該鰭片結構的一中間部分之上；一層間介電層，形成於該鰭片結構之上且相鄰於該閘極結構，其中該層間介電層被摻雜鎵，且該層間介電層的鎵濃度從底部到頂部逐漸增加；一源極/汲極結構，鄰接於該閘極結構；一鎵界面層，位於該源極/汲極結構之上；以及一金屬矽化物層，形成於該鎵界面層之上。
  4. 如請求項3所述之鰭式場效電晶體裝置結構，其中該源極/汲極結構包括複數個向上晶面與複數個向下晶面，且該鎵界面層具有位於該等向上晶面上的一第一部分以及位於該等向下晶面上的一第二部分。
  5. 如請求項3所述之鰭式場效電晶體裝置結構，其中該源極/汲極結構包括複數個向上晶面與複數個向下晶面，且該鎵界面層形成於該等向上晶面之上，但是未形成於該等向下晶面之上。
  6. 一種鰭式場效應電晶體裝置結構的形成方法，包括：形成延伸於一基板之上一鰭片結構；形成一閘極結構，該閘極結構形成於該鰭片結構的一部分之上；形成一源極/汲極結構於該鰭片結構之上，其中該源極/汲極 結構相鄰於該閘極結構，且該源極/汲極結構包括複數個向上晶面與複數個向下晶面；摻雜該源極/汲極結構的一外部分，以形成一摻雜區域，其中該摻雜區域包括鎵，且該摻雜區域具有位於該等向上晶面上的一第一部分以及位於該等向下晶面上的一第二部分；形成一金屬矽化物層於該摻雜區域之上；以及形成一源極/汲極接觸結構於該金屬矽化物層之上。
  7. 一種鰭式場效應電晶體裝置結構的形成方法，包括：形成延伸於一基板之上一鰭片結構；形成一閘極結構，該閘極結構形成於該鰭片結構之上；形成一源極/汲極結構於該鰭片結構之上，其中該源極/汲極結構相鄰於該閘極結構；以及形成一層間介電層圍繞該源極/汲極結構，其中該層間介電層被摻雜鎵，且該層間介電層的鎵濃度從底部到頂部逐漸增加。
  8. 一種鰭式場效應電晶體裝置結構的形成方法，包括：形成延伸於一基板之上的一鰭片結構；形成一閘極結構，該閘極結構形成於該鰭片結構之上；形成一源極/汲極結構於該鰭片結構之上，其中該源極/汲極結構相鄰於該閘極結構；形成一層間介電層於該鰭片結構之上且相鄰於該閘極結構；利用一第一雜質對該源極/汲極結構和該層間介電層進行一 第一離子佈植製程，其中該第一雜質包括鎵，且該層間介電層的鎵濃度從底部到頂部逐漸增加；以及在進行該第一離子佈植製程之後，利用一第二雜質對該源極/汲極結構進行一第二離子佈植製程，其中該第二雜質包括硼。
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