TWI770523B - IC test circuit board combination and IC test system - Google Patents
IC test circuit board combination and IC test system Download PDFInfo
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Abstract
一種IC測試電路板組合,其具有:一第一電路板,具有至少一個第一電氣連接埠以外接其他元件,及至少一個IC承載區以承載至少一個IC晶片並與所述至少一個IC晶片電氣連接;以及一第二電路板,具有至少一個第二電氣連接埠及複數個外接測試引腳;其中,所述至少一個第二電氣連接埠係用以與所述至少一個第一電氣連接埠電氣連接,且所述複數個外接測試引腳係用以提供至少一所述IC晶片的測試信號接點。An IC test circuit board assembly, which has: a first circuit board with at least one first electrical connection port to connect other components, and at least one IC carrying area to carry at least one IC chip and electrically connect with the at least one IC chip connection; and a second circuit board with at least one second electrical connection port and a plurality of external test pins; wherein, the at least one second electrical connection port is used to electrically connect with the at least one first electrical connection port connected, and the plurality of external test pins are used to provide at least one test signal contact of the IC chip.
Description
本發明係關於IC測試電路板,尤指一種可避免因IC損壞導致整個測試板一起報廢的IC測試電路板組合。The present invention relates to an IC test circuit board, in particular to an IC test circuit board combination that can avoid the whole test board being scrapped together due to IC damage.
IC測試電路板係IC封裝後之重要測試介面。當晶圓在經過切割、黏晶、焊線等製程,再以塑膠、陶瓷、金屬等材料包覆而形成IC晶片後,一般須利用IC測試電路板測試IC晶片的功能是否正常。於測試時,IC晶片係附接在 IC測試電路板上, 而IC測試電路板會提供與IC晶片的主要接腳電氣連接的引出接腳,以便於連接輸入電源和輸入介面信號及將IC晶片的輸出信號引出以進行測試。IC test circuit board is an important test interface after IC packaging. After the wafer is cut, bonded, wire-bonded, etc., and then covered with plastic, ceramic, metal and other materials to form an IC chip, it is generally necessary to use an IC test circuit board to test whether the IC chip functions normally. During testing, the IC chip is attached to the IC test circuit board, and the IC test circuit board provides lead pins that are electrically connected to the main pins of the IC chip, so as to connect the input power and input interface signals and connect the IC chip. The output signal is brought out for testing.
常用的IC測試電路板是將一IC晶片直接焊接到該IC測試電路板上。然而,對於像顯示驅動晶片這種有幾百、上千個管腳且管腳間距很小的晶片來說,這種做法並不可行。因為即使通過成本較高的超細金屬線點焊工藝將IC晶片焊接到IC測試電路板上,在焊接的過程中,若IC晶片損壞,則整個IC測試電路板會一起報廢。A commonly used IC test circuit board is to directly solder an IC chip to the IC test circuit board. However, this is not feasible for chips such as display driver chips with hundreds or thousands of pins and very small pin pitches. Because even if the IC chip is welded to the IC test circuit board through the expensive ultra-fine metal wire spot welding process, during the welding process, if the IC chip is damaged, the entire IC test circuit board will be scrapped together.
因此,本領域亟需一種新穎的IC測試電路板結構。Therefore, there is an urgent need in the art for a novel IC test circuit board structure.
本發明之主要目的在於提供一種IC測試電路板組合,其可藉由將IC測試電路板分成兩個電路板,其中第一個電路板承載待測試的IC晶片,而第二個電路板則透過一連接手段與第一個電路板電氣連接且第二個電路板提供測試用的外接測試引腳,從而使接腳數量多且管腳間距小的晶片,例如驅動顯示晶片,能夠和提供測試用外接測試引腳的電路板以方便分離的方式電氣連接。The main purpose of the present invention is to provide an IC test circuit board assembly, which can divide the IC test circuit board into two circuit boards, wherein the first circuit board carries the IC chip to be tested, and the second circuit board passes through A connecting means is electrically connected to the first circuit board and the second circuit board provides external test pins for testing, so that a chip with a large number of pins and a small pin spacing, such as a driver display chip, can Circuit boards with external test pins are electrically connected in a manner that facilitates separation.
為達成上述目的,一種IC測試電路板組合乃被提出,其具有:To achieve the above purpose, an IC test circuit board assembly is proposed, which has:
一第一電路板,具有至少一個第一電氣連接埠以外接其他元件,及至少一個IC承載區以承載至少一個IC晶片並與所述至少一個IC晶片電氣連接;以及a first circuit board having at least one first electrical connection port for connecting other components, and at least one IC carrying area for carrying at least one IC chip and electrically connecting with the at least one IC chip; and
一第二電路板,具有至少一個第二電氣連接埠及複數個外接測試引腳;a second circuit board with at least one second electrical connection port and a plurality of external test pins;
其中,所述至少一個第二電氣連接埠係用以與所述至少一個第一電氣連接埠電氣連接,且所述複數個外接測試引腳係用以提供至少一所述IC晶片的測試信號接點。Wherein, the at least one second electrical connection port is used for electrical connection with the at least one first electrical connection port, and the plurality of external test pins are used for providing at least one test signal connection of the IC chip point.
在可能的實施例中,所述第一電氣連接埠的接腳可以一排或多排的方式排列。In a possible embodiment, the pins of the first electrical connection port may be arranged in one or more rows.
在一實施例中,所述第一電氣連接埠的接腳形狀是金手指狀。In one embodiment, the shape of the pins of the first electrical connection port is a gold finger shape.
在可能的實施例中,所述IC晶片可為一LCD驅動IC晶片或一OLED 驅動IC晶片。In a possible embodiment, the IC chip may be an LCD driver IC chip or an OLED driver IC chip.
在一實施例中,所述IC晶片和該第一電路板的電氣連接方式係使用超細的金屬線將所述IC晶片上的接腳連接到該第一電路板的所述承載區。In one embodiment, the electrical connection between the IC chip and the first circuit board is to use ultra-fine metal wires to connect the pins on the IC chip to the bearing area of the first circuit board.
在可能的實施例中,所述金屬線係通過高溫焊接或導電膠地方式和所述承載區的接點電氣連接。In a possible embodiment, the metal wire is electrically connected to the contact point of the bearing area by means of high temperature welding or conductive glue.
在一實施例中,該第一電路板和該第二電路板之間係通過機械插座的方式電氣連接。In one embodiment, the first circuit board and the second circuit board are electrically connected by means of a mechanical socket.
在可能的實施例中,該第一電路板和該第二電路板之間係通過以焊接或導電膠的方式使複數條金屬線連接所述第一電氣連接埠和所述第二電氣連接埠。In a possible embodiment, between the first circuit board and the second circuit board, a plurality of metal wires are connected to the first electrical connection port and the second electrical connection port by means of soldering or conductive glue .
在可能的實施例中,該第一電路板和該第二電路板之間係通過使所述 第一電氣連接埠和所述第二電氣連接埠分別為一公連接器和一母連接器或分別為一母連接器和一公連接器的方式電氣連接。In a possible embodiment, the first circuit board and the second circuit board are connected by making the first electrical connection port and the second electrical connection port be a male connector and a female connector or They are electrically connected by a female connector and a male connector respectively.
為達成上述目的,本發明進一步提出一種IC測試系統,其包含一測試機台及至少一個如前述之IC測試電路板組合,其中,該測試機台係用以為至少一個所述IC測試電路板組合提供測試條件及量測其所產生的輸出信號以判斷一待測IC晶片是否正常。In order to achieve the above object, the present invention further provides an IC testing system, which includes a testing machine and at least one IC testing circuit board assembly as described above, wherein the testing machine is used for at least one of the IC testing circuit board assemblies Provide test conditions and measure the output signals generated by the test conditions to determine whether an IC chip to be tested is normal.
為使 貴審查委員能進一步瞭解本發明之結構、特徵、目的、與其優點,茲附以圖式及較佳具體實施例之詳細說明如後。In order to enable your examiners to further understand the structure, features, purposes, and advantages of the present invention, drawings and detailed descriptions of preferred embodiments are attached as follows.
本發明的原理在於:將IC測試電路板分成兩個電路板,其中第一個電路板承載待測試的IC晶片,而第二個電路板則透過一連接手段與第一個電路板電氣連接且第二個電路板提供測試用的外接測試引腳,從而使接腳數量多且管腳間距小的晶片,例如驅動顯示晶片,能夠和提供測試用外接測試引腳的電路板以方便分離的方式電氣連接。The principle of the present invention is to divide the IC test circuit board into two circuit boards, wherein the first circuit board carries the IC chip to be tested, and the second circuit board is electrically connected to the first circuit board through a connecting means and The second circuit board provides external test pins for testing, so that a chip with a large number of pins and a small pin spacing, such as a driver display chip, can be easily separated from the circuit board that provides external test pins for testing. Electrical connections.
請參照圖1,其繪示本發明的IC測試電路板組合之一實施例的示意圖。如圖1所示,一IC測試電路板組合100具有一第一電路板110和一第二電路板120,其中,第一電路板110具有至少一個第一電氣連接埠111以外接其他元件,及至少一個IC承載區112以承載至少一個IC晶片130並與至少一個IC晶片130電氣連接。第一電氣連接埠111中的接腳可以是1排或多排,形狀可以是金手指狀的或其他易於電氣連接的形狀;以及第二電路板120具有至少一個第二電氣連接埠121及複數個外接測試引腳122。Please refer to FIG. 1 , which is a schematic diagram of an embodiment of the IC test circuit board assembly of the present invention. As shown in FIG. 1, an IC test
IC晶片130 ,可為一LCD驅動IC晶片或一OLED 驅動IC晶片,其和第一電路板110的電氣連接方式可使用超細的金屬線將IC晶片130上的接腳連接到第一電路板110的承載區112,而所述金屬線可通過高溫焊接、導電膠等方式和承載區112的接點電氣連接。The
另外,第一電路板110和第二電路板120之間可有多種電氣連接方式:In addition, there may be various electrical connection methods between the
1.通過機械插座的方式:第一電路板110上的第一電氣連接埠111係一機械插座埠,而第二電路板120上的第二電氣連接埠121係一金屬插針埠且其內部含有插針接腳,俾以使所述的金屬插針埠能夠和所述的機械插座埠插接;1. By means of a mechanical socket: the first
2.通過以焊接或導電膠的方式使複數條金屬線連接第一電氣連接埠111和第二電氣連接埠121;以及2. Connect the first
3. 第一電氣連接埠111和第二電氣連接埠121係分別為一公連接器和一母連接器或分別為一母連接器和一公連接器。3. The first
於實際操作時,由於第一電路板110和第二電路板120之間能夠方便拆解,因此,提供複數個外接測試引腳122的第二電路板120將不會在IC晶片130發生損害時被損壞,也就是說,本發明的分體式設計可使晶片130和第二電路板120間的連接能夠以無損耗的方式拆解,因而減少了測試成本。In actual operation, since the
依上述的說明,本發明進一步提出一IC測試系統。請參照圖2,其繪示本發明之IC測試系統之一實施例的方塊圖。如圖2所示,一IC測試系統200包含至少一IC測試電路板210及一測試機台220,其中,IC測試電路板210係由圖1的IC測試電路板100組合實現,而測試機台220則是用以為至少一IC測試電路板210提供測試條件及量測至少一IC測試電路板210的輸出信號以判斷待測IC晶片是否正常。According to the above description, the present invention further provides an IC testing system. Please refer to FIG. 2 , which shows a block diagram of an embodiment of the IC testing system of the present invention. As shown in FIG. 2 , an
如此,上述已完整且清楚地說明本發明之技術方案;並且,經由上述可得知本發明具有下列優點:In this way, the above has completely and clearly explained the technical solution of the present invention; and, from the above, it can be known that the present invention has the following advantages:
本發明的IC測試電路板組合可藉由將IC測試電路板分成兩個電路板,其中第一個電路板承載待測試的IC晶片,而第二個電路板則透過一連接手段與第一個電路板電氣連接且第二個電路板提供測試用的外接測試引腳,從而使接腳數量多且管腳間距小的晶片,例如驅動顯示晶片,能夠和提供測試用外接測試引腳的電路板以方便分離的方式電氣連接,俾以使第二個電路板在IC晶片發生損害時不致被波及。The IC test circuit board assembly of the present invention can be divided into two circuit boards by dividing the IC test circuit board, wherein the first circuit board carries the IC chip to be tested, and the second circuit board is connected to the first circuit board through a connecting means The circuit board is electrically connected and the second circuit board provides external test pins for testing, so that chips with a large number of pins and small pin spacing, such as driver display chips, can be connected to the circuit board that provides external test pins for testing. Electrically connected in a manner that facilitates separation, so that the second circuit board will not be affected in the event of damage to the IC chip.
必須加以強調的是,前述本案所揭示者乃為較佳實施例,舉凡局部之變更或修飾而源於本案之技術思想而為熟習該項技藝之人所易於推知者,俱不脫本案之專利權範疇。It must be emphasized that the above-mentioned disclosure in this case is a preferred embodiment, and any partial changes or modifications originating from the technical ideas of this case and easily inferred by those who are familiar with the art are within the scope of the patent of this case. category of rights.
綜上所陳,本案無論目的、手段與功效,皆顯示其迥異於習知技術,且其首先發明合於實用,確實符合發明之專利要件,懇請 貴審查委員明察,並早日賜予專利俾嘉惠社會,是為至禱。To sum up, regardless of the purpose, means and effect of this case, it shows that it is completely different from the conventional technology, and its first invention is practical, and it does meet the patent requirements of the invention. Society is to pray for the best.
100:IC測試電路板組合
110:第一電路板110
111:第一電氣連接埠
112:IC承載區
120:第二電路板
121:第二電氣連接埠
122:外接測試引腳
130:IC晶片
200:IC測試系統
210:IC測試電路板
220:測試機台100: IC Test Board Assembly
110:
圖1繪示本發明的IC測試電路板組合之一實施例的示意圖。 圖2繪示本發明之IC測試系統之一實施例的方塊圖。FIG. 1 is a schematic diagram illustrating an embodiment of an IC test circuit board assembly of the present invention. FIG. 2 is a block diagram illustrating an embodiment of the IC testing system of the present invention.
100:IC測試電路板組合100: IC Test Board Assembly
110:第一電路板110110:
111:第一電氣連接埠111: The first electrical connection port
112:IC承載區112: IC carrying area
120:第二電路板120: Second circuit board
121:第二電氣連接埠121: The second electrical connection port
122:外接測試引腳122: External test pin
130:IC晶片130: IC chip
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US5132613A (en) * | 1990-11-30 | 1992-07-21 | International Business Machines Corporation | Low inductance side mount decoupling test structure |
US6486693B1 (en) * | 2000-05-19 | 2002-11-26 | Teradyne, Inc. | Method and apparatus for testing integrated circuit chips that output clocks for timing |
TW200821601A (en) * | 2006-11-02 | 2008-05-16 | Himax Tech Ltd | Chip testing system and loading board thereof |
TWM527545U (en) * | 2016-05-24 | 2016-08-21 | 中華精測科技股份有限公司 | Ball grid array testing apparatus |
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