TWI769522B - Method and system of estimating wafer crystalline orientation - Google Patents

Method and system of estimating wafer crystalline orientation Download PDF

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TWI769522B
TWI769522B TW109130791A TW109130791A TWI769522B TW I769522 B TWI769522 B TW I769522B TW 109130791 A TW109130791 A TW 109130791A TW 109130791 A TW109130791 A TW 109130791A TW I769522 B TWI769522 B TW I769522B
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TW202111756A (en
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蔡伯宗
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台灣積體電路製造股份有限公司
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    • G01N25/20Investigating or analyzing materials by the use of thermal means by investigating the development of heat, i.e. calorimetry, e.g. by measuring specific heat, by measuring thermal conductivity
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
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    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
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    • H01J37/3171Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. for ion implantation for ion implantation
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    • H01L22/34Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
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    • H01J2237/31701Ion implantation

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Abstract

A method includes: receiving a first wafer; defining a first zone and a second zone on the first wafer and a plurality of first areas; defining a plurality of first areas and second areas for the first and second zones, respectively; projecting first ion beams onto the first areas and receiving first thermal waves in response to the first ion beams; rotating the first wafer by a twist angle; projecting second ion beams onto the second areas and receiving second thermal waves in response to the second ion beams; and estimating a first crystalline orientation angle of the first wafer based on the first and second ion beams and the first and second thermal waves.

Description

晶圓結晶定向的估測方法與系統Method and system for estimating crystallographic orientation of wafers

本發明實施例係有關晶圓結晶定向的估測方法與系統。Embodiments of the present invention relate to a method and system for estimating crystal orientation of a wafer.

半導體積體電路(IC)行業已經歷快速增長。IC材料及設計中之技術進步已產生數代IC,其中各代具有比前一代更小且更複雜之電路。為促進先進IC裝置,離子植入被廣泛用於將雜質摻雜至一工件(諸如一半導體晶圓)中以形成N型或P型井。在使用離子植入的情況下,更改工件中之雜質量,以便將導電性引入至該等井。一所要雜質材料可由一離子源電離且加速以形成具有規定能量之一離子束。可將離子束引導至工件之一前表面且穿透至工件之塊體中。所植入離子可圍繞晶圓區域之一深度分佈,且離子之分佈及濃度係可控的,諸如透過調整植入角及射束能量。The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs, each of which has smaller and more complex circuits than the previous generation. To facilitate advanced IC devices, ion implantation is widely used to dope impurities into a workpiece, such as a semiconductor wafer, to form N-type or P-type wells. Where ion implantation is used, the amount of impurities in the workpiece is altered in order to introduce conductivity into the wells. A desired impurity material can be ionized and accelerated by an ion source to form an ion beam with a specified energy. The ion beam can be directed to a front surface of the workpiece and penetrate into the bulk of the workpiece. The implanted ions can be distributed around a depth of the wafer area, and the distribution and concentration of the ions can be controlled, such as by adjusting the implantation angle and beam energy.

根據本發明的一實施例,一種方法,其包括:接收一第一晶圓;在該第一晶圓上界定一第一區帶及一第二區帶;分別針對該第一區帶及該第二區帶界定複數個第一區域及第二區域;將第一離子束投射至該等第一區域上且回應於該等第一離子束而接收第一熱波;使該第一晶圓旋轉達一扭角;將第二離子束投射至該等第二區域上且回應於該等第二離子束而接收第二熱波;及基於該等第一離子束及該等第二離子束以及該等第一熱波及該等第二熱波估測該第一晶圓之一第一結晶定向角。According to one embodiment of the present invention, a method includes: receiving a first wafer; defining a first zone and a second zone on the first wafer; for the first zone and the second zone, respectively A second zone defines a plurality of first and second regions; projecting a first ion beam onto the first regions and receiving a first thermal wave in response to the first ion beams; causing the first wafer rotating by a twist angle; projecting a second ion beam onto the second regions and receiving a second thermal wave in response to the second ion beams; and based on the first ion beams and the second ion beams and the first thermal waves and the second thermal waves estimate a first crystal orientation angle of the first wafer.

根據本發明的一實施例,一種方法,其包括:在一第一晶圓上界定一第一區帶及一第二區帶;分別將第一離子束及第二離子束投射至該第一區帶及該第二區帶上;基於該等第一離子束及該等第二離子束估測該第一晶圓之一第一結晶定向角;在一第二晶圓上界定一第三區帶及一第四區帶;分別將第三離子束及第四離子束投射至該第三區帶及該第四區帶上;基於該等第三離子束及該等第四離子束估測該第二晶圓之一第二結晶定向角;及基於該第一結晶定向角及該第二結晶定向角估測一第三晶圓之一第三結晶定向角。According to an embodiment of the present invention, a method includes: defining a first zone and a second zone on a first wafer; projecting a first ion beam and a second ion beam onto the first wafer, respectively zone and the second zone; estimate a first crystal orientation angle of the first wafer based on the first ion beams and the second ion beams; define a third zone and a fourth zone; project a third ion beam and a fourth ion beam onto the third zone and the fourth zone, respectively; estimate based on the third ion beam and the fourth ion beam measuring a second crystal orientation angle of the second wafer; and estimating a third crystal orientation angle of a third wafer based on the first crystal orientation angle and the second crystal orientation angle.

根據本發明的一實施例,一種方法,其包括:接收複數個晶圓;估測該複數個晶圓之結晶定向角;將該複數個晶圓根據其等結晶定向角分類為晶圓群組;從該等晶圓群組之一者選擇至少一個晶圓;及根據該等晶圓群組之該一者之一代表性結晶定向角對該至少一個晶圓執行一離子植入操作。According to an embodiment of the present invention, a method includes: receiving a plurality of wafers; estimating crystallographic orientation angles of the plurality of wafers; classifying the plurality of wafers into wafer groups according to their isocrystalline orientation angles selecting at least one wafer from one of the groups of wafers; and performing an ion implantation operation on the at least one wafer based on a representative crystallographic orientation angle of the one of the groups of wafers.

以下揭露提供用於實施所提供標的物之不同構件之許多不同實施例或實例。在下文描述組件及配置之特定實例以簡化本揭露。當然,此等僅為實例且並不旨在為限制性的。例如,在以下描述中,在一第二構件上方或上形成一第一構件可包含其中第一構件及第二構件形成為直接接觸之實施例,且亦可包含其中額外構件可形成於第一構件與第二構件之間,使得第一構件及第二構件可不直接接觸之實施例。另外,本揭露可在各種實例中重複參考數字及/或字母。此重複係出於簡單及清晰之目的且本身並不指示所論述之各種實施例及/或組態之間的一關係。The following disclosure provides many different embodiments or examples of different means for implementing the provided subject matter. Specific examples of components and configurations are described below to simplify the present disclosure. Of course, these are only examples and are not intended to be limiting. For example, in the following description, forming a first member over or on a second member may include embodiments in which the first member and the second member are formed in direct contact, and may also include embodiments in which additional members may be formed on the first member Between the member and the second member, the first member and the second member may not be in direct contact with each other. Additionally, the present disclosure may repeat reference numerals and/or letters in various instances. This repetition is for simplicity and clarity and does not in itself indicate a relationship between the various embodiments and/or configurations discussed.

此外,為便於描述,諸如「在……下面」、「在……下方」、「下」、「在……上方」、「上」及類似物之空間相對術語可在本文中用於描述一個元件或構件與圖中繪示之另一(些)元件或構件之關係。空間相對術語旨在涵蓋除在圖中描繪之定向以外的使用或操作中之裝置之不同定向。設備可以其他方式定向(旋轉90度或按其他定向)且因此可同樣解釋本文中使用之空間相對描述符。Furthermore, for ease of description, spatially relative terms such as "below", "below", "under", "above", "on" and the like may be used herein to describe a The relationship of an element or component to another element(s) or component(s) shown in the figures. Spatially relative terms are intended to encompass different orientations of the device in use or operation other than the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and thus the spatially relative descriptors used herein may likewise be interpreted.

雖然闡述本揭露之廣泛範疇之數值範圍及參數係近似值,但儘可能精確地報告特定實例中所闡述之數值。然而,任何數值本就含有必然由通常在各自測試量測中發現之偏差引起之特定誤差。而且,如本文中使用,術語「約」、「大量」或「實質上」一般意謂在一給定值或範圍之10%、5%、1%或0.5%內。替代地,當由一般技術者考慮時,術語「約」、「大量」或「實質上」意謂在一可接受的平均值標準誤差內。除了在操作/工作實例中之外,或除非另有明確指定,本文中揭示之全部數值範圍、數量、值及百分比(諸如材料量、持續時間、溫度、操作條件、數量比及其等之類似者之數值範圍、數量、值及百分比)應被理解為在全部例項中皆由術語「約」、「大量」或「實質上」修飾。因此,除非有相反指示,否則本揭露及隨附發明申請專利範圍中闡述之數值參數係可如所需般變化之近似值。至少,各數值參數應至少根據所報告之有效數位之數字且藉由應用普通捨入技術解釋。本文中可將範圍表達為從一個端點至另一端點或在兩個端點之間。除非另有指定,否則本文中揭示之全部範圍包含端點。Notwithstanding that the numerical ranges and parameters setting forth the broad scope of the disclosure are approximations, the numerical values set forth in the specific examples are reported as precisely as possible. Any numerical value, however, inherently contain certain errors necessarily resulting from the deviation commonly found in their respective testing measurements. Also, as used herein, the terms "about," "substantially," or "substantially" generally mean within 10%, 5%, 1%, or 0.5% of a given value or range. Alternatively, the terms "about", "substantially" or "substantially" mean within an acceptable standard error of the mean when considered by one of ordinary skill. Except in the operating/working examples, or unless expressly specified otherwise, all numerical ranges, quantities, values and percentages disclosed herein (such as material amounts, durations, temperatures, operating conditions, ratios of quantities and the like) numerical ranges, amounts, values, and percentages) should be understood to be modified by the terms "about," "substantially," or "substantially" in all instances. Accordingly, unless indicated to the contrary, the numerical parameters set forth in the present disclosure and the appended claims are approximations that may vary as desired. At a minimum, each numerical parameter should at least be interpreted in light of the number of reported significant digits and by applying ordinary rounding techniques. A range can be expressed herein as from one endpoint to the other or between the two endpoints. All ranges disclosed herein include endpoints unless otherwise specified.

熟習此項技術者將瞭解,本揭露之實施例可被實施為一系統、方法或電腦程式產品。因此,本揭露之實施例可採用一完全硬體實施例、一完全軟體實施例(包含韌體、常駐軟體、微代碼等)或組合本文中皆可大體被稱為一「電路」、「區塊」、「模組」或「系統」之軟體及硬體態樣之一實施例之形式。此外,本揭露之實施例可採用以任何有形媒體之表達體現之一電腦程式產品之形式,其具有以媒體體現且可由一電腦執行之程式碼。Those skilled in the art will appreciate that embodiments of the present disclosure may be implemented as a system, method or computer program product. Accordingly, embodiments of the present disclosure may employ an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, microcode, etc.), or a combination which may be generally referred to herein as a "circuit", "region" A form of an embodiment of software and hardware aspects of a block, a module, or a system. Furthermore, embodiments of the present disclosure may take the form of a computer program product embodied in the representation of any tangible medium, having code embodied in the medium and executable by a computer.

一半導體晶圓被用作一半導體裝置之一基板,其中可在半導體晶圓之塊體中形成摻雜區。使用具有平行晶格平面之一晶格結構形成一半導電鑄錠或晶圓。半導電鑄錠之晶格平面判定鑄錠或半導體晶圓之一結晶定向(或晶格定向)角。一般言之,以貫穿鑄錠之一實質上相等結晶定向角生長一半導電鑄錠且角度差通常係可忽略的。然而,隨著半導體裝置之大小不斷減小,半導體裝置之製造需要以操作參數的更大精確性執行。否則,以不足參數精確性執行之製造操作將導致所製造半導體裝置中之品質均勻性問題。A semiconductor wafer is used as a substrate for a semiconductor device in which doped regions can be formed in the bulk of the semiconductor wafer. A semiconducting ingot or wafer is formed using one of the lattice structures having parallel lattice planes. The lattice plane of the semiconducting ingot determines the crystallographic orientation (or lattice orientation) angle of the ingot or semiconductor wafer. In general, a semi-conductive ingot is grown at substantially equal crystallographic orientation angles throughout one of the ingots and the angle difference is usually negligible. However, as the size of semiconductor devices continues to decrease, the fabrication of semiconductor devices needs to be performed with greater accuracy in operating parameters. Otherwise, fabrication operations performed with insufficient parametric accuracy will result in quality uniformity problems in the fabricated semiconductor devices.

在本揭露中,提供用於估測一半導體晶圓之結晶定向角之一方法及一系統。對一單一測試晶圓執行估測方法。歸因於消除不同測試晶圓間之角度可變性之影響,所提出估測方法比使用多個測試晶圓之替代估測方法更精確。此外,由於每半導電鑄錠僅使用一個測試晶圓,所以測試晶圓之費用亦減少。製造操作(諸如離子植入)可以較佳地匹配半導體之結晶定向角之較大投射角精確性執行,且摻雜區可藉由具有一較佳輪廓控制之離子植入形成。所提出方法亦減少估測一相同批次之一晶圓群組之結晶定向角之成本,此係因為在一些案例中需要最少兩個測試晶圓或僅一個測試晶圓,藉此減少晶圓品質控制之額外耗用且改良結晶定向角之校準效率。In the present disclosure, a method and a system for estimating the crystallographic orientation angle of a semiconductor wafer are provided. The estimation method is performed on a single test wafer. The proposed estimation method is more accurate than the alternative estimation method using multiple test wafers due to the elimination of the effect of angular variability between different test wafers. In addition, since only one test wafer is used per semiconductive ingot, the cost of test wafers is also reduced. Fabrication operations, such as ion implantation, can be performed with greater projection angle accuracy that better matches the crystallographic orientation angle of the semiconductor, and doped regions can be formed by ion implantation with a better profile control. The proposed method also reduces the cost of estimating the crystallographic orientation angle of a group of wafers in the same batch, since in some cases a minimum of two test wafers or only one test wafer is required, thereby reducing the number of wafers Additional cost for quality control and improved calibration efficiency of crystal orientation angle.

圖1A係展示根據一些實施例之形成半導體晶圓之一方法100之一示意圖。方法100開始於一晶體生長操作102。因此形成一半導電鑄錠103。半導電鑄錠103可使用此項技術中已知的任何晶體生長方法形成,諸如丘克拉斯基(Cz)方法。在一些實施例中,生長半導電鑄錠103以包含單晶晶格結構。在一些實施例中,半導電鑄錠103係由矽或另一適合半導體材料製成之一鑄錠。在形成矽鑄錠103之後,執行一操作104以由半導電鑄錠103製造半導體晶圓110之切片,諸如半導體晶圓110a、110b或110c。操作104可包含一或多個晶圓形成程序,諸如將半導電鑄錠103切割成原始晶圓,且斜切、研磨、蝕刻及拋光原始晶圓以形成成品半導體晶圓110。在一些實施例中,若半導體晶圓110由相同半導電鑄錠103形成,則其等屬於一相同晶圓批次。在一些實施例中,成品半導體晶圓110具有約1英吋與約12英吋之間的一直徑。在一些實施例中,成品半導體晶圓110具有約100 µm與約500 µm之間的一厚度。FIG. 1A shows a schematic diagram of a method 100 of forming a semiconductor wafer in accordance with some embodiments. The method 100 begins with a crystal growth operation 102 . Thus, a semiconductive ingot 103 is formed. The semiconducting ingot 103 may be formed using any crystal growth method known in the art, such as the Chuklaski (Cz) method. In some embodiments, the semiconducting ingot 103 is grown to contain a single crystal lattice structure. In some embodiments, the semiconductive ingot 103 is an ingot made of silicon or another suitable semiconductor material. After the silicon ingot 103 is formed, an operation 104 is performed to fabricate slices of semiconductor wafers 110 , such as semiconductor wafers 110a , 110b or 110c , from the semiconductive ingot 103 . Operation 104 may include one or more wafer formation procedures, such as dicing semiconducting ingot 103 into virgin wafers, and chamfering, grinding, etching, and polishing the virgin wafers to form finished semiconductor wafers 110 . In some embodiments, if the semiconductor wafers 110 are formed from the same semiconducting ingots 103, they belong to the same wafer lot. In some embodiments, the finished semiconductor wafer 110 has a diameter of between about 1 inch and about 12 inches. In some embodiments, the finished semiconductor wafer 110 has a thickness between about 100 μm and about 500 μm.

在一些實施例中,半導體晶圓110具有擁有與一晶體平面(諸如(100)、(110)或(111)晶體平面)相關聯之一相同結晶定向之類似晶體結構,此係因為其等由一相同半導電鑄錠103製造。關於一離子植入(亦被稱為一離子束投射)操作,至少部分由入射離子束與晶格結構之結晶定向角之間的夾角判定植入之穿透深度及分佈。因此,使用離子束投射形成於半導體晶圓中之一井區之電行為以及包含井區之一半導體裝置受到結晶定向角之控制精確性之影響。In some embodiments, semiconductor wafer 110 has a similar crystal structure with one of the same crystallographic orientations associated with a crystal plane, such as the (100), (110) or (111) crystal plane, for reasons such as An identical semiconducting ingot 103 is produced. For an ion implantation (also referred to as an ion beam projection) operation, the penetration depth and distribution of the implant is determined, at least in part, by the angle between the incident ion beam and the crystallographic orientation angle of the lattice structure. Therefore, the electrical behavior of a well formed in a semiconductor wafer using ion beam projection, and a semiconductor device comprising a well, is affected by the accuracy of the control of the crystallographic orientation angle.

在一些實施例中,半導體晶圓之各者(例如,半導體晶圓110a、110b及110c)具有垂直於半導體晶圓110a、110b或110c之表面之一各自法線N1、N2及N3。理想地,各半導體晶圓110a、110b或110c共用平行於與某一晶體平面(例如,一(100)平面)相關聯之半導電鑄錠103之縱向軸103L之一相同結晶定向方向。然而,在大多數情況中,當切割半導電鑄錠103時,切割刀片可不精確垂直於縱向軸103L。因此,法線N1、N2或N3不平行於各自結晶定向線110L1、110L2及110L3之方向。結晶定向線110L1、110L2或110L3之方向與各自法線N1、N2或N3之間的一夾角β1 、β2 或β3 在本文中被稱為半導體晶圓110a、110b或110c之結晶定向角。在一些實施例中,夾角β1 、β2 及β3 係實質上零度。In some embodiments, each of the semiconductor wafers (eg, semiconductor wafers 110a, 110b, and 110c) have respective normals N1, N2, and N3 perpendicular to one of the surfaces of semiconductor wafers 110a, 110b, or 110c. Ideally, each semiconductor wafer 110a, 110b, or 110c shares one of the same crystallographic orientation directions parallel to the longitudinal axis 103L of the semiconducting ingot 103 associated with a crystallographic plane (eg, a (100) plane). However, in most cases, when cutting the semiconducting ingot 103, the cutting blade may not be exactly perpendicular to the longitudinal axis 103L. Therefore, the normal line N1, N2 or N3 is not parallel to the direction of the respective crystallographic orientation lines 110L1, 110L2 and 110L3. An angle β 1 , β 2 or β 3 between the direction of the crystal orientation line 110L1 , 110L2 or 110L3 and the respective normal N1 , N2 or N3 is referred to herein as the crystal orientation angle of the semiconductor wafer 110a , 110b or 110c . In some embodiments, the included angles β 1 , β 2 and β 3 are substantially zero degrees.

在一些實施例中,在半導電鑄錠103之晶體生長期間,晶體平面之定向可在晶格結構向上生長時繞縱向軸103L旋轉。換言之,位置108a、108b及108c處之實際結晶定向線110L1、110L2及110L3可分別指向略不同方向。另外,夾角β1 、β2 及β3 可不相等。在一些實施例中,晶體平面在晶體生長期間之旋轉與半導電鑄錠103之生長高度成比例。因此,夾角β1 、β2 及β3 或等效地半導體晶圓110之結晶定向角近似地由一線性方程式表示。在一些其他實施例中,可由來自相同半導電鑄錠103之兩個或兩個以上其他半導體晶圓110之夾角(例如,β2 及β3 )估測夾角(例如,β1 )或等效地半導體晶圓110之結晶定向角。In some embodiments, during crystal growth of the semiconducting ingot 103, the orientation of the crystal planes may be rotated about the longitudinal axis 103L as the lattice structure grows upward. In other words, the actual crystallographic orientation lines 110L1, 110L2 and 110L3 at positions 108a, 108b and 108c may point in slightly different directions, respectively. In addition, the included angles β 1 , β 2 and β 3 may not be equal. In some embodiments, the rotation of the crystal plane during crystal growth is proportional to the growth height of the semiconducting ingot 103 . Therefore, the included angles β 1 , β 2 and β 3 or equivalently the crystallographic orientation angles of the semiconductor wafer 110 are approximately represented by a linear equation. In some other embodiments, the included angle (eg, β 1 ) or equivalent may be estimated from the included angle (eg, β 2 and β 3 ) of two or more other semiconductor wafers 110 from the same semiconducting ingot 103 The crystallographic orientation angle of the ground semiconductor wafer 110 .

圖1B係展示根據一些實施例之投射至一半導體晶圓110上之一離子束120之一示意圖。參考圖1B之標繪圖(A),半導體晶圓110經放置為其表面110S平行於xy平面。圖1B之標繪圖(A)亦展示在z軸之方向上且垂直於一表面110S延伸之一法線N。在一些實施例中,半導體晶圓110之一晶體平面可不平行於半導體晶圓110之表面110S,如由一結晶定向線110L繪示,該結晶定向線110L指示半導體晶圓110之結晶定向。在法線N與結晶定向線110L之間形成一結晶定向角β。在半導體晶圓110繞垂直於xy平面之法線N旋轉時,晶體平面及結晶定向線110L亦隨著半導體晶圓110之旋轉而轉動。在一些實施例中,在半導體晶圓110繞法線N旋轉時,結晶定向線110L繞法線N轉動。一凹口130N充當一參考點,且半導體晶圓110可從凹口130旋轉達一旋轉角至一目標座標(x0 ,y0 ),一參考線110T與一目標線110R之間的一夾角或一中心角在本文中被稱為一扭角θ,其中參考線110R被繪製為從表面110S之中心至凹口130N而目標線110T被繪製為從表面110S之中心至目標座標(x0 ,y0 )。在一些實施例中,扭角θ表示半導體晶圓110之晶體平面定向之改變。FIG. 1B shows a schematic diagram of an ion beam 120 projected onto a semiconductor wafer 110 in accordance with some embodiments. Referring to plot (A) of FIG. 1B , semiconductor wafer 110 is placed with surface 110S parallel to the xy plane. Plot (A) of FIG. 1B also shows a normal N extending in the direction of the z-axis and perpendicular to a surface 110S. In some embodiments, a crystal plane of semiconductor wafer 110 may be non-parallel to surface 110S of semiconductor wafer 110 , as depicted by a crystallographic orientation line 110L indicating the crystallographic orientation of semiconductor wafer 110 . A crystallographic orientation angle β is formed between the normal line N and the crystallographic orientation line 110L. When the semiconductor wafer 110 is rotated about the normal line N perpendicular to the xy plane, the crystal plane and the crystallographic orientation line 110L also rotate with the rotation of the semiconductor wafer 110 . In some embodiments, as the semiconductor wafer 110 is rotated about the normal N, the crystallographic orientation line 110L is rotated about the normal N. A notch 130N serves as a reference point, and the semiconductor wafer 110 can be rotated from the notch 130 by a rotation angle to a target coordinate (x 0 , y 0 ), an angle between a reference line 110T and a target line 110R or a center angle is referred to herein as a twist angle θ, where the reference line 110R is drawn from the center of the surface 110S to the notch 130N and the target line 110T is drawn from the center of the surface 110S to the target coordinates (x 0 , y 0 ). In some embodiments, the twist angle θ represents a change in the orientation of the crystal plane of the semiconductor wafer 110 .

離子束120由一離子植入操作中使用之一離子植入源(未單獨展示)投射,諸如一植入器。離子束120及法線N形成一夾角α,在本文中被稱為植入器之一投射角。離子束120沿一路徑120P投射至半導體晶圓110之表面110S之一位置(諸如中心)上。The ion beam 120 is projected by an ion implantation source (not shown separately), such as an implanter, used in an ion implantation operation. The ion beam 120 and the normal N form an included angle α, referred to herein as a projection angle of the implanter. The ion beam 120 is projected onto a location (such as the center) of the surface 110S of the semiconductor wafer 110 along a path 120P.

參考圖1B之標繪圖(B),展示半導體晶圓110之一俯視圖及一側視圖。在一離子束投射操作期間,半導體晶圓110可以相對於xy平面之一晶圓傾斜角ω傾斜。在一些實施例中,提供支撐及固持半導體晶圓110之一晶圓載物台(未單獨展示),其中藉由傾斜晶圓載物台而傾斜晶圓110。假定選擇目標座標(x0 ,y0 )作為傾斜點,藉由傾斜晶圓載物台而傾斜半導體晶圓110,其中與目標座標(x0 ,y0 )相關聯之目標線110T形成與xy平面之晶圓傾斜角ω。傾斜角ω可取決於目標線110T是否在xy平面上方或下方而為正或負。在一些實施例中,結晶定向線110L之方向改變達晶圓傾斜角ω之量。基於上文,晶圓傾斜角ω、扭角θ及投射角α一起判定離子束120與半導體晶圓110之結晶定向線110L之間的夾角,藉此判定離子束120相對於半導體晶圓110之植入角。Referring to plot (B) of FIG. 1B , a top view and a side view of semiconductor wafer 110 are shown. During an ion beam projection operation, the semiconductor wafer 110 may be tilted relative to a wafer tilt angle ω in the xy plane. In some embodiments, a wafer stage (not separately shown) is provided that supports and holds the semiconductor wafer 110, wherein the wafer 110 is tilted by tilting the wafer stage. Assuming that target coordinates (x 0 , y 0 ) are selected as the tilt point, the semiconductor wafer 110 is tilted by tilting the wafer stage, wherein the target line 110T associated with the target coordinates (x 0 , y 0 ) is formed with the xy plane The wafer tilt angle ω. The tilt angle ω may be positive or negative depending on whether the target line 110T is above or below the xy plane. In some embodiments, the direction of crystal orientation line 110L changes by the amount of wafer tilt angle ω. Based on the above, the wafer tilt angle ω, the twist angle θ and the projection angle α together determine the angle between the ion beam 120 and the crystallographic orientation line 110L of the semiconductor wafer 110 , thereby determining the angle between the ion beam 120 and the semiconductor wafer 110 . Implant angle.

在一些實施例中,離子束120之投射角α與結晶定向角β之間的角度差(α-β)係判定所植入井區之輪廓之一個因素。此外,井區輪廓之偏差在所植入井區具有一減小間距(例如,小於約1 µm)時更大。例如,在一先進CMOS影像感測器之應用中,以小於0.8 µm之一像素間距形成一感測像素。在此等狀況中,植入一或多個井以形成感測像素,其中照射角之偏差應小於0.05度。如先前論述,除植入器之植入角以外,亦由結晶定向角判定實際照射角。然而,在一大規模生產製程中,難以具有擁有相等結晶定向角之不同批次坯料半導體晶圓。甚至由相同半導電鑄錠103製造之相同批次半導體晶圓(例如,圖1A中之半導體晶圓110)仍包含跨半導電鑄錠103之整個高度之約0.1度之結晶定向角之一最大角偏差,其超過先進CMOS影像感測器之精確性容限。因此,需要提供結晶定向角之一精確估測以消除或減少結晶定向角可變性之干擾。In some embodiments, the angular difference (α-β) between the projection angle α of the ion beam 120 and the crystallographic orientation angle β is a factor in determining the profile of the implanted well. Furthermore, the deviation of the well contour is greater when the implanted well has a reduced spacing (eg, less than about 1 μm). For example, in an advanced CMOS image sensor application, a sensing pixel is formed with a pixel pitch of less than 0.8 μm. In these cases, one or more wells are implanted to form the sensing pixels, where the deviation of the illumination angle should be less than 0.05 degrees. As discussed previously, in addition to the implantation angle of the implanter, the actual illumination angle is also determined from the crystallographic orientation angle. However, in a mass production process, it is difficult to have different batches of blank semiconductor wafers with equal crystal orientation angles. Even the same batch of semiconductor wafers (eg, semiconductor wafer 110 in FIG. 1A ) fabricated from the same semiconducting ingot 103 still contain a maximum of about 0.1 degrees of crystallographic orientation angle across the entire height of the semiconducting ingot 103 Angular deviation, which exceeds the accuracy tolerance of advanced CMOS image sensors. Therefore, there is a need to provide an accurate estimate of crystallographic orientation angle to eliminate or reduce the interference of crystallographic orientation angle variability.

圖2係根據一些實施例之估測一半導體晶圓之一結晶定向角之一方法200之一流程圖。應理解,可在圖2中展示之步驟之前、期間及之後提供額外步驟,且可在方法200之其他實施例中取代或消除下文描述之一些步驟。步驟之順序可為可互換的。FIG. 2 is a flowchart of a method 200 of estimating a crystallographic orientation angle of a semiconductor wafer according to some embodiments. It should be understood that additional steps may be provided before, during, and after the steps shown in FIG. 2 , and that some of the steps described below may be replaced or eliminated in other embodiments of method 200 . The order of steps may be interchangeable.

在步驟202,接收一第一晶圓110。第一晶圓110亦在圖3中展示。在一些實施例中,第一晶圓110選自一晶圓批次且充當晶圓批次之一測試晶圓。在一些實施例中,將第一晶圓110放置於一晶圓載物台或平台(未單獨展示)上。在一些實施例中,在第一晶圓上形成或標記一凹口110N。當由晶圓載物台旋轉第一晶圓110時,指向第一晶圓110之凹口110N之一標記302充當第一晶圓110相對於凹口110N之一參考點。At step 202, a first wafer 110 is received. The first wafer 110 is also shown in FIG. 3 . In some embodiments, the first wafer 110 is selected from a wafer lot and serves as one of the test wafers in the wafer lot. In some embodiments, the first wafer 110 is placed on a wafer stage or platform (not shown separately). In some embodiments, a notch 110N is formed or marked on the first wafer. When the first wafer 110 is rotated by the wafer stage, a mark 302 pointing to the notch 110N of the first wafer 110 serves as a reference point of the first wafer 110 relative to the notch 110N.

在步驟204,如圖3之標繪圖(A)中繪示,在第一晶圓110上界定一第一區帶310及一第二區帶320。此外,分別在第一區帶及第二區帶中界定複數個第一區域312 (例如,第一區域312a、312b、312c、312d及312e)及複數個第二區域322 (例如,第二區域322a、322b、322c、322d及322e)。在一些實施例中,第一區帶310及第二區帶320表示第一晶圓110之兩半。在一些實施例中,第一區帶310及第二區帶320相對於一對稱線S1彼此對稱。在一些實施例中,第一區帶310及第二區帶320具有實質上相等面積,其等之各者等於第一晶圓110之總面積之一半。在一些實施例中,第一區帶310毗鄰第二區帶320;然而,在一些其他實施例中,第一區帶310及第二區帶320藉由第一區帶310與第二區帶320之間的一第三區帶分離,且第一區帶310及第二區帶320各具有小於第一晶圓110之總面積之一半之一面積。在所描繪實施例中,第一區帶310或第二區帶320具有一半圓形形狀;然而,諸如一多邊形形狀或一圓形形狀之其他形狀亦係可行的。圖3之標繪圖(A)中展示之第一區帶310及第二區帶320之形狀及面積係為繪示目的。第一區帶310及第二區帶320之其他組態亦在本揭露之預期範疇內。At step 204 , as depicted in plot (A) of FIG. 3 , a first zone 310 and a second zone 320 are defined on the first wafer 110 . In addition, a plurality of first regions 312 (eg, first regions 312a, 312b, 312c, 312d, and 312e) and a plurality of second regions 322 (eg, second regions 312) are defined in the first zone and the second zone, respectively 322a, 322b, 322c, 322d and 322e). In some embodiments, the first zone 310 and the second zone 320 represent two halves of the first wafer 110 . In some embodiments, the first zone 310 and the second zone 320 are symmetrical to each other with respect to a symmetry line S1. In some embodiments, the first zone 310 and the second zone 320 have substantially equal areas, each of which is equal to one-half of the total area of the first wafer 110 . In some embodiments, the first zone 310 is adjacent to the second zone 320; however, in some other embodiments, the first zone 310 and the second zone 320 are separated by the first zone 310 and the second zone A third zone between 320 is separated, and the first zone 310 and the second zone 320 each have an area less than half of the total area of the first wafer 110 . In the depicted embodiment, the first zone 310 or the second zone 320 has a semicircular shape; however, other shapes, such as a polygonal shape or a circular shape, are also possible. The shapes and areas of the first zone 310 and the second zone 320 shown in plot (A) of FIG. 3 are for illustration purposes. Other configurations of the first zone 310 and the second zone 320 are also contemplated by the present disclosure.

在第一區帶310中界定第一區域312。在第二區帶320中界定第二區域322。在一些實施例中,第一區域312具有不同形狀或面積。例如,第一區域312a具有一半圓形形狀,且其餘第一區域312b、312c、312d及312e之各者具有一弧形形狀;然而,諸如多邊形形狀、圓餅形狀或圓形形狀之其他形狀亦係可行的。在一些實施例中,第一區域312a毗鄰其餘第一區域312b、312c、312d及312e。第一區域312a可被第一區域312b、312c、312d及312e以及第二區帶320之第二區域322a橫向圍繞。在一些實施例中,第一區域312a至312e彼此毗鄰。在一些實施例中,第一區域312a至312e彼此隔開。在所描繪實例中,第一區帶310被分割為五個第一區域312a至312e。然而,其他數目個第一區域312亦係可行的。A first region 312 is defined in the first zone 310 . A second region 322 is defined in the second zone 320 . In some embodiments, the first regions 312 have different shapes or areas. For example, the first region 312a has a semicircular shape, and each of the remaining first regions 312b, 312c, 312d, and 312e has an arc shape; however, other shapes such as a polygonal shape, a pie shape, or a circular shape are also possible is feasible. In some embodiments, the first region 312a is adjacent to the remaining first regions 312b, 312c, 312d, and 312e. The first region 312a may be laterally surrounded by the first regions 312b , 312c , 312d and 312e and the second region 322a of the second zone 320 . In some embodiments, the first regions 312a-312e are adjacent to each other. In some embodiments, the first regions 312a-312e are spaced apart from each other. In the depicted example, the first zone 310 is divided into five first regions 312a-312e. However, other numbers of first regions 312 are also possible.

在一些實施例中,第二區域322具有不同形狀或面積。例如,第二區域322a具有一半圓形形狀,且其餘第二區域322b、322c、322d及322e之各者具有一弧形形狀;然而,諸如多邊形形狀、圓餅形狀或圓形形狀之其他形狀亦係可行的。在一些實施例中,第二區域322a毗鄰其餘第二區域322b、322c、322d及322e。第二區域322a可被第二區域322b、322c、322d及322e以及第一區帶310之第一區域312a橫向圍繞。在一些實施例中,第二區域322a至322e彼此毗鄰。在一些實施例中,第二區域322a至312e彼此隔開。在所描繪實例中,第二區帶320被分割為五個第二區域322a至322e。然而,其他數目個第二區域322亦係可行的。In some embodiments, the second region 322 has a different shape or area. For example, the second region 322a has a semicircular shape, and each of the remaining second regions 322b, 322c, 322d, and 322e has an arcuate shape; however, other shapes such as a polygonal shape, a pie shape, or a circular shape are also possible is feasible. In some embodiments, the second region 322a is adjacent to the remaining second regions 322b, 322c, 322d, and 322e. The second region 322a may be laterally surrounded by the second regions 322b , 322c , 322d and 322e and the first region 312a of the first zone 310 . In some embodiments, the second regions 322a-322e are adjacent to each other. In some embodiments, the second regions 322a-312e are spaced apart from each other. In the depicted example, the second zone 320 is divided into five second regions 322a-322e. However, other numbers of second regions 322 are also possible.

在一些實施例中,第一區域312之一者(例如,第一區域312a)與第二區域322之一者(例如,第二區域322a)經配對。在一些實施例中,經配對第一區域312a及第二區域322a相對於對稱線S1對稱。在一些實施例中,經配對第一區域312a及第二區域322a具有相同面積及形狀。類似地,第一區域312b (312c、312d或312e)與第二區域322b (322c、322d或322e)配對,且第一區域312b (312c、312d或312e)及第二區域322b (322c、322d或322e)相對於對稱線S1對稱。In some embodiments, one of the first regions 312 (eg, the first region 312a ) and one of the second regions 322 (eg, the second region 322a ) are paired. In some embodiments, the paired first and second regions 312a and 322a are symmetrical with respect to the line of symmetry S1. In some embodiments, the paired first region 312a and the second region 322a have the same area and shape. Similarly, first region 312b (312c, 312d or 312e) is paired with second region 322b (322c, 322d or 322e), and first region 312b (312c, 312d or 312e) and second region 322b (322c, 322d or 322e) is symmetrical with respect to the symmetry line S1.

在步驟206,執行一第一離子束投射,其中將第一離子束402投射至第一區域312上,如圖4之標繪圖(A)中繪示。回應於第一離子束402而接收第一熱波404。在一些實施例中,植入器經組態以每次將一個個別第一離子束402投射至個別第一區域312上,其中在不同時間以相同能量及相同植入角α投射第一離子束402之各者,且個別第一區域312之各者以一各自晶圓傾斜角ω接收個別第一離子束402。在一些實施例中,植入器以不同傾斜角ω重複地投射第一離子束402,其中傾斜角ω具有一角度差K1 。例如,角度差K1 係0.2°,且植入器經組態以針對第一區域311a至311e以-0.4度、-0.2度、0度、0.2度及0.4度之各自晶圓傾斜角五次投射一第一離子束402。在一些實施例中,在第一離子束投射期間防止第二區帶320接收第一離子束402。At step 206, a first ion beam projection is performed, wherein the first ion beam 402 is projected onto the first region 312, as shown in plot (A) of FIG. 4 . A first thermal wave 404 is received in response to the first ion beam 402 . In some embodiments, the implanter is configured to project an individual first ion beam 402 onto individual first regions 312 at a time, wherein the first ion beams are projected at different times at the same energy and at the same implantation angle α 402, and each of the respective first regions 312 receive the respective first ion beam 402 at a respective wafer tilt angle ω. In some embodiments, the implanter repeatedly projects the first ion beam 402 at different tilt angles ω, where the tilt angles ω have an angular difference K 1 . For example, the angular difference K1 is 0.2°, and the implanter is configured to tilt five times for the first regions 311a-311e at respective wafer tilt angles of -0.4 degrees, -0.2 degrees, 0 degrees, 0.2 degrees, and 0.4 degrees A first ion beam 402 is projected. In some embodiments, the second zone 320 is prevented from receiving the first ion beam 402 during projection of the first ion beam.

當第一離子束402投射至第一晶圓110之表面110S上時,第一離子束402中之電離粒子由植入器加速且穿透至第一晶圓110之內部晶格結構中。第一離子束402之電離粒子之一部分與晶格結構中之原子碰撞且產生向外傳播之第一熱波404。一熱波偵測器(諸如一溫度計)用於接收由第一離子束402及晶格結構之碰撞導致之第一熱波404。第一熱波404之強度或溫度由碰撞程度判定,其與第一離子束402之實際照射角相關。由於第一離子束402以不同晶圓傾斜角ω投射至個別第一區域312上,所以晶圓傾斜角ω之不同例項之第一熱波404具有不同波強度。When the first ion beam 402 is projected onto the surface 110S of the first wafer 110 , the ionized particles in the first ion beam 402 are accelerated by the implanter and penetrate into the internal lattice structure of the first wafer 110 . A portion of the ionized particles of the first ion beam 402 collide with atoms in the lattice structure and generate a first thermal wave 404 that propagates outward. A thermal wave detector, such as a thermometer, is used to receive the first thermal wave 404 caused by the collision of the first ion beam 402 with the lattice structure. The intensity or temperature of the first thermal wave 404 is determined by the degree of collision, which is related to the actual illumination angle of the first ion beam 402 . Since the first ion beams 402 are projected onto the respective first regions 312 at different wafer tilt angles ω, the first thermal waves 404 for different instances of the wafer tilt angles ω have different wave intensities.

在一些實施例中,第一離子束402以表示為一角度差(α-β)之一照射角照射至各自第一區域312上(假定零度之晶圓傾斜角ω)。藉由調諧晶圓傾斜角ω,可使實際照射角小於(α-β),以便達成較大離子穿透及電離粒子與晶格原子之間的較少碰撞,且因此導致各自第一熱波404具有減小波強度。在一些實施例中,當調諧晶圓傾斜角ω以補償植入角α與結晶定向角β之間的夾角(α-β)時,第一離子束402以一最小照射角(實質上零度)命中晶體平面,從而導致第一熱波404之一最小波強度。In some embodiments, the first ion beams 402 impinge on the respective first regions 312 at an illumination angle denoted as an angular difference (α-β) (assuming a wafer tilt angle ω of zero degrees). By tuning the wafer tilt angle ω, the actual illumination angle can be made smaller than (α-β), in order to achieve greater ion penetration and fewer collisions between ionized particles and lattice atoms, and thus result in respective first thermal waves 404 has reduced wave intensity. In some embodiments, when the wafer tilt angle ω is tuned to compensate for the angle (α-β) between the implantation angle α and the crystallographic orientation angle β, the first ion beam 402 is irradiated at a minimum angle (substantially zero degrees) The crystal plane is hit, resulting in one of the first thermal waves 404 with a minimum wave intensity.

在步驟208,亦參考圖3之標繪圖(B),使用晶圓載物台將第一晶圓110旋轉達一扭角θ。在一些實施例中,將扭角θ設定為180度;然而,扭角θ之其他值亦係可行的。在其中將扭角θ設定為180度之實施例中,第一晶圓110旋轉達180度,藉此導致凹口110N背離標記302,且第一區域312a至312e及第二區域322a至322e之相對位置相對於對稱線S1互換。At step 208 , referring also to plot (B) of FIG. 3 , the first wafer 110 is rotated by a twist angle θ using the wafer stage. In some embodiments, the twist angle θ is set to 180 degrees; however, other values of the twist angle θ are also possible. In the embodiment in which the twist angle θ is set to 180 degrees, the first wafer 110 is rotated by up to 180 degrees, thereby causing the notch 110N to face away from the mark 302 and the difference between the first regions 312a-312e and the second regions 322a-322e The relative positions are interchanged with respect to the symmetry line S1.

在步驟210,亦參考回圖4之標繪圖(B),執行一第二離子束投射,其中將第二離子束412投射至第二區域322上。回應於第二離子束412而接收第二熱波414。在一些實施例中,植入器經組態以每次將一個個別第二離子束412投射至個別第二區域322上,其中在不同時間以相同能量及相同植入角α投射第二離子束412之各者,且個別第二區域322之各者以一各自晶圓傾斜角ω接收個別第二離子束412。在一些實施例中,第一離子束402及第二離子束412具有相同植入能量及植入角α。在一些實施例中,晶圓傾斜角ω具有一角度差K2 。例如,角度差K2 係0.2°,且植入器經組態以將五個第二離子束422以各自晶圓傾斜角-0.4度、-0.2度、0度、0.2度及0.4度投射至第二區域322a至322e上。在一些實施例中,角度差K1 相同或不同於角度差K2 。在一些實施例中,在第二離子束投射期間防止第一區帶310接收離子束422。At step 210 , also referring back to plot (B) of FIG. 4 , a second ion beam projection is performed, wherein the second ion beam 412 is projected onto the second region 322 . A second thermal wave 414 is received in response to the second ion beam 412 . In some embodiments, the implanter is configured to project an individual second ion beam 412 onto individual second regions 322 at a time, wherein the second ion beams are projected at different times at the same energy and at the same implantation angle α 412, and each of the respective second regions 322 receives the respective second ion beam 412 at a respective wafer tilt angle ω. In some embodiments, the first ion beam 402 and the second ion beam 412 have the same implantation energy and implantation angle a. In some embodiments, the wafer tilt angle ω has an angular difference K 2 . For example, the angular difference K2 is 0.2°, and the implanter is configured to project five second ion beams 422 at respective wafer tilt angles of -0.4, -0.2, 0, 0.2, and 0.4 degrees to the on the second regions 322a to 322e. In some embodiments, the angular difference K 1 is the same or different from the angular difference K 2 . In some embodiments, the first zone 310 is prevented from receiving the ion beam 422 during projection of the second ion beam.

當第二離子束412投射至第一晶圓110之表面110S上時,第二離子束412中之電離粒子由植入器加速且穿透至第一晶圓110之內部晶格結構中。第二離子束412之電離粒子之一部分與晶格結構中之原子碰撞且產生向外傳播之第二熱波414。一熱波偵測器(諸如一溫度計)用於接收由第二離子束412及晶格結構之碰撞導致之第二熱波414。第二熱波414之強度或溫度由碰撞程度判定,其與第二離子束412之實際照射角相關。由於第二離子束412以不同晶圓傾斜角ω投射至個別第二區域322上,所以不同晶圓傾斜角ω之第二熱波414具有不同波強度。When the second ion beam 412 is projected onto the surface 110S of the first wafer 110 , the ionized particles in the second ion beam 412 are accelerated by the implanter and penetrate into the internal lattice structure of the first wafer 110 . A portion of the ionized particles of the second ion beam 412 collide with atoms in the lattice structure and generate a second thermal wave 414 that propagates outward. A thermal wave detector, such as a thermometer, is used to receive the second thermal wave 414 caused by the collision of the second ion beam 412 with the lattice structure. The intensity or temperature of the second thermal wave 414 is determined by the degree of collision, which is related to the actual illumination angle of the second ion beam 412 . Since the second ion beams 412 are projected onto the respective second regions 322 with different wafer tilt angles ω, the second thermal waves 414 with different wafer tilt angles ω have different wave intensities.

參考圖4之標繪圖(A)及(B),歸因於第一晶圓110旋轉達180度之一扭角θ,結晶定向角β及–β由一正負號區分。在一些實施例中,假定零度之一晶圓傾斜角ω,則第二離子束412以(α+β)之一照射角照射至第二區域322上。藉由調諧晶圓傾斜角ω,可使實際照射角小於(α+β)以達成較大離子穿透及電離粒子與晶格原子之間的較少碰撞,因此減小各自第二熱波414之波強度。在一些實施例中,當調諧晶圓傾斜角ω以補償夾角(α+β)時,第二離子束404以一最小照射角(實質上零度)命中晶體平面,從而導致第二熱波414之一最小波強度。Referring to plots (A) and (B) of FIG. 4 , since the first wafer 110 is rotated by a twist angle θ of 180 degrees, the crystal orientation angles β and −β are distinguished by a sign. In some embodiments, assuming a wafer tilt angle ω of zero degrees, the second ion beam 412 impinges on the second region 322 at an illumination angle of (α+β). By tuning the wafer tilt angle ω, the actual illumination angle can be made smaller than (α+β) to achieve greater ion penetration and fewer collisions between ionized particles and lattice atoms, thus reducing the respective second thermal waves 414 wave strength. In some embodiments, when the wafer tilt angle ω is tuned to compensate for the included angle (α+β), the second ion beam 404 hits the crystal plane at a minimum illumination angle (substantially zero degrees), thereby causing the second thermal wave 414 to a minimum wave intensity.

在步驟212,基於第一離子束402、第二離子束412、第一熱波404及第二熱波414估測第一晶圓110之一第一結晶定向角β。在一些實施例中,亦基於第一離子束402、第二離子束412、第一熱波404及第二熱波414估測植入器之植入角。參考圖5,一示意圖500繪示根據一些實施例之熱波強度對晶圓傾斜角ω。在圖表500上標繪第一熱波404及第二熱波414之強度。菱形標記指示第一熱波404在不同晶圓傾斜角ω下之強度且方形標記指示第二熱波414在不同晶圓傾斜角ω下之強度。At step 212 , a first crystallographic orientation angle β of the first wafer 110 is estimated based on the first ion beam 402 , the second ion beam 412 , the first thermal wave 404 and the second thermal wave 414 . In some embodiments, the implantation angle of the implanter is also estimated based on the first ion beam 402, the second ion beam 412, the first thermal wave 404, and the second thermal wave 414. Referring to FIG. 5, a schematic diagram 500 illustrates thermal wave intensity versus wafer tilt angle ω according to some embodiments. The intensities of the first heat wave 404 and the second heat wave 414 are plotted on the graph 500 . The diamond marks indicate the intensity of the first thermal wave 404 at different wafer tilt angles ω and the square marks indicate the intensities of the second thermal wave 414 at different wafer tilt angles ω.

執行一曲線擬合操作以產生最佳地擬合第一熱波404之量測之一曲線,如由虛線展示。類似地,執行另一曲線擬合操作以產生最佳地擬合第二熱波414之量測之一曲線,如由實線展示。隨後,判定一晶圓傾斜角ω1 ,其獲得第一熱波404之一最小強度。類似地,判定另一晶圓傾斜角ω2 ,其獲得第二熱波414之一最小強度。在一些實施例中,藉由求解描述第一熱波404或第二熱波414之曲線之一方程式而判定晶圓傾斜角ω1 或ω2 之值。A curve fitting operation is performed to generate a curve that best fits the measurements of the first heat wave 404, as shown by the dashed line. Similarly, another curve fitting operation is performed to generate a curve that best fits the measurements of the second heat wave 414, as shown by the solid line. Subsequently, a wafer tilt angle ω 1 is determined, which obtains a minimum intensity of the first thermal wave 404 . Similarly, another wafer tilt angle ω 2 is determined, which obtains one of the minimum intensities of the second thermal wave 414 . In some embodiments, the value of the wafer tilt angle ω 1 or ω 2 is determined by solving an equation describing the curve of the first thermal wave 404 or the second thermal wave 414 .

如先前論述,導致第一熱波404之最小波強度之晶圓傾斜角ω1 對應於角度差(α-β)而導致第二熱波414之最小波強度之晶圓傾斜角ω2 對應於角度差(α+β)。因此,植入角α及結晶定向角β之值可透過線性代數估測且可表示如下。As discussed previously, the wafer tilt angle ω 1 resulting in the minimum wave intensity of the first thermal wave 404 corresponds to the angle difference (α-β) and the wafer tilt angle ω 2 resulting in the minimum wave intensity of the second thermal wave 414 corresponds to Angle difference (α+β). Therefore, the values of the implantation angle α and the crystallographic orientation angle β can be estimated by linear algebra and can be expressed as follows.

α=(ω12 )/2α=(ω 12 )/2

β=(ω21 )/2β=(ω 21 )/2

圖6係根據一些實施例之製造半導體裝置之一方法600之一流程圖。應理解,可在圖6中展示之步驟之前、期間及之後提供額外步驟,且可在方法600之其他實施例中取代或消除下文描述之一些步驟。步驟之順序可為可互換的。FIG. 6 is a flowchart of a method 600 of fabricating a semiconductor device in accordance with some embodiments. It should be understood that additional steps may be provided before, during, and after the steps shown in FIG. 6 , and that some of the steps described below may be replaced or eliminated in other embodiments of method 600 . The order of steps may be interchangeable.

在步驟602,接收一第一晶圓。在一些實施例中,第一晶圓係圖1A中之晶圓110a以及圖3及圖4中之晶圓110。在步驟604,在第一晶圓上界定一第一區帶及一第二區帶。在一些實施例中,第一區帶及第二區帶係圖3中之第一區帶310及第二區帶320。在一些實施例中,在第一區帶310中界定第一區域312且在第二區帶320中界定第二區域322。At step 602, a first wafer is received. In some embodiments, the first wafer is wafer 110a in FIG. 1A and wafer 110 in FIGS. 3 and 4 . At step 604, a first zone and a second zone are defined on the first wafer. In some embodiments, the first zone and the second zone are the first zone 310 and the second zone 320 in FIG. 3 . In some embodiments, the first region 312 is defined in the first zone 310 and the second region 322 is defined in the second zone 320 .

在步驟606,執行一第一離子束投射及一第二離子束投射,其中分別藉由各自第一離子束投射及第二離子束投射將第一離子束及第二離子束投射至第一晶圓之第一區帶及第二區帶上。在一些實施例中,第一離子束及第二離子束分別係第一離子束402及第二離子束412。在一些實施例中,第一區域及第二區域分別以各自植入器傾斜角接收第一離子束投射及第二離子束投射。在一些實施例中,分別回應於第一離子束投射及第二離子束投射而接收第一熱波及第二熱波。在一些實施例中,步驟606中之第一離子束投射或第二離子束投射以類似於步驟206、208及210之方式之一方式執行。At step 606, a first ion beam projection and a second ion beam projection are performed, wherein the first and second ion beams are projected onto the first crystal by respective first and second ion beam projections, respectively on the first and second zones of the circle. In some embodiments, the first ion beam and the second ion beam are the first ion beam 402 and the second ion beam 412, respectively. In some embodiments, the first region and the second region receive the first ion beam projection and the second ion beam projection, respectively, at respective implanter tilt angles. In some embodiments, the first thermal wave and the second thermal wave are received in response to the first ion beam projection and the second ion beam projection, respectively. In some embodiments, the first ion beam projection or the second ion beam projection in step 606 is performed in a manner similar to that of steps 206 , 208 and 210 .

在步驟608,基於第一離子束及第二離子束估測第一晶圓之一第一結晶定向角。在一些實施例中,進一步基於第一熱波及第二熱波估測第一晶圓之第一結晶定向角。在一些實施例中,在步驟608,亦基於第一離子束、第二離子束、第一熱波及第二熱波估測植入器之植入角。在一些實施例中,步驟608中之第一晶圓之第一結晶定向角及植入器之植入角之估測以類似於步驟212之方式之一方式執行。At step 608, a first crystallographic orientation angle of the first wafer is estimated based on the first ion beam and the second ion beam. In some embodiments, the first crystallographic orientation angle of the first wafer is further estimated based on the first thermal wave and the second thermal wave. In some embodiments, at step 608, the implantation angle of the implanter is also estimated based on the first ion beam, the second ion beam, the first thermal wave, and the second thermal wave. In some embodiments, the estimation of the first crystallographic orientation angle of the first wafer and the implantation angle of the implanter in step 608 is performed in a manner similar to that of step 212 .

在步驟610,接收一第二晶圓。在一些實施例中,第二晶圓係圖1A中之晶圓110b以及圖3及圖4中之晶圓110。在一些實施例中,第一晶圓及第二晶圓係測試晶圓。在一些實施例中,第一晶圓及第二晶圓由一相同半導電鑄錠製造且在半導電鑄錠中藉由一或多個其他晶圓分離。在一些實施例中,第一晶圓及第二晶圓屬於一相同晶圓批次且藉由一或多個其他晶圓分離。At step 610, a second wafer is received. In some embodiments, the second wafer is wafer 110b in FIG. 1A and wafer 110 in FIGS. 3 and 4 . In some embodiments, the first wafer and the second wafer are test wafers. In some embodiments, the first wafer and the second wafer are fabricated from the same semiconductive ingot and separated by one or more other wafers in the semiconductive ingot. In some embodiments, the first wafer and the second wafer belong to the same wafer lot and are separated by one or more other wafers.

在步驟612,在第二晶圓上界定一第三區帶及一第四區帶。在一些實施例中,第三區帶及第四區帶係圖3中之第一區帶310及第二區帶320。在一些實施例中,在第一區帶310中界定第一區域312且在第二區帶320中界定第二區域322。At step 612, a third zone and a fourth zone are defined on the second wafer. In some embodiments, the third zone and the fourth zone are the first zone 310 and the second zone 320 in FIG. 3 . In some embodiments, the first region 312 is defined in the first zone 310 and the second region 322 is defined in the second zone 320 .

在步驟614,執行一第三離子束投射及一第四離子束投射,其中分別藉由各自第三離子束投射及第四離子束投射將第三離子束及第四離子束投射至第二晶圓之第三區帶及第四區帶上。在一些實施例中,第三離子束及第四離子束分別係第一離子束402及第二離子束412。在一些實施例中,第二晶圓之第一區域312及第二區域322分別以各自植入器傾斜角接收第三離子束投射及第四離子束投射。在一些實施例中,分別回應於第三離子束投射及第四離子束投射而接收第三熱波及第四熱波。在一些實施例中,步驟614中之第三離子束投射或第四離子束投射以類似於步驟206、208及210中之方式之一方式執行。At step 614, a third ion beam projection and a fourth ion beam projection are performed, wherein the third and fourth ion beams are projected onto the second crystal by respective third and fourth ion beam projections, respectively On the third and fourth zones of the circle. In some embodiments, the third ion beam and the fourth ion beam are the first ion beam 402 and the second ion beam 412, respectively. In some embodiments, the first region 312 and the second region 322 of the second wafer receive the third and fourth ion beam projections, respectively, at respective implanter tilt angles. In some embodiments, the third thermal wave and the fourth thermal wave are received in response to the third and fourth ion beam projections, respectively. In some embodiments, the third ion beam projection or the fourth ion beam projection in step 614 is performed in a manner similar to one of the manners in steps 206 , 208 and 210 .

在步驟616,基於第三離子束及第四離子束估測第二晶圓之一第二結晶定向角。在一些實施例中,進一步基於第三熱波及第四熱波估測第二晶圓之第二結晶定向角。在一些實施例中,在步驟616,亦基於第三離子束、第四離子束、第三熱波及第四熱波估測植入器之植入角。在一些實施例中,由步驟616進行之第二晶圓之第二結晶定向角及植入器之植入角之估測以類似於步驟212之方式之一方式執行。At step 616, a second crystallographic orientation angle of the second wafer is estimated based on the third ion beam and the fourth ion beam. In some embodiments, the second crystallographic orientation angle of the second wafer is further estimated based on the third thermal wave and the fourth thermal wave. In some embodiments, at step 616, the implantation angle of the implanter is also estimated based on the third ion beam, the fourth ion beam, the third thermal wave, and the fourth thermal wave. In some embodiments, the estimation of the second crystallographic orientation angle of the second wafer and the implantation angle of the implanter by step 616 is performed in a manner similar to that of step 212 .

在步驟618,接收一第三晶圓。在一些實施例中,第三晶圓係準備用於製造一半導體裝置之一晶圓。在一些實施例中,第三晶圓係由製造第一晶圓及第二晶圓之一半導電鑄錠製造。在一些實施例中,第三晶圓屬於相同於第一晶圓及第二晶圓之一晶圓批次。在一些實施例中,第三晶圓在第一晶圓與第二晶圓之間的半導電鑄錠之一位置中。At step 618, a third wafer is received. In some embodiments, the third wafer is a wafer ready to be used to fabricate a semiconductor device. In some embodiments, the third wafer is fabricated from a semiconductive ingot from which the first wafer and the second wafer are fabricated. In some embodiments, the third wafer belongs to the same wafer lot as the first wafer and the second wafer. In some embodiments, the third wafer is in one of the locations of the semiconductive ingot between the first wafer and the second wafer.

在步驟620,基於第一結晶定向角及第二結晶定向角判定第三晶圓之一第三結晶定向角。在一些實施例中,藉由基於半導電鑄錠中之第一晶圓、第二晶圓及第三晶圓間之距離內插或外插第一結晶定向角及第二結晶定向角而判定第三晶圓之第三結晶定向角。在一些實施例中,第三晶圓之第三結晶定向角係第一晶圓結晶定向角及第二晶圓結晶定向角之一算術平均值。在一些實施例中,接收相同半導電鑄錠中之一第四晶圓之一第四結晶定向角,且基於第一結晶定向角、第二結晶定向角及第四結晶定向角(例如,透過一適合近似方法,諸如曲線擬合或線性回歸)判定第三晶圓之第三結晶定向角。In step 620, a third crystal orientation angle of the third wafer is determined based on the first crystal orientation angle and the second crystal orientation angle. In some embodiments, the determination is made by interpolating or extrapolating the first crystal orientation angle and the second crystal orientation angle based on the distances between the first wafer, the second wafer, and the third wafer in the semiconducting ingot The third crystal orientation angle of the third wafer. In some embodiments, the third crystal orientation angle of the third wafer is an arithmetic mean of the crystal orientation angle of the first wafer and the crystal orientation angle of the second wafer. In some embodiments, a fourth crystallographic orientation angle of a fourth wafer in the same semiconducting ingot is received, and based on the first crystallographic orientation angle, the second crystallographic orientation angle, and the fourth crystallographic orientation angle (eg, through A suitable approximation method, such as curve fitting or linear regression, determines the third crystallographic orientation angle of the third wafer.

在一些實施例中,用於在步驟606及614中執行離子束投射之植入器係相同植入器,且基於步驟608及616中執行之植入器之植入角之估測結果判定植入器之最終植入角。在一些實施例中,藉由對步驟608及616中執行之第一晶圓及第二晶圓之植入角之估測結果求平均值而判定最終植入角。In some embodiments, the implanters used to perform the ion beam projection in steps 606 and 614 are the same implant, and the implant is determined based on the estimation of the implantation angle of the implanters performed in steps 608 and 616 The final implantation angle of the implant. In some embodiments, the final implant angle is determined by averaging the results of the implant angle estimates for the first wafer and the second wafer performed in steps 608 and 616 .

在步驟622,根據第三結晶定向角對第三晶圓執行一離子植入。在一些實施例中,第三晶圓並非一測試晶圓且執行離子植入以在用於製造一半導體裝置之第三晶圓中製造一井區。在一些實施例中,根據植入器之植入角對第三晶圓執行離子植入。At step 622, an ion implantation is performed on the third wafer according to the third crystallographic orientation angle. In some embodiments, the third wafer is not a test wafer and ion implantation is performed to create a well in the third wafer used to fabricate a semiconductor device. In some embodiments, ion implantation is performed on the third wafer according to the implantation angle of the implanter.

圖7係根據一些實施例之製造半導體裝置之一方法700之一流程圖。應理解,可在圖7中展示之步驟之前、期間及之後提供額外步驟,且可在方法700之其他實施例中取代或消除下文描述之一些步驟。步驟之順序可為可互換的。FIG. 7 is a flowchart of a method 700 of fabricating a semiconductor device in accordance with some embodiments. It should be understood that additional steps may be provided before, during, and after the steps shown in FIG. 7 , and that some of the steps described below may be replaced or eliminated in other embodiments of method 700 . The order of steps may be interchangeable.

在步驟702,接收複數個晶圓。在一些實施例中,複數個晶圓屬於一相同晶圓批次或不同晶圓批次。在一些實施例中,複數個晶圓由一相同半導電鑄錠製造或由不同半導電鑄錠製造。在步驟704,估測複數個晶圓之結晶定向角。在一些實施例中,使用方法200 (其中在步驟212估測結晶定向角)或使用方法600 (其中在步驟602估測結晶定向角)基於其他晶圓之結晶定向角判定複數個晶圓之各者之結晶定向角。在一些實施例中,由另一適合方法估測結晶定向角。在一些實施例中,亦在步驟704估測一植入器之一植入角。在一些實施例中,複數個晶圓包含一或多個測試晶圓,且估測測試晶圓之結晶定向角。基於測試晶圓之所估測結晶定向角判定複數個晶圓之其餘者之結晶定向角。At step 702, a plurality of wafers are received. In some embodiments, the plurality of wafers belong to the same wafer lot or different wafer lots. In some embodiments, the plurality of wafers are fabricated from the same semiconductive ingot or from different semiconductive ingots. At step 704, the crystallographic orientation angles of the plurality of wafers are estimated. In some embodiments, each of the plurality of wafers is determined using method 200 (in which the crystallographic orientation angle is estimated at step 212 ) or using method 600 (in which the crystallographic orientation angle is estimated at step 602 ) based on the crystallographic orientation angles of other wafers the crystallographic orientation angle. In some embodiments, the crystallographic orientation angle is estimated by another suitable method. In some embodiments, an implantation angle of an implanter is also estimated at step 704 . In some embodiments, the plurality of wafers includes one or more test wafers, and the crystallographic orientation angles of the test wafers are estimated. The crystallographic orientation angles of the rest of the plurality of wafers are determined based on the estimated crystallographic orientation angles of the test wafers.

在步驟706,將複數個晶圓(排除測試晶圓,若存在)根據其等結晶定向角分類為一個以上晶圓群組。在一些實施例中,由一代表性結晶定向角識別各晶圓群組。在一些實施例中,基於所分類結晶定向角之粒度判定晶圓群組之數目。一晶圓群組中之晶圓之結晶定向角之一較小標準偏差可需要更多晶圓群組,此導致各晶圓群組之一更精確代表性結晶定向角。各晶圓群組中之晶圓可來自相同或不同半導電鑄錠。At step 706, the plurality of wafers (excluding test wafers, if present) are classified into one or more wafer groups according to their isocrystalline orientation angles. In some embodiments, each wafer group is identified by a representative crystallographic orientation angle. In some embodiments, the number of wafer groups is determined based on the granularity of the classified crystallographic orientation angles. A smaller standard deviation of the crystallographic orientation angles of the wafers in a wafer group may require more wafer groups, which results in a more accurate representative of the crystallographic orientation angles for each wafer group. The wafers in each wafer group can be from the same or different semiconducting ingots.

在步驟708,選擇來自某一晶圓群組之至少一個晶圓。在步驟710,對至少一個選定晶圓執行一離子植入操作。在一些實施例中,使用植入器根據植入器之所估測傾斜角及從其中選擇至少一個晶圓之晶圓群組之代表性結晶定向角執行離子植入操作。由於選定晶圓共用一共同代表性結晶定向角,所以可藉由最小化或消除一大規模生產程序中之不同晶圓之間的結晶定向角之可變性而以相對於此等晶圓之一更精確傾斜角執行離子植入操作。At step 708, at least one wafer from a certain wafer group is selected. At step 710, an ion implantation operation is performed on at least one selected wafer. In some embodiments, the ion implantation operation is performed using the implanter according to the estimated tilt angle of the implanter and the representative crystallographic orientation angle of the group of wafers from which at least one wafer is selected. Since the selected wafers share a common representative crystallographic orientation angle, one of the Perform ion implantation operations with more precise tilt angles.

圖8係根據一些實施例之實施一結晶定向角估測方法之一系統800之一示意圖。系統800包含一或多個處理器801、一網路介面803、一輸入及輸出(I/O)裝置805、一儲存器807、一記憶體809及一匯流排808。匯流排808將網路介面803、I/O裝置805、儲存器807、記憶體809及處理器801彼此耦合。FIG. 8 is a schematic diagram of a system 800 for implementing a method of crystallographic orientation angle estimation according to some embodiments. System 800 includes one or more processors 801 , a network interface 803 , an input and output (I/O) device 805 , a storage 807 , a memory 809 , and a bus 808 . Bus 808 couples network interface 803, I/O device 805, storage 807, memory 809, and processor 801 to each other.

處理器801經組態以執行程式指令,該等程式指令包含經組態以執行參考本揭露之圖描述及繪示之方法之一工具。因此,該工具經組態以執行步驟,諸如估測及提供結晶定向角及調諧一或多個半導體處理裝置之參數(例如,一植入器之傾斜角。)The processor 801 is configured to execute program instructions including a tool configured to perform the methods described and illustrated with reference to the figures of this disclosure. Accordingly, the tool is configured to perform steps such as estimating and providing crystallographic orientation angles and tuning parameters of one or more semiconductor processing devices (eg, the tilt angle of an implanter.)

網路介面803經組態以存取程式指令及透過一網路(未展示)遠端地儲存之由程式指令存取之資料。The network interface 803 is configured to access program instructions and data accessed by program instructions stored remotely over a network (not shown).

I/O裝置805包含經組態用於實現與系統800之使用者互動之一輸入裝置及一輸出裝置。在一些實施例中,輸入裝置包括例如一鍵盤、一滑鼠及其他裝置。輸出裝置包括例如一顯示器、一印表機及其他裝置。I/O device 805 includes an input device and an output device configured to enable user interaction with system 800 . In some embodiments, the input device includes, for example, a keyboard, a mouse, and other devices. Output devices include, for example, a display, a printer, and other devices.

儲存裝置807經組態用於儲存程式指令及由程式指令存取之資料。在一些實施例中,儲存裝置807包括一非暫時性電腦可讀儲存媒體,例如一磁碟及一光碟。Storage device 807 is configured to store program instructions and data accessed by program instructions. In some embodiments, the storage device 807 includes a non-transitory computer-readable storage medium, such as a magnetic disk and an optical disk.

記憶體809經組態以儲存待由處理器801執行之程式指令及由程式指令存取之資料。在一些實施例中,記憶體809包括一隨機存取記憶體(RAM)、某其他揮發性儲存裝置、一唯讀記憶體(ROM)及某其他非揮發性儲存裝置之任何組合。Memory 809 is configured to store program instructions to be executed by processor 801 and data accessed by the program instructions. In some embodiments, memory 809 includes any combination of a random access memory (RAM), some other volatile storage device, a read only memory (ROM), and some other non-volatile storage device.

根據一實施例,一種方法包含:接收一第一晶圓;在該第一晶圓上界定一第一區帶及一第二區帶;分別針對該第一區帶及該第二區帶界定複數個第一區域及第二區域;將第一離子束投射至該等第一區域上且回應於該等第一離子束而接收第一熱波;使該第一晶圓旋轉達一扭角;將第二離子束投射至該等第二區域上且回應於該等第二離子束而接收第二熱波;及基於該等第一離子束及該等第二離子束以及該等第一熱波及該等第二熱波估測該第一晶圓之一第一結晶定向角。According to one embodiment, a method includes: receiving a first wafer; defining a first zone and a second zone on the first wafer; defining for the first zone and the second zone, respectively a plurality of first regions and second regions; projecting a first ion beam onto the first regions and receiving a first thermal wave in response to the first ion beams; rotating the first wafer by a twist angle projecting a second ion beam onto the second regions and receiving a second thermal wave in response to the second ion beams; and based on the first and second ion beams and the first The thermal waves and the second thermal waves estimate a first crystal orientation angle of the first wafer.

根據一實施例,一種方法包含:在一第一晶圓上界定一第一區帶及一第二區帶;分別將第一離子束及第二離子束投射至該第一區帶及該第二區帶上;基於該等第一離子束及該等第二離子束估測該第一晶圓之一第一結晶定向角;在一第二晶圓上界定一第三區帶及一第四區帶;分別將第三離子束及第四離子束投射至該第三區帶及該第四區帶上;基於該等第三離子束及該等第四離子束估測該第二晶圓之一第二結晶定向角;及基於該第一結晶定向角及該第二結晶定向角估測一第三晶圓之一第三結晶定向角。According to one embodiment, a method includes: defining a first zone and a second zone on a first wafer; projecting a first ion beam and a second ion beam onto the first zone and the second zone, respectively on two zones; estimating a first crystal orientation angle of the first wafer based on the first ion beams and the second ion beams; defining a third zone and a first on a second wafer four zones; projecting a third ion beam and a fourth ion beam onto the third zone and the fourth zone, respectively; estimating the second crystal based on the third ion beams and the fourth ion beams a second crystal orientation angle of the circle; and a third crystal orientation angle of a third wafer is estimated based on the first crystal orientation angle and the second crystal orientation angle.

根據一實施例,一種方法包含:接收複數個晶圓;估測該複數個晶圓之結晶定向角;將該複數個晶圓根據其等結晶定向角分類為晶圓群組;從該等晶圓群組之一者選擇至少一個晶圓;及根據該等晶圓群組之該一者之一代表性結晶定向角對該至少一個晶圓執行一離子植入操作。According to one embodiment, a method includes: receiving a plurality of wafers; estimating crystallographic orientation angles of the plurality of wafers; classifying the plurality of wafers into wafer groups according to their isocrystalline orientation angles; one of the circle groups selects at least one wafer; and performs an ion implantation operation on the at least one wafer according to a representative crystallographic orientation angle of the one of the wafer groups.

前文概述若干實施例之特徵,使得熟習此項技術者可更好地理解本揭露之態樣。熟習此項技術者應瞭解,其等可容易地使用本揭露作為設計或修改用於實行本文中介紹之實施例之相同目的及/或達成相同優點之其他製程及結構之一基礎。熟習此項技術者亦應認知,此等等效構造不脫離本揭露之精神及範疇,且其等可在不脫離本揭露之精神及範疇的情況下在本文中進行各種改變、替換及更改。The foregoing has outlined features of several embodiments so that those skilled in the art may better understand aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments described herein. Those skilled in the art should also recognize that these equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they can make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.

100:方法 102:晶體生長操作 103:半導電鑄錠 103L:縱向軸 104:操作 108a:位置 108b:位置 108c:位置 110:半導體晶圓 110a:半導體晶圓 110b:半導體晶圓 110c:半導體晶圓 110L:結晶定向線 110L1:結晶定向線 110L2:結晶定向線 110L3:結晶定向線 110N:凹口 110R:目標線/參考線 110S:表面 110T:目標線/參考線 120:離子束 120P:路徑 130:凹口 200:方法 202:步驟 204:步驟 206:步驟 208:步驟 210:步驟 212:步驟 302:標記 310:第一區帶 312a至312e:第一區域 320:第二區帶 322a至322e:第二區域 402:第一離子束 404:第一熱波 412:第二離子束 414:第二熱波 500:示意圖/圖表 600:方法 602:步驟 604:步驟 606:步驟 608:步驟 610:步驟 612:步驟 614:步驟 616:步驟 618:步驟 620:步驟 622:步驟 700:方法 702:步驟 704:步驟 706:步驟 708:步驟 710:步驟 800:系統 801:處理器 803:網路介面 805:輸入及輸出(I/O)裝置 807:儲存器 808:匯流排 809:記憶體 N:法線 N1:法線 N2:法線 N3:法線 S1:對稱線 α:夾角 β:結晶定向角 β1 :夾角 β2 :夾角 β3 :夾角 θ:扭角 ω:晶圓傾斜角 ω1 :晶圓傾斜角 ω2 :晶圓傾斜角100: Method 102: Crystal Growth Operation 103: Semiconductive Ingot 103L: Longitudinal Axis 104: Operation 108a: Location 108b: Location 108c: Location 110: Semiconductor Wafer 110a: Semiconductor Wafer 110b: Semiconductor Wafer 110c: Semiconductor Wafer 110L: Crystal Orientation Line 110L1: Crystal Orientation Line 110L2: Crystal Orientation Line 110L3: Crystal Orientation Line 110N: Notch 110R: Target Line/Reference Line 110S: Surface 110T: Target Line/Reference Line 120: Ion Beam 120P: Path 130: Notches 200: Method 202: Step 204: Step 206: Step 208: Step 210: Step 212: Step 302: Marking 310: First Zone 312a to 312e: First Zone 320: Second Zone 322a to 322e: First Zone Second Region 402: First Ion Beam 404: First Thermal Wave 412: Second Ion Beam 414: Second Thermal Wave 500: Schematic/Diagram 600: Method 602: Step 604: Step 606: Step 608: Step 610: Step 612 :step 614:step 616:step 618:step 620:step 622:step 700:method 702:step 704:step 706:step 708:step 710:step 800:system 801:processor 803:network interface 805:input and output (I/O) device 807: storage 808: bus 809: memory N: normal N1: normal N2: normal N3: normal S1: symmetry line α: included angle β: crystal orientation angle β 1 : Included angle β 2 : Included angle β 3 : Included angle θ: Torsion angle ω: Wafer tilt angle ω 1 : Wafer tilt angle ω 2 : Wafer tilt angle

當結合附圖閱讀時,從以下實施方式更好理解本揭露之態樣。應注意,根據行業中之標準實踐,各種構件不按比例繪製。事實上,為清晰論述,各種構件之尺寸可任意增大或減小。Aspects of the present disclosure are better understood from the following description when read in conjunction with the accompanying drawings. It should be noted that in accordance with standard practice in the industry, the various components are not drawn to scale. In fact, the dimensions of the various components may be arbitrarily increased or decreased for clarity of discussion.

圖1A係展示根據一些實施例之形成半導體晶圓之一方法之一示意圖。FIG. 1A shows a schematic diagram of one method of forming a semiconductor wafer in accordance with some embodiments.

圖1B係展示根據一些實施例之投射至一半導體晶圓上之一離子束之一示意圖。Figure IB shows a schematic diagram of an ion beam projected onto a semiconductor wafer according to some embodiments.

圖2係根據一些實施例之估測一半導體晶圓之一結晶定向角之一方法之一流程圖。2 is a flowchart of a method of estimating a crystallographic orientation angle of a semiconductor wafer according to some embodiments.

圖3係展示根據一些實施例之具有分割區帶之一半導體晶圓之一表面之一示意圖。FIG. 3 is a schematic diagram showing a surface of a semiconductor wafer having dicing zones in accordance with some embodiments.

圖4係展示根據一些實施例之離子束投射之一示意圖。Figure 4 shows a schematic diagram of ion beam projection in accordance with some embodiments.

圖5係繪示根據一些實施例之熱波強度對晶圓傾斜角之一示意圖。5 is a schematic diagram illustrating thermal wave intensity versus wafer tilt angle according to some embodiments.

圖6係根據一些實施例之估測一半導體晶圓之一結晶定向角之一方法之一流程圖。6 is a flowchart of a method of estimating a crystallographic orientation angle of a semiconductor wafer according to some embodiments.

圖7係根據一些實施例之製造半導體裝置之一方法之一流程圖。7 is a flowchart of a method of fabricating a semiconductor device in accordance with some embodiments.

圖8係根據一些實施例之實施一結晶定向角估測方法之一系統之一示意圖。8 is a schematic diagram of a system for implementing a method of crystallographic orientation angle estimation according to some embodiments.

200:方法200: Method

202:步驟202: Steps

204:步驟204: Steps

206:步驟206: Steps

208:步驟208: Steps

210:步驟210: Steps

212:步驟212: Steps

Claims (10)

一種晶圓結晶定向角的估測方法,其包括:接收一第一晶圓;在該第一晶圓上界定一第一區帶及一第二區帶;分別針對該第一區帶及該第二區帶界定複數個第一區域及第二區域;將第一離子束投射至該等第一區域上且回應於該等第一離子束而接收第一熱波;使該第一晶圓旋轉達一扭角;將第二離子束投射至該等第二區域上且回應於該等第二離子束而接收第二熱波;及基於該等第一離子束及該等第二離子束以及該等第一熱波及該等第二熱波估測該第一晶圓之一第一結晶定向角。 A method for estimating a crystal orientation angle of a wafer, comprising: receiving a first wafer; defining a first zone and a second zone on the first wafer; A second zone defines a plurality of first and second regions; projecting a first ion beam onto the first regions and receiving a first thermal wave in response to the first ion beams; causing the first wafer rotating by a twist angle; projecting a second ion beam onto the second regions and receiving a second thermal wave in response to the second ion beams; and based on the first ion beams and the second ion beams and the first thermal waves and the second thermal waves estimate a first crystal orientation angle of the first wafer. 如請求項1之方法,其中將該等第一離子束投射至該等第一區域上包括在不同時間將該等第一離子束之各者投射至該等第一區域之各者上且使該第一晶圓傾斜達各自第一傾斜角,其中該等第一傾斜角具有一角度差。 The method of claim 1, wherein projecting the plasma first ion beam onto the first regions comprises projecting each of the plasma first ion beams onto each of the first regions at different times and causing the The first wafers are tilted by respective first tilt angles, wherein the first tilt angles have an angular difference. 如請求項1之方法,其中將該等第二離子束投射至該等第二區域上包括在不同時間將該等第二離子束之各者投射至該等第二區域之各者上且使該第一晶圓傾斜達各自第二傾斜角,其中該等第二傾斜角分離達以一第二差值。 The method of claim 1, wherein projecting the plasma second ion beam onto the second regions comprises projecting each of the plasma second ion beams onto each of the second regions at different times and causing The first wafers are tilted by respective second tilt angles, wherein the second tilt angles are separated by a second difference. 如請求項1之方法,其中估測該第一晶圓之一結晶定向角包括分別量測該等第一熱波及該等第二熱波之第一強度及第二強度。 The method of claim 1, wherein estimating a crystallographic orientation angle of the first wafer comprises measuring first and second intensities of the first thermal waves and the second thermal waves, respectively. 一種晶圓結晶定向角的估測方法,其包括:在一第一晶圓上界定一第一區帶及一第二區帶;分別將第一離子束及第二離子束投射至該第一區帶及該第二區帶上;基於該等第一離子束及該等第二離子束估測該第一晶圓之一第一結晶定向角;在一第二晶圓上界定一第三區帶及一第四區帶;分別將第三離子束及第四離子束投射至該第三區帶及該第四區帶上;基於該等第三離子束及該等第四離子束估測該第二晶圓之一第二結晶定向角;及基於該第一結晶定向角及該第二結晶定向角估測一第三晶圓之一第三結晶定向角。 A method for estimating a crystallographic orientation angle of a wafer, comprising: defining a first zone and a second zone on a first wafer; projecting a first ion beam and a second ion beam to the first zone and the second zone; estimate a first crystal orientation angle of the first wafer based on the first ion beams and the second ion beams; define a third zone and a fourth zone; project a third ion beam and a fourth ion beam onto the third zone and the fourth zone, respectively; estimate based on the third ion beam and the fourth ion beam measuring a second crystal orientation angle of the second wafer; and estimating a third crystal orientation angle of a third wafer based on the first crystal orientation angle and the second crystal orientation angle. 如請求項5之方法,其進一步包括形成一半導電鑄錠且切割該半導電鑄錠以形成該第一晶圓、該第二晶圓及該第三晶圓。 The method of claim 5, further comprising forming a semiconducting ingot and cutting the semiconducting ingot to form the first wafer, the second wafer, and the third wafer. 如請求項5之方法,其中將第一離子束及第二離子束投射至該第一區帶及該第二區帶上進一步包括將該等第一離子束之一者投射至該第一區帶 之一第一區域上且將該等第二離子束之一者投射至該第二區帶之一第二區域上,其中該等第一離子束之該一者及該等第二離子束之該一者具有相同能量及植入角。 The method of claim 5, wherein projecting a first ion beam and a second ion beam onto the first zone and the second zone further comprises projecting one of the first ion beams onto the first zone bring on a first region and one of the second ion beams of the plasma is projected onto a second region of the second zone, wherein the one of the first ion beams and the one of the second ion beams are The one has the same energy and implantation angle. 一種離子植入的方法,其包括:接收複數個晶圓;估測該複數個晶圓之結晶定向角,其中該估測包含將離子束投射至一第一晶圓中的第一區帶及該第二區帶上,該第一區帶及該第二區帶相對於該第一晶圓的對稱線彼此對稱;將該複數個晶圓根據其等結晶定向角分類為晶圓群組;從該等晶圓群組之一者選擇至少一個晶圓;及對該等晶圓群組之該者的該至少一個晶圓執行一離子植入操作。 A method of ion implantation comprising: receiving a plurality of wafers; estimating crystallographic orientation angles of the plurality of wafers, wherein the estimating includes projecting an ion beam onto a first zone in a first wafer and On the second zone, the first zone and the second zone are symmetrical with respect to the symmetry line of the first wafer; the plurality of wafers are classified into wafer groups according to their isocrystalline orientation angles; Selecting at least one wafer from one of the wafer groups; and performing an ion implantation operation on the at least one wafer of the one of the wafer groups. 如請求項8之方法,其進一步包括估測執行該離子植入操作之一植入器之一植入角,其中根據該植入角執行該離子植入操作。 9. The method of claim 8, further comprising estimating an implantation angle of an implanter performing the ion implantation operation, wherein the ion implantation operation is performed according to the implantation angle. 如請求項8之方法,其中該第一晶圓係一測試晶圓,其中該複數個晶圓之該等結晶定向角之該估測包括在估測其餘晶圓之該等結晶定向角之前估測該第一晶圓之一結晶定向角。 The method of claim 8, wherein the first wafer is a test wafer, wherein the estimating of the crystallographic orientation angles of the plurality of wafers comprises estimating the crystallographic orientation angles of the remaining wafers A crystal orientation angle of one of the first wafers is measured.
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