TWI769308B - Multilayer Ceramic Capacitors - Google Patents
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Abstract
本發明之課題在於提供一種可確保較高之燒結性之積層陶瓷電容器。 本發明之積層陶瓷電容器具備陶瓷坯體、第1及第2內部電極、以及第1及第2外部電極。陶瓷坯體具有沿單軸方向積層之複數層陶瓷層,且係以多晶體形成,該多晶體以包含鈣及鋯且由通式ABO3 所示之鈣鈦礦結構為主相,且含有矽、硼、及鋰。第1及第2內部電極係交替配置於複數層陶瓷層之間,且連接於第1及第2外部電極。於積層陶瓷電容器中,當將陶瓷坯體之體積設為V(mm3 ),將設多晶體中之主相之B位元素之濃度為100 atm%時之鋰濃度設為CLi (atm%)時,則滿足0.2858V+0.4371≦CLi ≦0.1306V+3.0391之關係。An object of the present invention is to provide a multilayer ceramic capacitor capable of ensuring high sinterability. The multilayer ceramic capacitor of the present invention includes a ceramic body, first and second inner electrodes, and first and second outer electrodes. The ceramic green body has a plurality of ceramic layers laminated along a uniaxial direction, and is formed of a polycrystal, and the polycrystal contains calcium and zirconium and has a perovskite structure represented by the general formula ABO 3 as a main phase, and contains silicon. , boron, and lithium. The first and second internal electrodes are alternately arranged between a plurality of ceramic layers, and are connected to the first and second external electrodes. In the multilayer ceramic capacitor, when the volume of the ceramic body is V (mm 3 ), the lithium concentration when the concentration of the B-site element in the main phase in the polycrystal is 100 atm% is C Li (atm% ), the relationship of 0.2858V+0.4371≦C Li ≦0.1306V+3.0391 is satisfied.
Description
本發明係關於一種可於高頻率區域利用之積層陶瓷電容器。The present invention relates to a multilayer ceramic capacitor which can be used in a high frequency region.
伴隨電子機器之高頻率化,對用於電子機器之積層陶瓷電容器要求高頻率區域中較高之Q值(Quality factor,品質係數)。例如於專利文獻1中,揭示有藉由使用比電阻較小之銅作為內部電極而實現Q值之提昇的積層陶瓷電容器。With the increase in frequency of electronic equipment, a high Q value (Quality factor) in a high frequency region is required for a multilayer ceramic capacitor used in electronic equipment. For example, Patent Document 1 discloses a multilayer ceramic capacitor that achieves an improvement in the Q value by using copper having a small specific resistance as an internal electrode.
將銅用作內部電極之積層陶瓷電容器之燒成溫度需要低於低熔點之銅之熔點。因此,於專利文獻1所記載之積層陶瓷電容器中,為了即便燒成溫度較低亦獲得充分之燒結性,而使用矽、硼、鋰等於燒成時形成液相之燒結助劑。 [先前技術文獻] [專利文獻]The firing temperature of a multilayer ceramic capacitor using copper as an internal electrode needs to be lower than the melting point of low-melting copper. Therefore, in the multilayer ceramic capacitor described in Patent Document 1, in order to obtain sufficient sinterability even at a low sintering temperature, silicon, boron, and lithium are used as sintering aids that form a liquid phase during sintering. [Prior Art Literature] [Patent Literature]
[專利文獻1]日本專利特開2009-7209號公報[Patent Document 1] Japanese Patent Laid-Open No. 2009-7209
[發明所欲解決之問題][Problems to be Solved by Invention]
然而,於積層陶瓷電容器之燒結過程中,易揮發之鋰之量發生變化。因此,為了充分獲得利用鋰而提昇燒結性之作用,必須遍及整個積層陶瓷電容器之燒結過程使鋰之量處於適當範圍內。However, during the sintering process of the multilayer ceramic capacitor, the amount of volatile lithium changes. Therefore, in order to fully obtain the effect of improving sinterability by utilizing lithium, it is necessary to keep the amount of lithium within an appropriate range throughout the sintering process of the multilayer ceramic capacitor.
鑒於如上之情況,本發明之目的在於提供一種可確保較高之燒結性之積層陶瓷電容器。 [解決問題之技術手段]In view of the above circumstances, an object of the present invention is to provide a multilayer ceramic capacitor capable of ensuring high sinterability. [Technical means to solve problems]
為了達成上述目的,本發明之一形態之積層陶瓷電容器具備陶瓷坯體、第1及第2內部電極、以及第1及第2外部電極。 上述陶瓷坯體具有沿單軸方向積層之複數層陶瓷層,且係以多晶體形成,上述多晶體以包含鈣及鋯且由通式ABO3 所示之鈣鈦礦結構為主相,且含有矽、硼、及鋰。 上述第1及第2內部電極係交替配置於上述複數層陶瓷層之間。 上述第1外部電極係設置於上述陶瓷坯體之外表面,且連接於上述第1內部電極。 上述第2外部電極係設置於上述陶瓷坯體之外表面,且連接於上述第2內部電極。 於上述積層陶瓷電容器中,當將上述陶瓷坯體之體積設為V(mm3 ),且將設上述多晶體中之上述主相之B位元素之濃度為100 atm%時之鋰濃度設為CLi (atm%),則滿足: 0.2901V+0.4068≦CLi ≦0.1306V+3.0391 之關係。In order to achieve the above-mentioned object, a multilayer ceramic capacitor according to an aspect of the present invention includes a ceramic body, first and second internal electrodes, and first and second external electrodes. The above-mentioned ceramic green body has a plurality of ceramic layers laminated in a uniaxial direction, and is formed of a polycrystal, and the above-mentioned polycrystal has a perovskite structure containing calcium and zirconium and represented by the general formula ABO 3 as a main phase, and contains Silicon, Boron, and Lithium. The first and second internal electrodes are alternately arranged between the plurality of ceramic layers. The first external electrode is provided on the outer surface of the ceramic body, and is connected to the first internal electrode. The second external electrode is provided on the outer surface of the ceramic body, and is connected to the second internal electrode. In the above-mentioned multilayer ceramic capacitor, the lithium concentration when the volume of the above-mentioned ceramic body is V (mm 3 ) and the concentration of the B-site element in the above-mentioned main phase in the above-mentioned polycrystal is 100 atm%. C Li (atm%), then satisfy the relationship of: 0.2901V+0.4068≦C Li ≦0.1306V+3.0391.
於該構成中,藉由控制燒結後之陶瓷坯體中之鋰之量,而可將燒結過程之陶瓷坯體中之鋰之量控制於適當範圍內。即,藉由以使陶瓷坯體中之鋰之量成為如上所述之方式製造該積層陶瓷電容器,而可確保陶瓷坯體之較高之燒結性。In this configuration, by controlling the amount of lithium in the ceramic body after sintering, the amount of lithium in the ceramic body during sintering can be controlled within an appropriate range. That is, by manufacturing the multilayer ceramic capacitor in such a manner that the amount of lithium in the ceramic body is as described above, the high sinterability of the ceramic body can be ensured.
將上述多晶體中之上述主相之B位元素之濃度設為100 atm%時之矽濃度亦可為1.0 atm%以上且6.0 atm%以下。 將上述多晶體中之上述主相之B位元素之濃度設為100 atm%時之硼濃度亦可為1.0 atm%以上且6.0 atm%以下。 於該構成中,可有效地獲得利用矽及硼提昇陶瓷坯體之燒結性之作用。When the concentration of the B-site element in the main phase in the polycrystal is set to 100 atm%, the silicon concentration may be 1.0 atm% or more and 6.0 atm% or less. The boron concentration may be 1.0 atm% or more and 6.0 atm% or less when the concentration of the B-site element in the main phase in the polycrystal is 100 atm%. In this configuration, the effect of utilizing silicon and boron to improve the sinterability of the ceramic body can be effectively obtained.
上述多晶體亦可進而含有錳。 將上述多晶體中之上述主相之B位元素之濃度設為100 atm%時之錳濃度亦可為0.5 atm%以上且5.5 atm%以下。 於該構成中,藉由錳之作用而提昇陶瓷坯體之絕緣性。因此,該積層陶瓷電容器可獲得較高之可靠性。The above-mentioned polycrystal may further contain manganese. The manganese concentration may be 0.5 atm% or more and 5.5 atm% or less when the concentration of the B-site element in the main phase in the polycrystal is 100 atm%. In this configuration, the insulating properties of the ceramic body are enhanced by the action of manganese. Therefore, the multilayer ceramic capacitor can obtain higher reliability.
上述第1及第2內部電極亦可以銅作為主成分。 於本發明中,即便燒成溫度較低亦可確保陶瓷坯體之燒結性。因此,該積層陶瓷電容器可使用熔點較低之銅作為第1及第2內部電極之主成分。藉此,第1及第2內部電極之導電性變高,因此可提昇積層陶瓷電容器之Q值。The above-mentioned first and second internal electrodes may be made of copper as a main component. In the present invention, even if the firing temperature is low, the sinterability of the ceramic green body can be ensured. Therefore, in this multilayer ceramic capacitor, copper having a relatively low melting point can be used as the main component of the first and second internal electrodes. Thereby, since the electrical conductivity of the 1st and 2nd internal electrodes becomes high, the Q value of a multilayer ceramic capacitor can be improved.
上述體積亦可為0.001 mm3 以上且5.000 mm3 以下。 上述體積亦可為0.001 mm3 以上且0.006 mm3 以下。 該等構成容易獲得如上述之本發明之效果。 [發明之效果]The above-mentioned volume may be 0.001 mm 3 or more and 5.000 mm 3 or less. The above-mentioned volume may be 0.001 mm 3 or more and 0.006 mm 3 or less. With these constitutions, it is easy to obtain the effects of the present invention as described above. [Effect of invention]
可提供可確保較高之燒結性之積層陶瓷電容器。Multilayer ceramic capacitors that ensure high sinterability are available.
以下,一面參照圖式,一面對本發明之實施形態進行說明。 於圖式中適當表示有相互正交之X軸、Y軸、及Z軸。X軸、Y軸、及Z軸於所有圖式中共通。Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the drawings, the X axis, the Y axis, and the Z axis which are orthogonal to each other are appropriately represented. The X-axis, Y-axis, and Z-axis are common to all drawings.
1.積層陶瓷電容器10之基本構成 圖1~3係表示本發明之一實施形態之積層陶瓷電容器10之圖。圖1係積層陶瓷電容器10之立體圖。圖2係積層陶瓷電容器10之沿圖1之A-A'線之剖視圖。圖3係積層陶瓷電容器10之沿圖1之B-B'線之剖視圖。1. Basic Configuration of Multilayer
積層陶瓷電容器10係以可較佳地於100 MHz~2 GHz左右之高頻率區域利用之方式構成,例如可用作高頻用介電共振器或濾波器等。具體而言,積層陶瓷電容器10係以兼具高頻率區域中之較高之Q值與較高之可靠性的方式構成。The multilayer
積層陶瓷電容器10包含陶瓷坯體11、第1外部電極14、及第2外部電極15。陶瓷坯體11之外表面包含朝向X軸方向之第1及第2端面E1、E2、朝向Y軸方向之第1及第2側面、以及朝向Z軸方向之第1及第2主面。The multilayer
再者,陶瓷坯體11之形狀並不限定於上述。即,陶瓷坯體11亦可並非如圖1~3之長方體形狀。例如,陶瓷坯體11之各面亦可為曲面,陶瓷坯體11亦可為整體帶弧度之形狀。In addition, the shape of the
第1外部電極14覆蓋陶瓷坯體11之第1端面E1。第2外部電極15覆蓋陶瓷坯體11之第2端面E2。外部電極14、15隔著陶瓷坯體11而於X軸方向上對向,作為積層陶瓷電容器10之端子發揮功能。The first
外部電極14、15自陶瓷坯體11之第1及第2端面E1、E2延伸至第1及第2主面、以及第1及第2側面。藉此,外部電極14、15與圖2所示之X-Z平面平行之截面、及與X-Y平面平行之截面均為U字狀。The
再者,外部電極14、15之形狀並不限定於圖1所示者。例如,外部電極14、15亦可自陶瓷坯體11之端面E1、E2僅向一主面延伸,與X-Z平面平行之截面成為L字狀。又,外部電極14、15亦可不延伸至任一主面及側面。Furthermore, the shapes of the
外部電極14、15係藉由良導電體形成。作為形成外部電極14、15之良導電體,例如可列舉以銅(Cu)、鎳(Ni)、錫(Sn)、鈀(Pd)、鉑(Pt)、銀(Ag)、金(Au)等為主成分之金屬或合金。The
陶瓷坯體11係以介電陶瓷形成。陶瓷坯體11具有被介電陶瓷覆蓋之第1內部電極12及第2內部電極13。內部電極12、13均為沿X-Y平面延伸之片狀,且沿Z軸方向交替配置。The ceramic
即,內部電極12、13隔著陶瓷層而於Z軸方向上對向。第1內部電極12被引出至陶瓷坯體11之第1端面E1,連接於第1外部電極14。第2內部電極13被引出至陶瓷坯體11之第2端面E2,連接於第2外部電極15。That is, the
藉由此種構成,於積層陶瓷電容器10中,當對第1外部電極14與第2外部電極15之間施加電壓時,電壓施加至第1內部電極12與第2內部電極13之間之複數層陶瓷層。藉此,於積層陶瓷電容器10中,儲存與第1外部電極14與第2外部電極15之間之電壓相應之電荷。With this configuration, in the multilayer
對於積層陶瓷電容器10,為了可於高頻率區域發揮穩定之性能,要求電容之溫度變化較小。因此,為了使各陶瓷層之電容之溫度變化變小,陶瓷坯體11必須使用介電常數之溫度變化較小之介電陶瓷。For the multilayer
因此,陶瓷坯體11係由多晶體形成,該多晶體形以包含介電常數之溫度變化較小之鈣(Ca)及鋯(Zr)、且由通式ABO3
(「A」表示A位元素,「B」表示B位元素)所示之鈣鈦礦結構為主相。鈣(Ca)為A位元素,鋯(Zr)為B位元素。具體而言,構成陶瓷坯體11之多晶體之主相較佳為Cax
ZrO3
(0.90≦x≦1.15)所示之組成。Therefore, the
再者,於構成陶瓷坯體11之多晶體之主相中,亦可視需要以其他元素取代鈣(Ca)及鋯(Zr)之一部分。例如,A位元素之鈣(Ca)之一部分亦可被鍶(Sr)取代。又,B位元素之鋯(Zr)之一部分亦可被鈦(Ti)取代。Furthermore, in the main phase of the polycrystal constituting the ceramic
又,構成陶瓷坯體11之多晶體含有矽(Si)、硼(B)、及鋰(Li)作為燒結助劑。該等元素於陶瓷坯體11之燒結過程形成液相。藉此,於積層陶瓷電容器10中,可提昇陶瓷坯體11之燒結性。Further, the polycrystal constituting the ceramic
於陶瓷坯體11之燒結過程中,易揮發之鋰(Li)之量發生變化。因此,為了充分獲得利用鋰(Li)提昇陶瓷坯體11之燒結性之作用,必須遍及整個陶瓷坯體11之燒結過程使鋰(Li)之量處於適當範圍內。During the sintering process of the ceramic
於本實施形態之積層陶瓷電容器10中,藉由控制燒結後之陶瓷坯體11中之鋰(Li)之量,而可將燒結過程之陶瓷坯體11中之鋰(Li)之量控制於適當範圍內。對於積層陶瓷電容器10之該構成之詳細情況將於下文敍述。In the multilayer
構成陶瓷坯體11之多晶體中之矽(Si)及硼(B)之量可適當決定。例如,矽(Si)及硼(B)之量較佳為於獲得陶瓷坯體11之較高之燒結性、且不易對積層陶瓷電容器10之性能造成影響之範圍內決定。The amounts of silicon (Si) and boron (B) in the polycrystal constituting the ceramic
具體而言,於構成陶瓷坯體11之多晶體中,較佳為當將主相之B位元素之濃度設為100 atm%時,矽(Si)濃度為1.0 atm%以上且6.0 atm%以下。又,於構成陶瓷坯體11之多晶體中,較佳為當將主相之B位元素之濃度設為100 atm%時,硼(B)濃度為1.0 atm%以上且6.0 atm%以下。Specifically, in the polycrystal constituting the
內部電極12、13係藉由良導電體形成,作為積層陶瓷電容器10之內部電極而發揮功能。內部電極12、13較佳為以銅(Cu)作為主成分。藉此,於積層陶瓷電容器中,內部電極12、13之導電性變高,因此ESR(Equivalent Series Resistance,等效串聯電阻)降低,獲得較高之Q值。The
再者,內部電極12、13亦可不以銅(Cu)作為主成分。於該情形時,內部電極12、13例如可藉由以選自鎳(Ni)、鈀(Pd)、鉑(Pt)、銀(Ag)、金(Au)之1種或2種以上作為主成分之金屬或合金形成。In addition, the
再者,本實施形態之積層陶瓷電容器10之基本構成不限定於圖1~3所示之構成,可適當變更。例如,內部電極12、13之片數或陶瓷層之厚度可根據對積層陶瓷電容器10要求之尺寸或性能而適當決定。In addition, the basic structure of the multilayer
2.積層陶瓷電容器10之製造方法 圖4係表示積層陶瓷電容器10之製造方法之流程圖。圖5、6係表示積層陶瓷電容器10之製造過程之圖。以下,對於積層陶瓷電容器10之製造方法,一面按照圖4並適當參照圖5、6一面進行說明。2. Manufacturing method of multilayer
2.1 步驟S01:陶瓷坯體製作 於步驟S01中,製作未燒成之陶瓷坯體11。如圖5所示,未燒成之陶瓷坯體11係藉由將複數片陶瓷坯片於Z軸方向上積層並進行熱壓接合而獲得。藉由對陶瓷坯片預先印刷特定圖案之銅漿而可配置內部電極12、13。2.1 Step S01: Fabrication of the ceramic body In step S01, the unfired
陶瓷坯片係將陶瓷漿料成形為片狀而成之未燒成之介電坯片。陶瓷坯片例如係使用輥式塗佈機或刮刀等而成形為片狀。陶瓷漿料之成分係以獲得上述組成之陶瓷坯體11之方式調整。The ceramic green sheet is an unfired dielectric green sheet obtained by molding a ceramic slurry into a sheet shape. The ceramic green sheet is formed into a sheet shape using, for example, a roll coater, a doctor blade, or the like. The composition of the ceramic slurry is adjusted so as to obtain the ceramic
具體而言,陶瓷漿料中包含介電陶瓷之煅燒粉、SiO2 等含矽(Si)粉末、BN等含硼(B)粉末、Li2 CO3 等含鋰(Li)粉末等。又,陶瓷漿料亦可包含MnCO3 等含錳(Mn)粉末。Specifically, the ceramic slurry includes calcined powder of dielectric ceramics, silicon (Si) powder such as SiO 2 , boron (B) powder such as BN, and lithium (Li) powder such as Li 2 CO 3 . In addition, the ceramic slurry may contain manganese (Mn)-containing powder such as MnCO 3 .
2.2 步驟S02:燒成 於步驟S02中,對步驟S01中獲得之未燒成之陶瓷坯體11進行燒成。藉此,陶瓷坯體11燒結,獲得圖6所示之陶瓷坯體11。陶瓷坯體11之燒成例如可於還原性氣氛下或低氧分壓氣氛下進行。陶瓷坯體11之燒成條件可適當決定。2.2 Step S02: Firing In step S02, the unfired
由於例如於陶瓷坯體11之燒成時鋰(Li)會揮發,因而較佳為以使燒成後之陶瓷坯體11中保留適當之量之鋰(Li)之方式調整燒成條件。又,燒成溫度較佳為低於作為內部電極12、13之主成分之銅(Cu)之熔點(1084℃),例如可設為950℃。又,燒成時間例如可設為2小時。For example, since lithium (Li) volatilizes during firing of the
2.3 步驟S03:外部電極形成 於步驟S03中,藉由於步驟S02中獲得之陶瓷坯體11形成外部電極14、15而製作圖1~3所示之積層陶瓷電容器10。於步驟S03中,例如於陶瓷坯體11之端面E1、E2形成構成外部電極14、15之基底膜、中間膜、及表面膜。2.3 Step S03: Formation of External Electrodes In step S03, by forming
更詳細而言,於步驟S03中,首先以覆蓋陶瓷坯體11之端面E1、E2之方式塗佈未燒成之電極材料。藉由例如於還原性氣氛下或低氧分壓氣氛下對所塗佈之未燒成之電極材料進行燒附,而於陶瓷坯體11形成外部電極14、15之基底膜。More specifically, in step S03 , first, the unfired electrode material is applied so as to cover the end faces E1 and E2 of the ceramic
然後,於燒附於陶瓷坯體11之外部電極14、15之基底膜之上形成外部電極14、15之中間膜,進而形成外部電極14、15之表面膜。形成外部電極14、15之中間膜及表面膜時例如可使用電解鍍覆等濕式鍍覆。Then, the intermediate films of the
再者,亦可於步驟S02前進行上述步驟S03中之處理之一部分。例如亦可於步驟S02之前於未燒成之陶瓷坯體11之端面E1、E2塗佈未燒成之電極材料。藉此,可於步驟S02中同時進行陶瓷坯體11之燒成與電極材料之燒附。Furthermore, a part of the processing in the above-mentioned step S03 may also be performed before the step S02. For example, before step S02, the end faces E1 and E2 of the unfired
3.陶瓷坯體11中之鋰(Li)之量 於積層陶瓷電容器10中,若陶瓷坯體11之燒結性不充分,則例如會產生Q值之降低、或尤其是耐濕性等可靠性之降低等。為了以較低之燒成溫度確保陶瓷坯體11之高燒結性,而必須使陶瓷坯體11包含適當之量之矽(Si)、硼(B)、鋰(Li)。3. The amount of lithium (Li) in the
於陶瓷坯體11之燒結過程中,矽(Si)與硼(B)之量不易發生變化,與此相對,易揮發之鋰(Li)之量會發生變化。因此,為了遍及整個陶瓷坯體11之燒結過程充分獲得利用鋰(Li)所得之作用,而必須將鋰(Li)之量控制於適當之範圍內。During the sintering process of the ceramic
於本實施形態之積層陶瓷電容器10中,藉由控制燒結後之陶瓷坯體11中之鋰(Li)之量,而可將燒結過程之陶瓷坯體11中之鋰(Li)之量控制於適當範圍內。藉此,於積層陶瓷電容器10中,確保陶瓷坯體11之高燒結性。In the multilayer
又,觀察到於陶瓷坯體11中,燒結後之鋰(Li)之適當之量之範圍根據體積變化的傾向。更詳細而言,經實驗確認,存在陶瓷坯體11體積越大則需要越多燒結後之鋰(Li)之量的傾向。Moreover, in the ceramic
以下,對用以解析燒結後之陶瓷坯體11之鋰(Li)之適當之量之範圍的實驗進行說明。於該實驗中,首先製作多個陶瓷坯體11之體積、及陶瓷坯體11中之鋰(Li)之量不同之積層陶瓷電容器10之樣品。Hereinafter, an experiment for analyzing the range of an appropriate amount of lithium (Li) in the ceramic
可使用圖2、3所示之X軸方向之尺寸L(mm)、Y軸方向之尺寸W(mm)、及Z軸方向之尺寸T(mm),藉由L×W×T而計算出包含內部電極12、13之體積作為陶瓷坯體11之體積V(mm3
)。陶瓷坯體11之各尺寸L、W、T係於陶瓷坯體11之X軸、Y軸、及Z軸方向之中央部測定。The dimension L (mm) in the X-axis direction, the dimension W (mm) in the Y-axis direction, and the dimension T (mm) in the Z-axis direction as shown in Figures 2 and 3 can be used to calculate by L×W×T The volume including the
陶瓷坯體11中之鋰(Li)之量係作為將構成陶瓷坯體11之多晶體之主相之B位元素之濃度設為100 atm%時的鋰(Li)濃度CLi
(atm%)而算出。構成陶瓷坯體11之多晶體之主相之B位元素之濃度例如可作為鋯(Zr)濃度而獲得。The amount of lithium (Li) in the
即,鋰(Li)濃度CLi 表示以鋯(Zr)濃度為基準之相對之鋰(Li)之濃度。鋯(Zr)及鋰(Li)之濃度可藉由感應耦合電漿(ICP:Inductively Coupled Plasma)發光分析而測定。That is, the lithium (Li) concentration C Li represents the relative lithium (Li) concentration based on the zirconium (Zr) concentration. The concentrations of zirconium (Zr) and lithium (Li) can be measured by inductively coupled plasma (ICP: Inductively Coupled Plasma) luminescence analysis.
對各樣品進行Q值及耐濕性之評價。於本實驗中,藉由Q值及耐濕性之評價而間接地對陶瓷坯體11之燒結性進行評價。Q值之評價係於頻率1 GHz之條件下進行。耐濕性之評價係以於溫度85℃、濕度85%下施加額定電壓2倍之電壓200小時的條件進行。The Q value and the moisture resistance were evaluated for each sample. In this experiment, the sinterability of the ceramic
於Q值之評價中,將規格值1.5倍以上之樣品設為合格。於耐濕性之評價中,將電阻值為10 MΩ以上之樣品設為合格。並且,將Q值及耐濕性之評價均合格之樣品視為陶瓷坯體11之燒結性充分者而列為實施例。另一方面,將Q值及耐濕性之評價之至少一方不合格之樣品視為陶瓷坯體11之燒結性不充分而列為比較例。In the evaluation of the Q value, a sample having a specification value of 1.5 times or more was considered acceptable. In the evaluation of moisture resistance, a sample having a resistance value of 10 MΩ or more was regarded as acceptable. In addition, the samples which passed the evaluations of the Q value and the moisture resistance were regarded as those having sufficient sinterability of the ceramic
圖7係表示各樣品之評價結果之曲線圖。圖7之橫軸表示陶瓷坯體11之體積V。圖7之縱軸表示當將構成陶瓷坯體11之多晶體之主相之B位元素之濃度設為100 atm%時的鋰(Li)濃度CLi
。又,以圓點作圖表示實施例,以叉點作圖表示比較例。FIG. 7 is a graph showing the evaluation results of each sample. The horizontal axis of FIG. 7 represents the volume V of the ceramic
根據圖7,可知實施例之作圖分佈於鋰(Li)濃度CLi
之特定範圍內,比較例之作圖分佈於該範圍之上下。因此,藉由採用實施例之作圖所分佈之範圍之條件,而可確保陶瓷坯體11之較高之燒結性。According to FIG. 7 , it can be seen that the plots of the embodiment are distributed in a specific range of the lithium (Li) concentration C Li , and the plots of the comparative example are distributed above and below this range. Therefore, by using the conditions of the range distributed in the drawing of the embodiment, the high sinterability of the ceramic
於圖7中,表示藉由以最小平方法對構成實施例之作圖所分佈之範圍之最上部的作圖進行擬合而獲得之曲線。該曲線係以「CLi =0.1306V+3.0391」表示。再者,決定係數R2 為0.9489,可良好擬合。In FIG. 7, the curve obtained by fitting the uppermost plot of the range over which the plot of the embodiment is distributed is fitted by the least squares method. This curve is represented by "C Li =0.1306V+3.0391". In addition, the coefficient of determination R 2 was 0.9489, which was a good fit.
又,於圖7中,表示藉由以最小平方法對構成實施例之作圖所分佈之範圍之最下部的作圖進行擬合而獲得之曲線。該曲線係以「CLi =0.2858V+0.4371」表示。再者,決定係數R2 為0.9777,可良好擬合。Moreover, in FIG. 7, the curve obtained by fitting the plot of the lowermost part of the range in which the plot which comprises an Example is distributed by the least squares method is shown. This curve is represented by "C Li =0.2858V+0.4371". In addition, the coefficient of determination R 2 was 0.9777, which was a good fit.
因此,圖7中之實施例之作圖所分佈之範圍可利用以下之式表示。 0.2858V+0.4371≦CLi
≦0.1306V+3.0391 即,藉由以滿足該式之關係之方式製作積層陶瓷電容器10之陶瓷坯體11,可確保其較高之燒結性。Therefore, the distribution range of the mapping of the embodiment in FIG. 7 can be expressed by the following formula. 0.2858V+0.4371≦C Li ≦0.1306V+3.0391 That is, by producing the
又,以上述式為基準之陶瓷坯體11之燒結性之控制於陶瓷坯體11之體積V為0.001 mm3
以上且5.000 mm3
以下之情形時更有效,於陶瓷坯體11之體積V為0.001 mm3
以上且0.006 mm3
以下之情形時更進一步有效。In addition, the control of the sinterability of the
4.其他實施形態 以上,對本發明之實施形態進行了說明,但毋庸置疑本發明並不限定於上述實施形態,可施加各種變更。4. Other Embodiments The embodiments of the present invention have been described above, but it goes without saying that the present invention is not limited to the above-described embodiments, and various modifications can be added.
10‧‧‧積層陶瓷電容器11‧‧‧陶瓷坯體12‧‧‧內部電極13‧‧‧內部電極14‧‧‧外部電極15‧‧‧外部電極E1‧‧‧端面E2‧‧‧端面L‧‧‧X軸方向之尺寸W‧‧‧Y軸方向之尺寸T‧‧‧Z軸方向之尺寸10‧‧‧Multilayer
圖1係本發明之一實施形態之積層陶瓷電容器之立體圖。 圖2係上述積層陶瓷電容器之沿圖1之A-A'線之剖視圖。 圖3係上述積層陶瓷電容器之沿圖1之B-B'線之剖視圖。 圖4係表示上述積層陶瓷電容器之製造方法之流程圖。 圖5係步驟S01中之陶瓷坯體之分解立體圖。 圖6係步驟S02中獲得之陶瓷坯體之立體圖。 圖7係表示實施例及比較例中之評價結果之曲線圖。FIG. 1 is a perspective view of a multilayer ceramic capacitor according to an embodiment of the present invention. FIG. 2 is a cross-sectional view of the multilayer ceramic capacitor described above, taken along line AA' of FIG. 1 . FIG. 3 is a cross-sectional view of the multilayer ceramic capacitor described above along the line BB' in FIG. 1 . FIG. 4 is a flowchart showing a method of manufacturing the above-mentioned multilayer ceramic capacitor. FIG. 5 is an exploded perspective view of the ceramic body in step S01. FIG. 6 is a perspective view of the ceramic green body obtained in step S02. FIG. 7 is a graph showing evaluation results in Examples and Comparative Examples.
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