JP7169069B2 - Multilayer ceramic capacitor and manufacturing method thereof - Google Patents

Description

The present invention relates to a multilayer ceramic capacitor and its manufacturing method.

In recent years, along with the miniaturization of electronic devices such as smart phones and mobile phones, the miniaturization of electronic components mounted therein has progressed rapidly. For example, in multilayer ceramic capacitors, there is a demand for thinner dielectric layers and internal electrode layers in order to reduce the chip size while ensuring predetermined characteristics.

However, there is a problem that the sintering temperature of the metal of the internal electrode layers and the ceramic of the dielectric layers are different, and the continuity rate of the internal electrode layers after sintering is lowered. If the thickness of the internal electrode layer is reduced, there is concern that the continuity rate will further decrease. Therefore, it is known to add a ceramic co-material to the internal electrode layers in order to provide a shrinkage retarding effect (see, for example, Patent Document 1).

JP 2014-082435 A

However, since the common material tends to diffuse into the dielectric layers during the sintering process, it is difficult to sufficiently suppress the decrease in continuity of the internal electrode layers.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a multilayer ceramic capacitor capable of suppressing a decrease in the continuity of internal electrode layers, and a method of manufacturing the same.

A multilayer ceramic capacitor according to the present invention has a laminated structure in which dielectric layers containing ceramic as a main component and internal electrode layers containing a metal as a main component are alternately laminated, and the thickness of the internal electrode layer is 0.3 μm or less, particles containing ceramic as a main component are present in the internal electrode layers, and the particles are present in the cross section of the internal electrode layers in the lamination direction of the dielectric layers and the internal electrode layers. At least two metal crystal grains are present in contact with any adjacent dielectric layer in the area ratio of 10% or more where the particles are present in the internal electrode layers. and the two metal crystal grains are arranged in contact with each other in the extending direction of the internal electrode layer, and the two metal crystal grains form a crystal grain boundary extending between the adjacent dielectric layers, and are arranged at the crystal grain boundary, and the grains are not present in each of the upper and lower 5% regions in the thickness direction of the internal electrode layer.

In the laminated ceramic capacitor described above, the main component metal of the internal electrode layers may be nickel.

In the above laminated ceramic capacitor, the main component ceramic of the particles may be barium titanate.

In the above laminated ceramic capacitor, the dielectric layers may be made of barium titanate as a main component ceramic.

In the above laminated ceramic capacitor, the area ratio is defined by the total area of ten internal electrode layers arbitrarily selected using a cross-sectional SEM image of the internal electrode layers, and the total area of the particles in the ten internal electrode layers. It can also be obtained from the total area.

In the method for manufacturing a multilayer ceramic capacitor according to the present invention, a metal powder having an average particle diameter of 100 nm or less and a standard deviation of the particle size distribution of 15 or less is placed as a main component on a green sheet containing ceramic powder, and the average particle diameter is 10 nm or less. A first step of arranging a pattern of a metal conductive paste containing a ceramic powder having a standard deviation of particle size distribution of 5 or less as a common material, and a ceramic laminate obtained by laminating a plurality of lamination units obtained in the first step. a second step of sintering the body to form internal electrode layers by sintering the metal powder, and forming dielectric layers by sintering the ceramic powder of the green sheets; The thickness is 0.3 μm or less, and the area ratio of particles containing ceramic as a main component is 10% or more in the cross section of the internal electrode layer in the stacking direction of the internal electrode layer and the dielectric layer. wherein at least two metal crystal grains are present in contact with any adjacent dielectric layer in the area ratio of 10% or more where the grains are present in the internal electrode layers, and the two metal crystal grains are are arranged in contact with each other in the extending direction of the internal electrode layers, the two metal crystal particles form a crystal grain boundary extending between the adjacent dielectric layers, and the particles are arranged in the crystal grain boundary. The second step is performed as described above, and the particles are not present in the upper and lower 5% regions in the thickness direction of the internal electrode layer.

In the method for manufacturing a laminated ceramic capacitor described above, in the second step, the average temperature increase rate from room temperature to the maximum temperature may be 30° C./min or more and 80° C./min or less.

In the above method for manufacturing a multilayer ceramic capacitor, the metal powder may contain nickel as a main component.

In the above method for manufacturing a multilayer ceramic capacitor, the common material may contain barium titanate as a main component.

In the above method for manufacturing a multilayer ceramic capacitor, the ceramic powder of the green sheets may contain barium titanate as a main component.

In the above method for manufacturing a laminated ceramic capacitor, the area ratio is defined as the total area of the ten internal electrode layers arbitrarily selected using a cross-sectional SEM image of the internal electrode layers, and the total area of the ten internal electrode layers. It may be determined from the total area of the particles.

ADVANTAGE OF THE INVENTION According to this invention, the laminated ceramic capacitor which can suppress the continuity rate fall of an internal electrode layer, and its manufacturing method can be provided.

1 is a partial cross-sectional perspective view of a laminated ceramic capacitor; FIG. It is a figure showing a continuity rate. (a) is a diagram illustrating an internal electrode layer with a large crystal grain size, and (b) is a diagram illustrating an internal electrode layer with a small crystal grain size. It is a figure which illustrates the flow of the manufacturing method of a laminated ceramic capacitor. (a) is a diagram showing the particle size distribution of the main component metal of the conductive paste for forming internal electrodes in Examples and Comparative Examples, and (b) is the particle size of the common material of the conductive pastes for forming internal electrodes in Examples and Comparative Examples. FIG. 4 is a diagram showing distribution; (a) and (b) are diagrams showing SEM photographs of cross sections in the stacking direction of dielectric layers and internal electrode layers, and (c) is a diagram showing the area ratio of particles containing ceramic as a main component. . It is a figure which shows the result of an Example and a comparative example. 4 is a graph showing evaluation results of permittivity;

Hereinafter, embodiments will be described with reference to the drawings.

(embodiment)
FIG. 1 is a partial cross-sectional perspective view of a laminated ceramic capacitor 100 according to an embodiment. As illustrated in FIG. 1, a multilayer ceramic capacitor 100 includes a rectangular parallelepiped multilayer chip 10 and external electrodes 20a and 20b provided on two opposing end surfaces of the multilayer chip 10. As shown in FIG. Of the four surfaces of the laminated chip 10 other than the two end surfaces, two surfaces other than the top surface and the bottom surface in the stacking direction are referred to as side surfaces. The external electrodes 20a and 20b extend on the upper surface, lower surface and two side surfaces of the laminated chip 10 in the lamination direction. However, the external electrodes 20a and 20b are separated from each other.

The laminated chip 10 has a structure in which dielectric layers 11 mainly composed of a ceramic material functioning as a dielectric and internal electrode layers 12 mainly composed of a metal material such as a base metal material are alternately laminated. The edge of each internal electrode layer 12 is alternately exposed to the end face provided with the external electrode 20a of the laminated chip 10 and the end face provided with the external electrode 20b. Thereby, each internal electrode layer 12 is alternately connected to the external electrode 20a and the external electrode 20b. As a result, the multilayer ceramic capacitor 100 has a configuration in which a plurality of dielectric layers 11 are laminated with internal electrode layers 12 interposed therebetween. In the laminated body of the dielectric layers 11 and the internal electrode layers 12 , the internal electrode layer 12 is arranged as the outermost layer in the lamination direction, and the upper and lower surfaces of the laminated body are covered with the cover layer 13 . The cover layer 13 is mainly composed of a ceramic material. For example, the material of the cover layer 13 is the same as the main component of the dielectric layer 11 and the ceramic material.

The size of the multilayer ceramic capacitor 100 is, for example, length 0.2 mm, width 0.125 mm, and height 0.125 mm, or length 0.4 mm, width 0.2 mm, height 0.2 mm, or length 0.6 mm, 0.3 mm wide and 0.3 mm high; or 1.0 mm long, 0.5 mm wide and 0.5 mm high; or 3.2 mm long, 1.6 mm wide and 0.5 mm high. 1.6 mm in height, or 4.5 mm in length, 3.2 mm in width and 2.5 mm in height, but are not limited to these sizes.

The internal electrode layers 12 are mainly composed of base metals such as Ni (nickel), Cu (copper), and Sn (tin). As the internal electrode layer 12, noble metals such as Pt (platinum), Pd (palladium), Ag (silver), and Au (gold) or alloys containing these may be used as the main component. The thickness of the internal electrode layer 12 is, for example, 0.5 μm or less, preferably 0.3 μm or less. The dielectric layer 11 is mainly composed of, for example, a ceramic material having a perovskite structure represented by the general formula _ABO3 . Note that the perovskite structure contains ABO _3-α deviating from the stoichiometric composition. For example, the ceramic materials include BaTiO ₃ (barium titanate), CaZrO ₃ (calcium zirconate), CaTiO ₃ (calcium titanate), SrTiO ₃ (strontium titanate), and Ba _1-xy forming a perovskite structure. Ca _x Sr _y Ti _1-z Zr _z O ₃ (0≦x≦1, 0≦y≦1, 0≦z≦1) and the like can be used.

In order to reduce the size and increase the capacity of the multilayer ceramic capacitor 100, thinning of the dielectric layers 11 and the internal electrode layers 12 is required. However, when it is attempted to thin the internal electrode layers 12, it becomes difficult to maintain a high degree of continuity. This is for the following reasons. When the internal electrode layer 12 is obtained by sintering metal powder, it becomes spherical as sintering progresses in an attempt to minimize the surface energy. Since the sintering of the metal components of the internal electrode layers 12 proceeds more easily than the main component ceramic of the dielectric layers 11, if the temperature is raised until the main component ceramic of the dielectric layers 11 is sintered, the metal components of the internal electrode layers 12 will be sintered. becomes oversintered and tends to be spheroidized. In this case, if there is a breakage (defect), the internal electrode layer 12 is cut from the defect, and the continuity rate is lowered. As the dielectric layers 11 and the internal electrode layers 12 become thinner, the continuity rate may further decrease.

Therefore, it is conceivable to delay the shrinkage of the internal electrode layers 12 by adding a common material containing ceramic as a main component to the internal electrode layers 12 . However, if the common material is discharged to the dielectric layer 11 side due to diffusion during the sintering process, it is difficult to suppress the decrease in the continuity rate. In addition, since the common material is absorbed by the dielectric layer 11, the A/B ratio of the material in the dielectric layer 11 (the ratio of the A site and the B site of perovskite), the deviation of the composition, and the dielectric constant ε are different from the design values. A different value may result, and the target capacitance value may not be obtained.

FIG. 2 is a diagram showing the continuity rate. As exemplified in FIG. 2, in an observation region of length L0 in a certain internal electrode layer 12, the lengths L1, L2, . ΣLn/L0 can be defined as the continuity of the layer.

Therefore, in the present embodiment, the crystal grain size of the internal electrode layers 12 is reduced. FIG. 3A is a diagram illustrating the internal electrode layer 12 when the crystal grain size is large. FIG. 3B is a diagram illustrating the internal electrode layer 12 when the crystal grain size is small. As illustrated in FIGS. 3A and 3B, when the crystal grains 14 become smaller, the common material tends to remain in the internal electrode layers 12 . For example, as the crystal grains 14 become smaller, the number of crystal grain boundaries 16 increases, and the common material remains in the crystal grain boundaries 16, so that many particles 15 containing ceramic as a main component exist in the entire internal electrode layer 12. It is thought that Specifically, in the cross section of the internal electrode layer 12 in the stacking direction of the dielectric layer 11 and the internal electrode layer 12, the area ratio of the particles 15 is set to 10% or more. For example, the cross section is taken along a plane defined by the lamination direction of the dielectric layers 11 and the internal electrode layers 12 and the facing direction of the external electrodes 20a and 20b. In this configuration, the residual amount of the common material increases. As a result, oversintering of the metal components of the internal electrode layers 12 during sintering is suppressed, and breakage of the internal electrode layers 12 is suppressed. As a result, a decrease in the continuity rate of the internal electrode layers 12 can be suppressed. In addition, the diffusion of the common material into the dielectric layer 11 is suppressed, the deviation of the A/B ratio and composition of the material in the dielectric layer 11 and the decrease of the dielectric constant ε are suppressed, and the desired dielectric characteristics are secured. can be done. As a result, deterioration of bias characteristics is suppressed, and high capacity is obtained. The area ratio is preferably 12% or more, more preferably 14% or more. Note that the above area ratio is obtained by using a cross-sectional SEM image of the internal electrode layer 12, for example, the total area of the arbitrarily selected 10 internal electrode layers 12, and the total area of the 10 internal electrode layers 12. It can be obtained from the total area of the particles 15 whose main component is ceramic. Although the area ratio may vary between two different internal electrode layers 12 due to manufacturing errors, etc., the area ratio can be calculated using 10 arbitrarily selected internal electrode layers 12. In this way, variation can be suppressed. Such areas may be calculated using image analysis software.

When the common material does not diffuse into the dielectric layers 11 and remains sufficiently in the internal electrode layers 12 , the common material gathers in the internal electrode layers 12 . More specifically, it is considered that the common material near the central portion of the internal electrode layer 12 gathers the surrounding common material and grains grow. As a result, it remains in the central portion of the internal electrode layer 12 in the thickness direction. In this case, in the thickness direction of the internal electrode layer 12, the particles 15 do not exist in 5% of the upper and lower portions. Therefore, in the thickness direction of the internal electrode layer 12, it is preferable that the particles 15 do not exist in the upper and lower 5% regions.

Next, a method for manufacturing the laminated ceramic capacitor 100 will be described. FIG. 4 is a diagram illustrating the flow of the manufacturing method of the multilayer ceramic capacitor 100. As shown in FIG.

(Raw material powder preparation process)
First, as illustrated in FIG. 4, a dielectric material for forming the dielectric layer 11 is prepared. The A-site and B-site elements contained in the dielectric layer 11 are usually contained in the dielectric layer 11 in the form of sintered particles of _ABO3 . For example, BaTiO ₃ is a tetragonal compound with a perovskite structure and exhibits a high dielectric constant. This BaTiO ₃ can generally be obtained by reacting a titanium raw material such as titanium dioxide with a barium raw material such as barium carbonate to synthesize barium titanate. As methods for synthesizing the ceramic constituting the dielectric layer 11, various methods are conventionally known, such as a solid phase method, a sol-gel method, a hydrothermal method, and the like. Any of these can be employed in the present embodiment.

A predetermined additive compound is added to the obtained ceramic powder according to the purpose. Additive compounds include Mn (manganese), V (vanadium), Cr (chromium), rare earth elements (Y (yttrium), Dy (dysprosium), Tm (thulium), Ho (holmium), Tb (terpium), Yb ( ytterbium), Sm (samarium), Eu (eurobium), Gd (gadolinium), and Er (erbium)) oxides, as well as Co (cobalt), Ni (nickel), Li (lithium), B (boron), Na (sodium), K (potassium) and Si (silicon) oxides or glasses are included.

In this embodiment, preferably, a compound containing an additive compound is first mixed with ceramic particles forming the dielectric layer 11 and calcined at 820 to 1150.degree. The resulting ceramic particles are then wet mixed with additive compounds, dried and ground to prepare a ceramic powder. For example, the average particle size of the ceramic powder is preferably 50 to 300 nm from the viewpoint of thinning the dielectric layer 11 . For example, the ceramic powder obtained as described above may be pulverized to adjust the particle size, or combined with a classification process to adjust the particle size.

(Lamination process)
Next, a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer such as dioctyl phthalate (DOP) are added to the obtained dielectric material and wet-mixed. Using the obtained slurry, for example, a strip-shaped dielectric green sheet having a thickness of 0.8 μm or less is coated on a base material by, for example, a die coater method or a doctor blade method, and dried.

Next, by printing a metal conductive paste for forming internal electrodes containing an organic binder on the surface of the dielectric green sheet by screen printing, gravure printing, etc., the internal electrodes are alternately led out to a pair of external electrodes having different polarities. Lay out the layer pattern. For the metal material of the metal conductive paste, for example, one having an average particle size of 100 nm or less is used. Also, the standard deviation of the particle size is 15 or less. This gives a sharp particle size distribution. The average particle size is preferably 100 nm or less, more preferably 70 nm or less. The standard deviation of the particle size is preferably 15 or less, more preferably 12 or less. Also, the slope of the cumulative particle size distribution is preferably 8 or more. The slope of the cumulative particle size distribution can be defined as the slope between D20 and D80 (=1/(logD80-logD20) by logarithmically plotting the cumulative particle size distribution.

In addition, ceramic particles are added to the metal conductive paste as a common material. Although the main component ceramic of the ceramic particles is not particularly limited, it is preferably the same as the main component ceramic of the dielectric layer 11 . For example, barium titanate may be uniformly dispersed. For the common material, for example, one having an average particle size of 10 nm or less is used. Also, the standard deviation of the particle size is set to 5 or less. This gives a sharp particle size distribution. The average particle size is preferably 15 nm or less, more preferably 10 nm or less. The standard deviation of the particle size is preferably 5 or less, more preferably 3 or less. Moreover, the slope of the cumulative particle size distribution is preferably 7 or more. The slope of the cumulative particle size distribution can be defined as the slope between D20 and D80 (=1/(logD80-logD20) by logarithmically plotting the cumulative particle size distribution.

After that, the dielectric green sheet on which the internal electrode layer pattern is printed is punched into a predetermined size, and the punched dielectric green sheet is separated into the internal electrode layer 12 and the dielectric layer 11 in a state where the substrate is peeled off. are alternately arranged, and the edges of the internal electrode layers 12 are alternately exposed on both end surfaces in the length direction of the dielectric layer 11, and are alternately led out to a pair of external electrodes 20a and 20b having different polarities. A predetermined number of layers (for example, 100 to 500 layers) are laminated. A cover sheet to be the cover layer 13 is crimped to the top and bottom of the laminated dielectric green sheets, cut into a predetermined chip size (for example, 1.0 mm x 0.5 mm), and then a metal to be the underlying layer of the external electrodes 20a and 20b. A conductive paste is applied to both end surfaces of the cut laminate by a dipping method or the like and dried. Thereby, a molded body of the laminated ceramic capacitor 100 is obtained.

(Baking process)
The molded body thus obtained is subjected to binder removal treatment in an N ₂ atmosphere at 250 to 500° C., and then in a reducing atmosphere with an oxygen partial pressure of 10 ⁻⁵ to 10 ⁻⁸ atm at 1100 to 1300° C. for 10 minutes. By firing for ~2 hours, each compound is sintered and grains grow. Thus, the laminated ceramic capacitor 100 is obtained. By adjusting the firing conditions, the residual amount of the common material remaining in the internal electrode layers 12 can be adjusted. Specifically, by increasing the rate of temperature rise in the firing step, the main component metal is sintered before the common material is discharged from the metal conductive paste, so the common material tends to remain in the internal electrode layers 12 . For example, from the viewpoint of increasing the residual amount of the common material in the internal electrode layers 12, the average temperature increase rate from room temperature to the maximum temperature in the firing step is preferably 30° C./min or more, and 45° C./min or more. is more preferable. If the average heating rate is too high, the organic components remaining in the compact cannot be sufficiently discharged, and problems such as cracks may occur during the firing process. Alternatively, the sintering of the compact may result in a difference between the inside and the outside, resulting in insufficient densification, which may cause problems such as a decrease in capacitance. Therefore, the average heating rate is preferably 80° C./min or less, more preferably 65° C./min or less.

(Reoxidation treatment step)
After that, reoxidation treatment may be performed at 600° C. to 1000° C. in an N ₂ gas atmosphere.
(Plating process)
After that, metal coating such as Cu, Ni, and Sn is applied to the underlying layers of the external electrodes 20a and 20b by plating.

According to the method for manufacturing a laminated ceramic capacitor according to the present embodiment, a highly dispersed metal conductive paste is produced by using a small-diameter material with a sharp particle size distribution as the main component metal and co-material constituting the internal electrode layers 12. be. In addition, it is possible to suppress the mixing of partially large materials. By using such a metal conductive paste, diffusion of the common material into the dielectric layer 11 is suppressed during the sintering process, and the common material remains in the internal electrode layers 12 . Specifically, in the cross section of the internal electrode layer 12 in the stacking direction of the dielectric layer 11 and the internal electrode layer 12, the area ratio of particles 15 containing ceramic as a main component is set to 10% or more.

When the common material remains in the internal electrode layers 12, oversintering of the metal components of the internal electrode layers 12 during sintering is suppressed, and breakage of the internal electrode layers 12 is suppressed. As a result, a decrease in the continuity rate of the internal electrode layers 12 can be suppressed. Moreover, the diffusion of the common material into the dielectric layer 11 is suppressed, the decrease in the dielectric constant ε of the dielectric layer 11 is suppressed, and desired dielectric properties can be secured. The area ratio is preferably 12% or more, more preferably 14% or more. In addition, it is preferable that the particles 15 containing ceramic as a main component do not exist in the upper and lower 5% regions in the thickness direction of the internal electrode layer 12 .

Hereinafter, multilayer ceramic capacitors according to the embodiments were produced and their characteristics were examined.

(Examples 1 to 5)
Necessary additives were added to barium titanate powder having an average particle size of 100 nm (specific surface area of 10 m ² /g), and the mixture was thoroughly wet-mixed and pulverized in a ball mill to obtain a dielectric material. A dielectric green sheet was prepared by adding an organic binder and a solvent to a dielectric material and using a doctor blade method. The coating thickness of the dielectric green sheet was 0.8 μm, polyvinyl butyral (PVB) or the like was used as the organic binder, and ethanol, toluic acid, or the like was added as the solvent. In addition, a plasticizer and the like were added.

Next, powder of the main component metal (Ni) of the internal electrode layer 12 (Ni solid content is 50 wt %), 10 parts of the common material (barium titanate), 5 parts of the binder (ethyl cellulose), and a solvent. A conductive paste for forming an internal electrode containing other auxiliary agents as required was prepared by a planetary ball mill. As shown in Table 1, the main component metal powder used had an average particle size of 70 nm (specific surface area of 10 m ² /g), a standard deviation of particle size of 12, and a cumulative particle size distribution slope of 8. The common material used had an average particle size of 8.6 nm (specific surface area of 110 m ² /g), a standard deviation of particle size of 2.7, and a cumulative particle size distribution slope of 7.

A conductive paste for forming internal electrodes was screen-printed on the dielectric sheet. 250 sheets on which the conductive paste for forming internal electrodes was printed were stacked, and cover sheets were laminated on the upper and lower sides thereof. After that, a ceramic laminate was obtained by thermocompression bonding and cut into a predetermined shape.

After removing the binder from the obtained ceramic laminate in an _N2 atmosphere, a metal paste containing a metal filler containing Ni as a main component, a common material, a binder, a solvent, etc. is applied from both end surfaces to each side surface of the ceramic laminate. and dried. After that, the metal paste was sintered simultaneously with the ceramic laminate at 1100° C. to 1300° C. for 10 minutes to 2 hours in a reducing atmosphere to obtain a sintered body. The average heating rate from room temperature to the maximum temperature was 30°C/min in Example 1, 45°C/min in Example 2, 55°C/min in Example 3, and 65°C/min in Example 4. and 80° C./min in Example 5.

The shape and dimensions of the obtained sintered body were 0.6 mm long, 0.3 mm wide and 0.3 mm high. After re-oxidizing the sintered body under _N2 atmosphere at 800° C., plating is performed to form a Cu-plated layer, a Ni-plated layer and an Sn-plated layer on the surface of the base layer, and the multilayer ceramic capacitor 100 is formed. Obtained.

(Comparative Examples 1 to 3)
In Comparative Examples 1 to 3, as shown in Table 1, the powder of the main component metal (Ni) of the conductive paste for forming the internal electrodes had an average particle size of 120 nm, a standard deviation of the particle size of 33, and a cumulative particle size distribution of A slope of 6 was used. The common material used had an average grain size of 29 nm, a grain size standard deviation of 8.7, and a cumulative grain size distribution slope of 5. The average heating rate from room temperature to the maximum temperature was 45° C./min in Comparative Example 1, 55° C./min in Comparative Example 2, and 65° C./min in Comparative Example 3. Other conditions were the same as in the example.

FIG. 5(a) is a view showing the particle size distribution of the main component metals of the conductive pastes for forming internal electrodes in Examples 1 to 5 and Comparative Examples 1 to 3. FIG. As shown in FIG. 5(a), in Examples 1 to 5, metal powders having a small average particle size and a sharp particle size distribution are used. Moreover, in Comparative Examples 1 to 3, metal powders having a large average particle size and a broad particle size distribution are used. FIG. 5(b) is a diagram showing the particle size distribution of the common material of the conductive pastes for forming internal electrodes in Examples 1 to 5 and Comparative Examples 1 to 3. FIG. As shown in FIG. 5(b), in Examples 1 to 5, co-materials having a small average particle size and a sharp particle size distribution are used. In addition, in Comparative Examples 1 to 3, it can be seen that a common material having a large average particle size and a broad particle size distribution is used.

(analysis)
FIGS. 6(a) and 6(b) are SEM (scanning electron microscope) photographs of cross sections in the stacking direction of the dielectric layers 11 and the internal electrode layers 12 at the center in the width direction. . 6(a) is an SEM photograph of Example 3, and FIG. 6(b) is an SEM photograph of Comparative Example 2. FIG. From the results of FIGS. 6A and 6B, in the cross section of the internal electrode layer 12 in the stacking direction of the dielectric layer 11 and the internal electrode layer 12, the area ratio of particles 15 containing ceramic as a main component is was measured. Specifically, by counting the number of particles 15 from the SEM image, measuring the diameter of each particle, and calculating the area of the particles 15 with respect to the total area of the internal electrode layer 12 (including the particles 15), the area ratio was calculated. The field of view of the SEM photograph was 12.6 μm×8.35 μm. As shown in FIGS. 6(c) and 7, the area ratio is 12.0 in Example 1, 14.5 in Example 2, 16.2 in Example 3, and 16.2 in Example 4. 17.3, and in Example 5 it was 18.0. Comparative Example 1 was 7.0, Comparative Example 2 was 8.7, and Comparative Example 3 was 9.0.

Moreover, the continuous rate explained in FIG. 2 was measured using the obtained SEM photograph. In Examples 1 to 5, the continuity rate was 100%. In Comparative Examples 1-3, the continuous rate was 94-96%. As for the continuity rate, an average value was obtained by measuring the continuity rate of all the internal electrode layers shown in several SEM photographs.

Next, the dielectric constants of the multilayer ceramic capacitor samples according to Examples 1 to 5 and Comparative Examples 1 to 3 were evaluated. Specifically, the capacitance was measured using a Hewlett-Packard LCR meter 4284A. The apparent dielectric constant was calculated from this measured value, the intersecting area of the internal electrodes of the sample multilayer capacitor, the dielectric ceramic layer thickness, and the number of laminated layers. The number of samples was 100.

100 samples of each of Examples 1 to 5 and Comparative Examples 1 to 3 were evaluated for dielectric constant. FIG. 8 is a graph showing evaluation results of permittivity. The vertical axis in FIG. 8 indicates the dielectric constant of each sample. It should be noted that FIG. 8 shows the dielectric constant normalized by setting the average dielectric constant of the samples according to Example 3 to 100%.

From the results of FIG. 8, it can be seen that in Examples 1 to 5, the permittivity at the same heating rate was improved by 20% or more as compared to Comparative Examples 1 to 3. This is because a small-diameter material with a sharp particle size distribution is used as the metal material of the metal conductive paste for forming the internal electrodes, so that the common material remains in the internal electrode layers 12 during the sintering process and diffuses into the dielectric layers 11. is suppressed, and the A/B ratio and composition deviation of the material in the dielectric layer 11 are suppressed.

Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and variations can be made within the scope of the gist of the present invention described in the scope of claims. Change is possible.

REFERENCE SIGNS LIST 10 laminated chip 11 dielectric layer 12 internal electrode layer 13 cover layer 20a, 20b external electrode 100 laminated ceramic capacitor

Claims (11)

A laminated structure in which dielectric layers mainly composed of ceramic and internal electrode layers mainly composed of metal are alternately laminated,
The thickness of the internal electrode layer is 0.3 μm or less,
Particles containing ceramic as a main component are present in the internal electrode layers,
In the cross section of the internal electrode layer in the stacking direction of the dielectric layer and the internal electrode layer, the area ratio of the particles is 10% or more,
In the area ratio of 10% or more where the particles are present in the internal electrode layers, there are at least two metal crystal grains that are in contact with any adjacent dielectric layer, and the two metal crystal grains are in contact with each other. The two metal crystal particles are arranged in contact with each other in the extending direction of the internal electrode layers, and the two metal crystal particles form a crystal grain boundary extending between the adjacent dielectric layers, and the particles are arranged at the crystal grain boundary. ,
A multilayer ceramic capacitor, wherein the particles are not present in 5% of the upper and lower regions in the thickness direction of the internal electrode layers. 2. A multilayer ceramic capacitor according to claim 1, wherein the main component metal of said internal electrode layers is nickel. 3. The multilayer ceramic capacitor according to claim 1, wherein the main component ceramic of said particles is barium titanate. 4. The multilayer ceramic capacitor according to claim 1, wherein the main component ceramic of said dielectric layers is barium titanate. The area ratio is obtained from the total area of 10 internal electrode layers arbitrarily selected using a cross-sectional SEM image of the internal electrode layers and the total area of the particles in the 10 internal electrode layers, 5. The multilayer ceramic capacitor according to any one of claims 1 to 4, characterized in that: Ceramic powder having an average particle size of 10 nm or less and a standard deviation of particle size distribution of 5 or less, which is mainly composed of metal powder having an average particle size of 100 nm or less and a standard deviation of particle size distribution of 5 or less, is placed on a green sheet containing ceramic powder. A first step of arranging a pattern of a metal conductive paste containing as a common material;
By sintering the ceramic laminate obtained by laminating a plurality of lamination units obtained in the first step, the metal powder is sintered to form internal electrode layers, and the ceramic powder of the green sheet is sintered. a second step of forming a dielectric layer by
The thickness of the internal electrode layer is 0.3 μm or less,
In the cross section of the internal electrode layer in the stacking direction of the internal electrode layer and the dielectric layer, the area ratio of particles containing ceramic as a main component is 10% or more,
In the area ratio of 10% or more where the particles are present in the internal electrode layers, there are at least two metal crystal grains that are in contact with any adjacent dielectric layer, and the two metal crystal grains are in contact with each other. The two metal crystal particles are arranged in contact with each other in the extending direction of the internal electrode layers, and the two metal crystal particles form a crystal grain boundary extending between the adjacent dielectric layers, and the particles are arranged at the crystal grain boundary. performing the second step on
A method of manufacturing a laminated ceramic capacitor, wherein the particles are not present in 5% of the upper and lower regions in the thickness direction of the internal electrode layers. 7. The method of manufacturing a multilayer ceramic capacitor according to claim 6, wherein in said second step, the average temperature increase rate from room temperature to the maximum temperature is 30[deg.] C./min or more and 80[deg.] C./min or less. 8. The method of manufacturing a multilayer ceramic capacitor according to claim 6, wherein the metal powder contains nickel as a main component. 9. The method of manufacturing a multilayer ceramic capacitor according to claim 6, wherein the common material contains barium titanate as a main component. 10. The method of manufacturing a multilayer ceramic capacitor according to claim 6, wherein the ceramic powder of the green sheets contains barium titanate as a main component. The area ratio is obtained from the total area of 10 internal electrode layers arbitrarily selected using a cross-sectional SEM image of the internal electrode layers and the total area of the particles in the 10 internal electrode layers, 11. The method for manufacturing a multilayer ceramic capacitor according to any one of claims 6 to 10, wherein:

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