TWI768593B - 半導體封裝件及其製法 - Google Patents

半導體封裝件及其製法 Download PDF

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TWI768593B
TWI768593B TW109144310A TW109144310A TWI768593B TW I768593 B TWI768593 B TW I768593B TW 109144310 A TW109144310 A TW 109144310A TW 109144310 A TW109144310 A TW 109144310A TW I768593 B TWI768593 B TW I768593B
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heat sink
chip
redistribution layer
layer
semiconductor package
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TW202226486A (zh
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董悅明
楊家銘
陳俊瑋
呂建德
潘冠霖
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華泰電子股份有限公司
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Priority to US17/158,386 priority patent/US11462454B2/en
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Abstract

本發明之半導體封裝件包含：一重佈線層；一晶片，設置在該重佈線層；一散熱片，設置在該晶片上；熱介面材料，夾設在該散熱片與該晶片之間；以及一成型層，形成在該重佈線層上，並包覆該晶片的側面。本發明另提供一種製造上述半導體封裝件的方法。

Description

半導體封裝件及其製法
本創作係有關一種半導體封裝件及其製法，特別是指包含有散熱片的半導體封裝件及其製法。
現今科技需求與消費性電子產品需求走向高階化，在晶片以及封裝需求更加精密與更小的需求下，半導體朝向扇出型封裝發展已經是必然的道路。
現行具有散熱片的扇出型封裝件，其散熱片皆是貼附在已封膠的成型材料上方。當晶片產生的熱需要發散時，皆需要先傳導至成型材料後再轉移到散熱片才可發散，因而影響散熱片的反應效率。
另外，現今在扇出型半導體封裝過程中，會使用到乾/濕製程，因此影響到重佈線層當中的線路。為了保護內部線路不受封裝製程影響，會在暫時性載具上先鋪上保護層後再開始作業導電線路。因此，在導電凸塊結合至結構體前，需要將保護層移除後才可作業。
現行清除重佈線層上方的保護層的方法，皆是使用雷射將其移除。然而，因結構體的不同，需要清除的區域也會有所差異，在清除需求較高的情況下，雷射移除作業需要花費更多的時間才可完成。
有鑒於此，本發明提供一種半導體封裝件及其製法，具有較高的散熱效率，且能較快清除重佈線層上方的保護層。
為達上述目的，本發明之半導體封裝件包含：一重佈線層；一晶片，設置在該重佈線層；一散熱片，設置在該晶片上；熱介面材料，夾設在該散熱片與該晶片之間；以及一成型層，形成在該重佈線層上，並包覆該晶片的側面。
本發明之半導體封裝件的製法包含：準備一重佈線層，該重佈線層具有相對的一第一表面與一第二表面；在該重佈線層的該第一表面設置一晶片，並將該晶片電性連接至該重佈線層；在該晶片上塗抹熱介面材料；將一散熱片與該晶片接合，使得該熱介面材料夾設在該散熱片與該晶片之間；以及以封膠材料形成包覆該晶片的側面的一成型層。
根據本發明之半導體封裝件，其中散熱片係直接黏貼在晶片上，相較於既有扇出型封裝件的散熱片是貼附在已封膠的成型材料上，本發明更能將重佈線層上的晶片所產生的熱量發散，具有較好的散熱效率。
為了讓本發明之上述和其他目的、特徵、和優點能更明顯，下文特舉本發明實施例，並配合所附圖示，作詳細說明如下。
以下揭示內容提供用於實施本揭露之不同特徵的許多不同實施例或實例。下文描述組件及配置之特定實例以簡化本揭露。當然，此等組件及配置僅為實例且不意欲為限制性的。舉例而言，在以下描述中，第一構件在第二構件上方或上之形成可包括第一構件與第二構件直接接觸地形成之實施例，且亦可包括額外構件可在第一構件與第二構件之間形成使得第一構件與第二構件可不直接接觸之實施例。另外，本揭露可能在各種實例中重複參考數字及/或字母。此重複係出於簡單及清晰之目的，且本身並不指示所論述之各種實施例及/或組態之間的關係。
另外，本文中為易於描述而可能使用諸如「下伏」、「下方」、「下部」、「上覆」、「上部」及其類似者等空間相對術語，以描述如諸圖中所說明的一個元件或構件與另一或多個元件或構件的關係。除諸圖中所描繪之定向以外，空間相對術語意欲涵蓋在使用或操作中之裝置的不同定向。設備可以其他方式定向(旋轉90度或位於其他定向)，且本文中所使用之空間相對描述詞同樣可相應地進行解釋。
請參考圖1，本發明半導體封裝件包含一重佈線層（redistribution layer; RDL）110，該重佈線層110當中佈設有導電線路。該重佈線層110具有相對的一第一表面111與一第二表面112，且該第一表面111與該第二表面112位於相異的平面，例如該第一表面111為頂面而該第二表面112為底面，但不限於此。該重佈線層110的該第二表面112上設有複數導電凸塊140，該些導電凸塊140係與該重佈線層110電性連接。該重佈線層110的該第一表面111上設有一晶片120，其具有相對的一第一表面與一第二表面，其中該晶片120的該第二表面為一主動面，並且面對該重佈線層110的該第一表面111。該晶片120利用覆晶(flip chip)技術連接到該重佈線層110。詳細地說，該晶片120的該主動面上設置有複數導電柱130，該些導電柱130並各自利用一焊料凸塊132固定在該重佈線層110的該第一表面111，藉此該晶片120利用該些導電柱130與該重佈線層110電性連接，並且利用該些導電凸塊140與外部電路電性連接。
該晶片120的該第一表面上設有一散熱片150，該散熱片150為多邊形，具有相對的一第一表面與一第二表面，其中該散熱片150的該第二表面是面對該晶片120的該第一表面。於一實施方式中，該散熱片150係延伸超出該晶片120的周緣。於另一實施方式中，該散熱片150上開設有複數通孔152。該散熱片150利用熱介面材料154連接到該晶片120的該第一表面，且該熱介面材料154係與該散熱片150和該晶片120直接接觸。該散熱片150的該第一表面，即外表面鍍有一金屬層160。
該重佈線層110的該第一表面111上形成有一成型層170，該成型層170係由封膠材料製成，例如由環氧樹脂材料所構成，但不限於此。該成型層170形成在該散熱片150與該重佈線層110之間，並且包覆該晶片120的側面，且還填充於該散熱片150的該些通孔152內。
根據本發明之半導體封裝件，其中使用該熱介面材料154將該散熱片150與該晶片120做連結，再透過封膠(molding)技術利用該成型層170將該重佈線層110上的該晶片120做全面性包覆，使整體結構穩定。由於該成型層170係利用封膠技術形成，在形成過程中會成型在該散熱片150的該第一表面上，因此後續使用研磨技術將該散熱片150的該第一表面上多餘的成型層170磨除，讓其熱傳導效能更能有效發揮。該散熱片150的該第一表面上鍍上的該金屬層160係做為保護層可加強該散熱片150的抗鏽能力。該成型層170填充於該散熱片150的該些通孔152內，使該散熱片150更牢固地附著在該晶片120上。
根據本發明之半導體封裝件，其中該散熱片150係直接黏貼在該晶片120上，相較於既有扇出型封裝件的散熱片是貼附在已封膠的成型材料上，本發明更能將該重佈線層110上的該晶片120所產生的熱量發散，具有較好的散熱效率。
請參考圖2至圖9，其顯示圖1所示之半導體封裝件的製法。如圖2所示，準備一重佈線層110，該重佈線層110具有相對的一第一表面111與一第二表面112。將複數晶片120以覆晶方式設在該重佈線層110的該第一表面111，其中各該晶片120具有相對的一第一表面與一第二表面，而該些晶片120的該些第二表面為主動面。該些晶片120的該些主動面上分別設置有複數導電柱130，該些導電柱130並各自利用一焊料凸塊132固定在該重佈線層110的該第一表面111，藉此使該些晶片120分別利用該些導電柱130與該重佈線層110電性連接。
如圖3所示，接著在該些晶片120的該些第一表面上塗抹熱介面材料154，並將複數散熱片150與該些晶片120分別接合。各該散熱片150具有相對的一第一表面與一第二表面，其中該些散熱片150的該些第二表面分別面對該些晶片120的該些第一表面，且各該散熱片150並延伸超出其正下方的該晶片120的周緣。各該散熱片150上並開設有複數通孔152。
如圖4所示，之後將前述含有該些散熱片150的該些晶片120放入模具內（圖未顯示），並將封膠材料灌入模具內，以於該些散熱片150與該重佈線層110之間形成包覆該些晶片120側面的一成型層170。該封膠材料不僅包覆該些晶片120的側面，並固化形成在該些散熱片150的該些第一表面上，且還填充於該些散熱片150的該些通孔152內。
如圖5所示，之後將前述含有該成型層170的結構體從該模具內取出，再將該些散熱片150的該些第一表面上多餘的該封膠材料磨除。而後在該些散熱片150的該些第一表面鍍上一金屬層160做為保護層（請見圖6）。
如圖7所示，之後將前述結構體倒置，並在該重佈線層110的該第二表面112形成一遮罩180，並在該遮罩180上形成對應該重佈線層110當中的導電線路的複數開孔182。
如圖8所示，之後通過藥水或是電漿蝕刻的製程將該重佈線層110的保護層(polyimide)未被該遮罩180遮蔽的部分，即裸露在該些開孔182的部分清除，以裸露出該重佈線層110當中原先被該保護層覆蓋的該導電線路。
如圖9所示，之後移除該遮罩180，並將複數導電凸塊140形成在該重佈線層110的該第二表面112，並與該重佈線層110當中的該導電線路連接。之後分割該成型層170與該重佈線層110，以成為複數個如圖1所示的半導體封裝件。
根據本發明之半導體封裝件的製法，其中使用該熱介面材料154將該散熱片150與該晶片120做連結，再透過封膠(molding)技術利用該成型層170將該重佈線層110上的該晶片120做全面性包覆，使整體結構穩定。由於該成型層170係利用封膠技術形成，在形成過程中會成型在該散熱片150的該第一表面上，因此後續使用研磨技術將該散熱片150的該第一表面上多餘的成型層170磨除，讓其熱傳導效能更能有效發揮。該散熱片150的該第一表面上鍍上的該金屬層160係做為保護層可加強該散熱片150的抗鏽能力。該成型層170填充於該散熱片150的該些通孔152內，使該散熱片150更牢固地附著在該晶片120上。除此之外，透過藥水或是電漿蝕刻的方式對該重佈線層110開孔，能夠省去利用雷射鑽孔作業所花費的時間。
雖然本發明已以前述實施例揭示，然其並非用以限定本發明，任何本發明所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作各種之更動與修改。因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
110:重佈線層
111:第一表面
112:第二表面
120:晶片
130:導電柱
132:焊料凸塊
140:導電凸塊
150:散熱片
152:通孔
154:熱介面材料
160:金屬層
170:成型層
180:遮罩
182:開孔
當結合附圖閱讀時，自以下詳細描述最好地理解本揭露之態樣。應注意，根據業界中之標準實務，各種構件未按比例繪製。實際上，為論述清楚起見，可任意增大或減小各種構件之尺寸。 圖1為本發明之半導體封裝件的示意圖。 圖2至9顯示圖1所示之半導體封裝件的製法。
110:重佈線層
111:第一表面
112:第二表面
120:晶片
130:導電柱
132:焊料凸塊
140:導電凸塊
150:散熱片
152:通孔
154:熱介面材料
160:金屬層
170:成型層

Claims (7)

  1. 一種半導體封裝件，包含：一重佈線層；一晶片，設置在該重佈線層上；一散熱片，設置在該晶片上，該散熱片上開設有複數通孔；熱介面材料，夾設在該散熱片與該晶片之間；以及一成型層，形成在該重佈線層上，並包覆該晶片的側面，該成型層還填充於該散熱片的該些通孔內。
  2. 如請求項1之半導體封裝件，其中該熱介面材料係與該散熱片和該晶片直接接觸。
  3. 如請求項1之半導體封裝件，其中該散熱片上鍍有一金屬層做為保護層。
  4. 一種半導體封裝件的製法，包含：準備一重佈線層，該重佈線層具有相對的一第一表面與一第二表面；在該重佈線層的該第一表面設置一晶片，並將該晶片電性連接至該重佈線層；在該晶片上塗抹熱介面材料；將一散熱片與該晶片接合，使得該熱介面材料夾設在該散熱片與該晶片之間，其中該散熱片上開設有複數通孔；以封膠材料形成包覆該晶片的側面的一成型層，其中該封膠材料還填充於該散熱片的該些通孔內；在該重佈線層的該第二表面形成一遮罩； 對該重佈線層的該第二表面執行藥水或電漿蝕刻製程，以裸露出該重佈線層當中的導電線路；移除該遮罩；以及形成複數導電凸塊於該重佈線層的該第二表面，並與該重佈線層當中裸露出的該導電線路連接。
  5. 如請求項4之半導體封裝件的製法，其中該熱介面材料係與該散熱片和該晶片直接接觸。
  6. 如請求項4之半導體封裝件的製法，還包含：磨除裸露在該散熱片的表面上的該封膠材料；以及於該散熱片上鍍一金屬層做為保護層。
  7. 如請求項4之半導體封裝件的製法，其中該散熱片延伸超出該晶片的周緣，該成型層還形成在該散熱片與該重佈線層之間。
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