TWI768434B - Circuit board information display method and device - Google Patents

Circuit board information display method and device Download PDF

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TWI768434B
TWI768434B TW109128168A TW109128168A TWI768434B TW I768434 B TWI768434 B TW I768434B TW 109128168 A TW109128168 A TW 109128168A TW 109128168 A TW109128168 A TW 109128168A TW I768434 B TWI768434 B TW I768434B
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circuit board
data
displayed
board information
design data
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TW109128168A
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TW202209084A (en
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劉韋成
蔡勛傑
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萬潤科技股份有限公司
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本發明提供一種電路板資訊顯示方法及裝置,包括:提供一電路板設計資料,該電路板設計資料佈設有複數個預設圖案;提供一處理單元,將該電路板設計資料劃分為複數個待顯示資料區;提供一顯示單元,選擇性地顯示複數個該待顯示資料區中之其中至少一個;藉此可改善顯示畫面處理遲滯之情事。The present invention provides a circuit board information display method and device, including: providing a circuit board design data, the circuit board design data is arranged with a plurality of preset patterns; providing a processing unit, dividing the circuit board design data into a plurality of waiting A display data area is provided; a display unit is provided to selectively display at least one of the plurality of data areas to be displayed; thereby, the processing delay of the display screen can be improved.

Description

電路板資訊顯示方法及裝置Circuit board information display method and device

本發明係有關於一種資訊顯示方法及裝置,尤指一種用於提供電路板資訊給使用者判讀之電路板資訊顯示方法及裝置。The present invention relates to an information display method and device, and more particularly to a circuit board information display method and device for providing circuit board information to users for interpretation.

按,在電路板的生產製造過程中,其按照順序大致分為內層站、壓合站、鑽孔站、檢查站等主要站別,首先電路板在內層站完成顯影與蝕刻處理,然後進入至壓合站進行黑化/棕化處理,並在壓合站對該電路板進行多次疊板壓合,壓合後的該電路板再到鑽孔站進行通孔或盲孔之鑽孔,最後該電路板被送進檢查站以機器視覺對電路板之鑽孔進行檢查。Press, in the production process of the circuit board, it is roughly divided into main stations such as inner station, lamination station, drilling station, inspection station, etc., first, the circuit board is developed and etched in the inner station, and then Enter into the pressing station for blackening/browning treatment, and perform multiple lamination pressing on the circuit board at the pressing station, and then the pressed circuit board goes to the drilling station for through-hole or blind-hole drilling Finally, the circuit board is sent to the inspection station to inspect the drilling of the circuit board by machine vision.

習知檢查站在對電路板之鑽孔進行檢查時,使用者欲得知的電路板資訊將藉由處理單元分析並經顯示單元顯示給使用者判讀,所述電路板資訊包括電路板設計資料、電路板缺陷資料…等;其中,使用者可藉由該電路板設計資料得知電路板之鑽孔數量、鑽孔大小與孔位分佈的期望值;該電路板缺陷資料係將機器視覺檢查後之電路板量測資料與該電路板設計資料相互比對分析並在該電路板設計資料上進行差異處之標註,所述差異處如該電路板設計資料中有鑽孔但該電路板量測資料中無鑽孔處。When the conventional inspection station inspects the drilling of the circuit board, the circuit board information that the user wants to know will be analyzed by the processing unit and displayed to the user through the display unit for interpretation, and the circuit board information includes the circuit board design data. , circuit board defect data...etc. Among them, the user can know the expected value of the number of holes, the size of the holes and the distribution of holes in the circuit board through the circuit board design data; the circuit board defect data is obtained after machine vision inspection. The circuit board measurement data and the circuit board design data are compared and analyzed, and the differences are marked on the circuit board design data. There are no drill holes in the data.

習知使用者在藉由顯示單元判讀電路板資訊時,會依判讀需求移動或縮放電路板資訊在顯示單元中的位置,每當使用者移動或縮放一次電路板資訊在顯示單元中的位置時,處理單元皆需重新分析並更新電路板資訊,但習知電路板資訊中需分析的項目眾多,光是鑽孔數量動輒就是數十萬個,在使用者頻繁改變電路板資訊在顯示單元中之位置的情況下,將使得處理單元來不及重新分析並更新電路板資訊,造成電路板資訊在顯示單元中呈現顯示畫面處理遲滯之情事,進而影響使用者操作的流暢度;雖然,可使用更高規格之處理單元來改善此情事,但高規格之處理單元亦會導致成本之增加。Conventionally, when the user interprets the circuit board information through the display unit, the user will move or zoom the position of the circuit board information in the display unit according to the interpretation requirements, and each time the user moves or zooms the position of the circuit board information in the display unit , the processing unit needs to re-analyze and update the circuit board information, but there are many items to be analyzed in the conventional circuit board information, and the number of holes alone is often hundreds of thousands. In the case of the position, it will make it too late for the processing unit to re-analyze and update the circuit board information, causing the circuit board information to be displayed in the display unit with the display screen processing lag, thereby affecting the smoothness of the user's operation; Specification of the processing unit to improve this situation, but the high specification of the processing unit will also lead to an increase in cost.

爰是,本發明的目的,在於提供一種可改善顯示畫面處理遲滯之電路板資訊顯示方法。In other words, the purpose of the present invention is to provide a circuit board information display method which can improve the display screen processing delay.

本發明的另一目的,在於提供一種用以執行如所述電路板資訊顯示方法之裝置。Another object of the present invention is to provide a device for implementing the method for displaying information on a circuit board.

依據本發明目的之電路板資訊顯示方法,包括:提供一電路板設計資料,該電路板設計資料佈設有複數個預設圖案;提供一處理單元,將該電路板設計資料劃分為複數個待顯示資料區;提供一顯示單元,選擇性地顯示複數個該待顯示資料區中之其中至少一個。The circuit board information display method according to the purpose of the present invention includes: providing a circuit board design data, the circuit board design data is arranged with a plurality of preset patterns; providing a processing unit, dividing the circuit board design data into a plurality of to-be-displayed A data area; a display unit is provided to selectively display at least one of the plurality of data areas to be displayed.

依據本發明另一目的之電路板資訊顯示裝置,包括:用以執行如所述電路板資訊顯示方法之裝置。Another object of the present invention is a circuit board information display device, comprising: a device for executing the circuit board information display method.

本發明實施例之電路板資訊顯示方法及裝置, 該處理單元將該電路板設計資料劃分為複數個待顯示資料區,且該顯示單元一次僅顯示複數個該待顯示資料區中之部分該待顯示資料區,在不改變該處理單元規格之下,可減少該處理單元之負擔,改善顯示畫面處理遲滯之情事。。In the circuit board information display method and device according to the embodiment of the present invention, the processing unit divides the circuit board design data into a plurality of data areas to be displayed, and the display unit only displays a part of the to-be-displayed data areas in the plurality of data areas to be displayed at a time. In the display data area, without changing the specification of the processing unit, the burden of the processing unit can be reduced, and the processing delay of the display screen can be improved. .

請參閱圖1,本發明實施例之電路板資訊顯示方法可以如圖所示之顯示裝置A為例作說明,該顯示裝置A設有一處理單元A1與一顯示單元A2;該顯示單元A2與該處理單元A1訊號連接,該顯示單元A2用以顯示經該處理單元A1進行分析後所產生的電路板資訊。Referring to FIG. 1 , the method for displaying circuit board information according to the embodiment of the present invention can be illustrated by the display device A shown in the figure. The display device A is provided with a processing unit A1 and a display unit A2; the display unit A2 and the The processing unit A1 is connected with a signal, and the display unit A2 is used for displaying the circuit board information generated after the analysis by the processing unit A1.

請參閱圖2、3、4,該顯示裝置A可與一取像裝置B訊號連接,該取像裝置B設有一攝像器B1與一載台B2;該攝像器B1用以拍攝一加工後之待測電路板W以取得一圖像化之電路板量測資料T,該載台B2供該待測電路板W放置;該攝像器B1可進行相對該載台B2的位移以取得完整之該電路板量測資料T;該處理單元A1可對該電路板量測資料T與一電路板設計資料D進行分析; 該電路板設計資料D具有一圍繞成一矩形的預設邊界D1與複數個佈設於該預設邊界D1內的預設圖案D2,及三個位於該預設邊界D1其中三個角落且分別呈「十」字圖案的預設對位標記D3;所述預設圖案D2可例如鑽孔圖案、線路圖案…等欲在該待測電路板W相對位置上加工成型的圖案;在本發明實施例中,佈設於該電路板設計資料D中之所述預設圖案D2的數量在100萬個至500萬個之間,但因所述預設圖案D2的數量眾多,故圖2僅以矩陣方式排列9×11個圓形之鑽孔圖案表示所述預設圖案D2,所述預設圖案D2可以呈矩陣排列規則分佈或呈疏密不均之不規則分佈,該預設圖案D2形狀與尺寸不限制為一致。Please refer to FIGS. 2 , 3 and 4 , the display device A can be signal-connected to an imaging device B, and the imaging device B is provided with a camera B1 and a stage B2; the camera B1 is used to photograph a processed image The circuit board W to be tested can obtain an imaged circuit board measurement data T, and the carrier B2 is used for placing the circuit board W to be tested; the camera B1 can be displaced relative to the carrier B2 to obtain a complete picture of the circuit board W. circuit board measurement data T; the processing unit A1 can analyze the circuit board measurement data T and a circuit board design data D; The circuit board design data D has a predetermined boundary D1 surrounding a rectangle, a plurality of predetermined patterns D2 arranged in the predetermined boundary D1, and three are located at three corners of the predetermined boundary D1 and are respectively “ The preset alignment mark D3 of the cross pattern; the preset pattern D2 can be, for example, a drilling pattern, a circuit pattern, etc. to be processed and formed on the relative position of the circuit board W to be tested; in the embodiment of the present invention , the number of the preset patterns D2 arranged in the circuit board design data D is between 1 million and 5 million, but due to the large number of the preset patterns D2, Fig. 2 is only arranged in a matrix A drilling pattern of 9×11 circles represents the preset pattern D2. The preset pattern D2 can be regularly distributed in a matrix arrangement or irregularly distributed with uneven density and density. The shape and size of the preset pattern D2 are different. Constrained to be consistent.

請參閱圖4、5,該待測電路板W呈矩形並具有一取像面W1,該取像面W1上佈設有加工後之複數個實體加工圖案W2及三個位於該取像面W1的其中三個角落的實體對位標記W3,藉由該待測電路板W之所述實體加工圖案W2及所述實體對位標記W3的設計,該電路板量測資料T也具有一對應該取像面W1外圍輪廓之邊界圖像T1與複數個分別對應所述實體加工圖案W2的加工圖案圖像T2,及三個分別對應所述實體對位標記W3的對位標記圖像T3;請參閱圖3、5,雖然該待測電路板W之所述實體加工圖案W2係參照該電路板設計資料D之所述預設圖案D2進行加工之結果,但因加工上難免會有瑕疵產生,故所述實體加工圖案W2與所述預設圖案D2間可能具有差異,例如在圖5中箭頭所指之空缺部分。Please refer to FIGS. 4 and 5 , the circuit board W to be tested is rectangular and has an image capturing surface W1 . The image capturing surface W1 is provided with a plurality of processed solid processing patterns W2 and three images located on the image capturing surface W1 . The three corners of the physical alignment marks W3, through the design of the physical processing pattern W2 and the physical alignment marks W3 of the circuit board W to be tested, the circuit board measurement data T also has a pair of corresponding alignment marks The boundary image T1 of the peripheral contour of the image plane W1 and a plurality of processing pattern images T2 corresponding to the physical processing pattern W2 respectively, and three alignment mark images T3 corresponding to the physical alignment mark W3 respectively; please refer to 3 and 5, although the physical processing pattern W2 of the circuit board W to be tested is the result of processing with reference to the predetermined pattern D2 of the circuit board design data D, there will inevitably be defects in processing, so There may be differences between the solid processing pattern W2 and the predetermined pattern D2, such as the vacant portion indicated by the arrow in FIG. 5 .

本發明實施例之電路板資訊顯示方法在實施上,請參閱圖6、7,在該顯示裝置A顯示的電路板資訊,係利用該處理單元A1將該電路板設計資料D劃分為複數個待顯示資料區D4,並利用該顯示單元A2選擇性地輪流顯示所述待顯示資料區D4中之其中至少一個;在本發明實施例中,該處理單元A1將該電路板設計資料D劃分為3×3個以矩陣方式排列且大小相同之待顯示資料區D4,各該待顯示資料區D4中佈設有複數個該預設圖案D2,該顯示單元A2先顯示左上角的該待顯示資料區D4,並可依需求選擇性地輪流顯示其它的該待顯示資料區D4;其中,藉由該顯示單元A2顯示之該待顯示資料區D4中,可顯示之所述預設圖案D2數量不超過80萬個(若所述預設圖案D2在呈疏密不均之不規則分佈下,使得至少一個該顯示資料區D4中之所述預設圖案D2數量超過80萬個,該處理單元A1將再劃分更多個待顯示資料區D4,例如由原本3×3個待顯示資料區D4擴增為4×4個待顯示資料區D4,藉此減少該處理單元A1之負擔); 請參閱圖3、4、8、9,在該顯示裝置A顯示的電路板資訊,亦可係利用該處理單元A1分析該電路板設計資料D與該電路板量測資料T之差異後,在該電路板設計資料D上標註該電路板設計資料D與該電路板量測資料T之差異處,並藉由該顯示單元A2顯示具有標註之該待顯示資料區D4;前述辨識與標註差異並顯示之方式, 例如以該處理單元A1將該電路板設計資料D與該電路板量測資料T的尺寸縮放為預設比例後,使該電路板設計資料D之所述預設對位標記D3與該電路板量測資料T之所述對位標記圖像T3位置重疊,並使該電路板設計資料D的該預設邊界D1對應該電路板量測資料T的邊界圖像T1,使得該電路板設計資料D對應至該電路板量測資料T,而完成該電路板設計資料D與該電路板量測資料T的對位,並以例如方框之標註D5框選出該電路板設計資料D中有所述預設圖案D2但該電路板量測資料T中無對應之加工圖案圖像T2處,之後該處理單元A1將具有所述標註D5之該電路板設計資料D劃分為3×3個以矩陣方式排列且大小相同之待顯示資料區D4,該顯示單元A2可依需求選擇性地輪流顯示具有所述標註D5之該待顯示資料區D4或其它的該待顯示資料區D4。In the implementation of the method for displaying circuit board information according to the embodiment of the present invention, please refer to FIGS. 6 and 7 . The circuit board information displayed on the display device A is divided into a plurality of pieces of the circuit board design data D by the processing unit A1. Display the data area D4, and use the display unit A2 to selectively display at least one of the to-be-displayed data areas D4 in turn; in the embodiment of the present invention, the processing unit A1 divides the circuit board design data D into 3 ×3 data areas D4 to be displayed that are arranged in a matrix and have the same size, each of the data areas to be displayed D4 is arranged with a plurality of the preset patterns D2, the display unit A2 first displays the data area to be displayed D4 in the upper left corner , and can selectively display other data areas D4 to be displayed in turn according to requirements; wherein, in the data area D4 to be displayed displayed by the display unit A2, the number of the preset patterns D2 that can be displayed does not exceed 80 10,000 (if the preset patterns D2 are irregularly distributed with uneven density, so that the number of the preset patterns D2 in at least one of the display data areas D4 exceeds 800,000, the processing unit A1 will Divide more data areas D4 to be displayed, such as expanding the original 3×3 data areas D4 to be displayed to 4×4 data areas D4 to be displayed, thereby reducing the burden on the processing unit A1); Please refer to FIGS. 3, 4, 8, and 9. The circuit board information displayed by the display device A can also be analyzed by the processing unit A1 after analyzing the difference between the circuit board design data D and the circuit board measurement data T, and then The circuit board design data D is marked with the difference between the circuit board design data D and the circuit board measurement data T, and the display unit A2 displays the marked data area D4 to be displayed; the aforementioned identification and marking differences are not In a display manner, for example, after the processing unit A1 scales the size of the circuit board design data D and the circuit board measurement data T to a predetermined ratio, the predetermined alignment mark D3 of the circuit board design data D is set. It overlaps with the position of the alignment mark image T3 of the circuit board measurement data T, and makes the predetermined boundary D1 of the circuit board design data D correspond to the boundary image T1 of the circuit board measurement data T, so that the The circuit board design data D corresponds to the circuit board measurement data T, and the alignment of the circuit board design data D and the circuit board measurement data T is completed, and the circuit board design data is selected by the box marked D5. There is the preset pattern D2 in D but there is no corresponding processing pattern image T2 in the circuit board measurement data T, then the processing unit A1 divides the circuit board design data D with the mark D5 into 3× There are three data areas D4 to be displayed that are arranged in a matrix manner and have the same size, and the display unit A2 can selectively display the data area D4 to be displayed with the label D5 or other data areas D4 to be displayed in turn as required.

本發明實施例之電路板資訊顯示方法及裝置,該處理單元A1將該電路板設計資料D劃分為複數個待顯示資料區D4,且該顯示單元A2一次僅顯示複數個該待顯示資料區D4中之部分該待顯示資料區D4,在不改變該處理單元A1規格之下,可減少該處理單元A1之負擔,改善顯示畫面處理遲滯之情事。In the circuit board information display method and device according to the embodiment of the present invention, the processing unit A1 divides the circuit board design data D into a plurality of data areas D4 to be displayed, and the display unit A2 only displays a plurality of the data areas D4 to be displayed at a time Part of the data area D4 to be displayed can reduce the burden of the processing unit A1 without changing the specification of the processing unit A1 and improve the processing delay of the display screen.

惟以上所述者,僅為本發明之較佳實施例而已,當不能以此限定本發明實施之範圍,即大凡依本發明申請專利範圍及發明說明內容所作之簡單的等效變化與修飾,皆仍屬本發明專利涵蓋之範圍內。However, the above are only preferred embodiments of the present invention, and should not limit the scope of the present invention, that is, any simple equivalent changes and modifications made according to the scope of the patent application of the present invention and the contents of the description of the invention, All still fall within the scope of the patent of the present invention.

A:顯示裝置 A1:處理單元 A2:顯示單元 B:取像裝置 B1:攝像器 B2:載台 D:電路板設計資料 D1:預設邊界 D2:預設圖案 D3:預設對位標記 D4:待顯示資料區 D5:標註 T:電路板量測資料 T1:邊界圖像 T2:加工圖案圖像 T3:對位標記圖像 W:待測電路板 W1:取像面 W2:實體加工圖案 W3:實體對位標記A: Display device A1: Processing unit A2: Display unit B: imaging device B1: Camera B2: stage D: circuit board design information D1: Preset Boundary D2: Preset Pattern D3: Preset registration mark D4: Data area to be displayed D5: Label T: circuit board measurement data T1: Boundary image T2: Processed pattern image T3: Alignment Marker Image W: circuit board to be tested W1: image plane W2: Solid machining pattern W3: entity alignment mark

圖1係本發明實施例中電路板資訊顯示裝置之示意圖。 圖2係本發明實施例中電路板資訊顯示裝置與取像裝置訊號連接之示意圖。 圖3係本發明實施例中電路板設計資料之示意圖。 圖4係本發明實施例中電路板量測資料之示意圖。 圖5係本發明實施例中電路板之示意圖。 圖6係本發明實施例中電路板設計資料劃分複數個待顯示資料區之示意圖。 圖7係本發明實施例中顯示單元顯示複數個待顯示資料區中其中一個之示意圖。 圖8係本發明實施例中具有標註之電路板設計資料劃分為複數個待顯示資料區之示意圖。 圖9係本發明實施例中顯示單元顯示具有標註之待顯示資料區之示意圖。FIG. 1 is a schematic diagram of a circuit board information display device according to an embodiment of the present invention. FIG. 2 is a schematic diagram of the signal connection between the circuit board information display device and the imaging device according to the embodiment of the present invention. FIG. 3 is a schematic diagram of circuit board design data in an embodiment of the present invention. FIG. 4 is a schematic diagram of measurement data of a circuit board in an embodiment of the present invention. FIG. 5 is a schematic diagram of a circuit board in an embodiment of the present invention. FIG. 6 is a schematic diagram of dividing the circuit board design data into a plurality of to-be-displayed data areas according to an embodiment of the present invention. FIG. 7 is a schematic diagram of a display unit displaying one of a plurality of data areas to be displayed in an embodiment of the present invention. FIG. 8 is a schematic diagram of dividing the circuit board design data with labels into a plurality of data areas to be displayed according to an embodiment of the present invention. 9 is a schematic diagram of a display unit displaying a marked data area to be displayed according to an embodiment of the present invention.

A1:處理單元A1: Processing unit

A2:顯示單元A2: Display unit

Claims (10)

一種電路板資訊顯示方法,包括:提供一電路板設計資料,該電路板設計資料佈設有複數個預設圖案,所述預設圖案係欲在一待測電路板相對位置上加工成型的圖案;提供一處理單元,將該電路板設計資料劃分為複數個待顯示資料區;提供一顯示單元,一次僅顯示複數個該待顯示資料區中之其中至少一個。 A circuit board information display method, comprising: providing a circuit board design data, the circuit board design data is arranged with a plurality of preset patterns, and the preset patterns are patterns to be processed and formed on a relative position of a circuit board to be tested; A processing unit is provided to divide the circuit board design data into a plurality of data areas to be displayed; a display unit is provided to display at least one of the plurality of data areas to be displayed at a time. 如請求項1所述電路板資訊顯示方法,其中,複數個該待顯示資料區以矩陣方式排列。 The method for displaying circuit board information according to claim 1, wherein a plurality of the data areas to be displayed are arranged in a matrix. 如請求項1所述電路板資訊顯示方法,其中,複數個該待顯示資料區之大小相同。 The method for displaying circuit board information according to claim 1, wherein a plurality of the data areas to be displayed have the same size. 如請求項1所述電路板資訊顯示方法,其中,該預設圖案為鑽孔圖案或線路圖案。 The method for displaying circuit board information according to claim 1, wherein the predetermined pattern is a drilling pattern or a circuit pattern. 如請求項1所述電路板資訊顯示方法,其中,佈設於該電路板設計資料之複數個該預設圖案的數量在100萬個至500萬個之間。 The method for displaying circuit board information as claimed in claim 1, wherein the number of the plurality of preset patterns arranged in the circuit board design data is between 1 million and 5 million. 如請求項1所述電路板資訊顯示方法,其中,複數個該預設圖案佈設於各該待顯示資料區。 The method for displaying circuit board information according to claim 1, wherein a plurality of the preset patterns are arranged in each of the data areas to be displayed. 如請求項6所述電路板資訊顯示方法,其中,藉由該顯示單元顯示之該待顯示資料區具有80萬個以下的該預設圖案。 The method for displaying circuit board information according to claim 6, wherein the data area to be displayed displayed by the display unit has less than 800,000 preset patterns. 如請求項1所述電路板資訊顯示方法,其中,該處理單元分析該電路板設計資料與一電路板量測資料之差異,並在該電路板設計資料上進行差異處之標註;該電路板量測資料係由一攝像器拍攝該待測電路板所取得。 The circuit board information display method according to claim 1, wherein the processing unit analyzes the difference between the circuit board design data and a circuit board measurement data, and marks the difference on the circuit board design data; the circuit board The measurement data is obtained by photographing the circuit board under test with a camera. 如請求項8所述電路板資訊顯示方法,其中,該顯示單元顯示具有標註之該待顯示資料區。 The method for displaying circuit board information according to claim 8, wherein the display unit displays the data area to be displayed with a label. 一種電路板資訊顯示裝置,包括:用以執行如請求項1至9項任一項所述電路板資訊顯示方法之裝置。 A circuit board information display device, comprising: a device for executing the circuit board information display method according to any one of claims 1 to 9.
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