TWI768029B - Manufacturing method of printed circuit board - Google Patents

Abstract

The present invention relates to a method for manufacturing a printed circuit board. The method for manufacturing a printed circuit board of the present invention is characterized by comprising: a step of forming a peeling layer, wherein the peeling layer is formed on a substrate by a first conductive substance; and a step of forming a circuit pattern, in A circuit pattern is formed on the peeling layer by a second conductive substance; the resin layer forming step is to form an insulating resin layer on the peeling layer on which the circuit pattern is formed; the substrate peeling step is to peel off the peeling layer and remove the a substrate; and a peeling layer removing step of removing the peeling layer.

Description

Printed circuit board manufacturing method

The present invention relates to a method for manufacturing a printed circuit board, and more particularly, to a method for manufacturing a printed circuit board capable of preventing damage to a circuit pattern in the process of removing the peeling layer.

Generally speaking, compared with forming the copper foil circuit protruding on the surface of the insulating layer, when the copper foil circuit is buried in the insulating layer, the width and spacing of the copper foil can be reduced, so the circuit is used when realizing the microcircuit pattern. Embedded Trace Substrate (hereinafter referred to as "ETS") method.

In the drawings, FIG. 1 shows a manufacturing method of a printed circuit board using a conventional ETS method.

(a) of FIG. 1 shows a detachable core. The detachable core 100 includes a core 100 a that functions as a support; a carrier copper foil 100 b bonded to the upper part of the core 100 a; and a carrier copper foil bonded to the carrier copper foil The substrate copper foil 100c on the upper part of the 100b, the substrate copper foil 100c is temporarily adhered to the carrier copper foil 100b by an adhesive, and can be separated from the carrier copper foil 100b when a slight physical force is applied. Here, the core 100a and the carrier copper foil 100b may use a copper foil laminate (Copper Clad Laminate, CCL).

As shown in FIG. 1( b ), a superimposed layer composed of circuit patterns 110 , 150 and insulating layers 130 , 160 is formed on the substrate copper foil 100 c of the detachable core 100 , thereby producing printing on both sides of the superimposed layer, respectively. A circuit board, the circuit patterns 110 and 150 of the printed circuit board are embedded in the insulating layers 130 and 160 .

Next, as shown in (c) of FIG. 1 , when the base copper foil 100 c is peeled off from the carrier copper foil 100 b to separate the detachable core 100 from the superimposed layer, two upper and lower circuit boards can be obtained in one process .

Furthermore, as shown in (d) of FIG. 1 , when the substrate copper foil 100 c is removed by etching, a circuit board in the form of being buried in the insulating layer 130 is formed, and the circuit pattern 110 is exposed on the surface after the substrate copper foil 100 c is removed .

However, in order to easily peel the substrate copper foil 100c from the carrier copper foil 100b, the detachable core 100 requires a process of coating an adhesive, a process of laminating the carrier copper foil on the adhesive, and laminating process, thus increasing the manufacturing cost.

In addition, the substrate copper foil 100c attached to the superimposed layer is composed of the same copper material as the circuit pattern 110, and in the process of removing the substrate copper foil 100c by a chemical method such as etching, there is a possibility that the circuit pattern 110 is exposed to etching problems in the liquid.

In the case of the conventional technique as described above, the circuit pattern is inevitably etched together in the process of etching the substrate copper foil 100c, resulting in a recessed shape in which the circuit pattern is slightly recessed from the surface of the insulating layer. That is, a recess depth defect is generated.

In particular, when the ETS method is applied to fabricate the interconnection pads of the semiconductor wafer according to the prior art, the pads are recessed inward with respect to the surface of the insulating layer, which is used to bond the semiconductor die in the packaging process of electronic components. In the process of BOL (Bump on Lead), there will be a non-wet issue that cannot be soldered, which will reduce the process yield.

Therefore, the present invention has been made in order to solve the above-mentioned conventional problems, and an object thereof is to provide a method for manufacturing a printed circuit board, which can prevent damage to a circuit pattern in the process of removing the peeling layer.

The object is achieved by the method for manufacturing a printed circuit board of the present invention, which is characterized by comprising: a step of forming a peeling layer, wherein the peeling layer is formed on the substrate by a first conductive substance; a circuit pattern In the forming step, a circuit pattern is formed on the peeling layer by using the second conductive substance; the resin layer forming step, an insulating resin layer is formed on the peeling layer on which the circuit pattern is formed; the substrate peeling step is from the peeling layer peeling and removing the substrate; and removing the peeling layer, removing the peeling layer.

Here, preferably, the peel strength for peeling the substrate from the peeling layer is set to 10 gf/cm to 100 gf/cm.

Furthermore, preferably, the peeling layer and the circuit pattern are formed of conductive substances of different materials from each other.

In addition, preferably, in the step of removing the peeling layer, an etching solution composition that can only dissolve the peeling layer is used to remove the peeling layer.

Furthermore, preferably, the peeling layer is formed of silver (Ag), and the circuit pattern is formed of copper (Cu).

Moreover, it is preferable that the said board|substrate is comprised by the copper foil laminated film (Copper Clad Laminate) which laminated|stacked copper foil on at least one surface of a resin layer.

Furthermore, preferably, in the peeling layer forming step, silver (Ag) is coated on the copper foil of the copper foil-laminated film to form the peeling layer.

According to the present invention, there is provided a method of manufacturing a printed circuit board capable of preventing damage to a circuit pattern during removal of a peeling layer.

Before describing the present invention, it should be noted that, in multiple embodiments, the same symbols are used for components having the same structure, and a representative description is given in the first embodiment, and in other embodiments, the same symbols are used for components with the same structure. A different structure of an embodiment will be described.

Hereinafter, the manufacturing method of the printed circuit board according to the first embodiment of the present invention will be described in detail with reference to the drawings.

In the drawings, FIG. 2 is a sequence diagram showing a method of manufacturing a printed circuit board according to a first embodiment of the present invention, and FIG. 3 is a process-by-process diagram showing a method of manufacturing a printed circuit board according to the first embodiment of the present invention. Cutaway view of steps.

The manufacturing method of the printed circuit board according to the first embodiment of the present invention as shown in the figure includes a peeling layer forming step ( S10 ), a circuit pattern forming step ( S20 ), a resin layer forming step ( S30 ), and a substrate peeling step ( S40) and the peeling layer removal step (S50).

In the peeling layer forming step ( S10 ), as shown in FIG. 3( a ), a first conductive substance made of silver (Ag) is coated on one surface of the substrate 10 to form the peeling layer 20 . The release layer 20 may be formed by gravure printing, screen printing, slot die coating, spin coating, dip coating or spray coating (spray coating) etc. to form.

In addition, in this embodiment, the first conductive material is made of silver (Ag) as an example, but it can be made of iron, copper, aluminum, nickel, lead, zinc, tin, gold, titanium, etc. with excellent conductivity. of any metal.

In the circuit pattern forming step ( S20 ), as shown in FIG. 3( b ), a second conductive material made of copper (Cu) material different from the first conductive material is formed on the peeling layer 20 substance to form the circuit pattern 30 . Here, the circuit pattern 30 may be formed by a subtractive process or an additive process in various ways.

In this embodiment, the second conductive material is made of copper (Cu) as an example for description, but it is not limited to this. The second conductive material can be made of silver, iron, aluminum, nickel, lead, Among metals having excellent electrical conductivity such as zinc, tin, gold, and titanium, it is made of a material that cannot be dissolved in the process of dissolving the first conductive substance.

In the resin layer forming step ( S30 ), as shown in FIG. 3( c ), the resin layer 40 may be formed on the release layer 20 on which the circuit pattern 30 is formed, and the resin layer 40 may be covered The circuit pattern 30 formed on the peeling layer 20 . As the resin layer 40 , a polymer such as epoxy, urethane and ester resin, a UV curable resin or a fiber-reinforced resin can be used. Prepreg (PREPREG; Preimpregnated Materials) and so on. As an example, in the resin layer forming step ( S30 ), a prepreg resin in an uncured state may be applied to the release layer 20 on which the circuit pattern 30 is formed, and pressure may be applied to bond it, followed by heating. The cured resin layer 40 can also be joined and cured simultaneously by a hot pressing process that provides heat and pressure.

In addition, when a printed circuit board is applied to a transparent display, the resin layer 40 is preferably formed using a resin having high transmittance after curing.

In this embodiment, for the convenience of description, the circuit pattern 30 having a single-layer structure is taken as an example for description, but the circuit pattern forming step ( S20 ) and the resin layer forming step ( S30 ) may be repeated as necessary. to form the circuit pattern 30 of the multilayer structure.

In the substrate peeling step ( S40 ), the substrate 10 is peeled and removed from the peeling layer 20 . At this time, the peel strength for peeling the substrate 10 from the peeling layer 20 is preferably set to 10 gf/cm to 100 gf/cm.

Specifically, as shown in (d) of FIG. 3 , the substrate peeling step ( S40 ) is for separating the substrate 10 from the peeling layer 20 , and the peeling strength for peeling the substrate 10 from the peeling layer 20 should be It is set so that the board|substrate 10 can be peeled easily by a human hand.

In the present embodiment, it should be possible to easily peel from the peeling layer 20 in the substrate peeling step ( S40 ), so although the peeling strength is too high to be a problem, the peeling strength should be maintained in the circuit pattern forming step ( S20 ). ) or the resin layer forming step ( S30 ) is not arbitrarily peeled off.

From this viewpoint, the peel strength is preferably 10 gf/cm to 100 gf/cm, more preferably 20 gf/cm to 40 gf/cm. When the peeling strength for peeling the substrate 10 from the peeling layer 20 is less than 10 gf/cm, the substrate may be peeled off arbitrarily during transportation or processing. When the peeling strength exceeds 100 gf/cm, in the substrate peeling step ( In S40), the substrate 10 may not be easily peeled off.

In addition, the said peeling strength was detected according to the 90 degree peeling strength detection method prescribed|regulated by JIS C6481.

After the substrate 10 is peeled off from the peeling layer 20 by the substrate peeling step ( S40 ), the peeling layer 20 is removed by the peeling layer removing step ( S50 ).

Specifically, in the peeling layer removing step ( S50 ), as shown in (e) of FIG. 3 , an etchant composition that can only dissolve the peeling layer 20 composed of the first conductive substance of silver (Ag) material is used to remove the peeling layer 20 . The release layer 20 is dissolved and removed. In particular, in the process of dissolving the peeling layer 20 , the copper (Cu) material second conductive substance exposed in the etching solution composition will not be dissolved, so the circuit pattern 30 can be prevented from being damaged in the process of removing the peeling layer 20 .

In this way, the peeling layer 20 and the circuit pattern 30 are made of different materials, and when only the peeling layer 20 is dissolved and removed, it is possible to prevent a defect in the recess depth of the circuit pattern 30 . In addition, since the exposed surface of the circuit pattern 30 and the surface of the resin layer 40 form the same plane, it is possible to prevent non-wet issues that cannot be soldered during the bonding of the semiconductor die and BOL (Bump on Lead). .

Next, the manufacturing method of the printed wiring board of the 2nd Example of this invention is demonstrated.

In the drawings, FIG. 4 is a cross-sectional view by process steps showing a manufacturing method of a printed circuit board according to a second embodiment of the present invention.

As shown in the drawings, in the method for manufacturing a printed circuit board according to the second embodiment of the present invention, the substrate 10 is made of a copper foil laminated film (Copper foil 10b laminated with copper foils 10b on both surfaces of the insulating layer 10a). Clad Laminate), and through the peeling layer forming step ( S10 ), the circuit pattern forming step ( S20 ), the resin layer forming step ( S30 ), the substrate peeling step ( S40 ) and the peeling layer removing step ( S50 ) on the substrate The circuit board is formed on both sides of 10 as an example, and the description will be given as an example.

In the peeling layer forming step ( S10 ), as shown in FIG. 4( a ), a first conductive substance made of silver (Ag) is coated on the copper foils 10 b provided on both sides of the insulating layer 10 a to form a peeling layer 20. Like the first embodiment, such a release layer 20 can be formed by various coating methods. In addition, the first conductive substance may be composed of one of metals having excellent electrical conductivity such as iron, copper, aluminum, nickel, lead, zinc, tin, gold, and titanium in addition to silver (Ag).

In the circuit pattern forming step ( S20 ), a circuit pattern 30 is formed on the peeling layer 20 by a second conductive material of copper (Cu) material different from the first conductive material. In this embodiment, the second conductive material is made of copper (Cu) as an example for description, but it is not limited to this. The second conductive material can be made of silver, iron, aluminum, nickel, lead, Among metals with excellent electrical conductivity, such as zinc, tin, gold, and titanium, the material is formed of a material different from that of the first conductive material.

In the circuit pattern forming step ( S20 ), the circuit pattern 30 may be formed through a subtractive process or an additive process in various ways. As an example, the circuit pattern forming step ( S20 ) may include a photosensitive layer forming step ( S21 ), an exposure and development step ( S22 ), and a gold plating step ( S23 ) in order to form the circuit pattern 30 by the SAP (Semi Additive Process) method. and the photosensitive layer removal step (S24). In the photosensitive layer forming step ( S21 ), as shown in FIG. 4( b ), a photosensitive material is coated on the peeling layer 20 to form the photosensitive layer 31 , and in the exposing and developing step ( S22 ), As shown in (c) of FIG. 4 , pattern grooves 32 that selectively expose the peeling layer 20 are formed on the photosensitive layer 31 . Therefore, the peeling layer 20 is selectively exposed through the pattern grooves 32 of the photosensitive layer 31 according to the pattern of the circuit to be formed. In the gold plating step ( S23 ), as shown in FIG. 4( d ), the circuit pattern 30 is formed by plating the second conductive substance inside the pattern groove 32 . At this time, it is preferable that the second conductive material is provided with copper having a high conductivity. In the gold plating process, the peeling layer 20 exposed through the pattern groove 32 functions as an electrode, so that the second conductive substance can be filled in the pattern groove 32 . In the photosensitive layer removing step ( S24 ), as shown in FIG. 4( e ), the circuit pattern 30 may be formed by removing the photosensitive layer 31 except for the second conductive substance filled in the pattern groove 32 .

In the resin layer forming step ( S30 ), as shown in FIG. 4( f ), the resin layer 40 may be covered by forming the resin layer 40 on the peeling layer 20 on which the circuit pattern 30 is formed. The circuit pattern 30 formed on the peeling layer 20 . As the resin layer 40 , resin, epoxy resin, or fiber-reinforced prepreg (Preimpregnated Materials, PREPREG) can be used. Specifically, in the resin layer forming step ( S30 ), an uncured prepreg resin may be applied on the release layer 20 on which the circuit pattern 30 is formed, and after applying pressure to bond, heating may be performed to The cured resin layer 40 is formed, and the bonding and curing can also be achieved simultaneously by a hot pressing process that provides heat and pressure.

In this embodiment, for the convenience of description, the circuit pattern 30 having a single-layer structure is taken as an example for description, but the circuit pattern forming step ( S20 ) and the resin layer forming step ( S30 ) may be repeated as necessary. to form the circuit pattern 30 of the multilayer structure.

In the substrate peeling step ( S40 ), as shown in FIG. 4( g ), the substrate 10 is peeled and removed from the peeling layer 20 . At this time, preferably, the peeling strength for peeling the substrate 10 from the peeling layer 20 is set to 10 gf/cm to 100 gf/cm.

Specifically, the substrate peeling step ( S40 ) is a step for separating the substrate 10 from the peeling layer 20 , and the peeling strength for peeling the substrate 10 from the peeling layer 20 should be set so that it can be easily peeled off by hand the extent of the substrate 10 .

In this embodiment, it should be possible to easily peel from the peeling layer 20 in the substrate peeling step ( S40 ), so that the peeling strength is too high to be a problem, but the peeling strength should be maintained in the circuit pattern forming step ( S20 ) or the resin layer forming step ( S30 ) is not arbitrarily peeled off.

From this viewpoint, the peel strength is preferably 10 gf/cm to 100 gf/cm, more preferably 20 gf/cm to 40 gf/cm. When the peeling strength for peeling the substrate 10 from the peeling layer 20 is less than 10 gf/cm, the substrate may be peeled off arbitrarily during transportation or processing. When the peeling strength exceeds 100 gf/cm, in the substrate peeling step ( In S40), the substrate 10 may not be easily peeled off.

In addition, the said peeling strength was detected according to the 90 degree peeling strength detection method prescribed|regulated by JIS C6481.

When the substrate 10 is peeled from the peeling layer 20 through the substrate peeling step ( S40 ), two printed circuit boards may be formed by one process, and then the peeling layer removing step ( S50 ) is performed to remove the adhesion on each printed circuit board. the release layer 20.

Specifically, in the step of removing the peeling layer ( S50 ), as shown in (h) of FIG. 4 , an etchant composition that can only dissolve the peeling layer 20 composed of the first conductive substance of silver (Ag) material is used to remove the peeling layer 20 . The release layer 20 is dissolved and removed. In particular, in the process of dissolving the peeling layer 20 , the copper (Cu) material second conductive substance exposed in the etching solution composition will not be dissolved, so the circuit pattern 30 can be prevented from being damaged in the process of removing the peeling layer 20 .

In this way, the peeling layer 20 and the circuit pattern 30 are made of different materials, and when only the peeling layer 20 is dissolved and removed, it is possible to prevent a defect in the recess depth of the circuit pattern 30 . In addition, since the exposed surface of the circuit pattern 30 and the surface of the resin layer 40 form the same plane, it is possible to prevent non-wet issues that cannot be soldered during the bonding of the semiconductor die and BOL (Bump on Lead). .

In addition, the peeling strength of the peeling layer and the board|substrate of this Example as mentioned above is demonstrated in detail by the test example. These test examples are merely examples for illustrating the present invention, and the scope of the present invention is not limited to these test examples.

<Test example 1> Peel strength test

1. As shown in FIG. 5( a ), on the copper foil 10 b of the substrate 10 having a copper (Cu) thin film 10 b with a thickness of 18 ㎛ formed on one side of the insulating layer 10 a , a silver (Ag) release layer is applied with a thickness of 0.3 ㎛ on the copper foil 10 b 20.

2. As shown in FIG. 5( b ), a layer of copper circuit pattern 30 is coated on the silver (Ag) peeling layer 20 with a thickness of 15㎛.

3. As shown in FIG. 5( c ), soft etching is performed on the surface of the circuit pattern 30 layer.

4. As shown in (d) of FIG. 5 , a prepreg is laminated on the circuit pattern 30 layer, and pressure and heat are supplied to form the resin layer 40 .

5. As shown in FIG. 5( e ), the substrate 10 is peeled off from the peeling layer 20 , and the peeling layer 20 formed on the copper foil 10 b of the substrate 10 at this time is transferred to the circuit pattern 30 layer.

6. As shown in (f) of FIG. 5 , a copper (Cu) sample layer 50 is coated with a thickness of 20㎛ on the exposed surface of the peeling layer 20 .

7. After making two identical circuit boards through the above-mentioned process, as shown in (g) of FIG. 5 , the sample layer 50 is peeled off from the peeling layer 20 and the peeling strength is detected at the same time, and the result is as shown in the graph of FIG. 6 . As shown, a maximum value of 0.028 kgf/cm and a minimum value of 0.020 kgf/cm were detected.

<Test example 2> Sag depth test

1. Referring to FIG. 4( a ), a silver (Ag) peeling layer 20 is coated with a thickness of 0.3 ㎛ on the copper foil 10 b of the substrate 10 having a copper (Cu) thin film 10 b formed on one side of the insulating layer 10 a with a thickness of 0.3 ㎛.

2. As shown in FIG. 4( b ), a photosensitive layer 31 is coated on the silver (Ag) peeling layer 20 with a thickness of 15㎛.

3. As shown in (c) of FIG. 4 , pattern grooves 32 are formed on the photosensitive layer 31 through exposure and development processes.

4. As shown in FIG. 4( d ), through the gold plating process, copper is filled in the pattern groove 32 with a thickness of 13㎛ to form the circuit pattern 30 .

5. As shown in FIG. 4( e ), the photosensitive layer 31 is removed.

6. As shown in (f) of FIG. 4 , a prepreg is laminated on the release layer 20 on which the circuit pattern 30 is formed, and pressure and heat are supplied to form the resin layer 40 .

7. As shown in FIG. 4( g ), the substrate 10 is peeled off from the peeling layer 20 , and the peeling layer 20 formed on the copper foil 10 b of the substrate 10 at this time is transferred to the circuit pattern 30 layer.

8. Next, as shown in (h) of FIG. 4 , the release layer 20 transferred to the circuit pattern 30 side is dissolved by using an etching solution composition that can only dissolve the release layer 20 made of silver (Ag) material. As shown in FIG. 7 , it was confirmed that the copper (Cu) material circuit pattern 30 was not damaged.

Next, the etching liquid composition used in this invention is demonstrated.

As the selective etching liquid composition of silver, silver alloy or silver compound used in the present invention, the etching liquid composition containing an ammonia compound and an oxidizing agent described in Korean Invention Patent No. 10-0712879 of the applicant can be used; Oxidizing agents including, for example, oxidizing gases, peroxides or peroxyacids; aliphatic amines, aromatic amines, alkanolamines or ammonia compounds; chelating agents, defoaming agents, wetting agents, pH adjusting agents and In addition, at least one or more additives selected to improve the performance of the etching solution; and a water-selective etching solution composition. Each composition of the selective etching solution will be specifically described below.

The oxidizing agent (Oxidizing agent) contained in the etching solution composition functions to oxidize the silver material on the surface of the peeling layer. Etching liquid compositions using nitric acid, hydrochloric acid, sulfuric acid, phosphoric acid, ferric nitrate, ferric chloride, ferric sulfate, ferric phosphate, or the like are disclosed in the prior art. However, since these etching liquid compositions oxidize and dissociate metals such as copper, nickel, and chromium, they are not suitable for circuit etching liquids that selectively etch only silver.

The oxidant uses oxidizing gases such as air, oxygen and ozone; such as sodium perborate (Sodium perborate), hydrogen peroxide (Hydrogen peroxide), sodium bismuthate (Sodium bismuthate), sodium percarbonate (Sodium percarbonate), Peroxides (Peroxides) such as Benzoyl peroxide, Potassium peroxide and Sodium peroxide; such as Formic acid, Peroxyacetic acid, Peroxide Peroxy acid such as Perbenzoic acid, 3-Chloroperoxybenzoic acid and Trimethylacetic acid; and Potassium persulfate, when using these In the case of an oxidizing agent, it is preferable to mix and use at least one oxidizing agent.

The oxidizing agent is preferably contained in an amount of 1 to 30% by weight, more preferably 5 to 18% by weight, relative to the total weight of the etching solution composition of silver, silver alloy or silver compound. When the oxidizing agent is less than 1 wt %, the etching speed is slow, and perfect etching cannot be achieved, so that a large amount of silver residues may be generated. When silver residues exist between circuits, short circuits can occur, resulting in defective products, and slow etching rates can affect productivity. When the content of the oxidizing agent exceeds 30 wt %, although the etching speed of the exposed peeling layer is faster, it will affect the peeling layer existing under the circuit layer, thereby causing excessive undercutting phenomenon. Such an undercut phenomenon is a factor affecting the adhesion of the circuit layer, so it is preferable to suppress the occurrence of the undercut phenomenon.

Aliphatic amine or Aromatic amine or Alkanol amine or ammonium compound contained in the etching solution composition of silver or silver alloy or silver compound acts to oxidize silver in peeling layer effect of dissociation. It is possible to selectively etch only silver or a silver alloy or a silver compound by an oxidation reaction caused by an oxidizing agent and a dissociation reaction caused by an aliphatic amine or an aromatic amine. As mentioned above, nitric acid, hydrochloric acid, sulfuric acid, phosphoric acid, ferric nitrate, ferric hydrochloride, ferric sulfate and ferric phosphate, etc. contained in the conventional etching solution compositions, one of which reacts with copper as the main etchant, thereby simultaneously producing oxidation and dissociation. However, the etching solution of the present invention is responsible for the oxidation and dissociation of each of the two substances, and the dissociation reaction of the oxidized silver with aliphatic amines or aromatic amines or alkanolamines or ammonium compounds is more intense than the copper dissociation reaction. Silver or silver alloys or silver compounds are used to form the seed layer for selective etching.

The aliphatic amine or aromatic amine or alkanolamine or ammonium compound uses ethylamine (Ethylamine), propylamine (Propylamine), isopropylamine (Isopropylamine), n-butylamine (n-Butylamine), isobutylamine (Isobutylamine), secondary sec-Butylamine, Diethylamine, Piperidine, Tyramine, N-Methyltyramine, Pyrroline, Pyrrolidine , Imidazole, Indole, Pyrimidine, Ethanolamine, 6-Amino-2-methyl-2-heptanol, 1 - 1-Amino-2-propanol, Methanolamine, Dimethylethanolamine, N-Methylethanolamine, 1-Aminoethanol ), 2-amino-2-methyl-1-propanol, Ammonium carbonate, Ammonium phosphate, Ammonium nitrate, Amines or ammonium compounds such as ammonium fluoride (Ammonium fluoride) and ammonia hydroxide (Ammonium hydroxide), and when such amines or ammonium compounds are used, it is preferable to mix and use at least one amine or ammonium compound.

The aliphatic amine, aromatic amine, alkanolamine or ammonium compound contained is preferably 1 to 75 wt %, more preferably 20 to 70 wt %, relative to the total weight of the silver material peeling layer etching solution composition. When the aliphatic amine or aromatic amine or alkanolamine or ammonium compound is less than 1% by weight, the dissociation reaction of the oxidized silver is not good, which may cause the etching speed of the silver peeling layer to be slow. When it exceeds 75% by weight, although the selective etching of the peeling layer does not cause problems, the excessive use of amines or ammonium compounds will be the main reason for the oxidizing agent to hinder the oxidation of silver or silver alloys or silver compounds in the etching solution. effect, which drastically reduces the selective etch rate. Therefore, it is preferable to use an amount that can cause an oxidation reaction on the surface of the peeling layer and dissolve the oxidized silver so that selective etching can be smoothly performed.

One or more selected from a chelating agent, an antifoaming agent, a wetting agent, a pH adjuster, and other that are included in the etching solution composition of silver, silver alloy, or silver compound of the present invention to improve the etching performance of the etching solution The additive of the etchant plays the role of removing the bubbles that may be generated during the oxidation reaction, and plays the role of imparting wettability, etc., which can make the etching solution well adsorbed on the surface of the peeling layer. Commonly used additives capable of enhancing the effect of the present invention.

Depending on the type and function of the additive, the additive is preferably contained in an amount of 0.1 to 10 wt %, more preferably 1 to 7 wt %, relative to the total weight of the silver material peeling layer etching solution composition. When the content of the additive is less than 0.1% by weight, the effect of the present invention, that is, the selective etching characteristic cannot be improved, and when the content of the additive exceeds 10% by weight, the etching solution will gel (or gel) and greatly Decreased etching characteristics.

The etching liquid composition of the silver or silver alloy or silver compound of this invention contains the above-mentioned substances, and the balance water is included in 100 weight% in total. Deionized water is preferably used for water.

Hereinafter, the present invention will be described in more detail by way of examples, but the examples are merely examples of the present invention, and the scope of the present invention is not limited to the examples.

Example 1: Preparation of Selective Etching Liquid Composition

1-1: Preparation of Selective Etching Liquid Composition 1

For 12 wt% hydrogen peroxide, 40 wt% monoethanolamine, 1 wt% wetting agent, 1 wt% antifoaming agent and 46 wt% Selective etching solution composition 1 was prepared by mixing the deionized water (DI water).

1-2: Preparation of Selective Etching Liquid Composition 2

7% by weight of sodium percarbonate (Sodium percarbonate), 32.5% by weight of N-Methyldiethanolamine (N-Methyldiethanolamine), 0.5% by weight of wetting agent, 1% by weight of defoamer and 59% by weight of defoamers Selective etching liquid composition 2 was prepared by mixing ionized water.

1-3: Preparation of Selective Etching Liquid Composition 3

4% by weight of sodium percarbonate, 60% by weight of N-Methyldiethanolamine (N-Methyldiethnaolamine), 1.5% by weight of wetting agent, 0.5% by weight of defoamer and 34% by weight of deionized water were mixed And the selective etching liquid composition 3 was prepared.

Example 2: Preparation of Comparative Example

2-1: Preparation of Comparative Example 1

For comparison with the selective etching liquid compositions 1 to 3 prepared in Example 1, referring to Example 1 described in Korean Laid-Open Patent Publication No. 10-2016-0115189, 10 wt % of iron nitrate, 5 wt % % nitric acid, 5 wt % acetic acid, 1 wt % EDTA, 1 wt % glycolic acid, and 78 wt % deionized water were mixed to prepare Comparative Example 1.

2-2: Preparation of Comparative Example 2

For comparison with the selective etching liquid compositions 1 to 3 prepared in Example 1, referring to Example 1 described in Korean Laid-Open Patent Publication No. 10-2010-0098409, 7 wt % ammonia, 1.5 wt % Comparative Example 2 was prepared by mixing the hydrogen peroxide with 91.5% by weight of deionized water.

2-3: Preparation of Comparative Example 3

For comparison with the selective etching liquid compositions 1 to 3 prepared in Example 1, referring to Comparative Example 2 described in Korean Laid-Open Patent Publication No. 10-2010-0098409, 50 wt % phosphoric acid, 5 wt % Comparative Example 3 was prepared by mixing nitric acid, 30% by weight of acetic acid, and 15% by weight of deionized water.

Example 3: Etching Experiment Results

Etching experiments were performed on the selective etching liquid compositions prepared in Example 1 and the comparative examples prepared in Example 2 under the following ICP analysis experimental conditions (Table 1). The conditions are: polyimide (PI) substrate material, sample size of 2.5 × 2.5 cm (Ag coating seed layer, Cu FCCL), etching solution amount of 40 g, etching time of 10 seconds, and ND less than 5 ppm. 【Table 1】 <img wi="114"he="114"file="IMG-2/Draw/02_image001.jpg"img-format="jpg"><imgwi="107"he="107"file="IMG-2/Draw/02_image002.jpg"img-format="jpg"><imgwi="114"he="114"file="IMG-2/Draw/02_image004.jpg"img-format="jpg">< img wi="114"he="114"file="IMG-2/Draw/02_image005.jpg"img-format="jpg"><imgwi="114"he="103"file="IMG-2/Draw/02_image006.jpg"img-format="jpg"><imgwi="103"he="107"file="IMG-2/Draw/02_image008.jpg"img-format="jpg"><imgwi="114"he="114"file="IMG-2/Draw/02_image010.jpg"img-format="jpg"><imgwi="107"he="114"file="IMG-2/Draw/02_image011.jpg"img-format="jpg"><imgwi="114"he="114"file="IMG-2/Draw/02_image012.jpg"img-format="jpg"><img wi ="107"he="114"file="IMG-2/Draw/02_image013.jpg"img-format="jpg"><imgwi="115"he="107"file="IMG-2/Draw/02_image015.jpg"img-format="jpg"><imgwi="114"he="114"file="IMG-2/Draw/02_image017.jpg"img-format="jpg">

As a result, it can be confirmed that in the case of the selective etching liquid compositions 1 to 3, the silver is etched within the etching time of 10 seconds, and the surface of the polyimide substrate material is exposed, and no special discoloration or special conditions appear on the surface of the Cu FCCL. , the surface oxidation by the etching solution is not carried out.

However, in Comparative Examples 1 and 2, it was confirmed that the silver was not 100% etched when etching was performed for the same period of time, but residues were present, and the surface of the Cu FCCL was oxidized and discolored. Furthermore, in Comparative Example 3, it was confirmed that although silver was etched 100% when etching was performed for the same time period, the etching rate of Cu FCCL was also high, resulting in rapid surface oxidation.

It was confirmed by ICP analysis that, when the silver and copper components present in the etching solution were detected and compared, 170 ppm or less of silver was detected in Comparative Examples 1 and 2 in which silver was not 100% etched, and the surface of Cu FCCL was oxidized to Copper was detected under discolored Comparative Examples 1 to 3. In particular, in Comparative Examples 1 and 3 in which the etching amount of silver was large, it was confirmed that a large amount of copper was detected similarly because the etching rate of copper was high.

As a result, it could be confirmed that, unlike Comparative Examples 1 to 3, in the selective etching liquid compositions 1 to 3, the etching amount of silver in the etching time of 10 seconds was 170 ppm or more, silver was 100% etched, and copper was N.D ( less than 5ppm), not detected. From this, it was clearly confirmed that the selective etching liquid compositions 1 to 3 selectively etched only silver.

That is, according to the above embodiment, by suppressing the removal of the metal circuit layer to a minimum, and selectively etching only silver or silver alloy or silver compound, it is possible to provide the copper circuit layer without damaging the copper circuit layer with a high etch factor (Etch factor) etchant composition. Therefore, a high-performance and high-integration circuit can be designed using this etchant composition, and a product that needs to be light, thin, and short can be manufactured.

The right scope of the present invention is not limited to the above-mentioned embodiments, and can be realized by various forms of embodiments within the scope of the appended claims. Within the scope of not departing from the spirit of the invention claimed in the scope of the patent application, various ranges that can be modified by those skilled in the art to which the invention pertains also belong to the scope described in the scope of the patent application of the invention.

10‧‧‧Substrate 10a‧‧‧Insulating layer 10b‧‧‧Copper foil 20‧‧‧Peeling layer 30‧‧‧Circuit pattern 31‧‧‧Photosensitive layer 32‧‧‧Pattern groove 40‧‧‧Resin layer S10‧‧ ‧Peeling layer forming step S20‧‧‧Circuit pattern forming step S30‧‧‧Resin layer forming step S40‧‧‧Substrate peeling step S50‧‧‧Peeling layer removing step

FIG. 1 is a diagram showing a manufacturing method of a printed circuit board using a conventional ETS method;

2 is a sequence diagram showing a method of manufacturing a printed circuit board according to the first embodiment of the present invention;

3 is a cross-sectional view showing a process step of a method for manufacturing a printed circuit board according to the first embodiment of the present invention;

4 is a cross-sectional view showing a process step of a method for manufacturing a printed circuit board according to a second embodiment of the present invention;

5 is a cross-sectional view showing a manufacturing process of a circuit board for testing peel strength in the present invention;

6 is a test example showing the peel strength of the peeling layer produced by the present invention;

7 is an enlarged view showing a cross section of the circuit pattern after the peeling layer removal step of the present invention.

S10‧‧‧Forming step of peeling layer

S20‧‧‧Circuit pattern forming step

S30‧‧‧Resin layer forming step

S40‧‧‧Substrate peeling step

S50‧‧‧Peeling layer removal step

Claims (4)

A method for manufacturing a printed circuit board, characterized in that it comprises: a peeling layer forming step, wherein a peeling layer is formed on a substrate by a first conductive substance; a circuit pattern forming step, a second peeling layer is formed on the peeling layer a conductive substance to form a circuit pattern; a resin layer forming step, forming an insulating resin layer on the peeling layer on which the circuit pattern is formed; a substrate peeling step, peeling off and removing the substrate from the peeling layer; and peeling In the step of removing the layer, the peeling layer is removed. The peeling layer and the circuit pattern are formed of conductive substances of different materials. In the step of removing the peeling layer, an etchant composition that can only dissolve the peeling layer is used to The peeling layer is removed, the peeling layer is formed of silver (Ag), and the circuit pattern is formed of copper (Cu), wherein the etching solution composition includes an oxidizing agent; aliphatic amine, aromatic amine, alkanolamine or Ammonia compounds; additives; and water, wherein the oxidizing agent includes one or more selected from the group consisting of oxidizing gases, peroxides, peroxyacids, and potassium persulfate, wherein the fatty amine , Aromatic amines, alkanolamines or ammonia compounds including from Ethylamine, Propylamine, Isopropylamine, n-Butylamine, Isobutylamine, Secondary sec-Butylamine, Diethylamine, Piperidine, Tyramine, N-Methyltyramine, Pyrroline, Pyrrolidine , Imidazole, Indole, Pyrimidine, Ethanolamine (Ethanolamine), 6-Amino-2-methyl-2-hexanol (6-Amino-2-methyl-2-heptanol), 1-Amino-2-propanol (1-Amino-2-propanol), methanol Methanolamine, Dimethylethanolamine, N-Methylethanolamine, 1-Aminoethanol, 2-amino-2-methyl-1-propanol (2- A group consisting of amino-2-methyl-1-propanol, Ammonium carbonate, Ammonium phosphate, Ammonium nitrate, Ammonium fluoride and Ammonium hydroxide One or more selected from, wherein the additive includes one or more selected from the group consisting of a chelating agent, an antifoaming agent, a wetting agent, and a pH adjusting agent. The method for producing a printed wiring board according to claim 1, wherein the peel strength for peeling the substrate from the peeling layer is set to 10 gf/cm to 100 gf/cm. The method for producing a printed wiring board according to claim 1, wherein the substrate is composed of a copper foil laminate film (Copper Clad Laminate) in which copper foils are laminated on both surfaces of the resin layer. . The method for producing a printed wiring board according to claim 3, wherein in the peeling layer forming step, silver (Ag) is applied to the copper foil of the copper foil laminate film. the release layer.

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