TWI765423B - Pixel driving device and driving method thereof - Google Patents

Abstract

A pixel driving device includes a current source and a pulse width modulation circuit. The current source generates a current. The pulse width modulation circuit is used to perform a reset process according to a reset signal or a previous first sweep signal at a first stage. The pulse width modulation circuit is used to generate a pulse width modulation signal according to a first sweep signal and a select signal at a second stage, and drive the current source to deliver the current to a light emitting device according to the pulse width modulation signal. The select signal generates a pulse signal according to one of several gray levels at the second stage. A time point, at which the pulse signal generated during the second stage, determines a duty circle of the pulse width modulation signal.

Description

Pixel driving device and driving method thereof

This case relates to a display device and method. In detail, the present case relates to a pixel driving device and a pixel driving method.

In the structure of the existing display, a data-driven integrated circuit (IC) is packaged between the glass substrate and the printed circuit board of the liquid crystal display through the chip on film (COF) technology. The data driving integrated circuit is provided to the display panel. However, the data-driven IC using the COF technology occupies a certain volume in the overall display, and increases the production cost of the display. It can be seen from this that there are still many defects in the data-driven integrated circuit using the COF technology, and other suitable data supply methods need to be developed by practitioners in the art.

One aspect of the present case relates to a pixel driving device. The pixel driving device includes a current source and a pulse width modulation circuit. A current source is used to generate current. The pulse width modulation circuit is used for resetting in the first stage according to the reset signal or the first scanning signal of the previous stage. The pulse width modulation circuit is used for generating the pulse width modulation signal according to the first scanning signal and the selection signal in the second stage, and driving the current source according to the pulse width modulation signal, so that the current source provides current to the light-emitting element. The selection signal generates a pulse signal in the second stage according to one of the plurality of gray scales. The time point when the pulse signal is generated in the second stage determines the duty cycle of the PWM signal.

Another aspect of the present case relates to a pixel driving method. The pixel driving method includes: in the first stage, resetting the pulse width modulation circuit according to the reset signal or the first scan signal of the previous stage; and in the second stage, generating the pulse width modulation signal according to the first scan signal and the selection signal , and drives the current source according to the pulse width modulation signal, so that the current source provides current to the light-emitting element. The selection signal generates a pulse signal in the second stage according to one of the plurality of gray scales. The time point when the pulse signal is generated in the second stage determines the duty cycle of the PWM signal.

The following will clearly illustrate the spirit of this case with drawings and detailed descriptions. Anyone with ordinary knowledge in the technical field who understands the embodiments of this case can make changes and modifications by using the techniques taught in this case, which does not deviate from the principles of this case. spirit and scope.

The language used herein is for the purpose of describing particular embodiments and is not intended to be limiting. The singular forms such as "a", "the", "the", "this" and "the", as used herein, also include the plural forms.

The terms "comprising", "including", "having", "containing", etc. used in this document are all open-ended terms, meaning including but not limited to.

Regarding the terms (terms) used in this article, unless otherwise specified, they usually have the ordinary meaning of each term used in this field, in the content of this case and in the special content. Certain terms used to describe the present case are discussed below or elsewhere in this specification to provide those skilled in the art with additional guidance in the description of the present case.

FIG. 1 is a schematic diagram of a partial structure of a pixel driving device according to some embodiments of the present application. As shown in FIG. 1 , in some embodiments, the pixel driving device 100 includes a pulse width modulation circuit 110 and a current source 120 . In some embodiments, the display device includes a plurality of pixels. Each pixel includes at least one pixel driving device 100 .

In some embodiments, please refer to FIG. 1, the pulse width modulation circuit 110 includes a first capacitor C1, a first transistor T1, a second transistor T2, a third transistor T3, a driving transistor DT1 and a light-emitting element L. Please take the top and right sides of the element in the figure as the first terminal, and the first capacitor C1 includes the first terminal and the second terminal. The first transistor T1 includes a first terminal, a second terminal and a control terminal. The first end and the second end of the first transistor T1 are connected in parallel with the first end and the second end of the first capacitor C1. The second end of the first capacitor C1 and the second end of the first transistor T1 receive the power supply voltage VDD (eg, the system high level). The control terminal of the first transistor T1 is turned on according to the signal ST. The first node N1 is located at the first end of the first capacitor C1.

In addition, the second transistor T2 includes a first terminal, a second terminal and a control terminal. The first end of the second transistor T2 is electrically connected to the first end of the first capacitor C1 and the first end of the first transistor T1. The control terminal of the second transistor T2 is turned on according to the selection signal Se1. The third transistor T3 includes a first terminal, a second terminal and a control terminal. The first end of the third transistor T3 is connected in series with the second end of the second transistor T2. The second terminal of the third transistor T3 receives the first reference voltage VREF1. The control terminal of the third transistor T3 is turned on according to the scan signal S1[N].

In addition, the driving transistor DT1 includes a first terminal, a second terminal and a control terminal. The first end of the driving transistor DT1 is electrically connected to the current source 120 . The second end of the driving transistor DT1 is electrically connected to the first end of the light-emitting element L. The control terminal of the driving transistor DT1 and the first capacitor C1 are electrically connected to the first node N1. The second end of the light-emitting element L receives the power supply voltage VSS (eg, the system low potential).

In some embodiments, please refer to FIG. 1, the current source 120 includes a fourth transistor T4. The fourth transistor T4 includes a first terminal, a second terminal and a control terminal. The first end of the fourth transistor T4 receives the power supply voltage VDD (eg, the system high level). The second terminal of the fourth transistor T4 is electrically connected to the first terminal of the driving transistor DT1 in the pulse width modulation circuit 110 . The control terminal of the fourth transistor T4 receives the second reference voltage VREF2.

FIG. 2 is a flow chart of steps of a pixel driving method according to some embodiments of the present application. As shown in FIG. 2 , in some embodiments, the pixel driving method 200 may be performed by the pixel driving device 100 shown in FIG. 1 .

In addition, to make the pixel driving method 200 easy to understand, please refer to FIG. 3, FIG. 4 and FIG. 5 together. The above-mentioned FIG. 3 is a signal timing diagram of the pixel driving method according to some embodiments of the present application. The above-mentioned FIG. 4 is a schematic diagram of the component states of the pixel driving device according to some embodiments of the present application, which corresponds to the pixel driving device 100 in FIG. 1 . The above-mentioned FIG. 5 is a schematic diagram of the component states of the pixel driving device according to some embodiments of the present application, which corresponds to the pixel driving device 100 in FIG. 1 .

In step 210, the pulse width modulation circuit is reset according to the reset signal or the first scan signal of the previous stage in the first stage.

In some embodiments, please refer to FIG. 2 , FIG. 3 and FIG. 4 , the PWM circuit 110 resets the PWM circuit 110 according to the signal ST in the first stage I1 . In some embodiments, the signal ST may be the reset signal R[N] or the previous-stage first scan signal S1[N-1].

For example, the first transistor T1 is turned on in the first stage I1 according to the reset signal R[N] or the first scan signal S1[N-1] of the previous stage, at this time, the power supply voltage VDD is reset through the first transistor T1 Set the potential of the first node N1 of the first capacitor C1 to a high potential.

In step 220, in the second stage, a pulse width modulation signal is generated according to the first scan signal and the selection signal, and the current source is driven according to the pulse width modulation signal, so that the current source provides current to the light-emitting element.

In some embodiments, please refer to FIG. 2, FIG. 3 and FIG. 4, the pulse width modulation circuit 110 generates the pulse width modulation according to the first scan signal S1[N] and the selection signal Sel in the second stage I2 signal, and drives the current source 120 according to the pulse width modulation signal, so that the current source 120 provides current to the light-emitting element L.

In some embodiments, please refer to FIG. 3 , the selection signals Sel1 to Sel5 generate pulse signals in the second stage I2 according to one of the plurality of gray scales. The time point when the pulse signal is generated in the second stage I2 determines the duty cycle of the pulse width modulation signal.

Further, please refer to FIG. 3 , the selection signals Se11 to Se15 are arranged from top to bottom according to the gray scale. As shown in FIG. 3 , the selection signal Se11 corresponds to high grayscale, the selection signal Se12 corresponds to middle and high grayscale, the selection signal Se13 corresponds to middle and low grayscale, the selection signal Sel4 corresponds to low grayscale, and the selection signal Se15 corresponds to zero grayscale. In some embodiments, the time point at which the pulse signal is generated in the second stage I2 is determined according to different selection signals, thereby determining different duty cycles of the pulse width modulation signal.

For example, please refer to FIG. 1 and FIG. 3, in the second stage I2, the second transistor T2 generates a pulse signal according to the selection signal Sel1, and determines the pulse width modulation signal according to the time point P1 when the pulse signal is generated The duty cycle is Duty 1. In some embodiments, the second transistor T2 in the second stage I2 can generate time points P2, P3 and P4 corresponding to the pulse signal according to different selection signals, such as the selection signal Sel2, the selection signal Sel3 and the selection signal Sel4.

For example, please refer to FIG. 3 and FIG. 5, in the second stage I2, when the second transistor T2 is turned on according to the selection signal Sel1 and the third transistor T3 is turned on according to the first scan signal S1[N] to generate During the pulse signal, the second transistor T2 of the pulse width modulation circuit 110 rewrites the potential of the first node N1 of the first capacitor C1 according to the time point P1 when the pulse signal is generated. At this time, the first reference voltage VREF1 passes through the second voltage. The transistor T2 and the third transistor T3 rewrite the original high potential of the first node N1 to a low potential. Next, the rewritten first node N1 maintains a low potential to turn on the driving transistor DT1. Then, the driving transistor DT1 of the pulse width modulation circuit 110 drives the current source 120 according to the pulse width signal, so that the current source 120 continues to provide current to the light-emitting element L. It should be noted that, the second transistor T2 of the PWM circuit 110 can use different selection signals to generate corresponding driving steps. In this embodiment, the selection signal Sel1 is used as an example for description. Since the driving steps of the second transistor T2 using the selection signals Sel2 , Sel3 , Sel4 and Sel5 are similar to the driving steps using the selection signal Sel1 , for the sake of brevity of the description, detailed descriptions are omitted here.

FIG. 6 is a partial structural diagram of a pixel driving device according to some embodiments of the present application. As shown in FIG. 6 , in some embodiments, the pixel driving device 600 includes a pulse width modulation circuit 610 and a current source 620 .

In some embodiments, please refer to FIG. 1 and FIG. 6 , the pixel driving device 600 corresponds to the pixel driving device 100 in FIG. 1 and additional electronic components are added to the pixel driving device 100 , thereby increasing the number of pixels in the pixel driving device 100 . the function of the element driver.

In some embodiments, please refer to FIG. 1 and FIG. 6 , compared with the pulse width modulation circuit 110 , the pulse width modulation circuit 610 additionally adds a ninth transistor T9 . The ninth transistor T9 includes a first terminal, a second terminal and a control terminal. The second end of the ninth transistor T9 is electrically connected to the second end of the driving transistor DT1. The first terminal of the ninth transistor T9 is electrically connected to the control terminal of the ninth transistor T9, and is turned on according to the secondary second scan signal S2[N+1]. The rest of the structure of the pulse width modulation circuit 610 is the same as that of the pulse width modulation circuit 110 in FIG. 1 . For the sake of brevity of the description, it will not be repeated here.

In some embodiments, please refer to FIG. 1 and FIG. 6 , compared with the current source 120 , the current source 620 additionally adds a second capacitor C2 , a fifth transistor T5 , a sixth transistor T6 , and a seventh transistor T7 and the eighth transistor T8. The rest of the structure of the current source 620 is the same as that of the current source 120 in FIG. 1 . For the sake of brevity of the description, it will not be repeated here.

Please refer to FIG. 6 , the second capacitor C2 includes a first terminal and a second terminal. The first terminal of the second capacitor C2 is electrically connected to the control terminal of the fourth transistor T4. The fifth transistor T5 includes a first terminal, a second terminal and a control terminal. The first end of the fifth transistor T5 receives the first reference voltage VREF1, the second end of the fifth transistor T5 is electrically connected to the second end of the second capacitor C2, and the control end of the fifth transistor T5 is used for receiving pulses The signal of the first node N1 of the width modulation circuit 610 is turned on according to the signal of the first node N1. The sixth transistor T6 includes a first terminal, a second terminal and a control terminal. The first terminal of the sixth transistor T6 is electrically connected to the second terminal of the second capacitor C2. The second terminal of the sixth transistor T6 receives the second reference voltage VREF2. The control terminal of the sixth transistor T6 is turned on according to the second scan signal S2[N]. The second node N2 is located at the first end of the second capacitor C2.

Furthermore, the seventh transistor T7 includes a first terminal, a second terminal and a control terminal. The first terminal of the seventh transistor T7 is electrically connected to the first terminal of the second capacitor C2. The second end of the seventh transistor T7 is electrically connected to the second end of the second transistor T2 of the pulse width modulation circuit 610 and the first end of the third transistor T3 . The control terminal of the seventh transistor T7 is turned on according to the second scan signal S2[N]. The eighth transistor T8 includes a first terminal, a second terminal and a control terminal. The first end of the eighth transistor T8 is electrically connected to the second end of the fourth transistor. The second terminal of the eighth transistor T8 is electrically connected to the second terminal of the seventh transistor and is electrically connected to the second terminal of the second transistor T2 of the pulse width modulation circuit 610 and the first terminal of the third transistor T3 end. The control terminal of the eighth transistor T8 is turned on according to the second scan signal S2[N].

FIG. 7 is a signal timing diagram of a pixel driving method according to some embodiments of the present application. As shown in FIG. 7, in some embodiments, the pixel driving device 600 shown in The signal timing diagram is divided into a plurality of sub-stages I11 , I12 , I13 and I14 in the first stage I1 , and the function of the compensation circuit is achieved by the driving method of the plurality of sub-stages. FIGS. 8 to 13 are schematic diagrams illustrating the states of components of a pixel driving device according to some embodiments of the present application, which correspond to the pixel driving device 600 of FIG. 6 .

In some embodiments, first of all, FIG. 8 is a schematic diagram of the component states of the pixel driving device 600 in the first sub-stage I11 of the first stage I1 in FIG. 7 . Next, the control terminal of the first transistor T1 of the pulse width modulation circuit 610 in FIG. 8 is turned on according to the signal ST, and the power supply voltage VDD resets the potential of the first node N1 of the first capacitor C1 to a high level through the first transistor T1 potential. In some embodiments, the signal ST received by the control terminal of the first transistor T1 in FIG. 8 can be different scan signals, such as the reset signal R[N] in FIG. 7 or the first scan of the previous stage The signal S1[N-1] or the second scanning signal S2[N-2] of the previous stage.

In some embodiments, please refer to FIG. 2 , FIG. 7 and FIG. 8 , in the first sub-stage I11 of the first stage I1 , the first transistor T1 of the PWM circuit 610 is turned on according to the signal ST, The power supply voltage VDD resets the potential of the first node N1 of the first capacitor C1 to a high potential through the first transistor T1. In some embodiments, the above-mentioned signal ST in FIG. 7 may be the reset signal R[N] in FIG. 8 or the previous first scan signal S1 [N-1] or the previous second scan signal S2 [N- 2].

In some embodiments, first, FIG. 9 is a schematic diagram of the element state of the pixel driving device 600 in the second sub-stage I12 of the first stage I1 in FIG. 7 . Next, the third transistor T3 of the pulse width modulation circuit 610 in FIG. 9 is turned on according to the first scan signal S1[N], and the sixth transistor T6, the seventh transistor T7 and the eighth transistor of the current source 620 T8 is turned on according to the second scan signal S2[N] to reset the potential of the second node N2 of the second capacitor C2.

In some embodiments, first of all, FIG. 10 is a schematic diagram of the component states of the pixel driving device 600 in the third sub-stage I13 of the first stage I1 in FIG. 7 . Next, the sixth transistor T6 , the seventh transistor T7 and the eighth transistor T8 of the current source 620 in FIG. 10 are turned on according to the second scan signal S2[N] and make the second transistor of the second capacitor C2 of the current source 620 turn on. The node N2 performs compensation. Compared with FIG. 9 , the third transistor T3 of the PWM circuit 610 in this sub-stage is not turned on.

In some embodiments, first, FIG. 11 is a schematic diagram of the element states of the pixel driving device 600 in the fourth sub-stage I14 of the first stage I1 in FIG. 7 . Next, the driving transistor DT1 of the pulse width modulation circuit 610 in FIG. 11 is turned off according to the potential of the first node N1, and the ninth transistor T9 of the pulse width modulation circuit 610 is turned off according to the secondary second scanning signal S2 [ N] turns on and resets the potential of the light-emitting element L.

In some embodiments, first, FIG. 12 is a schematic diagram of the element state of the pixel driving device 600 in the first sub-stage I21 of the second stage I2 in FIG. 7 . In FIG. 12, all transistors of the pulse width modulation circuit 610 or all transistors of the current source 620 are turned off, so that the first node N1 of the first capacitor C1, the second node N2 of the second capacitor C2, and the light-emitting element L are turned off. Maintain the original reset potential.

In some embodiments, first, FIG. 13 is a schematic diagram of the element state of the pixel driving device 600 in the second sub-stage I22 of the second stage I2 in FIG. 7 . In FIG. 13, the second transistor T2 of the pulse width modulation circuit 610 is turned on according to the selection signal Sel and the third transistor T3 is turned on according to the first scan signal S1[N] to generate a pulse width modulation signal, and at this time the pulse width The driving transistor DT1 of the modulation circuit 610 drives the current source 620 according to the pulse width modulation signal, so that the current source 620 provides current to the light-emitting element L. In some embodiments, the second transistor T2 in the above-mentioned FIG. 13 can be generated according to different selection signals in the second sub-stage I22, such as the selection signal Sel1, the selection signal Sel2 and the selection signal Sel3 in FIG. 7 to generate corresponding The time points P1, P2 and P3 of the pulse signal are used to provide pulse width modulation signals with different duty cycles.

In some embodiments, please refer to FIG. 6 and FIG. 7 , according to the different circuit layout designs of the pixel driving device 600 , the signal ST received by the first transistor T1 of the pulse width modulation circuit 610 can be scanned in different ways signal. For example, if the pixel driving device 600 is a medium-sized circuit layout area and requires medium-sized current compensation, the first transistor T1 of the PWM circuit 610 is turned on according to the reset signal R[N]. In addition, if the pixel driving device 600 has a small circuit layout area and needs large current compensation, the first transistor T1 of the pulse width modulation circuit 610 is turned on according to the first scan signal S1[N-1] of the previous stage. In addition, if the pixel driving device 600 has a large circuit layout area and requires large current compensation, the first transistor T1 of the pulse width modulation circuit 610 is turned on according to the second scan signal S2 [N-2].

In some embodiments, please refer to FIG. 1 and FIG. 3 , the pixel driving device 100 passes through the signal operations of the first stage I1 and the second stage I2, that is, one frame time or Frames per second. renew.

In some embodiments, please refer to FIG. 6 and FIG. 7 , the pixel driving device 600 undergoes the signal operation of the first stage I1 and the second stage I2 , that is, the pixel frame number is updated once.

In some embodiments, the current of the pixel driving device 100 or the pixel driving device 600 after one pixel frame number update is determined according to the first reference voltage VREF1 and the second reference voltage VREF2.

According to the foregoing embodiments, the present application provides a pixel driving device. The display using the pixel driving device of the present invention does not need to additionally provide a data driving integrated circuit of chip on film (COF) technology. Therefore, the display using the pixel driving device of the present invention can reduce the production cost.

Although this case is disclosed above with detailed embodiments, this case does not exclude other possible implementations. Therefore, the protection scope of this case should be determined by the scope of the appended patent application, rather than being limited by the foregoing embodiments.

For those skilled in the art, various changes and modifications can be made to this case without departing from the spirit and scope of this case. Based on the foregoing embodiments, all changes and modifications made to this case are also covered by the protection scope of this case.

100: pixel driver 110: Pulse width modulation circuit 120: Current source VDD: Power supply voltage (high potential) VSS: Power supply voltage (low potential) VREF1: The first reference voltage VREF2: The second reference voltage ST: signal S1[N]: The first scan signal Sel: select signal DT1: drive transistor T1: first transistor T2: Second transistor T3: The third transistor C1: first capacitor N1: the first node L: light-emitting element T4: Fourth transistor 200: Method 210~220: Steps R[N]: reset signal S1[N-1], S1[N]: First scan signal Sel1~Sel5: select signal I1: Phase 1 I2: Phase II Duty1~Duty4: duty cycle of pulse width signal P1~P4: The time point when the pulse signal is generated 600: pixel driver 610: Pulse width modulation circuit 620: Current Source VDD: Power supply voltage (high potential) VSS: Power supply voltage (low potential) VREF1: The first reference voltage VREF2: The second reference voltage ST: signal S1[N]: The first scan signal S2[N], S2[N+1]: Second scan signal Sel: select signal DT1: drive transistor T1: first transistor T2: Second transistor T3: The third transistor C1: first capacitor N1: the first node L: light-emitting element C2: second capacitor N2 second node T4: Fourth transistor T5: Fifth transistor T6: sixth transistor T7: seventh transistor T8: Eighth transistor T9: ninth transistor R[N]: reset signal S1[N-1], S1[N]: The first scan signal S2[N-2], S2[N-1], S2[N], S2[N+1]: Second scan signal Sel1~Sel4: select signal I1: Phase 1 I11, I12, I13, I14: Subphases I2: Phase II I21, I22: Subphases Duty1~Duty3: duty cycle of pulse width signal P1~P3: The time point when the pulse signal is generated

The content of this case can be better understood with reference to the embodiments in the following paragraphs and the following drawings: FIG. 1 is a schematic diagram of a partial structure of a pixel driving device according to some embodiments of the present application; FIG. 2 is a flow chart showing the steps of a pixel driving method according to some embodiments of the present application; FIG. 3 is a signal timing diagram of a pixel driving method according to some embodiments of the present application; FIG. 4 is a schematic diagram illustrating the state of components of a pixel driving device according to some embodiments of the present application; FIG. 5 is a schematic diagram of the component states of the pixel driving device according to some embodiments of the present application; FIG. 6 is a partial structural diagram of a pixel driving device according to some embodiments of the present application; FIG. 7 is a signal timing diagram of a pixel driving method according to some embodiments of the present application; FIG. 8 is a schematic diagram of the component states of the pixel driving device according to some embodiments of the present application; FIG. 9 is a schematic diagram showing the state of components of a pixel driving device according to some embodiments of the present application; FIG. 10 is a schematic diagram of the component states of the pixel driving device according to some embodiments of the present application; FIG. 11 is a schematic diagram of the component states of the pixel driving device according to some embodiments of the present application; FIG. 12 is a schematic diagram of the component states of the pixel driving device according to some embodiments of the present application; and FIG. 13 is a schematic diagram illustrating the state of components of a pixel driving device according to some embodiments of the present application.

Domestic storage information (please note in the order of storage institution, date and number) none Foreign deposit information (please note in the order of deposit country, institution, date and number) none

100: pixel driver

110: Pulse width modulation circuit

120: Current source

VDD: Power supply voltage (high potential)

VSS: Power supply voltage (low potential)

VREF1: The first reference voltage

VREF2: The second reference voltage

ST: signal

S1[N]: The first scan signal

Se1: select signal

DT1: drive transistor

T1: first transistor

T2: Second transistor

T3: The third transistor

C1: first capacitor

N1: the first node

L: light-emitting element

T4: Fourth transistor

Claims (10)

A pixel driving device, comprising: a current source for generating a current; and a pulse width modulation circuit for resetting in a first stage according to a reset signal or a first scan signal of a previous stage, wherein the pulse width modulation circuit is used for a second stage according to a first scan signal A scan signal and a selection signal generate a pulse width modulation signal, and drive the current source according to the pulse width modulation signal, so that the current source provides the current to a light-emitting element, wherein the selection signal is based on a plurality of gray scales among which One generates a pulse signal in the second stage, wherein a time point when the pulse signal is generated in the second stage determines a duty cycle of the PWM signal. The pixel driving device of claim 1, wherein the pulse width modulation circuit comprises: a first capacitor, including a first end and a second end; a first transistor including a first terminal, a second terminal and a control terminal, wherein the first terminal and the second terminal of the first transistor are connected in parallel and electrically connected to the first terminal of the first capacitor a terminal and the second terminal, wherein the control terminal of the first transistor is used to reset the first capacitor to a high level according to the reset signal or the first scan signal of the previous stage in the first stage; a second transistor including a first terminal, a second terminal and a control terminal, wherein the first terminal of the second transistor is electrically connected to the first terminal of the first capacitor, wherein the second voltage The control terminal of the crystal is used to turn on in the second stage according to the pulse signal of the selection signal, and at the time point of the second stage, the high potential of the first capacitor is rewritten to a low potential to generate the pulse width modulation. change signal; a third transistor including a first end, a second end and a control end, wherein the first end of the third transistor is connected in series and electrically connected to the second end of the second transistor, wherein the The second terminal of the third transistor is used for receiving a first reference voltage, wherein the control terminal of the third transistor is used for the second stage to be turned on according to the first scan signal; and a driving transistor including a first terminal, a second terminal and a control terminal, wherein the first terminal of the driving transistor is electrically connected to the current source, and the second terminal of the driving transistor is electrically connected to the light-emitting The element, wherein the control terminal of the driving transistor is electrically connected to the first terminal of the first capacitor, and is used for driving the current source according to the pulse width modulation signal, so that the current source provides the current to the light-emitting element. The pixel driving device of claim 2, wherein the current source comprises: a fourth transistor including a first terminal, a second terminal and a control terminal, wherein the second terminal of the fourth transistor is electrically connected to the first terminal of the driving transistor of the pulse width modulation circuit terminal, wherein the first terminal of the fourth transistor is used for receiving a power supply voltage, and the control terminal of the fourth transistor is used for receiving the first reference voltage. The pixel driving device of claim 3, wherein the current source further comprises: a second capacitor including a first end and a second end, wherein the first end of the second capacitor is electrically connected to the control end of the fourth transistor; a fifth transistor including a first end, a second end and a control end, wherein the first end of the fifth transistor is used for receiving the first reference voltage, wherein the first end of the fifth transistor Two terminals are electrically connected to the second terminal of the second capacitor, wherein the control terminal of the fifth transistor is electrically connected to the first capacitor of the pulse width modulation circuit, and is used in the second stage according to the the low potential of the first capacitor of the pulse width modulation circuit is turned on; a sixth transistor including a first end, a second end and a control end, wherein the first end of the sixth transistor is electrically connected to the second end of the second capacitor, wherein the sixth transistor the second terminal of the crystal is used for receiving a second reference voltage, wherein the control terminal of the sixth transistor is used for conducting according to a second scanning signal in the first stage; a seventh transistor including a first end, a second end and a control end, wherein the first end of the seventh transistor is electrically connected to the pulse width modulation circuit, wherein the seventh transistor the second end is electrically connected to the first end of the second capacitor, wherein the control end of the seventh transistor is used for conducting according to the second scan signal in the first stage; and an eighth transistor including a first end, a second end and a control end, wherein the first end of the eighth transistor is electrically connected to the second end of the first transistor, wherein the eighth transistor The second terminal of the crystal is electrically connected to the first terminal of the fourth transistor, and is electrically connected to the pulse width modulation circuit, wherein the control terminal of the eighth transistor is used for the first terminal The stage is turned on according to the second scan signal. The pixel driving device of claim 4, wherein the pulse width modulation circuit further comprises: a ninth transistor including a first end, a second end and a control end, wherein the second end of the ninth transistor is electrically connected to the second end of the driving transistor, wherein the ninth transistor The first end of the crystal is electrically connected to the control end of the ninth transistor, wherein the control end of the ninth transistor is used for resetting the light-emitting element according to the primary second scan signal in the first stage. A pixel driving method, including: In a first stage, a pulse width modulation circuit is reset according to a reset signal or a first scan signal of a previous stage; and In a second stage, a pulse width modulation signal is generated according to a first scan signal and a selection signal, and a current source is driven according to the pulse width modulation signal, so that the current source provides a current to a light-emitting element, wherein the The selection signal generates a pulse signal in the second stage according to one of the plurality of gray scales, wherein a time point when the pulse signal is generated in the second stage determines a duty cycle of the PWM signal. The pixel driving method of claim 6, wherein the step of resetting the pulse width modulation circuit according to the reset signal or the first scan signal of the previous stage in the first stage comprises: A first capacitor of the pulse width modulation circuit is reset to a high level. The pixel driving method of claim 7, wherein the step of generating the PWM signal according to the first scan signal and the selection signal in the second stage comprises: The pulse width modulation circuit is turned on according to the pulse signal of the selection signal, and at the time point of the second stage, the high potential of the first capacitor of the pulse width modulation circuit is rewritten to a low potential to generate the Pulse width modulation signal. The pixel driving method as described in claim 6, further comprising: resetting a second capacitor of a current source according to a second scan signal in the first stage; and The current source is compensated according to the second scan signal in the first stage. The pixel driving method as described in claim 9, further comprising: In the first stage, the light-emitting element is reset according to the second scan signal.

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