TW201228453A - Full function LED driver for LCD backlighting - Google Patents

Abstract

This invention discloses a driver for driving multiple LED and the LCD thereof. According to embodyments of this invention, the driver is integrated with the functions of current balance, shifting phase PWM dimming and multiple faults detection and protection. The embodyments also disclose current balance circuit with high accuracy, shifting phase PWM dimming circuit and multiple faults detection and protection circuit adopted to this driver. The scheme may balance the light of LED.

Description

201228453 VI. Description of the Invention: [Technical Field] The present invention relates to a driver and a display device for a light-emitting element, and more particularly to a driver for a plurality of parallel light-emitting elements and a display device thereof. [Prior Art] Currently, an LED is The utility model has the advantages of small volume, low power consumption, high luminous efficiency, long life and the like, and is widely used in display devices of various electronic products, for example, as a backlight device of a liquid crystal display, which is constantly replacing a conventional discharge lamp. In various applications where LEDs are used as backlight devices, system operation safety and fault detection, fault protection, etc. are very important, and 'the uniformity and consistency of their illumination in backlight applications using multiple LED/LED strings. It is also what users expect, which requires that the current flowing through each LED/LED string must be evenly matched. In order to realize the above various functions, the LED driving circuit in the prior art mostly uses a DC-DC converter as a power supply circuit of the LED, and uses various discrete circuits and discrete devices in combination with a DC-DC converter to achieve fault detection and fault protection. The purpose of current sharing. FIG. 1 is a schematic block diagram of a circuit of an LED driving circuit 1〇〇 in the prior art. The driving circuit 100 includes a DC-DC converter 101 for receiving a supply voltage Vin and converting it into a suitable output voltage Vout (not shown) to drive a plurality of LED/LED strings to emit light; the current source circuit 1〇 2, electrically coupled to the plurality of LED / LED strings to adjust the current of each LED / LED string; fault detection circuit 103 for detecting one or more LED / LED string open circuit or short -5 - 201228453 And providing a fault signal; the fault protection circuit 104 provides a trigger signal to the DC-DC conversion unit to perform a fault protection function. Typically, the current source circuit 102 is implemented by a separate current mirror circuit of LEDs/LED strings; the fault may include circuitry for detecting the on condition of each LED/LED string, respectively: the fault protection circuit 104 provides processing corresponding to the condition and protect the circuit. Therefore, the method between the components of each discrete current mirror circuit of the prior art circuit 102 achieves a good current matching effect. In addition, the fault detecting circuit 103 and the fault protection power g are different discrete circuits and discrete devices to realize detection and protection for each fault and for the DC-DC converter 101. This not only increases the complex cost of the entire driving circuit, but also increases the difficulty of debugging the circuit in the design process. SUMMARY OF THE INVENTION In view of one or more problems in the prior art, the present invention provides a driver and a display device for a light-emitting component. In one aspect of the invention, a drive multi-driver is provided, comprising: a voltage conversion unit, an input voltage receiving input power generating an output voltage at an output, wherein one end is applied to each of the light-emitting elements; and a current equalization of each of the light-emitting elements One end is configured to generate a current for the plurality of currents, wherein the current equalization unit is further coupled to receive the first i 1 〇1 to trigger its corresponding coupling to each of the detection circuits 1 〇 3 or short circuit For each specific fault, due to the difference in current sources, there is no need for the detection of the short-circuit of each of the LEDs/LED strings, and the voltage of one of the light-emitting elements of the invention, based on the received output voltage. Coupling to the optical component to provide a reference voltage, -6-201228453 based on the first reference voltage to regulate the flow through each The driving currents of the light-emitting elements are sized such that the driving currents of the respective light-emitting elements match. According to an embodiment of the invention, the current equalization unit generates a second reference voltage from the first reference voltage, and adjusts a drive current flowing through the respective light emitting units based on the second reference voltage. According to an embodiment of the present invention, the current equalization unit includes: a reference voltage generating unit that generates a reference current based on the first reference voltage, and outputs a plurality of identical second reference voltages based on the reference current; and a current adjustment circuit The drive current flowing through the respective light-emitting elements is adjusted in a negative feedback manner based on the second reference voltage. According to an embodiment of the invention, the reference current is adjusted by adjusting the first reference voltage and/or the 値 of the device in series with the first reference voltage. According to an embodiment of the invention, the reference voltage generating unit comprises: a current reference circuit coupled to the first reference voltage at one input thereof and coupled to the device at another input thereof, and based on the a reference voltage and a reference current of the device to generate a reference current; a current mirror circuit receiving the reference current 'and generating a plurality of replica currents of the reference current in the same ratio; a voltage reference circuit receiving the plurality of replica currents And converting the plurality of replica currents into a plurality of identical second reference voltages. According to an embodiment of the invention, the current reference circuit includes an operational amplifier having a non-inverting input coupled to the first reference voltage, an inverting input coupled to the device, and an output coupled to the controllable a control terminal of the current source, the control terminal is coupled to the output end of the operational amplifier 201228453, one current terminal is coupled to the inverting input terminal of the operational amplifier, and the other current terminal is outputting the reference Current. According to an embodiment of the invention, the controllable current source includes a MOSFET having a gate coupled to an output of the operational amplifier, a source coupled to an inverting input of the operational amplifier, and a drain outputting the reference current . According to an embodiment of the invention, the current mirror circuit comprises a plurality of parallel coupled current mirrors, the plurality of parallel coupled current mirrors having a common current receiving end for receiving the reference current and The current output produces the replica current. According to an embodiment of the invention, each of the plurality of parallel coupled current mirrors comprises a MOSFET. According to an embodiment of the invention, the voltage reference circuit includes a plurality of resistors having the same resistance, one end of each resistor is respectively coupled to one of the plurality of replica currents, and the other end is coupled to the ground according to the present invention. In an embodiment, the current adjustment circuit receives the plurality of second reference voltages, detects the driving current flowing through each of the light emitting elements, and provides a plurality of feedback voltages representing each of the driving currents, and the plurality of feedbacks The voltages are respectively compared with the plurality of second reference voltages to adjust the drive current flowing through each of the light emitting elements. According to an embodiment of the invention, the current adjustment circuit includes a plurality of current regulators each of the current regulators including: a second controllable current source 'one of the current terminals coupled to the corresponding light-emitting element and The illuminating element provides a driving current; the current detecting circuit is coupled to the other current end of the second controllable current source, and detects a driving current provided by the second controllable current source -8 - 201228453 coupled thereto, And generating a feedback voltage representative of the driving current; the second operational amplifier has a non-inverting input coupled to one of the plurality of second reference voltages, an inverting input coupled to the feedback voltage, and an output coupled The control end of the controllable current source. According to an embodiment of the invention, the second controllable current source is a MOSFET, the gate is coupled to the output end of the second operational amplifier, the source is coupled to the current detecting circuit, and the drain is coupled to the corresponding light emitting Element ^ According to an embodiment of the invention, the current detecting circuit comprises a resistor 〇 according to an embodiment of the invention, the driver further comprising a fault detecting and protecting circuit coupled to the plurality of light emitting elements and the output And for detecting an open or short circuit fault of each of the light emitting elements and/or an overvoltage or undervoltage fault of the output voltage according to a voltage at the other end of each of the light emitting elements and/or the output voltage. According to an embodiment of the invention, the fault detection and protection circuit comprises a first feedback circuit that receives a voltage ' at the other end of the plurality of light-emitting elements and provides a first feedback signal to the voltage conversion unit for adjustment The output voltage, wherein the first feedback signal represents a minimum voltage among voltages at the other end of the plurality of light emitting elements. According to an embodiment of the invention, the voltage conversion unit receives the first feedback signal and compares it with a second reference voltage to provide an error amplification signal, the output voltage being adjusted according to the error amplification signal. According to an embodiment of the invention, the fault detection and protection circuit includes a second feedback circuit that receives the output voltage and generates a representative representative of the input

S -9 - 201228453 The second feedback signal of the voltage. According to an embodiment of the invention, the fault detection and protection circuit further includes an overvoltage detection module that detects an overvoltage of the output voltage based on the second feedback signal and generates an overvoltage fault signal. According to an embodiment of the invention, the overvoltage detection module includes an overvoltage detection comparator for receiving the second feedback signal, comparing it with an overvoltage threshold voltage and providing an overvoltage fault signal; a fault signal, when the second feedback signal is greater than the overvoltage threshold voltage, is a logic state representing the output voltage overvoltage, and triggering the voltage converter to turn off the switching device therein, in the second When the feedback signal is less than the overvoltage threshold voltage, it is a logic state that represents the normal output voltage. According to an embodiment of the invention, the overvoltage detection and protection circuit further includes an undervoltage detection module that detects an undervoltage of the output voltage based on the second feedback signal and generates an undervoltage fault signal. According to an embodiment of the invention, the overvoltage detection module includes an undervoltage detection comparator for receiving the second feedback signal, comparing it with an undervoltage 闽値 voltage and providing an undervoltage fault signal; Pressing a fault signal, when the second feedback signal is less than the undervoltage 闽値 voltage, is a logic state representing the undervoltage of the output voltage, and turning off the driver, where the second feedback signal is greater than When the undervoltage threshold voltage is described, it is a logic state representing that the output voltage is normal. According to an embodiment of the invention, the fault detection and protection circuit further includes a plurality of light-emitting element fault protection modules, each of the light-emitting element fault protection modules being coupled to the other end of the corresponding light-emitting element, and receiving the corresponding coupling -10- 201228453 The voltage at the other end and the overvoltage fault signal determine an open or short circuit fault of the corresponding light emitting element and generate a first trigger signal; if the corresponding light emitting element is open and said The overvoltage fault signal is a logic state representing the output voltage overvoltage or a short circuit corresponding to the corresponding light emitting component, the first trigger signal is a trigger state, and the light emitting component coupled thereto is turned off; otherwise The first trigger signal is in a non-trigger state. According to an embodiment of the present invention, each of the light-emitting element fault protection modules includes: an open-circuit detection comparator that receives a voltage at a other end of the light-emitting element coupled to the light-emitting element fault protection module, and Comparing with the open threshold 値 voltage, generating an open circuit fault signal; the open circuit fault signal is a logic state representing a normal illuminating element when the voltage at the other end of the illuminating element is greater than the open threshold 値 voltage, The voltage at the other end is less than the open circuit voltage, which is a logic state representing the open state of the light emitting element; the short circuit detecting comparator receives the voltage at the other end of the light emitting element coupled to the light emitting element fault protection module, Comparing with the short-circuit threshold voltage, a short-circuit fault signal is generated: the short-circuit fault signal is a logic state representing a short-circuit of the light-emitting element when the voltage at the other end of the light-emitting element is greater than the short-circuit threshold voltage, in the light-emitting When the voltage at the other end of the element is less than the short-circuit threshold voltage, it is a normal logic representing the light-emitting element. a trigger circuit that receives the open circuit fault signal, the short circuit fault signal, and the overvoltage fault signal, and provides the first trigger signal: when the open circuit fault signal is a logic state representing an open state of the light emitting element and When the overvoltage fault signal is in a logic state indicating that the output voltage exceeds 5 -11 - 201228453 or when the duration of the short circuit fault signal is a logic state representing a short circuit of the light emitting element reaches a preset threshold 所述A trigger signal is a trigger state; otherwise, the first trigger signal is a non-trigger state. According to an embodiment of the invention, the trigger circuit includes: the first logic gate receives the open fault signal and the overvoltage fault signal, and outputs a second trigger signal, wherein the second trigger signal is in the open fault The signal is a logic state representing an open state of the light emitting element, and the overvoltage fault signal is a trigger state when it is a logic state representing the output voltage overvoltage, and is otherwise a non-trigger state; the timer has the preset threshold threshold, Receiving the short circuit fault signal, and outputting a third trigger signal, wherein when the short circuit fault signal is a logic state representing a short circuit of the light emitting element, the timer starts counting, and when the timer reaches the preset The third trigger signal is a trigger state; if the short circuit fault signal is a normal logic state representing the light emitting element or the timer does not reach the preset threshold, the third trigger signal is a non-trigger state; the first logic gate 'receives the second and third trigger signals, and outputs the first trigger signal The first trigger signal is a trigger state when at least one of the second and third trigger signals is in a trigger state; and only the second and third trigger signals are in a non-trigger state, The first trigger signal is in a non-trigger state. According to the embodiment of the present invention, the fault detection and protection circuit further includes a system shutdown trigger circuit that receives a plurality of the first trigger signals output by the plurality of light-emitting element fault protection modules, and generates a fourth trigger The signal -12-201228453, wherein the fourth trigger signal is in a trigger state when the plurality of the first trigger signals are in a trigger state, and the driver is turned off, in the plurality of the first triggers A non-trigger state when at least one of the signals is in a non-trigger state does not turn off the drive. According to an embodiment of the invention, the driver further includes a status indicating circuit that receives the overvoltage fault signal or the undervoltage fault signal or the fourth trigger signal and generates an indication signal, wherein the indication The signal is representative when the overvoltage fault signal is a logic state representing the output voltage overvoltage or the undervoltage fault signal is a logic state representing the output voltage undervoltage or the fourth trigger signal is a trigger state. The logical state of the drive failure, otherwise representing the normal logical state of the drive. According to an embodiment of the invention, the driver further includes a phase shifting PWM dimming circuit that receives the PWM dimming input signal and phase shifts it to generate a plurality of PWM dimming signals; the PWM dimming input signal and the a plurality of PWM dimming signals coupled to the current equalization circuit for respectively dimming different ones of the plurality of light emitting elements in a corresponding manner - wherein for successive lighting/shutdown The two PWM dimming signals of the two illuminating elements differ by a predetermined phase 値. According to an embodiment of the invention, the number of the plurality of light-emitting elements is N', the number of the plurality of PWM dimming signals is N-1, and the predetermined phase 値 is 2π/Ν, wherein N is An integer greater than one. According to an embodiment of the invention, the phase shifting PWM dimming circuit comprises Ν-1 delay circuits, each receiving the PWM dimming input signal, and dividing

B -13- 201228453 Don't delay the PWM dimming input signal, generate Ν-1 PWM dimming signals' 1×N times the PWM dimming input between two adjacent PWM dimming signals The delay of the period of the signal. According to an embodiment of the invention, the phase shifting PWM dimming circuit comprises: a frequency multiplying circuit, receiving the PWM dimming input signal, and generating a first pulse signal and a second pulse signal, wherein the first pulse signal is The rising edge of the PWM dimming input signal is N times the starting point, and the second pulse signal is N-multiplied by the falling edge of the PWM dimming input signal; the delay module receives the PWM dimming The input signal and the first and second pulse signals are pulsed based on triggering the rising edge and the falling edge of the PWM dimming input signal respectively to the first and second pulse signals to implement the PWM Phase shifting of the dimming input signal. According to an embodiment of the invention, the frequency multiplying circuit comprises: a first frequency multiplying circuit, receiving the PWM dimming input signal, and performing N multiplication on the rising edge of the PWM dimming input signal to generate a first pulse signal; and a second frequency multiplying circuit, receiving the PWM dimming input signal, and performing N multiplication on the falling edge of the PWM dimming input signal to generate a second pulse signal. According to the present invention In an embodiment, the delay module includes N-1 delay circuits, each receiving the PWM dimming input signal and the first and second pulse signals, and outputting the first to the first one of the PWM tones respectively. An optical signal; wherein, the first to the first ones of the delay circuits respectively count a positive pulse of the first pulse signal by using a rising edge of the PWM dimming input signal, and simultaneously input the signal by the PWM dimming The falling edge is for triggering the counting of the negative pulse of the second pulse -14 - 201228453 signal, and correspondingly generating the first to N -1 PWM dimming when counting the positive pulse of the first pulse signal to 2 to N respectively Input signal rise Generating a falling edge corresponding to the N-1 of said first input signal to the PWM dimming of the trailing edge, respectively of the negative pulse of the second pulse signal is counted to 2 N. According to an embodiment of the invention, the N-1 delay circuits each comprise a positive pulse counter 'negative pulse counter and a flip flop, wherein for the Xth delay circuit: the positive pulse counter is at its enable input Receiving the PWM dimming input signal, receiving the first pulse signal at its counting input terminal, and being triggered to enable 'high power to the first pulse signal when rising edge of the PWM dimming input signal The flat pulse counts, when the count is (X+1), the first single pulse is output, the first single pulse resets the positive pulse counter to stop counting; the negative pulse counter receives the said at its enable input a PWM dimming input signal, receiving the second pulse signal at a count input thereof, and being enabled to enable a low level pulse of the second pulse signal at a falling edge of the PWM dimming input signal Counting 'when the count is (X+1), outputting a second single pulse, the second single pulse resets the negative pulse counter to stop counting; the flip-flop receives the first single pulse at its set terminal ,In its Provided receiving said second one-shot pulse, the output of a PWM dimming signal X; wherein X varying from 1 to N-1. According to an embodiment of the invention, the first and second frequency multiplying circuits are phase locked loop circuits. In another aspect of the invention, a display device is provided which includes a driver as described above.

S -15- 201228453 With the above scheme, the illumination uniformity and consistency of the LED light-emitting elements are improved. In addition, embodiments of the present invention also provide fault detection and protection functions, as well as PWM dimming functions. The driver of the light-emitting element of the embodiment of the present invention will be described in detail below. In the following description, some specific details, such as specific circuit configurations in the embodiments and specific parameters of these circuit components, are used to provide a better understanding of the embodiments of the invention. Those skilled in the art will appreciate that embodiments of the present invention can be implemented even in the absence of some detail or a combination of other methods, elements, materials, and the like. One embodiment of the present invention provides an LED driver having a high precision current matching function including the DC-DC converter and current balancing circuit described below. Different embodiments of the present invention also provide a variety of fault detection and protection functions for the LED driver. Different embodiments of the present invention also provide a high-precision current matching circuit suitable for an LED driving circuit and a multi-function fault detecting and protecting circuit. In addition, in applications in which multiple parallel LED/LED strings are used, if these LEDs are to be When the LED string is dimmed, when these parallel LED/LED strings are lit or extinguished in the same phase in one cycle, it will cause a large jump in the total current output of the drive circuit in one cycle, and thus The input of the driver circuit and the output inductor and capacitor cause a large load, which causes large noise and shortens the service life of the circuit device. Different embodiments of the present invention are directed to the above problems, and further provide a phase shifting PWM dimming circuit such that a plurality of parallel LED/LED strings are illuminated or extinguished in different phases in one cycle, thereby reducing noise, Reduce the input or output filter inductor and capacitor size of the driver circuit and extend the life of the circuit device. Various embodiments of the present invention are directed to display devices including the above described drivers and/or associated circuits, such as LED displays, OLED displays, and the like. In the following detailed description, an LED driver of one embodiment of the present invention will be described by taking a DC-DC converter as a power supply circuit for an LED as an example, so that those skilled in the art can better understand the present invention. However, it should be understood by those skilled in the art that these descriptions are only illustrative and are not intended to limit the scope of the invention. As shown in FIG. 2, it is a schematic diagram of a circuit module of a LED driver 200 according to an embodiment of the present invention. The LED driver 200 is provided with a DC-DC converter 20 1 for receiving a supply voltage Vin and converting it to a suitable output voltage Vout to drive a plurality of LED/LED strings 202 to emit light. The LED driver 200 further includes a current balancing circuit 203 that is electrically coupled to the plurality of LED/LED strings 2〇2 through a plurality of LED driving pins LEDp LED2...LEDN of the LED driver 200 to regulate flow through each The current Iledx (X=1, 2...N) of the LED/LED string 202. In accordance with an embodiment of the present invention, current equalization circuit 2〇3 generates a second reference voltage from a first reference voltage and regulates the drive current flowing through each of the LED strings 202 based on the second reference voltage. -17- 201228453 The LED driver 200 further includes a fault detection and protection circuit 204 coupled to a plurality of LED drive pin LEDs of the LED driver 200, LEDs 2... LEDn and its output terminal OUT, detecting each LED drive pins LEDi, LED2... voltage VLEDX (X=1, 2...N) at LEDN and the output voltage Vout. In addition, the fault detection and protection circuit 204 is also provided to represent the voltage VLEDX (X = 1, 2, ... N) at the plurality of LED drive pins.

a first feedback signal of a minimum voltage and a second feedback signal representative of the output voltage Vout, based on the first and second feedback signals and a voltage Vledx (X=l, 2... N) detecting an open or short circuit of one or more LED/LED strings and a fault state such as an output overvoltage of the integrated LED driver 200 or a short circuit of the output terminal OUT, and providing a fault signal and a trigger signal to trigger the LED driver 200 to execute Fault protection. The LED driver 200 further includes a status indicating circuit 205 that receives the fault signal and the trigger signal and provides an indication signal to indicate an operating state of the driver 200, such as a normal state or a fault and a protection state, thereby being associated with the driver 200. The external circuit can determine the operating condition of the driver 200 by the indication signal. According to an embodiment of the invention, the first feedback signal is also fed to the DC-DC converter 201 to regulate its output voltage Vout»the DC-DC converter 201 will be described by its internal error amplifier The first feedback signal is compared to a reference voltage and provides an error amplification signal. If the first feedback signal is less than the reference voltage, the error signal will increase and the regulated output voltage Vout increases. If the first feedback signal is greater than the reference voltage of -18-201228453, the error signal will decrease and regulate the output voltage Vout to decrease. Thus, the output voltage Vout of the LED driver 200 is maintained at a suitable level by the feedback adjustment to drive the plurality of LED/LED strings 202 to operate normally. According to various embodiments of the present invention, the LED driver 200 further includes a phase shift PWM dimming circuit 206. And electrically coupled to the current equalization circuit 203 to adjust the plurality of LED/LED strings 202 to be dimmed in different phases within one period T. That is, the phase between the PWM currents ILEDX (X = 1, 2, ... N) supplied to the plurality of LED/LED strings 202 in one cycle T is different. For example, the current of the LED/LED string 202 that is successively illuminated (

The phase of Uedx and Ued(x+1)) differs by a predetermined phase. According to an embodiment of the invention, the predetermined phase 値 is 2π/Ν ' where Ν is a plurality of LED/LED strings 202 Number. Figure 3 shows a schematic diagram of the phase shift between the currents Iledi, IlED2 and IlED3 flowing through each LED/LED string, assuming N = 3, ie with 3 LED/LED strings 202, and in this case the LED A schematic diagram of the total current It〇tal output by the driver 200. As shown in FIG. 3, in one cycle T, the phase difference between the currents Iledi, Iled2, and ILED3 is 2π/3, which is reflected on the time axis, that is, the turn-on and turn-off times of Iledi, ILED2, and UED3 are successively T. /3 delay. Thus, the relative transition number of the total current Itotal amplitude is almost 2/3 lower than when the currents UED1, UED2, and UED3 are turned on and off in the same phase (as shown by the broken line in Fig. 3). Therefore, the phase shifting PWM dimming circuit 206 can reduce the amplitude of the phase -19-201228453 of the total output current of the LED driver 200 in one cycle, thereby reducing the load on its input and output inductance and capacitance. Correspondingly, the noise caused by the amplitude of the output total current transition on the input and output inductors and capacitors is reduced. In addition, the use of phase-shifted PWM dimming circuit 206 also means that LED driver 200 uses smaller input and output capacitors to meet the noise specifications of most applications, and the use of smaller capacitors helps to reduce the size of integrated LED drivers. With production costs. According to an embodiment of the present invention, the DC-DC converter 201 can be any type of DC converter that converts a DC voltage into a DC voltage, such as a Buck converter or a Boost Converter. ) and boost-buck converters (Buck-Boost Converter). According to an embodiment of the present invention, the current equalization circuit 203 can be implemented by a circuit as shown in FIG. 4, which includes a current reference circuit 401, a current mirror circuit 402, a voltage reference circuit 403, and a current adjustment circuit 404. According to an embodiment of the present invention, the current reference circuit 401, the current mirror circuit 402, and the voltage reference circuit 403 may be referred to as a reference voltage generating unit that generates a reference current based on a reference voltage, and outputs a plurality of identical others based on the reference current. A reference voltage, and then the current adjustment circuit 402 adjusts the drive current flowing through the respective LED strings 202 in a negative feedback manner based on the other reference voltage. As shown in FIG. 4, one input terminal of the current reference circuit 40 1 is coupled to the internal reference voltage Vref, and the other input terminal is coupled to the I SET pin of the integrated LED driver 200, and is coupled to the user through the ISET pin. External device -20- 201228453, such as resistance. The current reference circuit 401 generates a reference current Iref based on the reference voltage Vref and the 器件 of the external device, thereby allowing the user to set the magnitude of the reference current Iref by setting a 値 of the external device, such as a resistor 値. The current mirror circuit 402 may include a plurality of current mirrors connected in parallel, which share a current receiving end for receiving the reference current Iref, and copy the reference current Iref at the same ratio N , to provide at respective current outputs The replica current N〇* Iref is applied to the voltage reference circuit 403. The voltage reference circuit 403 receives the plurality of replica currents N?*Iref and converts them into a plurality of identical reference voltages Vref', respectively. The current adjustment circuit 404 includes a plurality of current regulators 〇5 that are identical and correspondingly coupled to each of the reference voltages Vref'. Each current regulator 405 is coupled at its output to the plurality of LED/LED strings 202. One of them is that the LED/LED string coupled thereto is supplied with current ILEDX (χ=1 ' 2...N ), and the current Iledx is detected and the feedback voltage representing the current UEDX is used as the input of the current regulator 405. The reference voltage Vref' is compared. Thus, Iledx is stabilized by negative feedback and the current ILEDX flowing through each of the LED/LED strings 202 is evenly matched. It can be seen that the user can set the magnitude of the reference current Iref by setting the 値, such as the resistor 値, of the external device coupled to the IS ET pin, thereby adjusting the size of the plurality of reference voltages Vref′, thereby adjusting the flow through The current magnitude of multiple LED/LED strings 202. In an exemplary embodiment, current reference circuit 401 includes operational amplifier 406 and controllable current source 407^-21 - 201228453. In one embodiment, controllable current source 407 is a MO SFET, and the operational amplifier 406 is in phase. The input terminal is coupled to the internal reference voltage Vref, and the inverting input terminal is coupled to the resistor RSET through an IS ET pin, and the output end thereof is coupled to the control terminal of the controllable current source 407. One current terminal of the controllable current source 407 is coupled to the inverting input of the operational amplifier 406, and the other current terminal outputs the reference current Iref. Thus, by the negative feedback adjustment, if the internal reference voltage Vref is fixed, the user can conveniently set the reference current Iref by selecting an external resistor RSET of a suitable resistance, thereby achieving regulation of the flow through the plurality of LED/LED strings 202. The purpose of the current. In one embodiment, the controllable current source 407 is a MOSFET having a gate coupled to the output of the operational amplifier 406, a source coupled to the inverting input of the operational amplifier 406, and a drain outputting the reference current Iref. In an exemplary embodiment, current mirror circuit 402 includes MOSFETs 相 that are matched to each other. a plurality of current mirrors composed of ~MN, wherein the MOSFET M〇 receives the reference current Iref at its source, and its gate is in contact with the source, and its gate is also connected to the MOSFET Μι~MN This constitutes a plurality of current mirrors coupled in parallel. According to an embodiment of the present invention, a ratio between a size of each of the MOSFETs IVh-MN and a size of the MOSFET M?, such as a channel width-to-length ratio of each of the MOSFETs M, MN, and a trench of the MOSFET M? The ratio between the channel width to length ratio is N〇', then the MOSFET M]~MN will divide the SU at its source output replica current N〇*Iref. In an exemplary embodiment, the voltage reference circuit 403 is composed of multiple An equal resistance Rref is formed, and one input end of the plurality of resistors Rref is coupled to the ground -22-201228453, and the other input ends thereof are respectively coupled to the plurality of reference currents N〇*Iref, and respectively provided Reference voltage Vref'. The plurality of reference voltages Vref' = Rref * N 〇 * Iref.

In an exemplary embodiment, each of the plurality of current regulators 405 includes an operational amplifier 408, a controllable current source 409, and a current sensing circuit 410. The operational amplifier 40 8 is coupled to the reference voltage Vref' at its non-inverting input, coupled to the output of the current sensing circuit 410 at its inverting input, and coupled to the control terminal of the controllable current source 409 at its output. One current terminal of the controllable current source 409 is coupled to the plurality of LED driving pin LEDs of the integrated driver 200, and one of the 'LED 2 . . . LEDN is coupled to one of the plurality of LED/LED strings 202, The corresponding LED/LED string coupled to it provides current Iledx (X=1, 2...N). The other current terminal of the controllable current source 409 is coupled to the input of the current detecting circuit 410. The current detecting circuit 410 detects the current supplied by the controllable current source 409 coupled thereto, that is, the current ILEDX (X=1 ' 2...N) of the LED/LED string coupled to the controllable current source 409. And converting it into a feedback voltage VSenseX (X=1, 2...N) is fed back to the inverting input terminal of the operational amplifier 408, compared with the reference voltage Vref', and the comparison result is applied to the control end of the controllable current source 409. This adjustment process is based on negative feedback such that the controllable current source 409 operates in a constant current mode such that the current UEDX flowing through each LED/LED string 202 is stable and identical, i.e., evenly matched. In one embodiment, the controllable current source 409 is a MOSFET, the gate of which is coupled to the output of the operational amplifier 408, the source is coupled to the current detecting circuit 410, and the drain is coupled to the plurality of LED driving leads of the integrated driver 200. One of the LEDs, -23- 201228453, LED2... LEDn. In one embodiment, the current detecting circuit 410 includes a sense resistor RSENSE, one input of which is coupled to the other current terminal of the controllable current source 409 and an inverting input of the operational amplifier 4〇8 and provides the The feedback voltage VsenseX" its other input is called the ground. According to one embodiment of the invention, the fault detection and protection circuit 206 can be implemented using a circuit as shown in FIG. As shown in FIG. 5, the fault detection and protection circuit 204 includes a feedback circuit 501, a feedback circuit 502, an overvoltage detection comparator 503, an undervoltage detection comparator 504, a plurality of LED fault protection modules 505, and a system shutdown trigger circuit 506. . The feedback circuit 501 detects the voltage VLEDX (X=1, 2...N) at a plurality of LED drive pins and the minimum voltage therein, and provides a first feedback signal VFB1 representing the minimum voltage, and the feedback circuit 501 can adopt the prior art. A variety of minimum voltage selection circuits are implemented and will not be described in detail herein. The feedback circuit 52 provides a second feedback voltage 乂!^2 representing the output voltage of the integrated LED driver 200. Illustratively, the feedback circuit 502 includes voltage dividing resistors Rfbi and RfB2 coupled in series between the output terminal OUT of the LED driver 200 and ground. The overvoltage detection comparator 503 receives the second feedback voltage VFB2, compares it with the overvoltage V voltage Vov and provides an overvoltage fault signal. If the second feedback voltage VFB2 is greater than the overvoltage threshold voltage V〇v, the overvoltage fault signal is a logic state representing an output overvoltage of the LED driver 200, and triggers the switching device of the DC-DC converter 201 Shut down. If the second feedback voltage VFB2 is less than the overvoltage 〇 voltage v 〇 v, the -24-201228453 overvoltage fault signal is a logic state representing a normal LED driver output 〇 undervoltage detection comparator 504 receiving The second feedback voltage vFB2 is compared with the undervoltage threshold voltage Vuv and provides an undervoltage fault signal. If the second feedback voltage VFB2 is less than the undervoltage threshold voltage vuv, the undervoltage fault signal is a logic state representing an output undervoltage of the integrated LED driver 200. If the second feedback voltage VFB2 is greater than the undervoltage threshold voltage Vuv', the undervoltage fault signal is a logic state representative of the integrated LED driver output. The output undervoltage of the LED driver 200 herein refers to the output voltage Vout caused by the output terminal OUT of the LED driver 200 being short-circuited to the ground or due to the unconnected Schottky diode in the DC-DC converter 201. low. Each of the LED fault protection modules 505 is coupled to one of the plurality of LED drive bows, one of the LEDi's LED2, LEDN, and the corresponding one of the LEDs.

Connected LED drive bow | pin LEDX (X = 1, 2 ... N) voltage VLEDX (X = 1 ' 2 ... N) and the overvoltage fault signal, and based on the voltage Vledx and The overvoltage fault signal generates a trigger signal TrigX (X=1, 2...N). If the LED/LED string 02 coupled to the driving pin LEDX (X=1, 2...N) is open circuit and the output is overvoltage or coupled to the driving bow|foot LEDx (X=l, 2... ... N) LED / LED string 202 short circuit, the trigger signal TrigX ( χ = 1, 2 ... N) is the trigger state, and will be coupled to the drive pin LEDx (X = l, 2... ...N) LED/LED string 202 is turned off, system shutdown trigger circuit 5 06 receives the plurality of LED fault protection modes

S -25- 201228453 Group 5 05 outputs all trigger signals TrigX (X = 1, 2...N) and generates shutdown trigger signal SHDN. If all of the trigger signals TrigX (X = 1, 2, ... N) are in the trigger state, the shutdown trigger signal SHDN is the trigger state and the LED driver is turned off. Otherwise, if at least one of the trigger signals TrigX (X = 1, 2, ... N) is in a non-trigger state, the shutdown trigger signal SHDN is in a non-trigger state and does not turn off the LED driver. In one embodiment, each LED fault protection module 505 includes an LED open circuit detection comparator 507, an LED short circuit detection comparator 508, and a trigger circuit 509. The LED open circuit detection comparator 507 receives the voltage (VlEDX) at the LED drive pin (eg, LEDX) coupled to the LED fault protection module 5〇5 and compares the voltage VlEDX with the open threshold voltage V〇TH. An open circuit fault signal 〇Px is generated. If the voltage VLEDX is greater than the open threshold voltage VOTH, the open fault signal 〇Px is a logic state representing a normal LED. If the voltage VLEDX is less than the open circuit voltage VOTH, the open fault signal ΟΡχ represents an open LED. The logical state. The LED short detection comparator 508 receives the voltage (VLEDX) at the LED drive pin (eg, LEDX) coupled to the LED fault protection module 505, and compares the voltage to the short circuit voltage VSTH to generate a short circuit fault signal. SHTX. If the voltage VLEDX is less than the short-circuit threshold voltage vSTH, the short-circuit fault signal SHTX is a logic state representing a normal LED. If the voltage VLEDX is greater than the short-circuit threshold voltage VSTH, the short-circuit fault signal SHTX is a logic representing a short circuit of the LED. status.

The trigger circuit 509 receives the open circuit fault signal 〇px, the short circuit fault signal SHTX, and the overvoltage fault signal to generate a trigger signal TrigX -26-201228453 (χ = 1, 2, ... Ν). According to an embodiment of the present invention, when the LED/LED string 202 coupled to the driving pin LEDX is open, the driving pin LEDX will be pulled to the ground, and thus the voltage VLEDX at the driving pin LEDX will be smaller than the The open circuit threshold voltage V〇th, then the open circuit fault signal ΟΡχ will be a logic state representing the LED open circuit. In addition, in this case, the first feedback signal VFB1 will be smaller than the reference voltage of the error amplifier in the DC-DC converter 201, and thus the error amplification signal outputted by the error amplifier will continue to increase, thereby causing the output voltage Vout. Continue to increase, which will cause the integrated LED driver output to overvoltage. If the overvoltage fault is detected before the overvoltage detection comparator 503 detects an output overvoltage, that is, if the open fault signal ΟΡχ is a logic state representing the LED open circuit and the overvoltage fault signal is representative When the integrated LED driver outputs an overvoltage logic state, the trigger signal TrigX will be the trigger state and the LED/LED string 202 with an open fault will be turned off. When the LED/LED string 202 coupled to the driving bow|foot LEDX is short-circuited, the driving pin LEDX will be pulled to a high potential, and thus the voltage VLEDX at the driving pin LEDX will be greater than the short-circuiting voltage VSTH, Then the short circuit fault signal SHTXM is a logic state representing a short circuit of the LED. If the logic state representing the short circuit of the LED reaches a predetermined threshold, the trigger signal TrigX will be the trigger state and the LED/LED string 202 where the short circuit fault has occurred is turned off. In one embodiment, the trigger circuit 5 09 includes a logic gate 510, a timer 5 1 1 and a logic gate 5 1 2 . The logic gate 5 10 is configured to receive the open circuit fault signal ΟΡχ and the overvoltage fault signal, and output a trigger signal. If the open circuit fault signal ΟΡχ is a logic state representing an LED open circuit and the over -27-201228453 pressure fault signal is a logic state representing an integrated LED driver output overvoltage, the trigger signal Tlx is a trigger state, otherwise Trigger signal Tixg is not triggered. The timer 511 has a set 闽値 which receives the short-circuit fault signal SHTX and outputs a trigger signal τ2 χ. When the short circuit fault signal ^7^ is a logic state representing a short circuit of the LED, the timer 51 i starts counting, and when the timer 511 reaches its set threshold, the trigger signal Τ2 Χ is the trigger state 'otherwise, if The trigger signal Η2Χ is a non-trigger state when the short circuit fault signal S Η Τ X is a logic state representing the normal state of the LED or the timer 5 1 1 does not reach its set threshold. The logic gate 512 receives the trigger signals τ ΐχ and Τ 2 Χ and outputs the trigger signal TrigX; when at least one of the trigger signals τ ΐχ and Τ 2 为 is in a trigger state, the trigger signal TrigX is a trigger state, and is coupled The LED/LED string 202 on the drive pin LEDX (X=1, 2...N) is turned off. The trigger signal TrigX is in a non-trigger state only when the trigger signals 1^ and T2X are in a non-trigger state. According to an embodiment of the present invention, the status indicating circuit 205 receives the overvoltage fault signal, the undervoltage fault signal, and the turn-off trigger signal SHDN, and generates an indication signal. When the overvoltage fault signal is a logic state representing an integrated LED driver output overvoltage, or the undervoltage fault signal is a logic state representing an integrated LED driver output undervoltage, or the shutdown trigger signal SHDN is a trigger state The indication signal is a logic state representing an integrated LED driver failure. The indication signal is only when the overvoltage fault signal and the undervoltage fault signal represent a logic state of the integrated LED driver output positive -28-201228453 and the shutdown trigger signal SHDN is a non-trigger state. Representing the normal logic state of the integrated LED driver. In one embodiment, the state indicating circuit 205 is implemented by a logic circuit, such as an OR gate or its equivalent circuit, as shown in FIG. 6, or the gate 601 is respectively at its three inputs. Receiving the overvoltage fault signal, the undervoltage fault signal, and the shutdown trigger signal SHDN, and outputting an indication signal. In the circuit implementation shown in Figures 5 and 6, the logic state representing the output overvoltage of the integrated LED driver, the logic state representing the undervoltage of the integrated LED driver output, the logic state representing the open LED, and the logic representing the LED short circuit The state and the trigger state are high, the representative integrated LED driver outputs a normal logic state and the non-trigger state is a low level. In this case, the logic gate is in a different embodiment of the invention, the logic state representing the output overvoltage of the integrated LED driver, the logic state representing the undervoltage of the integrated LED driver output, the logic state representing the open circuit of the LED, and the short circuit representing the LED. The logic state and the trigger state can be high. Conversely, the representative integrated LED driver outputs a normal logic state and the non-trigger state is a high level. In this case, as long as the circuit shown in FIG. 5 is modified accordingly, for example, the signals respectively coupled to the non-inverting input terminal and the inverting input terminal of the comparator are switched, and an appropriate logic gate or logic circuit is selected. To achieve the desired logic function. These alternatives and modifications will be apparent to those skilled in the art, and thus do not depart from the spirit and scope of the invention. According to an embodiment of the present invention, the phase shifting PWM dimming circuit 206 receives the PWM dimming input signal PWM1N from 29 - 201228453, and phase shifts it to generate a plurality of PWM dimming signals. The PWM dimming input signal PWMIN and the plurality of PWM dimming signals are coupled to the current equalization circuit 203 for respectively performing different LED/LED strings in the LED/LED string 202 in a corresponding manner. Dimming. The two PWM dimming signals for successively turning on/off the two 1/〇/1^〇 strings 202 differ by a predetermined phase 値. For the case of having N LED/LED strings 202, the number of the plurality of PWM dimming signals is N-1, where N is an integer greater than 1, preferably, the predetermined phase 値 is 2π/ Hey. That is, reflected on the time axis, there is a T/N delay between the two PWM dimming signals for sequentially turning on/off the two LED/LED strings 202, where T is the PWM dimming input. The period of the signal PWMIN. In one embodiment, phase shifting PWM dimming circuit 206 includes N-1 delay circuits, where N is the number of LED/LED strings 202. The N-1 delay circuits each receive the PWM dimming input signal PWMIN, and sequentially

PWM dimming input signal PWMIN delay T / N, 2T / N ... ( N-1 ) T / N, generate PWM dimming signal PWM, PWM2 ... PWMm.d, the The PWM dimming input signal PWM1N and the plurality of PWM dimming signals PWM, 'PWM2...?' 1^(>1-|) are used to sequentially select the first, second, third... The N LED/LED string 202 is dimmed. Taking the implementation of the current equalization circuit 203 as shown in FIG. 4 as an example, in one embodiment, the PWM dimming input signals PWM, N and the plurality of PWM tones The optical signals PWlVh, PWM2, ..., \¥^1 (?1.1) are respectively input to the plurality of current regulators -30-201228453 correspondingly coupled to the 1st, 2, ..., N LED/LED strings 202 The enable and disable terminals (not shown) of 405 are enabled and disabled by the control current regulator 405 to intermittently supply current to the LED/LED string 2〇2 for dimming purposes. More specifically, the operational amplifiers 408 of the plurality of current regulators 405 coupled to the first, second, and third N LED/LED strings 202 are provided with enable terminals respectively coupled to the PWM modulations. The optical input signal PWMin and the plurality of PWM dimming signals PWM丨, PWM2, ... In other words, the purpose of dimming is controlled by controlling the enabling and disabling of the operational amplifier 408. In an exemplary embodiment, the phase shifting PWM dimming circuit 206 includes a first frequency multiplying circuit 701 and a second frequency multiplying circuit. 702 and Ν-1 delay modules 703, wherein Ν is the number of LED/LED strings 202, as shown in Figure 7. The first frequency multiplying circuit 701 receives the PWM dimming input signal PWMin and uses the PWM modulation The rising edge of the optical input signal PWM1n is multiplied by N for the trigger to generate the first pulse signal PULSE 1. The second frequency multiplying circuit 702 receives the PWM dimming input signal PWMin, and the PWM dimming input signal PWM1n The falling edge is multiplied by the trigger to generate a second pulse signal PULSE2 » N-1 delay module 703, the Xth delay module 703, including a positive pulse counter CXA, a negative pulse counter CXB, and a flip-flop FFX, Where X = 1 '3 (N-1). The positive pulse counter CXA receives the PWM dimming input signal PWM1N at its enable input, receives the first pulse signal PULSE1 at its count input, and PWM dimming input signal PWMin rising edge Triggered, the high pulse of the first pulse signal PULSE1 is counted, and when the count is (X+1), a single pulse is output -31 - 201228453

Qxa, this single pulse resets the positive pulse counter CXA and stops counting. The negative pulse counter CXB receives the PWM dimming input signal PWMIN at its enable input terminal, receives the second pulse signal PULSE2 at its count input terminal, and is triggered to be enabled when the PWM dimming input signal falls to the edge, The low-level pulse of the second pulse signal PULS E2 is counted. When the count is (X+1), a single pulse Qxb is output, which resets the counter CXB to stop counting. The flip-flop FFX receives a single pulse QXA at its set terminal, receives a single pulse Qxb at its reset terminal, and outputs a PWM dimming signal PWMX. Figure 8 is a waveform diagram of the key signals in the circuit of Figure 7.

PWM dimming signal PWMi, PWM2... PWM^n.d is the PWM

The dimming input signal PWMIN delays the repetition of T/N, 2T/N, respectively... (N-1) T/N, where T is the period of the PWM dimming input signal PWMIN 〇 in an exemplary In the embodiment, the first frequency multiplying circuit 701 and the second frequency multiplying circuit 702 can be implemented by the phase locked loop circuits PLL1 and PLL2, respectively. The above description of the invention and the embodiments of the invention are merely illustrative of the LED driver of the embodiments of the invention and are not intended to limit the scope of the invention. Variations and modifications of the disclosed embodiments are possible, and other possible alternative embodiments and equivalent variations to the elements of the embodiments will be apparent to those of ordinary skill in the art. Other variations and modifications of the disclosed embodiments of the invention do not depart from the spirit and scope of the invention. -32- 201228453 [Schematic Description of the Drawings] The following drawings illustrate embodiments of the present invention. These drawings and embodiments provide some embodiments of the invention in a non-limiting, non-exhaustive manner. 1 is a schematic diagram of an LED driving circuit in the prior art. 2 is a circuit diagram of an integrated LED driver in accordance with an embodiment of the present invention. Figure 3 shows a waveform diagram of the current flowing through each LED string and the total current output by the integrated LED driver with three LED strings as an example, in the case of phase-shifted PWM dimming. 4 is a schematic diagram of a current balancing circuit in an integrated LED driver in accordance with an embodiment of the present invention. 5 is a schematic diagram of a fault detection and protection circuit in an integrated LED driver in accordance with one embodiment of the present invention. FIG. 6 is a schematic diagram of a state indicating circuit in an integrated LED driver in accordance with one embodiment of the present invention. 7 is a schematic diagram of a phase shift PWM dimming circuit in an integrated LED driver in accordance with one embodiment of the present invention. Figure 8 is a waveform diagram of key signals in the circuit shown in Figure 7. [Main component symbol description] 1 0 0 . Drive circuit 101 : DC-DC converter 102 : Current source circuit - 33 - 201228453 1 Ο 3 : Fault detection circuit 104 : Fault protection circuit 105 : Dimming circuit 200 : LED driver 20 1 : DC-DC converter 202 : LED/LED string 203 : current equalization circuit 204 : fault detection and protection circuit 205 : state indication circuit 206 : phase shift PWM dimming circuit 4 0 1 : current reference circuit 4 0 2 : current Mirror circuit 403: voltage reference circuit 404: current adjustment circuit 405: current regulator 406: operational amplifier 407: controllable current source 408: operational amplifier 409: controllable current source 4 1 0: current detection circuit 501: feedback circuit 502: Feedback circuit 503: Overvoltage detection comparator 5 04 : Undervoltage detection comparator -34- 201228453 5 0 5 : LED fault protection module 5 06 : System shutdown trigger circuit 507 : LED open detection comparator 5 08 : LED short circuit Detection comparator 509: trigger circuit 5 1 0 : logic gate 5 1 1 : timer 5 1 2 : logic gate 6 0 1 : or gate 701 : first frequency multiplying circuit 702 : second frequency multiplying circuit 703 : delay module -35-

Claims (1)

201228453 VII. Patent application: 1. A driver for driving a plurality of light-emitting elements 'includes: a voltage conversion unit that receives an input voltage' generates an output voltage at an output based on the received input voltage, wherein the output voltage is applied to each One end of the light emitting element; and a current equalization unit 'coupled to the other end of each of the light emitting elements for providing a driving current for the plurality of light emitting elements, wherein the current equalizing unit is further coupled to the first reference voltage based on the first A reference voltage is used to adjust the magnitude of the drive current flowing through each of the light-emitting elements such that the drive currents of the respective light-emitting elements match. 2. The driver of claim 1, wherein the current equalization unit generates a second reference voltage from the first reference voltage and adjusts a drive current flowing through each of the light emitting units based on the second reference voltage. 3. The driver of claim 2, wherein the current equalization unit comprises: a reference voltage generating unit that generates a reference current based on the first reference voltage and outputs a plurality of identical second references based on the reference current The voltage and the current adjustment circuit adjust the drive current flowing through the respective light-emitting elements in a negative feedback manner based on the second reference voltage. 4. The driver of claim 3, wherein the reference current is adjusted by adjusting the first reference voltage and/or the 値 of the device in series with the first reference voltage. The driver of claim 4, wherein the reference voltage generating unit comprises: a current reference circuit coupled to the first reference voltage at one input thereof and coupled to the device at the other input end thereof, and Generating a reference current based on the first reference voltage and the 値 of the device; receiving a reference current and generating a plurality of replica currents of the reference current at the same ratio; a voltage reference circuit receiving the plurality of replica currents, And converting the plurality of replica currents into a plurality of identical second reference voltages. 6. The driver of claim 5, wherein the current reference circuit comprises: an operational amplifier having a non-inverting input coupled to the first reference voltage, an inverting input coupled to the device, and an output thereof a control terminal coupled to the controllable current source; a controllable current source having a control terminal coupled to the output end of the operational amplifier, a current terminal coupled to the inverting input terminal of the operational amplifier, and another current terminal outputting the Reference current. 7. The driver of claim 6, wherein the controllable current source comprises a MOSFET, the gate of which is coupled to the output of the operational amplifier, and the source is coupled to the inverting input of the operational amplifier, The pole outputs the reference current. 8. The driver of claim 5, wherein the current mirror circuit comprises a plurality of current mirrors coupled in parallel, the plurality of parallel coupled current mirrors having a common current receiving end for receiving the current mirror The reference current is generated and the replica current is generated at the respective current outputs. 9. The driver of claim 8, wherein each of the plurality of parallel coupled current mirrors comprises a MOSFET. 10. The driver of claim 5, wherein the voltage reference circuit comprises a plurality of resistors having the same resistance, and one end of each resistor is coupled to one of the plurality of replica currents, and the other end is coupled Received the land. The driver of claim 3, wherein the current adjustment circuit receives the plurality of second reference voltages, detects a drive current flowing through each of the light-emitting elements, and provides a plurality of currents representing each of the drive currents. The feedback voltage is compared with the plurality of second reference voltages to adjust the driving current flowing through each of the light emitting elements. The driver of claim 1, wherein the current adjustment circuit comprises a plurality of current regulators, each of the current regulators comprising: a second controllable current source, a current terminal coupling Connecting a corresponding light-emitting element and providing a driving current to the light-emitting element: a current detecting circuit coupled to the other current end of the second controllable current source, detecting the second controllable current source coupled thereto Driving current and generating a feedback voltage representative of the driving current; the second operational amplifier has a non-inverting input coupled to one of the plurality of second reference voltages, an inverting input coupled to the feedback voltage, and an output coupled Connect to the control terminal of the controllable current source. 13. The driver of claim 12, wherein the second controllable current source is a MOSFET, a gate thereof is coupled to an output end of the second operational amplifier, and a source is coupled to the current detecting circuit, The pole is coupled to the corresponding -38- 201228453 illuminating element. The driver of claim 12, wherein the current detecting circuit comprises a resistor. The driver of claim 1, further comprising a fault detection and protection circuit coupled to the plurality of light emitting elements and the output terminal for voltage and/or according to voltage at the other end of each of the light emitting elements The output voltage 'detects an open or short circuit fault of each of the light emitting elements and/or an overvoltage or undervoltage fault of the output voltage. The driver of claim 15, wherein the fault detecting and protecting circuit comprises a first feedback circuit that receives a voltage at the other end of the plurality of light emitting elements and supplies the voltage to the voltage converting unit A first feedback signal is provided to adjust the output voltage, wherein the first feedback signal represents a minimum voltage among voltages at the other end of the plurality of light emitting elements. The driver of claim 16, wherein the voltage conversion unit receives the first feedback signal and compares it with a second reference voltage to provide an error amplification signal, and amplifies the signal according to the error Adjust the output voltage. 18. The driver of claim 15 wherein the fault detection and protection circuit comprises a second feedback circuit that receives the output voltage and produces a second feedback signal representative of the output voltage. The driver of claim 18, wherein the fault detection and protection circuit further comprises an overvoltage detection module that detects an overvoltage of the output voltage based on the second feedback signal and generates an overvoltage fault signal. The driver of claim 19, wherein the S-39-201228453 overvoltage detection module includes an overvoltage detection comparator for receiving the second feedback signal and overvoltage闽値 voltage comparison and providing an overvoltage fault signal; the overvoltage fault signal is a logic state representing the overvoltage of the output voltage when the second feedback signal is greater than the overvoltage , voltage, and triggers the voltage converter to The switching device is turned off, and when the second feedback signal is less than the overvoltage threshold voltage, it is a logic state representing that the output voltage is normal. The driver of claim 19, wherein the overvoltage detection and protection circuit further comprises an undervoltage detection module, which detects an undervoltage of the output voltage based on the second feedback signal, and generates Undervoltage fault signal. The driver of claim 21, wherein the overvoltage detection module comprises an undervoltage detection comparator for receiving the second feedback signal, comparing it with an undervoltage threshold voltage and providing an owed a voltage fault signal; the undervoltage fault signal is a logic state representing the undervoltage of the output voltage when the second feedback signal is less than the undervoltage signal, and the driver is turned off, wherein the second feedback signal is greater than the The undervoltage threshold voltage is a logic state that represents the normal output voltage. The driver of claim 21, wherein the fault detection and protection circuit further comprises a plurality of light-emitting element fault protection modules, each of the light-emitting element fault protection modules being coupled to the other end of the corresponding light-emitting element Receiving a voltage at the other end coupled thereto and the overvoltage fault signal, determining an open or short circuit fault of the correspondingly coupled light emitting element, and generating a first trigger signal; if the corresponding light emitting element is open and The overvoltage fault signal is a logic state representing the overvoltage of the output voltage or a short circuit of the corresponding light emitting component, and the first trigger signal is in the state of the touch-40-201228453, and the light emitting component coupled thereto is turned off. Otherwise, the first trigger signal is in a non-trigger state. 24. The driver of claim 23, wherein each of the light-emitting element fault protection modules comprises: an open-circuit detection comparator that receives another light-emitting element coupled to the light-emitting element fault protection module The voltage at one end is compared with the open threshold 値 voltage to generate an open circuit fault signal; the open circuit fault signal is a normal logic state of the light emitting element when the voltage at the other end of the light emitting element is greater than the open circuit voltage. a logic state representing an open state of the light emitting element when the voltage at the other end of the light emitting element is less than the open threshold voltage; a short circuit detecting comparator receiving a voltage at the other end of the light emitting element coupled to the light emitting element fault protection module Comparing with the short-circuit threshold voltage, generating a short-circuit fault signal; the short-circuit fault signal is a logic state representing a short-circuit of the light-emitting element when the voltage at the other end of the light-emitting element is greater than the short-circuit voltage, in the light-emitting element When the voltage at the other end is less than the short-circuit voltage, it is the logic that represents the normality of the light-emitting element. a trigger circuit that receives the open fault signal, the short fault signal, and the overvoltage fault signal, and provides the first trigger signal; when the open fault signal is a logic state representing an open state of the light emitting component and the overvoltage fault signal is The first trigger signal is a trigger state when the logic state representing the output voltage overvoltage or the duration of the logic state indicating that the short circuit fault signal is shorted by the light emitting element reaches a preset threshold; otherwise the first trigger signal is non- Trigger status. 2. The driver of claim 24, wherein the 5:41 - 201228453 trigger circuit comprises: a first logic gate receiving the open fault signal and the overvoltage fault signal, and outputting a second trigger signal, The second trigger signal is a trigger state when the open circuit fault signal is a logic state representing an open state of the light emitting element, and the overvoltage fault signal is a logic state representing the output voltage overvoltage, otherwise it is a non-trigger state; Receiving the short-circuit fault signal and outputting a third trigger signal, wherein the timer starts counting when the short-circuit fault signal is a logic state indicating that the light-emitting element is short-circuited, and when the timer reaches the When the preset trigger is set, the third trigger signal is a trigger state; if the short circuit fault signal is a normal logic state representing the light-emitting element or the timer does not reach the preset threshold, the third trigger signal is non-trigger a second logic gate, receiving the second and third trigger signals, and outputting the first trigger a signal, wherein, when at least one of the second and third trigger signals is in a trigger state, the first trigger signal is a trigger state; and only the second and third trigger signals are in a non-trigger state, the first The trigger signal is in a non-trigger state. 2. The driver of claim 24, wherein the fault detection and protection circuit further comprises a system shutdown trigger circuit that receives the plurality of the first triggers output by the plurality of light component fault protection modules a signal, and generating a fourth trigger signal, wherein the fourth trigger signal is in a trigger state when the plurality of the first trigger signals are in a trigger state, and the driver is turned off, and the plurality of the first trigger signals are At least one of the non-trigger-42-201228453 states is non-triggered and does not shut down the drive. 27. The driver of claim 26, further comprising a state indicating circuit that receives the overvoltage fault signal or the undervoltage fault signal or the fourth trigger signal and generates an indication signal, wherein the indication The signal is a logic representing the fault of the driver when the overvoltage fault signal is a logic state representing the overvoltage of the output voltage or the undervoltage fault signal is a logic state representing the undervoltage of the output voltage or the fourth trigger signal is a trigger state. State, otherwise a normal logic state representing the drive. 2. The driver of claim 1, further comprising a phase shifting PWM dimming circuit that receives the PWM dimming input signal and phase shifts it to generate a plurality of PWM dimming signals; the PWM dimming input a signal and the plurality of PWM dimming signals are coupled to the current equalization circuit for dimming different ones of the plurality of light-emitting elements in a corresponding manner, wherein for successively lighting/turning off The two PWM dimming signals of the two illuminating elements differ by a predetermined phase 値. 29. The driver according to claim 28, wherein the number of the plurality of light-emitting elements is N, the number of the plurality of PWM dimming signals is N-1, and the predetermined phase 値 is 2π/ Ν, where N is an integer greater than one. The driver of claim 29, wherein the phase shifting PWM dimming circuit comprises Ν-1 delay circuits, each receiving the PWM dimming input signal, and separately inputting the PWM dimming input The signal delay generates Ν-1 PWM dimming signals, wherein the adjacent two PWM dimming signals have a delay of 1/Ν times the period of the PWM dimming input signal. 3. The driver of claim 29, wherein the 5-43-201228453 phase shift PWM dimming circuit comprises: a frequency multiplying circuit that receives the PWM dimming input signal and generates a first pulse signal and a second pulse signal, wherein the first pulse signal is N-multiplied starting from a rising edge of the PWM dimming input signal, and the second pulse signal is N based on a falling edge of the PWM dimming input signal. a frequency doubling module, receiving the PWM dimming input signal and the first and second pulse signals, based on the rising edge and the falling edge of the PWM dimming input signal respectively for the first and second pulse signals A pulse count is performed to effect phase shifting of the PWM dimming input signal. The driver of claim 3, wherein the frequency multiplying circuit comprises: a first frequency multiplying circuit that receives the PWM dimming input signal, and the rising edge of the PWM dimming input signal is Triggering it N times to generate a first pulse signal; and a second frequency multiplying circuit, receiving the PWM dimming input signal, and performing N multiplication on the falling edge of the PWM dimming input signal to generate Second pulse signal. 33. The driver of claim 31, wherein the delay module comprises N-1 delay circuits, each receiving the PWM dimming input signal and the first and second pulse signals, respectively outputting the first Up to N-1 PWM dimming signals; wherein '1st to N-1th delay circuits respectively count the positive pulse of the first pulse signal with the rising edge of the PWM dimming input signal, and simultaneously The falling edge of the PWM dimming input signal is -44 - 201228453. The trigger counts the negative pulse of the second pulse signal, and respectively generates the first to N-1 when the positive pulse of the first pulse signal is counted to 2 to N. The rising edges of the PWM dimming input signals respectively generate a falling edge of the first to N-1 PWM dimming input signals when the negative pulse of the second pulse signal is counted to 2 to N. 34. The driver of claim 33, wherein the N-1 delay circuits each comprise a positive pulse counter, a negative pulse counter, and a flip flop, wherein, for the Xth delay circuit: the positive pulse counter Receiving the PWM dimming input signal at its enable input terminal, receiving the first pulse signal at its count input terminal, and being enabled to be enabled at the rising edge of the PWM dimming input signal, for the first pulse signal The high level pulse counts, when the count is (X+1), the first single pulse is output, the first single pulse resets the positive pulse counter to stop counting; the negative pulse counter receives the input at its enable input a PWM dimming input signal, receiving the second pulse signal at a counting input end thereof, and being triggered to be enabled at a falling edge of the PWM dimming input signal, counting a low level pulse of the second pulse signal, when When the count is (X+1), a second single pulse is output, and the second single pulse resets the negative pulse counter to stop counting; the trigger receives the first single pulse at its set end, and is heavy in it Receiving a second end of the single pulse, the output of a PWM dimming signal X; wherein X varies from 1 to N -1. The driver described in claim 4, wherein the -45-201228453 first and second frequency multiplying circuits are phase-locked loop circuits. 3 6. A display device comprising the driver as described in claim 1 of the patent application. -46-