TWI691947B - LED display driving circuit and LED display - Google Patents

Abstract

An LED display driving circuit has: a voltage-to-current circuit having a voltage input terminal to be coupled with a reference voltage, and a current output terminal to provide a first current, the first current being proportional to the reference voltage; A disconnectable current mirror circuit has a control terminal to be coupled to a short-circuit disconnection signal, and a first current connection terminal to be coupled to the current output terminal, wherein, when the short-circuit disconnection signal is inactive When the second current connection terminal outputs a second current, the second current is a first multiple of the first current, and when the short circuit disconnect signal is active, the second current connection terminal outputs a zero current ; And an output stage current mirror circuit having a third current connection terminal to couple with the second current connection terminal, and a fourth current connection terminal to be generated when the short circuit disconnect signal is the inactive state An output current, the output current being a second multiple of the second current.

Description

LED display driving circuit and LED display

The invention relates to an LED display driving circuit, in particular to an LED display driving circuit with an anti-burning function.

Please refer to FIG. 1, which illustrates a circuit diagram of a conventional LED display driving circuit. As shown in FIG. 1, the LED display driving circuit includes: a negative feedback loop composed of an amplifier 11a, an NMOS transistor 11b and a resistor 11c to make the resistor 11c (its resistance value is R _EXT ) V _REXT is equal to a first reference voltage V _REF1 to generate a certain current I ₁ (=V _REF1 /R _EXT ); consisting of a PMOS transistor 12a, a PMOS transistor 12b, a PMOS transistor 12c, and a resistor A current mirror circuit composed of 12d and a capacitor 12e, in which the channel width ratio of the PMOS transistor 12b and the PMOS transistor 12a is K1, the resistor 12d and the capacitor 12 form a low-pass filter circuit to filter out the impurities generated by the resistor 11c information, and 12c of PMOS system crystal drain voltage of the PMOS transistors to PMOS transistors 12a and 12b under the control of a bias voltage V _b is equal to the output current of the PMOS transistor 12b is I ₂ = K1 * I ₁ ; a negative feedback loop composed of an amplifier 13a and an NMOS transistor 13b is used to make the drain voltage V _{D1 of} the NMOS transistor 13b equal to a second reference voltage V _REF2 , and correspondingly generates a The gate voltage V _G such that the output current of the NMOS transistor 13b = I ₂ ; and a negative feedback loop consisting of an amplifier 14a, an NMOS transistor 14b and an NMOS transistor 14c, where the amplifier 14a is The drain voltage V _D2 of the NMOS transistor 14c is equal to the drain voltage V _D1 of the NMOS transistor 13b, the channel width ratio of the NMOS transistor 14c and the NMOS transistor 13b is K2, and the gate system of the NMOS transistor 14c It is coupled to the gate voltage V _G to generate an output current I _OUT , I _OUT = K2*I ₂ = K2*K1*I ₁ .

However, when the resistor 11c is short-circuited, the output current I _OUT will have a large current, and this large current will not only highlight the corresponding LED display area, but will also burn out the corresponding one when it is lit for a long time. LED unit.

In order to solve the above problems, a novel LED display driving circuit is urgently needed in the art.

An object of the present invention is to provide an LED display driving circuit, which can determine whether a short-circuit phenomenon occurs in the current setting resistor by monitoring the voltage of a current setting resistor, and effectively prevent the LED unit from appearing temporarily during the short-circuit process The large current, thereby extending the life of the LED unit.

Another object of the present invention is to provide an LED display driving circuit, which can effectively avoid false triggering of the protection function due to abnormal noise or sudden conditions by setting a minimum short-circuit detection time to maintain the normality of the LED display display.

Another object of the present invention is to provide an LED display driving circuit, which can turn off the internal high-current branch to reduce power consumption when a short circuit occurs in a current setting resistor to protect the LED unit.

To achieve the above purpose, an LED display driving circuit has been proposed, which has:

A voltage-to-current circuit has a voltage input terminal and a current output terminal, the voltage input terminal is coupled to a reference voltage, the current output terminal is used to provide a first current, and the first current is connected to the The reference voltage is proportional to;

A disconnectable current mirror circuit has a control terminal, a first current connection terminal and a second current connection terminal, the control terminal is used to couple with a short circuit disconnection signal, and the first current connection terminal is The current output terminal of the voltage-to-current circuit is coupled, wherein, when the short-circuit breaking signal is inactive, the second current connection terminal outputs a second current, which is the first current A first multiple; when the short-circuit breaking signal is in an active state, the second current connection terminal outputs zero current; and

An output stage current mirror circuit has a third current connection end and a fourth current connection end, the third current connection end is coupled to the second current connection end of the disconnectable current mirror circuit, and the The fourth current connection terminal is used to generate an output current when the short-circuit breaking signal is in the inactive state, and the output current is a second multiple of the second current.

In an embodiment, the voltage-to-current circuit has:

A first amplifier has a first positive input terminal, a first negative input terminal and a first output terminal, the first positive input terminal is coupled to the reference voltage;

A first NMOS transistor has a first gate, a first drain, and a first source, the first source is coupled to the first negative input, the first gate is coupled to the A first output terminal is coupled, and the first drain is coupled to the current output terminal; and

A first resistor is coupled between the first source and a reference ground, so that the voltage of the first resistor is equal to the reference voltage to generate the first current.

In one embodiment, the disconnectable current mirror circuit has:

A first PMOS transistor has a second source, a second gate and a second drain, the second source is coupled to the DC voltage, the second gate is coupled to the second drain The pole and the current output terminal are coupled to generate a first gate control voltage;

A second PMOS transistor with a third source, a third gate and a third drain, the third source is coupled to the DC voltage, the third gate is coupled to a filtered voltage And the ratio of the channel width-to-length ratio of the second PMOS transistor to the channel width-to-length ratio (W/L) of the first PMOS transistor is the first multiple;

A second resistor and a capacitor are used to form a low-pass filter circuit and used to generate the filter voltage according to the first gate voltage when the short circuit disconnect signal is in the inactive state, so as to filter the Noise generated by the first resistor;

A third PMOS transistor having a fourth source, a fourth gate and a fourth drain, the fourth source is coupled to the third drain, the fourth gate is connected to a The bias voltage is coupled, and the fourth drain is coupled to the second current connection terminal, so that when the short-circuit breaking signal is in the inactive state, the first voltage is controlled under the control of the bias voltage The drain voltage of the two PMOS transistors and the drain voltage of the first PMOS transistor are equal to make the second current equal to the first current times the first multiple; and

A switch has a control contact, a first contact, a second contact, and a third contact. The control contact is coupled to the short-circuit breaking signal, and the first contact is connected to the first Two resistors are coupled, the second contact is coupled to the second gate, the third contact is coupled to the DC voltage, and when the short circuit disconnect signal is the inactive state, the first A contact is electrically connected to the second contact to couple the first gate voltage, and when the short-circuit breaking signal is in the active state, the first contact is electrically connected to the third contact The DC voltage is coupled to increase the voltage of the third gate to turn off the second PMOS transistor, so that the output current of the second current connection terminal is zero.

In an embodiment, the output stage current mirror circuit has:

A second amplifier has a second positive input terminal, a second negative input terminal, and a second output terminal, the second negative input terminal is coupled to a clamp reference voltage, and the second positive input terminal is The third current connection terminal is coupled;

A second NMOS transistor has a fifth gate, a fifth drain and a fifth source, the fifth gate is coupled to the second output terminal, the fifth drain is connected to the first The three current connection terminals are coupled, and the fifth source is coupled to the reference ground, so that a first clamping voltage generated by the fifth drain is equal to the clamping reference voltage, and the first The two output terminals correspondingly generate a second gate voltage to make the output current of the second NMOS transistor equal to the second current;

A third amplifier having a third positive input terminal, a third negative input terminal and a third output terminal, the third positive input terminal is coupled to the third current connection terminal;

A third NMOS transistor has a sixth gate, a sixth drain, and a sixth source, the sixth source is coupled to the third negative input, and the sixth gate is connected to the The third output terminal is coupled, and the sixth drain is coupled to the fourth current connection terminal; and

A fourth NMOS transistor has a seventh gate, a seventh drain, and a seventh source, the seventh gate is coupled to the second gate voltage, and the seventh drain is connected to the The sixth source is coupled to generate a second clamping voltage, and the ratio of the channel width to length ratio of the fourth NMOS transistor to the channel width to length ratio of the second NMOS transistor is equal to the second multiple.

In one embodiment, the LED display driving circuit further has a short circuit detection circuit, the short circuit detection circuit has:

A comparator having a positive input terminal coupled to a voltage of a current setting resistor, a negative input terminal coupled to the reference voltage, and an output terminal outputting a comparison voltage;

A Schmitt trigger for performing a bounce signal filtering process and an inversion operation on the comparison voltage to generate a first pulse signal; and

A flip-flop circuit has an input terminal for coupling the first pulse signal, a clock control terminal for coupling a clock signal, a reset control terminal for coupling the first pulse signal, and an output terminal for output This short circuit opens the signal.

In an embodiment, the flip-flop circuit has:

A first flip-flop with an input terminal for coupling the first pulse signal, a clock control terminal for coupling the clock signal, a reset control terminal for coupling the first pulse signal, and an output terminal To output a second pulse signal; and

A second flip-flop with an input terminal for coupling the second pulse signal, a clock control terminal for coupling the clock signal, a reset control terminal for coupling the first pulse signal, and an output terminal To output the short-circuit disconnection signal.

In addition, the present invention further provides an LED display having an LED display screen and a plurality of LED display drive circuits as described above for driving the LED display screen.

In a possible embodiment, the LED display may be an organic light emitting diode display, a quantum dot light emitting diode display, a Mirco-LED display, or a Mini-LED display.

In order to enable your review committee to further understand the structure, features and purpose of the present invention, the drawings and detailed description of the preferred embodiments are attached as follows.

Please refer to FIG. 2, which illustrates a block diagram of an embodiment of the LED display driving circuit of the present invention. As shown in FIG. 2, the LED display driving circuit includes a voltage-to-current circuit 110, a disconnectable current mirror circuit 120 and an output stage current mirror circuit 130.

The voltage-to-current circuit 110 has a voltage input terminal and a current output terminal, the voltage input terminal is coupled to a reference voltage V _REF1 , the current output terminal is used to provide a first current I ₁ , and the first current I ₁ is proportional to the reference voltage V _REF1 .

The disconnectable current mirror circuit 120 has a control terminal, a first current connection terminal and a second current connection terminal. The control terminal is used to couple with a short circuit disconnection signal SW _SHORT . The first current connection terminal is Coupled to the current output terminal of the voltage-to-current circuit 110, wherein, when the short-circuit breaking signal SW _SHORT is in an inactive state (such as but not limited to a low potential), the second current connection terminal outputs a first Two currents I ₂ , I ₂ =K1*I ₁ ; when the short-circuit breaking signal SW _SHORT is in an active state (for example, but not limited to a high potential), the second current connection terminal outputs zero current.

The output stage current mirror circuit 130 has a third current connection terminal and a fourth current connection terminal, the third current connection terminal is coupled to the second current connection terminal of the disconnectable current mirror circuit 120, and the The fourth current connection terminal is used to generate an output current I _OUT when the short-circuit breaking signal SW _SHORT is in the inactive state, I _OUT = K2*I ₂ = K2*K1*I ₁ .

Please refer to FIG. 3, which is a circuit diagram of an embodiment of the LED display driving circuit of FIG. 2. As shown in FIG. 3, the voltage-to-current circuit 110 is a first negative feedback loop composed of a first amplifier 110a, a first NMOS transistor 110b, and a first resistor 110c, where the first The amplifier 110a has a first positive input, a first negative input, and a first output. The first NMOS transistor 110b has a first gate, a first drain, and a first source. A positive input terminal is coupled to the reference voltage V _REF1 , the first negative input terminal is coupled to the first source electrode, the first output terminal is coupled to the first gate electrode, and the current output terminal is coupled to The first drain is coupled, and the first resistor 110c is coupled between the first source and a reference ground, so that the voltage V _REXT of the first resistor 110c (the resistance value of which is R _EXT ) is equal to Reference voltage V _REF1 to generate a first current I ₁ (=V _REF1 /R _EXT ) and output the first current I ₁ from the current output terminal.

The disconnectable current mirror circuit 120 is composed of a first PMOS transistor 120a, a second PMOS transistor 120b, a third PMOS transistor 120c, a second resistor 120d, a capacitor 120e and a switch 120f , Wherein the first PMOS transistor 120a has a second source, a second gate and a second drain, the second source is coupled to the DC voltage, the second gate is coupled to the The second drain and the current output are coupled to generate a first gate voltage V _G1 . The second PMOS transistor 120 b has a third source, a third gate, and a third drain. The first The three source electrodes are coupled to the DC voltage, the third gate electrode is coupled to a filtered voltage V _C1 , and the channel width-to-length ratio (W/L) of the second PMOS transistor 120 b and the first PMOS electrode The ratio of the channel width-to-length ratio (W/L) of the crystal 120a is K1; the second resistor 120d and the capacitor 120e form a low-pass filter circuit and are used when the short-circuit breaking signal SW _SHORT is in the inactive state The filter voltage V _{C1 is} generated according to the first gate voltage V _G1 to filter out the noise generated by the first resistor 110c; the third PMOS transistor 120c has a fourth source and a fourth gate a fourth electrode and a drain, the fourth source line and a drain coupled to the third, the fourth gate line and a bias voltage V _b is coupled to the drain and the fourth line and the second The current connection terminal is coupled so that when the short-circuit breaking signal SW _SHORT is in the inactive state, under the control of the bias voltage V _b , the drain voltage of the second PMOS transistor 120 b and the first The drain voltage of the PMOS transistor 120a is equal to make the second current I ₂ =K1*I ₁ ; and the switch 120f has a control contact, a first contact, a second contact and a third contact , The control contact is coupled to the short-circuit breaking signal SW _SHORT , the first contact is coupled to the second resistor 120d, the second contact is coupled to the second gate, and the third The contact is coupled to the DC voltage, and when the short-circuit breaking signal SW _SHORT is in the inactive state, the first contact is electrically connected to the second contact to couple the first gated voltage V _G1 , and when the short-circuit breaking signal SW _SHORT is in the active state, the first contact is electrically connected to the third contact to couple the DC voltage to raise the voltage of the third gate In order to disconnect the second PMOS transistor 120b, the output current of the second current connection terminal is zero.

The output stage current mirror circuit 130 has a second negative feedback loop composed of a second amplifier 130a and a second NMOS transistor 130b, and a third amplifier 130c and a third NMOS transistor 130d And a third negative feedback loop composed of a fourth NMOS transistor 130e, wherein the second amplifier 130a has a second positive input terminal, a second negative input terminal and a second output terminal, the first The two NMOS transistors 130b have a fifth gate, a fifth drain, and a fifth source. The second negative input terminal is coupled to a clamping reference voltage V _REF2 , and the second positive input terminal is The third current connection is coupled, the second output is coupled to the fifth gate, the fifth drain is coupled to the third current connection, and the fifth source is coupled to the Reference ground coupling is used to make a first clamping voltage V _D1 generated by the fifth drain equal to the clamping reference voltage V _REF2 , and correspondingly generate a second gate voltage at the second output terminal V _G2 such that the output current of the second NMOS transistor 130b = I ₂ ; the third amplifier 130c has a third positive input terminal, a third negative input terminal and a third output terminal, and the third NMOS transistor 130d It has a sixth gate, a sixth drain, and a sixth source, the third positive input is coupled to the third current connection, and the third negative input is coupled to the sixth source The third output terminal is coupled to the sixth gate, and the sixth drain is coupled to the fourth current connection terminal, and the fourth NMOS transistor 130e has a seventh gate, a A seventh drain and a seventh source, the seventh gate is coupled to the second gate voltage V _G2 , the seventh drain is coupled to the sixth source to generate a second clamp Voltage V _D2 , and the ratio of the channel width-to-length ratio (W/L) of the fourth NMOS transistor 130 e to the channel width-to-length ratio (W/L) of the second NMOS transistor 130 b is equal to K2. When the short-circuit breaking signal SW _SHORT is in the inactive state, the second clamping voltage V _D2 will be equal to the first clamping voltage V _D1 , so that the output current I _OUT = K2*I ₂ = K2* K1*I ₁ .

Please refer to FIG. 4, which is a circuit diagram of an embodiment of a short-circuit detection circuit for generating the short-circuit breaking signal SW _SHORT required by the LED display driving circuit of FIG. 2. As shown in FIG. 4, the short-circuit detection circuit has a comparator 210, a Schmitt trigger 220 and a flip-flop circuit composed of a first flip-flop 230 and a second flip-flop 240.

The comparator 210 has a positive input terminal coupled to the voltage V _{REXT of} the first resistor 110 _c , a negative input terminal coupled to the reference voltage V _REF1 , and an output terminal to output a comparison voltage V _CMP .

The Schmitt trigger 220 is used to perform a bounce signal filtering process and an inversion operation on the comparison voltage V _CMP to generate a first pulse signal V _P1 .

The first flip-flop 230 has an input terminal for coupling the first pulse signal V _P1 , a clock control terminal for coupling a clock signal CLK, and a reset control terminal for coupling the first pulse signal V _P1 , and An output terminal outputs a second pulse signal V _P2 .

The second flip-flop 240 has an input terminal for coupling the second pulse signal V _P2 , a clock control terminal for coupling the clock signal CLK, and a reset control terminal for coupling the first pulse signal V _P1 , And an output terminal to output the short-circuit breaking signal SW _SHORT .

Please refer to FIG. 5, which illustrates a working timing diagram of the short circuit detection circuit of FIG. 4. As shown in FIG. 5, assuming that the first resistor 110c is short-circuited during t ₀ -t ₂ , before t ₀ , V _REXT = V _REF1 ; after t ₀ , V _REXT <V _REF1 , and V _P1 will change from a low potential to a high potential to release the reset states of the first flip-flop 230 and the second flip-flop 240. Then, the first flip-flop 230 will be the first after the clock signal CLK is at t ₀ One rising edge makes the second pulse signal V _P2 high, and then the second flip-flop 240 changes the short-circuit breaking signal SW _SHORT to the second rising edge after the clock signal CLK is at t ₀ High potential, and after t ₂ time point, V _P1 will change from high potential to low potential to reset the first flip-flop 230 and the second flip-flop 240 to pull the short-circuit breaking signal SW _SHORT back from the high potential Low potential. In addition, the present invention can also adjust a minimum short-circuit detection time by changing the period of the clock signal CLK and the number of flip-flops, thereby effectively avoiding the false triggering of the protection function due to abnormal noise or unexpected conditions.

In addition, as can be seen from FIG. 5, the short-circuit breaking signal SW _SHORT needs at least one cycle of the clock signal CLK after t ₀ to change from a low potential to a high potential, that is, the short-circuit breaking signal SW _{SHORT is} at t ₀ The period of t _{1 is} still low, so the first PMOS transistor 120a generates a large current during the period of t ₀ -t ₁ . At this time, the low-pass filter circuit formed by the second resistor 120d and the capacitor 120e can filter out the voltage change of V _REXT during t ₀ -t ₁ to prevent the first PMOS transistor 120a from t ₀ -t ₁ The large current generated during this period is mirrored to the second PMOS transistor 120b, so as to avoid a bright phenomenon of an LED unit.

According to the above description, the present invention further proposes an LED display having an LED display and a plurality of LED display driving circuits as described above for driving the LED display, wherein the LED display may be an organic light-emitting diode Polar body display, quantum dot light emitting diode display, Mirco-LED display or Mini-LED display.

With the design disclosed above, the present invention has the following advantages:

1. The LED display driving circuit of the present invention can determine whether the current setting resistor is short-circuited by monitoring the voltage of the current setting resistor, and effectively prevent the LED unit from appearing a large current during the short-circuit process, thereby Extend the life of the LED unit.

2. The LED display driving circuit of the present invention can effectively prevent the false triggering of the protection function due to abnormal noise or sudden conditions by setting a minimum short-circuit detection time, so as to maintain the normal display of the LED display.

3. The LED display driving circuit of the present invention can turn off the internal large current branch to reduce power consumption when a short circuit occurs in a current setting resistor to protect the LED unit.

The case disclosed in this case is a preferred embodiment, and any part of the modification or modification that originates from the technical idea of this case and can be easily inferred by those skilled in the art, does not deviate from the patent scope of this case.

In summary, regardless of the purpose, means and efficacy, this case is showing that it has a technical feature that is very different from the conventional ones, and its first invention is in practical use, and it is also in compliance with the patent requirements of the invention. Granted patents as soon as possible to benefit the society and feel virtuous.

11a: amplifier

11b: NMOS transistor

11c: resistance

12a: MOS transistor

12b: PMOS transistor

12c: PMOS transistor

12d: resistance

12e: capacitance

13a: amplifier

13b: NMOS transistor

14a: amplifier

14b: NMOS transistor

14c: NMOS transistor

110: voltage to current circuit

120: The current mirror circuit can be disconnected

130: Output stage current mirror circuit

110a: the first amplifier

110b: the first NMOS transistor

110c: first resistance

120a: the first PMOS transistor

120b: Second PMOS transistor

120c: Third PMOS transistor

120d: second resistance

120e: capacitance

120f: switch

130a: Second amplifier

130b: Second NMOS transistor

130c: third amplifier

130d: Third NMOS transistor

130e: Fourth NMOS transistor

210: comparator

220: Schmidt trigger

230: the first flip-flop

240: second flip-flop

FIG. 1 is a circuit diagram of a conventional LED display driving circuit. 2 is a block diagram of an embodiment of the LED display driving circuit of the present invention. FIG. 3 is a circuit diagram of an embodiment of the LED display driving circuit of FIG. 2. 4 is a circuit diagram of an embodiment of a short-circuit detection circuit for generating a short-circuit breaking signal required by the LED display driving circuit of FIG. 2. FIG. 5 illustrates a working timing diagram of the short circuit detection circuit of FIG.

110: voltage to current circuit

120: The current mirror circuit can be disconnected

130: Output stage current mirror circuit

Claims (8)

An LED display driving circuit has: a voltage-to-current circuit having a voltage input terminal and a current output terminal, the voltage input terminal is coupled to a reference voltage, and the current output terminal is used to provide a first current , And the first current is proportional to the reference voltage; a disconnectable current mirror circuit has a control terminal, a first current connection terminal and a second current connection terminal, the control terminal is used to short-circuit with a Disconnect signal coupling, the first current connection terminal is coupled to the current output terminal of the voltage-to-current circuit, wherein, when the short circuit disconnection signal is inactive, the second current connection terminal outputs a A second current, the second current being a first multiple of the first current; when the short-circuit breaking signal is active, the second current connection terminal outputs zero current; and an output stage current mirror circuit having a A third current connection end and a fourth current connection end, the third current connection end is coupled to the second current connection end of the disconnectable current mirror circuit, and the fourth current connection end is used to The short-circuit breaking signal generates an output current in the inactive state, and the output current is a second multiple of the second current. The LED display driving circuit according to claim 1, wherein the voltage-to-current circuit has: a first amplifier having a first positive input terminal, a first negative input terminal and a first output terminal, the first positive The input terminal is coupled to the reference voltage; a first NMOS transistor has a first gate, a first drain and a first source, the first source is coupled to the first negative input The first gate is coupled to the first output, and the first drain is coupled to the current output; and a first resistor is coupled to the first source and a reference ground In order to make the voltage of the first resistor equal to the reference voltage to generate the first current. The LED display driving circuit according to claim 2, wherein the disconnectable current mirror circuit has: a first PMOS transistor having a second source, a second gate, and a second drain, the first The two source systems are coupled to the DC voltage, and the second gate system is coupled to the second drain and the current output terminal To generate a first gate voltage; a second PMOS transistor with a third source, a third gate and a third drain, the third source is coupled to the DC voltage, the first The three gates are coupled to a filtered voltage, and the ratio of the channel width-to-length ratio of the second PMOS transistor to the channel width-to-length ratio (W/L) of the first PMOS transistor is the first multiple; one The second resistor and a capacitor are used to form a low-pass filter circuit and used to generate the filter voltage according to the first gate voltage when the short circuit disconnect signal is in the inactive state, so as to filter the first Noise generated by a resistor; a third PMOS transistor with a fourth source, a fourth gate and a fourth drain, the fourth source is coupled to the third drain, the The fourth gate is coupled to a bias voltage, and the fourth drain is coupled to the second current connection terminal, so that when the short-circuit breaking signal is the inactive state, the bias voltage Under the control of the voltage, the drain voltage of the second PMOS transistor and the drain voltage of the first PMOS transistor are equal to make the second current equal to the first current times the first multiple; and a switch, It has a control contact, a first contact, a second contact and a third contact. The control contact is coupled to the short-circuit breaking signal, and the first contact is coupled to the second resistor The second contact is coupled to the second gate, the third contact is coupled to the DC voltage, and when the short-circuit disconnection signal is in the inactive state, the first contact Is electrically connected to the second contact to couple the first gated voltage, and when the short-circuit breaking signal is in the active state, the first contact is electrically connected to the third contact to couple The DC voltage pulls up the voltage of the third gate to turn off the second PMOS transistor, so that the output current of the second current connection terminal is zero. The LED display driving circuit according to claim 3, wherein the output stage current mirror circuit has: a second amplifier having a second positive input terminal, a second negative input terminal and a second output terminal, the second The negative input terminal is coupled to a clamping reference voltage, the second positive input terminal is coupled to the third current connection terminal; a second NMOS transistor has a fifth gate, a fifth drain and A fifth source, the fifth gate is coupled to the second output, the fifth drain is coupled to the third current connection, and the The fifth source is coupled to the reference ground so that a first clamping voltage generated by the fifth drain is equal to the clamping reference voltage, and the second output terminal correspondingly generates a second Gating voltage so that the output current of the second NMOS transistor is equal to the second current; a third amplifier has a third positive input terminal, a third negative input terminal and a third output terminal, the third The positive input terminal is coupled to the third current connection terminal; a third NMOS transistor has a sixth gate, a sixth drain, and a sixth source, the sixth source is connected to the third The negative input terminal is coupled, the sixth gate is coupled to the third output terminal, and the sixth drain is coupled to the fourth current connection terminal; and a fourth NMOS transistor having a seventh A gate, a seventh drain and a seventh source, the seventh gate is coupled to the second gate voltage, the seventh drain is coupled to the sixth source to generate a second Clamping voltage, the seventh source is coupled to the reference ground, and the ratio of the channel width to length ratio of the fourth NMOS transistor to the channel width to length ratio of the second NMOS transistor is equal to the second multiple . The LED display driving circuit according to claim 1, further having a short circuit detection circuit, the short circuit detection circuit having: a comparator having a positive input terminal to be coupled with a voltage of a current setting resistor, A negative input terminal is coupled to the reference voltage, and an output terminal outputs a comparison voltage; a Schmitt trigger is used to perform a bounce signal filtering process and an inversion operation on the comparison voltage to generate a A first pulse signal; and a flip-flop circuit having an input terminal for coupling the first pulse signal, a clock control terminal for coupling a clock signal, and a reset control terminal for coupling the first pulse signal, And an output terminal to output the short circuit breaking signal. The LED display driving circuit according to claim 5, wherein the flip-flop circuit has: a first flip-flop with an input terminal to couple the first pulse signal, and a clock control terminal to couple the clock Signal, a reset control terminal to couple the first pulse signal, and an output terminal to output a second pulse signal; and a second flip-flop with an input terminal to couple the second pulse signal, Pulse control terminal Connected to the clock signal, a reset control terminal is coupled to the first pulse signal, and an output terminal is output to output the short circuit disconnect signal. An LED display has an LED display screen and a plurality of LED display drive circuits as described in any one of claims 1-6 for driving the LED display screen. The LED display according to claim 7, which is a display selected from the group consisting of an organic light emitting diode display, a quantum dot light emitting diode display, a Mirco-LED display, and a Mini-LED display.

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