TWI757209B - 利用遮罩的銅柱基板結合方法 - Google Patents

利用遮罩的銅柱基板結合方法 Download PDF

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Publication number
TWI757209B
TWI757209B TW110124738A TW110124738A TWI757209B TW I757209 B TWI757209 B TW I757209B TW 110124738 A TW110124738 A TW 110124738A TW 110124738 A TW110124738 A TW 110124738A TW I757209 B TWI757209 B TW I757209B
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TW
Taiwan
Prior art keywords
inner diameter
mask
substrate
copper
copper pillar
Prior art date
Application number
TW110124738A
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English (en)
Chinese (zh)
Other versions
TW202203405A (zh
Inventor
高允成
安根植
Original Assignee
南韓商普羅科技有限公司
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Application filed by 南韓商普羅科技有限公司 filed Critical 南韓商普羅科技有限公司
Publication of TW202203405A publication Critical patent/TW202203405A/zh
Application granted granted Critical
Publication of TWI757209B publication Critical patent/TWI757209B/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492—Bases or plates or solder therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492—Bases or plates or solder therefor
    • H01L23/4924—Bases or plates or solder therefor characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/11001—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
    • H01L2224/11003—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for holding or transferring the bump preform
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/11001—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
    • H01L2224/11005—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for aligning the bump connector, e.g. marks, spacers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/741—Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L2224/742—Apparatus for manufacturing bump connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
TW110124738A 2020-07-07 2021-07-06 利用遮罩的銅柱基板結合方法 TWI757209B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020200083246A KR20220005723A (ko) 2020-07-07 2020-07-07 마스크를 이용하는 구리 필러 기판 본딩 방법
KR10-2020-0083246 2020-07-07

Publications (2)

Publication Number Publication Date
TW202203405A TW202203405A (zh) 2022-01-16
TWI757209B true TWI757209B (zh) 2022-03-01

Family

ID=79342821

Family Applications (1)

Application Number Title Priority Date Filing Date
TW110124738A TWI757209B (zh) 2020-07-07 2021-07-06 利用遮罩的銅柱基板結合方法

Country Status (3)

Country Link
KR (1) KR20220005723A (ko)
TW (1) TWI757209B (ko)
WO (1) WO2022010234A1 (ko)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201236521A (en) * 2011-01-18 2012-09-01 Fujitsu Ltd Surface coating method, semiconductor device, and circuit board package
US20140077295A1 (en) * 2006-03-02 2014-03-20 Micron Technology, Inc. Vertical gated access transistor
US20140134839A1 (en) * 2012-11-13 2014-05-15 Samsung Electronics Co., Ltd. Methods of fabricating semiconductor devices with electrode support patterns
US20190252360A1 (en) * 2017-02-10 2019-08-15 Lumens Co., Ltd. Micro-led module and method for fabricating the same
US20200161236A1 (en) * 2018-11-21 2020-05-21 Globalfoundries Inc. Top electrode interconnect structures

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101103302B1 (ko) * 2009-10-08 2012-01-11 엘지이노텍 주식회사 인쇄회로기판 및 이의 제조 방법
KR102100867B1 (ko) * 2013-06-26 2020-04-14 삼성전자주식회사 솔더 볼 탑재 장치
KR102439010B1 (ko) * 2016-12-19 2022-08-31 타츠타 전선 주식회사 패키지 기판 및 패키지 기판의 제조 방법
KR101975103B1 (ko) * 2017-06-20 2019-05-03 주식회사 프로텍 플립칩 레이저 본딩 장치 및 플립칩 레이저 본딩 방법
KR102078936B1 (ko) * 2018-11-07 2020-02-19 주식회사 프로텍 도전성 볼 탑재 방법

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140077295A1 (en) * 2006-03-02 2014-03-20 Micron Technology, Inc. Vertical gated access transistor
TW201236521A (en) * 2011-01-18 2012-09-01 Fujitsu Ltd Surface coating method, semiconductor device, and circuit board package
US20140134839A1 (en) * 2012-11-13 2014-05-15 Samsung Electronics Co., Ltd. Methods of fabricating semiconductor devices with electrode support patterns
US20190252360A1 (en) * 2017-02-10 2019-08-15 Lumens Co., Ltd. Micro-led module and method for fabricating the same
US20200161236A1 (en) * 2018-11-21 2020-05-21 Globalfoundries Inc. Top electrode interconnect structures

Also Published As

Publication number Publication date
WO2022010234A1 (ko) 2022-01-13
KR20220005723A (ko) 2022-01-14
TW202203405A (zh) 2022-01-16

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